Sorry Jack... maybe my choice of words was poor, I meant no disrespect at all... In fact I greatly respect your insights and comments... The 'Tricks' I used before we had any way to thermally model it were... Use more copper... thicken the copper to 3 or 4 ounces, add layers to the board with duplicate tracks of copper one over the other and stitch them together with vias... I did the solder plating trick too like George has. I have build boards with very high currents (35 AMPS) before and had them survive... but I didn't have the 'science' behind it to work with, so I basically 'over designed' it using all available space for conductors to carry the current. 4 oz copper and .400 wide traces on multiple layers if I remember correctly... it was a long time ago. This was a power supply design and not exactly the same type of problem I run into in the RF field. The heat developed in one track will influence the temps in the vicinity of any another heat source, whether it is a track or component that is contributing to the local heating of the epoxy laminate. It is much nicer to have the capability to model it and 'see' what temps things will get to given specific environmental restrictions. But when in doubt... more copper is better. And a thermal escape path for the heat to travel away from the board to the ambient air is very important too. Otherwise, the heat will get into a situation called 'thermal runaway'... where the temp builds to the point of destruction of the assembly because there is no place for the heat to go. You could visualize it as a pool with multiple faucets as sources of filling the pool and a drain for emptying the pool... If the water in the pool represents the heat in an assembly... then in order to maintain a specific temperature, the water going into the pool must equal the water exiting the pool... If the flow of water is increased the amount of water exiting must also increase if you want to contain the level of water in the pool... if the exit is restricted to a lesser amount of water passing through it, but the flow from the faucets has increased then the level in the pool rises... as the temperature does in a thermal model. Open the faucets and the level rises to the point of equilibrium... inlet flow equaling outlet flow... if it can't pass the water out fast enough... the pool eventually overflows... much like the thermal runaway situation I was describing. So the heat generated by the multiple tracks adds to the local heat in the board and spreads at whatever rate the thermal resistivity the epoxy laminate and copper can spread it until the entire assembly reaches thermal equilibrium... with the sources of heat being the highest temps... and the surfaces in contact with the ambient air are at the lowest temps. That sort of my understanding of a thermal system... as best I can explain it. I'm not a thermal engineer... but they are nice to have around in a design situation that has high currents involved. Best regards, Bill Brooks PCB Design Engineer, C.I.D.+ Tel: (760)597-1500 Fax: (760)597-1510 Datron World Communications, Inc. Vista, California -----Original Message----- From: George Patrick [mailto:[log in to unmask]] Sent: Thursday, May 10, 2007 9:24 AM To: [log in to unmask] Subject: Re: [DC] Current vs. Temperature (IPC vs. PCBTEMP) Back when I ran into stuff like this, a number of things were generally done: 1. Leave an opening in the soldermask over the trace so the solder plating would wet the trace. This would act as additional thickness which would lower the temp rise for the same current. 2. Run thru-hole jumpers in the signal path, ( ====O--------O=O----------O===) minimizing trace copper and maximizing wire copper. This was back in the days of VCD inserters that formed jumpers from a spool of wire on the fly, so jumper cost was not an issue. We never had room enough on the boards to run "bus bars" but that could be another path if you have enough room. 3. One board had "heatsinks" that were soldered to a pad in each trace. These made compression contact to the cast metal housing thru a mylar insulator. The idea is to get rid of the heat and keep the temperature below where the traces start lifting from the substrate. -- George Patrick Tektronix, Inc. Central Engineering, EDS Applications Support P.O. Box 500, M/S 39-512 Beaverton, OR 97077-0001 * 503-627-5272 (voice) * 503-627-5587 (fax) http://www.tektronix.com http://www.pcb-designer.com "Off-Grid and Proud of it!" -----Original Message----- From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Jack Olson Sent: Thursday, May 10, 2007 07:54 To: [log in to unmask] Subject: Re: [DC] Current vs. Temperature (IPC vs. PCBTEMP) Thanks for explaining to everyone how unique my "challenge" is, but I would think others have faced similar situations. I'm not really asking anyone to solve my problem for me, and it this unique application doesn't really warrant buying and learning a thermal simulator, but it just makes me wonder how other people treat the problem. Many people I'm sure have multiple currents on a board. (I don't think ALL of us are doing 2.5V digital designs) If you assume the chart or calculator is for a single trace, and you have TWO traces, do you: 1) use the single trace values? 2) increase the width a little? 3) try to leave space between them? 4) simulate it? So its kind of a POLL. What do YOU do? just curious, Jack On 5/9/07, Brooks,Bill <[log in to unmask]> wrote: > > Generally most boards do not have the same conditions that Jack is > describing to the group. This is a specialized application and I would > recommend doing a thermal model of the board before making any > assumptions. > We use a program called ICEPACK > > (http://www.ansys.com/products/icepak/default.asp ) > > along with our Solidworks 3D model of the board assembly which is a direct > output from the Altium Designer board design program and we can plug > thermal > temp and conductivity values into the board assembly and predict what the > temps will be at any given ambient in any enclosure we design. > > The challenge facing Jack is predicting what the total load of heat will > raise the temperature to hoping of course that it does not exceed the Tg > of > the board material. > > > Bill Brooks > PCB Design Engineer, C.I.D.+ > Tel: (760)597-1500 Fax: (760)597-1510 > Datron World Communications, Inc. > Vista, California > > > ------------------------------------------------------------------------ --------- > DesignerCouncil Mail List provided as a free service by IPC using LISTSERV > 1.8d > To unsubscribe, send a message to [log in to unmask] with following text in > the BODY (NOT the subject field): SIGNOFF DesignerCouncil. > To temporarily stop/(restart) delivery of DesignerCouncil send: SET > DesignerCouncil NOMAIL/(MAIL) > Search previous postings at: www.ipc.org > On-Line Resources & Databases > > E-mail Archives > Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16for additional information, or contact Keach Sasamori at > [log in to unmask] or 847-615-7100 ext.2815 > > ------------------------------------------------------------------------ --------- > ------------------------------------------------------------------------ --------- DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF DesignerCouncil. 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To temporarily stop/(restart) delivery of DesignerCouncil send: SET DesignerCouncil NOMAIL/(MAIL) Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 ---------------------------------------------------------------------------------