I have a board with a 15VDC trace on the surface layer that runs under a
flat washer.  

The trace is covered by SM, which provides 500vdc isolation per .001 mil
of SM coating. 

2221 states that any electrical conduction trace per sec 6.3 lists a
minimum clearance of .00512 to any other conductive surface (.ie
mechanical hardware)

Do I violate the spec.

Any help would be greatly appreciated.

Shannon Abel





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