Actually they aren't very similar at all. Edge fingers are relatively easy to do because they can be connected to a tie bar off the edge of the panel to provide the connectivity to different nets for the electrolytic plating. For wirebonding, it's almost impossible to do this without complex tie-bar removal processes. Mike McMaster DFM Engineer Merix Corporation Phone 503-992-4263 Mobile 503-720-3277 -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Ryan Grant Sent: Monday, December 05, 2005 10:11 AM To: [log in to unmask] Subject: Re: [TN] How to prevent solder mask peeling problem for ENIG+ENEG circuit boards No, you're right. Linda said wire bonded sites, but the processes are similar. -----Original Message----- From: Eddie Rocha [mailto:[log in to unmask]] Sent: Monday, December 05, 2005 10:40 AM To: TechNet E-Mail Forum; rgrant Subject: Re: [TN] How to prevent solder mask peeling problem for ENIG+ENEG circuit boards I'm sorry, I don't know why but I was thinking wire bonded sites not edge connectors? Thank you, Eddie Rocha South Bay Circuits Hi Eddie, All of my boards are electrolytic Ni and Au AFTER soldermask, and I won't have it any other way! Soldermask doesn't stick well to gold so it should be coated directly to copper. Even coated on copper there can still be adhesion problems. Soldermask formulations that hold up well to both the immersion gold plating and electrolytic gold plating have been around for decades. Linda, There are many formulations of soldermask that work well with any of the gold processes. I was surprised to find out that all of my suppliers, (spanning three continents), all used Taiyo PSR-4000 as their primary soldermask supply. Most of them use the exact same process you described to mask off the board for selective gold plating of edge connector tabs. The "old" way is to use blue tape instead of dry film, to mask off the board where gold is not wanted. If your supplier doesn't know how to fix your current problems, that is a huge red flag you are using a shop that doesn't know what they are doing. In the interim, until you find a new shop, or get your current one to figure out the dry film process, have them use the "old" way and mask off the board using blue tape. (But make sure they don't use a knife to trim the tape. I've had shops cut my traces trying to trim the tape.) Regards, Ryan -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Eddie Rocha Sent: Monday, December 05, 2005 9:08 AM To: [log in to unmask] Subject: Re: [TN] How to prevent solder mask peeling problem for ENIG+ENEG circuit boards Actually I can't figure out how you plate electrolytic Ni and Au after soldermask or why? Could you explain? Thank you, Eddie Rocha South Bay Circuits Hello Eddie, Thanks for your good idea. Can you explain how to process Electrolytic Ni and Au plating before LPI solder mask in detail? I can't figure out how it is done. Best regards, Linda Li -----Original Message----- From: Eddie Rocha [mailto:[log in to unmask]] Sent: Saturday, December 03, 2005 12:59 AM To: TechNet E-Mail Forum; Li, Linda Subject: Re: [TN] How to prevent solder mask peeling problem for ENIG+ENEG circuit boards I would have used the following sequence of processes: Electrolytic Ni & Au plating before LPI soldermask, etch the outer layer image, LPI soldermask, peelable mask (to protect the electrolytic gold features, then ENIG. I wouldn't expect soldermask adhesion problems with this approach. Thank you, Eddie Rocha South Bay Circuits Hello all, We have a design using ENIG plus ENEG surface finishing on circuit boards, ENIG is used for Al wire bonding, ENEG is used for Au wire bonding. We met 2 problems about this design. 1) We found solder mask peeling problem after aging the assembled circuit boards at 150 degree C for 2 hours. We contact the circuit board supplier and were told that because of 2 times UV exposure( 1 time is in solder mask exposure, the other is in ENIG process), the solder mask was apt to peel off. So far the supplier doesn't have any good method to solve this problem. Do you have any suggestions to solve this problem? Thanks. 2) During ENIG process, the gold is seeped onto the surface of copper pad that needs to be electrolytic gold plated. It's because of air bubble entrapped during dry film lamination. The supplier has changed the lamination speed, processed the panels in different direction, but still can't solve the problem. I am in urgent need of your expert advice . The circuit board fabrication process flow is as follows: >> solder mask printing>>dry film lamination>> UV exposure>>dry film development>>Electroless Nickel Immersion gold plating>>strip dry film resist>>Electrolytic nickel and gold plating>> Thanks for your help in advance! Best regards, Linda Li ************************************************************************ **************** Note: If the reader of this message is not the intended recipient, or an employee or agent responsible for delivering this message to the intended recipient, you are hereby notified that any dissemination, distribution or copying of this communication is strictly prohibited. If you have received this communication in error, please notify us immediately by replying to the message and deleting it from your computer. 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