6th paragraph typo: "is sequentially laminated" should be "isn't sequentially laminated". Sorry. "Valerie St.Cyr" <[log in to unmask]> Sent by: TechNet <[log in to unmask]> 08/02/2005 03:23 PM Please respond to TechNet E-Mail Forum; Please respond to valerie.st.cyr To: [log in to unmask] cc: Subject: Re: [TN] Required capture pad size for drilled holes? Hal, This actually is not a simple question with a simple answer ... here is why. The answer depends on several factors: the thickness of the board; the number of layers; the type of layers; the amount of copper ... The drill tends to wander off center as it goes through the board, with the centerpoint of the exit opening different from the center point of the entry opening. So, for each layer it intersects on the way down, the accuracy gets progressively worse; therefore, the shorter the distance it travels in the z-axis, the more accurate the location at any point in the z-axis. Signal layers, especially half-ounce copper foil signals, which are lightly populated will distort more than heavy copper planes, which means the pads may end up further away from their artwork nominal locations. A big factor that is usually not understood by designers is that a hole described as .010 +0/-.010" is not a .010" hole. If your board is thick, the fabricator will want to drill it with the largest drill size your pad selection will allow - and you want them to do that too, because 1) it saves you money and 2) it is more reliable. So if you have an .062" board they can drill it with a .010" bit and it will finish at about .007" nominally (and you will pay for a .007" hole even though the quote comes back with .010" holes on it!). But if you have a .125" thick board they would prefer not to drill it with a .010" bit. They would like to drill it with a .014" (give or take a half mil) bit; and that hole would finish at .010" nominally. So what is really the deciding factor here is not the finished hole size you put on the drawing, but the pad size you put in your padstack. And the thicker the board the larger should be the pad. If we assume a +/-.005" allowance for layer registration (a common value for the state of volume production) and you want +.002" of annular ring guarantee, then you need a minimum of .007" annular over *drill size*, or drill + .014". But you don't know what the drill size is. Typically the drill size is +.004" over the finished hole size. So the .010" hole drilled with a .014" bit into a pad with a .002" annular ring requirement, needs a .028" pad, minimum. You can get that pad size down, but only if your board isn't too thick ... or is sequentially laminated ... or has a lot of sparse signal layers ... Unless this is a plain vanilla board, if you really need Class III, you should pull in an applications engineer from your fab house to recommend the optimal pad sizes for your type of board. Regards, Valerie Hal Winslow <[log in to unmask]> Sent by: TechNet <[log in to unmask]> 08/02/2005 03:02 PM Please respond to TechNet E-Mail Forum; Please respond to Hal Winslow To: [log in to unmask] cc: Subject: [TN] Required capture pad size for drilled holes? I'm looking for what fab houses would consider to be the minimum sized capture pad for a drilled hole in a PCB if acceptability is specified per IPC 600 Class 3. For instance, when specifying a .010 via (+0, -.010 finished hole size) what size pad should I design in so that you can hit the minimum .002 annular ring required for Class 3? I believe that I have heard drill size plus .014 for the pad size. Bonus points will be awarded if there is a difference between inner and outer layer pad size and you detail that for me... Thanks! Hal Winslow --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 1.8e To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 ----------------------------------------------------- --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 1.8e To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 -----------------------------------------------------