I was reading the guideline as it says that avoid
stubbing on board design hence my question. I was
thinking it is a via access to test or testpoint to
test near by pad but I am not sure.

Re,
Ken Patel

--- Dave Simonik <[log in to unmask]> wrote:

> Could this be referencing the plated hole wall
> remaining above the Must Not
> Cut (MNC) layer after Back Drilling on back planes?
> This is normally
> referred to as the 'Stub'.
>
> Dave Simonik
> Sanmina SCI
> Owego NY Division
>
> -----Original Message-----
> From: Kanaiyalal Patel
> [mailto:[log in to unmask]]
> Sent: Wednesday, June 08, 2005 9:54 AM
> To: [log in to unmask]
> Subject: stubbing in circuit design?
>
>
> All,
> What is stubbing in PCB circuit design? Can some one
> send me a picture or link to visulize it?
>
> Re,
> Ken Patel
>
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