Hi Technetters, Does anyone know of any data available that shows what safe bake times and temperatures are if you want to deviate from those listed in J-STD-033? From experience, we know that baking components and PWB's at the recommended temperatures of 125 Deg. C. has a negtive impact on solderability. I am looking for data that provides a bake time guideline for baking at a temperature of 100 to 110 deg. C. Also, how is the MSD handling verifiable? What methods are used so that a person can audit the process to verify that component's Open Floor Life is not exceeded, and that if the OFL did expire before the parts were reflowed, the parts were baked out prior to assembly and reflow? --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 1.8e To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 -----------------------------------------------------