Cheryl, I have been reading the good responses you have received and have been giving this some more thought. I would say cross-sectioning is pretty well a must. The reason I asked where the cracks were located was because (English?) I am wondering if you were talking about pad lifting or actual cracks in the joints. That's also why I asked about solder composition. Also, those holes where you only have 50% hole fill may be in violation of 610, if you can't see the hole fill. When you say "the wetting looks weak", are you meaning the solder wetting angle is poor or what? I agree with the assessment of yourself and others that getting enough heat to this board may be an issue. No magic answers but ... Regards, Bev RIM -----Original Message----- From: [log in to unmask] [mailto:[log in to unmask]] Sent: May 9, 2005 5:09 PM To: Bev Christian Cc: TechNet E-Mail Forum Subject: RE: [TN] Suggested failure analysis technique? You're right. I should refer to them as "cracks" rather than fractures. We haven't found any mechanical stress in the final assembly process that can force a fracture (yet anyway) . The cracks are found at the interface between the lead and the solder. They are typically about 1/4" of the joint circumference. This is a standard 63/37 tin lead solder process on FR4 boards. Pot temp is set at 240 C. The connectors are BNC style with 4 outer ground pins (nickel plated) and 1 center signal pin (gold plated). The board is processed through the wave in a fixture exposing a slot about 1 inch wide and 4 inches long. The connectors run along the edge of the board. The solder pot is monitored quarterly and is currently in specification. The ground pins are directly connected to internal planes (no thermal relief). Hole fill on the ground pins is at 50%. Hole fill on the signal pin is about 90%. The wetting looks weak and it is difficult to deliver enough heat to make a great joint. I currently have no unprocessed boards to work with. Thanks! Cheryl Tulkoff "Bev Christian" <[log in to unmask] om> To "TechNet E-Mail Forum" 05/09/2005 03:57 <[log in to unmask]>, "Cheryl Tulkoff" PM <[log in to unmask]> cc Subject RE: [TN] Suggested failure analysis technique? Cheryl, You are short on details. How do you know they are fractures? Are your boards FR4, ceramic CEM? What temp is your pot? What solder are you talking about SnPb, lead free with bismuth in it? Where exactly on the joints are the possible anomalies? Bev RIM -----Original Message----- From: TechNet [mailto:[log in to unmask]] On Behalf Of Cheryl Tulkoff Sent: May 9, 2005 4:46 PM To: [log in to unmask] Subject: [TN] Suggested failure analysis technique? I have a large lot of circuit boards where about 20% have small, hairline solder fractures around some wave soldered PTH connector joints. We're working on root cause analysis to prevent it from happening and repairing the boards which have failed inspection. But, we're tying to figure out what to do with the boards that have passed the inspection but may be at risk. Quick and dirty tests have been unable to create fractures on these joints and they pass visual criteria. Are there any quantitative tests that could be performed on a sample to verify solder joint integrity? We don't hae any historical data for comparison. Thanks! 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