Hi Fred, I choose to use a specific land area (pad) without a hole in it for the probe to test during ATE/ICT... usually from the bottom of the board, sometimes from both sides... depends on the design. Each testpoint gets a reference designation and gets included and referenced in the test plan documentation and assembly drawings... Using vias that are tented sounds like a hard one to implement... You probably need to indicate to them which vias are test points and leave them untented... or specify some sort of real 'sharp pointy probe' tip for the tester... http://www.goldtec.com/Product-Pogo_Pins.htm http://www.idinet.com/Product/Catalog/ProbeBuilder.asp?IdS=0573FB-8C69C00&Sp ecView=0&SR=ICT&SE=50J&MD=??&ST=0 I don't know what to tell you regarding the notes... they are fine for describing the style of soldermask you require I suppose but this does not really address the test issues... I usually give them the IPC-SM-840 callout to specify the type of soldermask... An example note for soldermask might say: 9. SOLDERMASK LPI OVER BARE COPPER PER IPC-SM-840, CLASS T, COLOR: TRANSPARENT GREEN. ALL EXPOSED CONDUCTIVE SURFACES TO BE SOLDER COATED AFTER APPLICATION OF SOLDERMASK. I'm sure there are many other variations someone else in the forum could share with you... Best regards, Bill Brooks - KG6VVP PCB Design Engineer , C.I.D.+, C.I.I. Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510 e-mail:[log in to unmask] http://www.dtwc.com http://pcbwizards.com -----Original Message----- From: Fred Dark [mailto:[log in to unmask]] Sent: Monday, April 04, 2005 10:48 AM To: [log in to unmask] Subject: [DC] Soldermaks and ATE\ICT Hello All, I recently has a problem with one of our venders... We received some boards that had ATE\ICT testpoints using vias... However the vias had soldermask in the barrel of the vias and the ATE\ICT test probe did not make contact... We have had the below note on our drawing for years and never had this problem, only with this specific vender... Would the note below be appropriate, or should there be more to it... I would appreciate the input... Regard's, Fred Dark Jr. 4. SOLDER MASK: USE SMOBC PROCESS (SOLDER MASK OVER BARE COPPER). SOLDER MASK TO BE LPI (LIQUID PHOTO IMAGEABLE), WITH VIA HOLES PLUGGED, APPLIED TO BOTH SIDES PER THE APPROPRIATE ARTWORK LAYER. SOLDER MASK REGISTRATION SHALL BE +/- .005 ---------------------------------------------------------------------------- ----- DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF DesignerCouncil. To temporarily stop/(restart) delivery of DesignerCouncil send: SET DesignerCouncil NOMAIL/(MAIL) Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 ---------------------------------------------------------------------------- ----- --------------------------------------------------------------------------------- DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF DesignerCouncil. To temporarily stop/(restart) delivery of DesignerCouncil send: SET DesignerCouncil NOMAIL/(MAIL) Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 ---------------------------------------------------------------------------------