Happy Friday, Dr. Howard Johnson has some good papers on this subject if you want to check his site out. www.sigcon.com Take care, Brent -----Original Message----- From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Jack C. Olson Sent: Thursday, December 02, 2004 7:50 PM To: [log in to unmask] Subject: Re: [DC] Return Current Path vs. Frequency Yes, that thought is what prompted me to ask the question. Say we have a design that has separate planes for each voltage that we need +5V, 3.3V, 2.6V, 1.2V (and also a +12V section that is a partial split) and ALL of those voltages are using the SAME ground plane. Wouldn't you think one of the voltage planes would be a lot quieter than the busy Ground plane? That's just a speculation, I don't really know... And as for routing, typically you will see either a routing pair sandwiched between two planes, or you will see two planes coupled together with routing layers "straddling" them to either side. Think about the straddling one for a moment, because it is easy to imagine... In fact picture a 6-layer board that we have all seen before where the outside layers are only used for fanouts and non-critical junk, 3-4 are pwr/gnd, and 2 and 5 have all your "good" stuff. (I know some of you will try to convince me to put the routing inside the planes, but hey, there's a billion boards out there with pwr/gnd in the middle, right?) Ok, now picture a critical trace routed along horizontally on layer 2, then pops down to 5 for a vertical segment, then back up to 2 for awhile. Now what is happening to the return current? Is it really going to jump back and forth between the pwr and gnd plane to stay "under" the trace? I don't think so... or if it does, its not a good thing. So how are all those billion boards working? Am I missing something? Jack steve kingdon <steve.kingdon@AL LIEDTELESYN.CO.NZ > To Sent by: To DesignerCouncil [log in to unmask] <DesignerCouncil@ cc ipc.org> 12/02/2004 03:37 PM Subject Re: [DC] Return Current Path vs. Please respond to Frequency "(Designers Council Forum)" <DesignerCouncil@ IPC.ORG>; Please respond to steve kingdon <steve.kingdon@AL LIEDTELESYN.CO.NZ > Caterpillar: Confidential Green Retain Until: 01/01/2005 Retention Category: G90 - General Matters/Administration Hi there, Good question, I knew that AC follows the path of least impedance, but had know idea at what frequency this effect would become apparent. Bonus question, same deal, as long as it's got the path of lowest impedance. But I have an extension to the bonus question. Assuming you have PWR-GND plane pairs in a multilayer stackup, is one inherently noisier than the other? ie is it preferable to route next to the GND plane....or does that depend? I guess a factor would be the coupling between the planes, but who is to say the GND will be less noisy than a PWR rail? Also when we have 3 or 4 plane pairs, but with each PWR plane being a different voltage, with different noise levels, how does this effect our "clean" GND rail? In the end we just do what the engineers ask and put sensitive signals next to GND planes, it sounds obvious and safe to route next to GND planes, but without further investigation I feel there is a lot of "ASS U ME ing" going on. Regards, Steve Steve Kingdon PCB Design Engineer Allied Telesyn Research >>> [log in to unmask] 03/12/04 07:54:54 >>> Return Current Path vs. Frequency -=-=-=- Easy question: Imagine a "U"-shaped trace above a solid ground plane, with a connection at each end. Inject a signal through the "U", and vary the frequency. At what frequency will you see the return current follow the shape of the U rather than the shortest path? -=-=-=- Bonus question: What if I replace the ground plane with a power plane? (I say it makes no difference. ) thanks, Jack (the "arguing with a new engineer" guy) ---------------------------------------------------------------------------- ----- DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF DesignerCouncil. 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