Fellow Technets, Two smt type components we want to install on a gold plated pwb have from 0.5 to 1.0 um gold plating over 2 - 6 um of nickel. J-STD-001C, paragraph 5.4.1, Gold Removal states that "Gold shall be removed from 95% of all surfaces of surface mount components to be soldered regardless of gold thickness". The board is being assembled to class 3 requirements. These smt components are leadless type components with castellated terminations provided on tape and reel and would not be easy to tin with solder ..... Would someone please help clarify this requirement. Also, what is the latest IPC document that calls out the level of gold required before "embrittlement" is a concern. Over the years, I have heard and read numbers like 0.3 to 3% by wt. and from 5 to 100 u-inches. (Not sure how to covert a (% by wt) value to a thickness?) Looking forward to some comments. thanks joe --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 1.8e To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815 -----------------------------------------------------