We have some unpopulated bare boards that are white tin plated with SMOBC. The boards are exhibiting peeling mask at the interface between the tin pad (TH and SMT) and the mask along the circuit runs. Per IPC A610 , exposed copper is not acceptable in this case. Can anyone provide possible root causes to this phenomena? The boards are date coded from Oct 2003 as well as Feb 2004. Both lots exhibit the exposed copper/missing mask. These boards were also stored in a Temp/RH of about 70F/10-15%RH TIA -Carrie --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 1.8e To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 -----------------------------------------------------