Thanks Glenn, I got some feedback from the test guys, they don't want the vias covered, to be able to use the flying probe on them. So I guess no 1 is not an option. Can you elaborate on the second option; +2, -10 means the filling will be higher or lower than the level of the outter copper layers? Regards, Ioan > -----Original Message----- > From: [log in to unmask] [SMTP:[log in to unmask]] > Sent: Thursday, March 11, 2004 10:43 AM > To: [log in to unmask]; [log in to unmask] > Subject: RE: [TN] Reliability of via in pad > > Hi Ioan, > > There a several things you can do to prevent the solder wicking down the > hole with the current design, and that's where I would focus. > > 1) Via plug - From opposite of component side, 50~75% of via, > nonconductive > epoxy. > 2) Via fill - From opposite of component side, +2 mils, -10 mils of > conductor surface, nonconductive epoxy. > 3) Via fill and plate over - Conductive or nonconductive epoxy. No hole > in > via for SMT. > > Cost goes up as you go down the list, but you don't need to respin the > board, reduced to no solder starvation, and little to no rework. > > Glenn > > > Disclaimer: Any ideas or opinions expressed here do not necessarily > reflect > the ideas or opinions of my employer. > > -----Original Message----- > From: Tempea, Ioan [mailto:[log in to unmask]] > Sent: Thursday, March 11, 2004 5:30 AM > To: [log in to unmask] > Subject: [TN] Reliability of via in pad > > > Hi Technos, > > I've got an annoying one. I am looking at an assembly for automotive, > which > has 100+ SMT resistor and capacitor pads with vias in them, on both sides > of > the 9 layer PCB. Now, I know that I will expect solder starvation, since > the > solder will flow into the via. I could eventually patch this by plugging > the > vias on the opposite sides of the concerned pads and make slightly bigger > apertures in the stencil. Or even charge more and touch-up all the opens. > > But what does via in pad mean in terms of reliability? > > 1. There will be voids, which are going to become even more important on > lead-free (the customer is after the european market). Any reliability > concerns related to that? Once again, I'm talking automotive. > > 2. PTH reliability. 100+ vias will have totally random quantities of > solder > in them. I remember one of Werner's contributions (Entschuldigung Herr > Engelmeier, aber... I lost the e-mail) saying that less than 50% fill > degrades the reliability. Am I right? > > A good fix would be, in case they refuse to re-spin the board and move the > vias, to fill the holes. What kind of specification should I issue for > filling, in terms of material and fill percentage? > > Any other concerns? > > Thanks, > Ioan --------------------------------------------------- Technet Mail List provided as a service by IPC using LISTSERV 1.8e To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 -----------------------------------------------------