Hello, Not so long ago I posted a question about via-filling. I think I have to be a bit more precise. I'm looking for every possible information I can find about filling (micro-) vias in build-up PCB's. More precise: vias in surface-mount pads (via-in-pad), blind vias, burried vias and stacked vias, with sizes from 50 micron (or less) up to 250 micron. These via-holes can be filled by resin, polymers(concuctive or non- concuctive), plated (dc or pulse), screenprinted,... You also have more exotic ways like first pattern-plating then epoxy- coating followed by polishing (via post). What I am interested in, is the practice. Is this common used in PCB- fabriction? Which process is used the most? Why do they fill ( there are many benefits)? What is your opinion , out there in the real world? Thank you Regards An --------------------------------------------------- Technet Mail List provided as a free service by IPC using LISTSERV 1.8e To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/html/forum.htm for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 -----------------------------------------------------