Michel From your description, I don't think this type of delamination would be related to silver fill. Your description of the location seems to indicate that but the only thing I can think of would be if some of the fill resin (or other contamination) is being left on the surface and inhibiting oxide formation. That's already been looked at and eliminated though, right? I'm assuming when you say general that the delamination is fairly large and it occurs in random locations. Is this true? Have cross sections been taken? If so where is the delam occurring? Do you have mixed dielectrics in the board? Mike McMaster RF Product Engineer Merix Corporation 503-992-4263 > ---------- > From: Arbour, Michel[SMTP:[log in to unmask]] > Reply To: TechNet E-Mail Forum.;Arbour, Michel > Sent: Monday, March 10, 2003 10:45 AM > To: [log in to unmask] > Subject: [TN] Problem of delamination with a silver filled board > > Hello technet. > This is our first design using silver filled via. We have used two > different > PCB fab. A total of 7 lots have been done and the yield seen at our pcb > fab > house has not improved (15%). > The major problem we have is generalized delamination after reflow (not > localized) that seems to happen around layers 4-5. Our pcb. Fab is > currently > investigating on the causes. Until now , no satisfactory explanations has > been given to us. > * Have some of you been faced against the same problem (delamination > On silver filled via). > * Any possible Causes/solutions > * Any theories on the most probable cause (design/process/material > compatibility ...) > > At this time, product release has been delayed. > Your help in this matter would be appreciated. > > Board specification > Dimension : 6.5X9 inch board. 0.070" thickness > Sub sequential buildup Layer 5 to 12 with a total of 16 layers. > Silver epoxy filled via using dupont CB100 . > Qty of 7000 silver filled Via of 0.008" > Qty of 1000 silver filled Via of 0.010" > The populated boards has a very high thermal mass: 8 BGA . current of 96 > Amps. > Impedance controlled and Burried capacitance > Line/Spacing : 0.003" / 0.005" > > Best regards > Michel Arbour > Kontron > Tel. : 450-437-4661 ext. 2287 > > --------------------------------------------------- > Technet Mail List provided as a free service by IPC using LISTSERV 1.8e > To unsubscribe, send a message to [log in to unmask] with following text in > the BODY (NOT the subject field): SIGNOFF Technet > To temporarily halt or (re-start) delivery of Technet send e-mail to > [log in to unmask]: SET Technet NOMAIL or (MAIL) > To receive ONE mailing per day of all the posts: send e-mail to > [log in to unmask]: SET Technet Digest > Search the archives of previous posts at: http://listserv.ipc.org/archives > Please visit IPC web site http://www.ipc.org/html/forum.htm for additional > information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 > ext.5315 > ----------------------------------------------------- > --------------------------------------------------- Technet Mail List provided as a free service by IPC using LISTSERV 1.8e To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/html/forum.htm for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 -----------------------------------------------------