copper would be better filler ...;-) jk >-----Original Message----- >From: TechNet [mailto:[log in to unmask]]On Behalf Of >[log in to unmask] >Sent: Monday, September 30, 2002 7:39 PM >To: [log in to unmask] >Subject: Re: [TN] PCB design with mask over vias. > > >There is a theory in my Company that solder-filling holes, especially in >the likes of FR4 with a relatively high LCTE in the Z axis, negates the >ductility of the Cu plating inside the holes. Without the ductiity of the >plating, the risk of shearing the barrel at the interconnections with inner >layers is greatly increased with a corresponding decrease in board >reliability. I'm talking about high-rel boards here, and I subscribe to >this theory. Any thoughts, anyone? > >Peter > > > >Dave Chapman <[log in to unmask]> 30/09/2002 06:02 PM >Sent by: TechNet <[log in to unmask]> > >Please respond to "TechNet E-Mail Forum."; Please respond to Dave Chapman > > To: [log in to unmask] > cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST Aero/ST Group) > Subject: Re: [TN] PCB design with mask over vias. > > > > > > > > >One thing we just completed was a pilot where we put apertures in our >topside SMT stencil and pasted over all vias to prevent Conformal Coat >leaking through the board. We opened the apertures +10% and got good solder >fill this also prevented corrosion or having trapped mask inside filled >vias >possible "volcano" during reflow. >Dave Chapman >Manufacturing Engineer >Circuit Service Inc. > > >-----Original Message----- >From: Willie Duersch [mailto:[log in to unmask]] >Sent: Friday, September 27, 2002 2:01 PM >To: [log in to unmask] >Subject: [TN] PCB design with mask over vias. > > >Hello Peers: >We are a CM who recently fabricated a PCBA which had the vias covered by >solder mask film design on the PCB. This is not the first time we have seen >this done in PCBA. However, in this example, the PCBA ended up inside a >refrigerator. This customer adds few notes with the PCB and nothing was >specified associated with the fab on plugging or capping of the vias. The >PCBA did not require wave solder. Aqueous clean paste was used and PCBA >washed after SMT. > >The PCBA was supplied to the customer who then selectively applied >Conformal coating over the top side components on the board with a brush, >but did not coat other through holes or vias on the component side or any >area of the back side. > >Over a period of time, The vias on the back side showed evidence of >corrosion and subsequent cross section analysis showed copper corrosion >from the pad part way into the barrel even under soldermask. The cross >section also showed that the LPI solder mask did not plug and did have pin >holes in the mask with bare copper in the air pockets that occur during LPI >screen deposition. >1. We feel the customer is responsible to specify the PCB and PCBA >performance criteria. Comments? >2. Is there an IPC document that covers solder mask covered vias and >guidelines associated with the practice? If not, why not? >3. Is it the PCB shop or the CM who should question, and if not >specified...should either question the practice? >4. What are the issues related to designing with solder mask film design >covered vias? In this case, the vias were .010-.014 diameter and space >constraints were not an issue. There were other holes on the PCB that were >larger diameter and were left open to coat with solder from the HASL >operation...and not coated with conformal coat. >5. What would you tell a customer to correct the issue? > >There are some obvious issues and answers and I have had 12 years of >experience with PCB's. However, I really would like to have some comments >from my peers. >Best regards, Willie > >------------------------------------------------------------------- >--------- > >----- >Technet Mail List provided as a free service by IPC using LISTSERV 1.8e >To unsubscribe, send a message to [log in to unmask] with following text in >the BODY (NOT the subject field): SIGNOFF Technet >To temporarily halt or (re-start) delivery of Technet send e-mail to >[log in to unmask]: SET Technet NOMAIL or (MAIL) >To receive ONE mailing per day of all the posts: send e-mail to >[log in to unmask]: SET Technet Digest >Search the archives of previous posts at: http://listserv.ipc.org/archives >Please visit IPC web site http://www.ipc.org/html/forum.htm for additional >information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 >ext.5315 >------------------------------------------------------------------- >--------- > >----- > >------------------------------------------------------------------- >-------------- > >Technet Mail List provided as a free service by IPC using LISTSERV 1.8e >To unsubscribe, send a message to [log in to unmask] with following text in >the BODY (NOT the subject field): SIGNOFF Technet >To temporarily halt or (re-start) delivery of Technet send e-mail to >[log in to unmask]: SET Technet NOMAIL or (MAIL) >To receive ONE mailing per day of all the posts: send e-mail to >[log in to unmask]: SET Technet Digest >Search the archives of previous posts at: http://listserv.ipc.org/archives >Please visit IPC web site http://www.ipc.org/html/forum.htm for additional >information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 >ext.5315 >------------------------------------------------------------------- >-------------- > > > > > >[This e-mail is confidential and may also be privileged. If you are not the >intended recipient, please delete it and notify us immediately; you should >not copy or use it for any purpose, nor disclose its contents to any other >person. Thank you.] > >------------------------------------------------------------------- >-------------- >Technet Mail List provided as a free service by IPC using LISTSERV 1.8e >To unsubscribe, send a message to [log in to unmask] with following text in >the BODY (NOT the subject field): SIGNOFF Technet >To temporarily halt or (re-start) delivery of Technet send e-mail >to [log in to unmask]: SET Technet NOMAIL or (MAIL) >To receive ONE mailing per day of all the posts: send e-mail to >[log in to unmask]: SET Technet Digest >Search the archives of previous posts at: http://listserv.ipc.org/archives >Please visit IPC web site http://www.ipc.org/html/forum.htm for additional >information, or contact Keach Sasamori at [log in to unmask] or >847-509-9700 ext.5315 >------------------------------------------------------------------- >-------------- > --------------------------------------------------------------------------------- Technet Mail List provided as a free service by IPC using LISTSERV 1.8e To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search the archives of previous posts at: http://listserv.ipc.org/archives Please visit IPC web site http://www.ipc.org/html/forum.htm for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 ---------------------------------------------------------------------------------