Dan

To add to Earl's reply, in less well managed processes, the surface to hole
ratio can approach 1.4.  The ratio depends on almost every variable in the
plating process: current density, acid to copper ratio, brightener system,
hole aspect ratio and rectifier type (DC vs. pulse) to name some of the more
important ones.  Voltage is usually not controlled and time is used to
control the average plating thickness.  In general, higher current (for a
given design) results in increased thickness variations across the panel,
within the holes, and affects the surface to hole thickness ratio.  Other
factors like plating tank design, anode length/placement, and tank agitation
also factor into the discussion.

I've probably told you more than necessary, but optimizing and maintaining
the electroplating process is a complex task that creates a need for many
process engineers.

Don Vischulis

-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Dan R. Johnson
Sent: Wednesday, April 17, 2002 10:59 AM
To: [log in to unmask]
Subject: [TN] naive questions


I have a couple of naive questions,
How do you determine the overall increase in copper thickness for a given
thickness of through hole plating?
What are the relationships between overall plate thickness, hole plate
thickness, voltage, current, and time?
I assume these all change in the specifics
I am not now nor ever have been a member of the PCB manufacturing community,
this is purely a matter of academic interest. Perhaps some of the gurus of
FR-4 out there can help me.

Thanks for helping satisfy my thirst for knowledge,
Dan