We are in the process of evaluating our clean room for inner and outer layer circuit imaging. I am interested in finding out more information on the use of clean rooms for printed circuit processing, particularly imaging. This would include not only clean room requirements for imaging .003" lines but also methods to achieve the required level of cleanliness. There seems to be alot of information for processing microelectronics but not for printed circuits. Thanks in advance for any help. --------------------------------------------------------------------------------- Technet Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site http://www.ipc.org/html/forum.htm for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 ---------------------------------------------------------------------------------