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Date: Tue, 5 Mar 2002 16:41:08 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jason Gregory <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jason Gregory <[log in to unmask]>
Subject: Javelin 1004 users
Mime-Version: 1.0
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Hello Technetters,
Does anyone out there employ the Teradyne Javelin 1004 Flying Probe ICT =
tester in your operations? If so, please contact me or have the appropriate=
person contact me offline.
TIA
Jason Gregory
Software Specialist=20
Sanmina-SCI - Tech Center Austin
15508 Bratton Lane
Austin, Tx. 78728
(512)246-5648
(512)796-1997 cell
(512)388-0898 fax
[log in to unmask]
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Date: Tue, 5 Mar 2002 14:43:01 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Debbie Goodwin <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Debbie Goodwin <[log in to unmask]>
Subject: Re: Does My Mail Work?
X-To: ART HAMPTON <[log in to unmask]>
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Yes Art, it did post!
Debbie Goodwin
Account Representative
10867 Portal Dr
Los Alamitos, CA 90720
Phone = (714) 252-0010
Fax = (714) 252-0026
PLEASE NOTE - Effective Immediately New e-mail address is:
[log in to unmask]
__________________________________________________
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that any dissemination, distribution or copying of this communication is
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please notify us immediately by calling
714.252.0010 or returning the original message to us. Thank You.
-----Original Message-----
From: ART HAMPTON [mailto:[log in to unmask]]
Sent: Tuesday, March 05, 2002 1:58 PM
To: [log in to unmask]
Subject: [TN] Does My Mail Work?
Did this post?
____________________________________________________
<http://www.incredimail.com/redir.asp?ad_id=309&lang=9> IncrediMail -
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<DIV><SPAN class=650595722-05032002>Yes Art, it did post!</SPAN></DIV>
<DIV> </DIV>
<P>Debbie Goodwin <BR>Account Representative <BR>10867 Portal Dr <BR>Los
Alamitos, CA 90720 <BR>Phone = (714) 252-0010 <BR>Fax = (714) 252-0026
<BR>PLEASE NOTE - Effective Immediately New e-mail address is:
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notify us immediately by calling </FONT></P>
<P><FONT size=1>714.252.0010 or returning the original message to us.
Thank You.</FONT> </P>
<BLOCKQUOTE>
<DIV align=left class=OutlookMessageHeader dir=ltr><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> ART HAMPTON
[mailto:[log in to unmask]]<BR><B>Sent:</B> Tuesday, March 05, 2002 1:58
PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] Does My Mail
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Date: Tue, 5 Mar 2002 15:04:14 -0800
Reply-To: Karl Sauter <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Karl Sauter <[log in to unmask]>
Subject: Re: IPC TM-650 Standard for Impedance Testing
MIME-Version: 1.0
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Thanks to everyone who responded.
I have been encouraged to work with the IPC-2141 committee
(their next meeting is coming up at IPC EXPO).
Regards,
Karl Sauter
Staff Engineer - PWB Technology
Sun Microsystems
> Date: Fri, 1 Mar 2002 11:26:16 -0800 (PST)
> From: Karl Sauter <[log in to unmask]>
> Subject: Re: [TN] IPC TM-650 Standard for Impedance Testing
> To: [log in to unmask], [log in to unmask]
> Cc: [log in to unmask]
>
> Brian,
>
> As a major OEM, we have had to write into our own standard PWB
> procurement specification a whole set of requirements to ensure
> meaningful and consistent impedance measurement and reporting
> by our suppliers. Approximately 80 percent of these requirements
> could be applied to an improved IPC/industry controlled impedance
> testing procedure. May be this would not only help the industry,
> but also OEM's would be enabled to reduce the size of their PWB
> specifications by one page or more.
>
> Sincerely,
>
> Karl Sauter
> Staff Engineer - PWB Technology
> Sun Microsystems
>
>
> > Date: Fri, 1 Mar 2002 09:57:39 -0500
> > From: "Brian D. Butler" <[log in to unmask]>
> > Subject: [TN] IPC TM-650 Standard for Impedance Testing
> > To: [log in to unmask]
> >
> > To all:
> >
> > Controlled Impedance products are becoming more and more popular. I am
> > interesting in hearing opinions on the relevancy of the TM-650 standard
> > for controlled impedance testing. How many people our using it and if not
> > should it be changed?
> >
> > Sincerely,
> > Brian Butler
> > Introbotics Corp
> > (505)345-7785
> > www.introbotics.com
>
>
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Date: Tue, 5 Mar 2002 15:10:36 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Patel <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Patel <[log in to unmask]>
Organization: interWAVE Communications, Inc.
Subject: Re: Via in Pad? Need Help!!!
X-To: "Furrow, Robert Gordon (Bob)" <[log in to unmask]>
MIME-Version: 1.0
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Mr. Furrow,
So, you are saying that I should go below 10 mil finished hole size then what is
your recommended finish hole size. I definitely need to change from 10 mil +3 /
-10 to 10 mil +0 / -10. And yes my board is 62 mil thick.
re,
ken patel
"Furrow, Robert Gordon (Bob)" wrote:
> Ken,
>
> No wonder you are having problems, your finished hole size is way too big
> for your pad, and the volume of paste able to be deposited onto the pad. I
> would typically require a finished hole size of 10 mil + 0 / - 10. With 0603
> pad sizes even this is not sufficient and you need to go even smaller with
> the finished hole size. I am assuming you are talking an 0.063 inch board
> thickness.
>
> Thanks,
> Robert Furrow
> Printed Wiring Board Engineer
> Supply Chain Networks
> Lucent Technologies
> 978-960-3224 [log in to unmask]
>
> -----Original Message-----
> From: Ken Patel [mailto:[log in to unmask]]
> Sent: Tuesday, March 05, 2002 2:11 PM
> To: [log in to unmask]
> Subject: Re: [TN] Via in Pad? Need Help!!!
>
> We have via in pad of 603 and bigger size components including RF filters.
> The
> via size is 10 mil +3 /-10.
>
> re,
> ken patel
>
> Kathy Kuhlow wrote:
>
> > What type of component package?
> >
> > Kathy
> >
> > ------------------------------------------------------------------------
> >
> > TEXT.htmName: TEXT.htm
> > Type: Plain Text (text/plain)
>
> ----------------------------------------------------------------------------
> -----
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> ----------------------------------------------------------------------------
> -----
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Date: Wed, 6 Mar 2002 12:12:12 +1300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Michael Bell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Michael Bell <[log in to unmask]>
Subject: Re: Does My Mail Work?
X-To: ART HAMPTON <[log in to unmask]>
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Sure did!!!
-----Original Message-----
From: ART HAMPTON [mailto:[log in to unmask]]
Sent: Wednesday, 6 March 2002 10:58
To: [log in to unmask]
Subject: [TN] Does My Mail Work?
Did this post?
____________________________________________________
<http://www.incredimail.com/redir.asp?ad_id=309&lang=9> IncrediMail -
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<http://www.incredimail.com/redir.asp?ad_id=309&lang=9> Click Here
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<DIV><SPAN class=100220923-05032002>Sure did!!!</SPAN></DIV>
<BLOCKQUOTE>
<DIV align=left class=OutlookMessageHeader dir=ltr><FONT
face=Tahoma>-----Original Message-----<BR><B>From:</B> ART HAMPTON
[mailto:[log in to unmask]]<BR><B>Sent:</B> Wednesday, 6 March 2002
10:58<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] Does My Mail
Work?<BR><BR></DIV></FONT>
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align=baseline alt="" border=0 hspace=0
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Date: Tue, 5 Mar 2002 16:04:57 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: Re: I need a better soldering iron
X-To: Phil Nutting <[log in to unmask]>
MIME-version: 1.0
Content-type: text/plain; charset=iso-8859-1
Content-transfer-encoding: 7BIT
I'll put in another vote for Metcal, with a note that we use Hakko 936. A
year ago we had 30+ Hakko stations in use 7.5 hours a day. They are cheaper
to buy and the tips are cheaper. I have never had one break within the
first year of use. (BTW this was not the case five years ago when I last
used Hakko.) I am running these stations at around 800 F. The bottom line is
if I had the money I'd go for Metcal, but the Hakko is a good value for the
dollar.
Just my two cents,
Dan
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Date: Tue, 5 Mar 2002 16:06:58 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Patel <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Patel <[log in to unmask]>
Organization: interWAVE Communications, Inc.
Subject: Re: Via in Pad? Need Help!!!
X-To: "Marsico, James" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=iso-8859-1
Content-Transfer-Encoding: 8bit
Jim,
VIPs (Via in Pads) are at too many locations i.e. requires to mask whole board of the size 12"x12".
re,
ken patel
"Marsico, James" wrote:
> Couldn't you temporarily mask the bottom of the vias with tape, then remove
> the tape after reflow? Wouldn't the void be open on the bottom side of the
> board?
>
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
> -----Original Message-----
> From: Marki Sasportas [SMTP:[log in to unmask]]
> Sent: Tuesday, March 05, 2002 7:00 AM
> To: [log in to unmask]
> Subject: Re: [TN] Via in Pad? Need Help!!!
>
> Hello Siggi,
> We had the same problem,
> 1) Using HASL finish to the board will not help you because as Brain
> Ellis
> said the amount of solder that drains down the via is much more then
> you
> supply (coat + print )- we tried it without success.
> 2) DO not Mask the Vias from the bottom side it will cause very big
> voids.
> 3) You can try to seal the vias with paste but note that if it will
> have
> height it can cause problem during printing.
> 4) I recommend you to use blind microvias or just take the holes out
> of the
> pads.
>
> Regards,
> Marki Sasportas.
>
> -----Original Message-----
> From: Zweigart, Siegmund [mailto:[log in to unmask]]
> Sent: Tuesday, March 05, 2002 9:53 AM
> To: [log in to unmask]
> Subject: Re: [TN] Via in Pad? Need Help!!!
>
> Hello Ken
>
> We had the same problem (or still have).
> We tried HASL and OCC Boards but there was no difference.
> We also tried plugging with a special stencil and 63/37 but this
> don't
> works.
> We did not try a high temperature solder.
> Masking is quite critical because of voids.
> Beside redesign you have only one chance: Look for new process
> parameters.
>
> Siggi
>
> ----------
> From: Ken Patel [SMTP:[log in to unmask]]
> Sent: Montag, 4. März 2002 23:37
> To: [log in to unmask]
> Subject: [TN] Via in Pad? Need Help!!!
> Importance: High
>
> Guys,
> On our nickel gold board, solder joints are below IPC spec
> (insufficient
> solder) where there are vias in pad. Solder is drained down
> the via
> holes and deprived the joint of necessary solder. I would
> like to
> know
> the following.
> (1) How about using the surface finish 63/37 coating HASL
> instead of
> Ni-Gold? I think gold dissolves in solder so quickly that I
> rather
> use
> HASL processed boards, any thoughts?
> (2) Do you guys mask the via on bottom side to avoid solder
> draining
> out
> on the other side?
> (3) Does anybody try Hi Temp solder paste to fill the vias
> as our
> assembly house ordered via stencils to fill the via using
> eutectic
> (63/37) solder paste which didn't work?
>
> Looking for
> re,
> Ken Patel
>
>
>
> ----------------------------------------------------------------------------
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=========================================================================
Date: Tue, 5 Mar 2002 18:49:15 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jack Crawford <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jack Crawford <[log in to unmask]>
Subject: Re: Number of People on TechNet (non-technical)
X-To: [log in to unmask]
Mime-Version: 1.0
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A lot of people signed off last year when a company in Europe had a mail =
server problem and started reposting all those duplicate messages back to =
our listservers. Most 'netters came back but not all. Additionally, there =
have always been a lot of lurkers--people appreciating the wisdom that was =
provided but not too active on posting. As people retired or left their =
companies for whatever reasons over the last year, OR as companies have =
been acquired and email addresses changed we got bounces back--"no such =
user" "can't identify domain" are common. =20
One option we have is to retain those addresses and keep posting to them =
and make our subscriber count look high. Nawww. Not good for to have all =
that network junk. Our listserv automatically unsubscribes a member after =
a number of consecutive postings are bounced. I think it's automatic =
anyway, or Keach spends a lot of time keeping track of them and taking =
them out the hard way. =20
Did some leave because of content? Probably. Their loss overall. Based on =
the number of regular postings, most technology related, there is still a =
very active forum.=20
Jack
>>> [log in to unmask] 03/05/02 02:58PM >>>
Earl brings up a observation that I think several of us have made. I =
think
this is an important issue.
I do not think we can even jokingly tar and feather Brian or blame too =
much
of it on the economy. I mean we are talking about a halving of our =
numbers!
I would be interested if the IPC could tell us when the situation changed
from growth to decline, rate, etc. Personally I signed off for a few
weeks/months last year, when I started to receive copies of e-mails that =
had
been posted several months earlier. I am wondering if this is when a lot =
of
others jumped ship and never came back. Or did we drive some off with =
some
of our incredibly fun, but off-topic threads?
The reason I am concerned is that I think for a forum like this to be =
really
useful it requires a fairly large critical mass, especially since the =
topics
covered are so broad. We need a large base to be sure we have experts =
from
all fields to answer the questions that are posed.
A reply from the IPC would be appreciated.
regards,
Bev Christian
Research in Motion
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]=20
Sent: March 5, 2002 9:35 AM
To: [log in to unmask]
Subject: Re: [TN] AUTOMOTIVE PACKAGING/SEALING REALIBILITY
Brian,
Thanks for the site/company/info. Just what I've been looking for and =
should
do the job well. Also, not too far away, like you.
You noticed the reduced number of participants on this forum? Can't =
remember
seeing it this low. I remember when Steve said we are getting close to the
2000 member mark and was only off by a few hundred or so. I suspect you've
been stealing them away to your environmental forum.
In any event, everyone says the economy is back on track. Of course,
contract engineers are being offered half what they made one year ago and =
I
don't see too many jobs available but for JSF, power, drugs, and some
strange stuff I've never heard of before.
Just thinking, a self flattery statement, on paper,
MoonMan
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ext.5315
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=========================================================================
Date: Wed, 6 Mar 2002 08:59:37 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: AUTOMOTIVE PACKAGING/SEALING REALIBILITY
X-To: Carl VanWormer <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Two thoughts/questions cross my mind (quickly, because the mind is small)
on this one -
1) Are the edible traces anywhere near the areas where you used no-clean
soldering? I categorise potting as similar in principal to coating inasmuch
as you're sealing any no-clean residues onto the board surface, and it's
never really recommended to use no-clean chemistry if you're also sealing
the unit afterwards.
2) Is your potted unit potted into a sealed container, or is it just
hanging out with the potting exposed to the elephants, I mean elements? Is
your potting permeable? - it probably is, in which case moisture (and
there's plenty gets thown up by truck wheels, along with Gawdnosewot
contaminants) will be transpiring nicely through the potting and nurturing
your trapped residues to the point where they'll get hungry and eat your
traces, leaving all kinds of pooh behind. If the potting isn't permeable,
then you've probably sealed in moisture that can't escape. It's then gone
stir-crazy and destroyed its surroundings.
Have you analysed the green, red and white deposits? Do their compounds
bear any relation to the chemistries used on the units prior to potting?
I'm no chemist at all, but salts and oxides? Acids and metals? Any truck
batteries nearby?
Physical damage is an obvious consideration from debris kicked up by the
wheels, but you don't mention it, so I take it the units are protected from
this in some way. Can you tell us how? If the units or the potting have
been physically damaged in any way, anything could have got inside to do
the damage.
Can help with any good literature, sorry to say, but I'ld make sure you use
water-soluble fluxes throughout your manufacturing of this unit, make sure
it's very clean and dry before you pot, use a suitable potting primer to
ensure good keying, but not an etchant type unless you can guarantee to
neutralise it, make sure the potting is properly out-gassed, and don't
mount the finished product in a more exposed position than neccesary.
How was the product qualified?
My 2 cents worth, and good luck with finding a solution.
Peter
Carl
VanWormer To: [log in to unmask]
<[log in to unmask] cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
COM> Aero/ST Group)
Sent by: Subject: Re: [TN] AUTOMOTIVE PACKAGING/SEALING
TechNet REALIBILITY
<[log in to unmask]
ORG>
03/06/02
12:35 AM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
Carl
VanWormer
I got excited after seeing the subject, but I haven't seen enough, yet . .
.
We have a "potted" product that rides behind the wheels of a truck. All
our
best protection efforts have yielding significant failure rates. Returned
units have had traces eaten off the board, with various colors of crud left
over. The green is probably copper oxides. Some of the copper seems to
have turned into a red powder. There is a lot of white crust around some
of
the lost traces and vias. We are guessing that the boards were not
cleaned
well enough before potting (Insulcast RTVS 27 thermally conductive potting
compound). We believe the boards were produced with a water soluble flux,
then washed, then a few hand-ads were installed with a "no-clean" flux. We
think that either (1) moisture sealed inside the potted units may be
"helping" the corrosion, or (2) moisture (with or without extra corrosive
elements) is leaking it through poorly sealed boundaries of the potting
compound. (we are using "primer" around the known "edges" of the units)
I know that "Detroit" has solved this problem many times. Where can I find
a "guide book" or a knowledgeable vendor to help me out of this board
cleaning/potting mess?
Carl Van Wormer
Cipher Systems
1815 NW 169th Place, Suite 5010
Beaverton, OR 97006
Phone (503)-617-7447 Fax (503)-617-6550
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Tuesday, March 05, 2002 6:35 AM
To: [log in to unmask]
Subject: Re: [TN] AUTOMOTIVE PACKAGING/SEALING REALIBILITY
Brian,
Thanks for the site/company/info. Just what I've been looking for and
should
do the job well. Also, not too far away, like you.
You noticed the reduced number of participants on this forum? Can't
remember
seeing it this low. I remember when Steve said we are getting close to the
2000 member mark and was only off by a few hundred or so. I suspect you've
been stealing them away to your environmental forum.
In any event, everyone says the economy is back on track. Of course,
contract engineers are being offered half what they made one year ago and I
don't see too many jobs available but for JSF, power, drugs, and some
strange stuff I've never heard of before.
Just thinking, a self flattery statement, on paper,
MoonMan
---------------------------------------------------------------------------------
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=========================================================================
Date: Tue, 5 Mar 2002 20:20:37 -0600
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Seth Goodman <[log in to unmask]>
Subject: Re: Via in Pad? Need Help!!!
X-To: Earl Moon <[log in to unmask]>, [log in to unmask]
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_0015_01C1C483.366B5C10"
This is a multi-part message in MIME format.
------=_NextPart_000_0015_01C1C483.366B5C10
Content-Type: text/plain;
charset="us-ascii"
Content-Transfer-Encoding: 7bit
Hi Brad and Earl,
Both of you mentioned filled and plated over vias in pads. So far, I have
only used microvias for this. Microvias have their own problems,
particularly the small number of fabricators that do it routinely. Still,
the density it gives you is amazing! I guess the 5 mil lines and buried
(drilled) vias didn't hurt, but it seemed like most of the density increase
was due to getting the vias inside the package outline. So I am very
interested in any technology that permits vias in pads and is more available
than microvias.
I looked up the article by James Blankenhorn that Bill Brooks mentioned, but
it doesn't have anything about plating over a filled hole. Can you tell me
more about what you specify for this process?
The main question is the finished hole and pad sizes that are possible. For
a given finished board thickness, how small can you go and still locate it,
drill it, plate it and fill it? The fabricators need to know "At what
price?", so let's say for less than the cost of a microvia build up assuming
class 2 requirements. I have used 8 mil (+3/-8) FHS vias with 18 mil pads
in 40 mil thick 8-layer boards, but the finished hole sizes were pretty
variable, just like the spec allowed. I imagine these holes would have been
tough to fill due to the size variability and some were plated shut. Maybe
small finished hole sizes can be controlled, if necessary, but I don't know
what's involved. Do you have to use larger holes or tighter tolerances to
permit filling or does the filling process tolerate variations in hole size?
Can this process be used with blind vias? Yeah, I know, I really want
microvias.
Another question is the flatness of the resulting pads. Obviously they're
flat enough for some things or you wouldn't have used them. What component
types is this suitable for?
Basically, what I'm asking is how far can you go with this process without
breaking the bank. It would be really nice to have a process with a density
somewhere between conventional drilled boards and microvia boards at a price
that is also between the two.
Seth Goodman
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Earl Moon
> Sent: Tuesday, March 05, 2002 4:55 AM
> To: [log in to unmask]
> Subject: Re: [TN] Via in Pad? Need Help!!!
>
>
> I/we have been using capped vias for years. Jim's article is good and
points
> to the ability to plate over a hole in a pad. This simply means plating
over
> a via, though not micro, in a way assuring electrical continuity is
> effected. Otherwise, use a micro via.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of [log in to unmask]
Sent: Tuesday, March 05, 2002 7:17 AM
To: [log in to unmask]
Subject: Re: [TN] Via in Pad? Need Help!!!
In the next design I am sure you will either use micro, sequential lam,
cap or conductive fill/non conductive fill then plate.
------=_NextPart_000_0015_01C1C483.366B5C10
Content-Type: text/html;
charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Dus-ascii">
<META content=3D"MSHTML 6.00.2713.1100" name=3DGENERATOR></HEAD>
<BODY>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D305141123-05032002>Hi =
Brad and=20
Earl,</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D305141123-05032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D305141123-05032002>Both =
of you=20
mentioned filled and plated over vias in pads. So far, I have only =
used=20
microvias for this. Microvias have their own problems, =
particularly=20
the small number of fabricators that do it routinely. Still, the =
density=20
it gives you is amazing! I guess the 5 mil lines and buried =
(drilled) vias=20
didn't hurt, but it seemed like most of the density increase was due to =
getting=20
the vias inside the package outline. So I am very interested in =
any=20
technology that permits vias in pads and is more available than=20
microvias.</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D305141123-05032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D305141123-05032002>I =
looked up the=20
article by James Blankenhorn that Bill Brooks mentioned, but it doesn't =
have=20
anything about plating over a filled hole. Can you tell me more =
about what=20
you specify for this process?</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D305141123-05032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D305141123-05032002>The =
main=20
question is the finished hole and pad sizes that are =
possible. For a=20
given finished board thickness, how small can you go and still locate =
it, drill=20
it, plate it and fill it? The fabricators need to know "At what =
price?",=20
so let's say for less than the cost of a microvia build up assuming =
class 2=20
requirements. I have used 8 mil (+3/-8) FHS vias with 18 mil =
pads in=20
40 mil thick 8-layer boards, but the finished hole sizes were pretty =
variable,=20
just like the spec allowed. I imagine these holes would have been =
tough to=20
fill due to the size variability and some were plated shut. Maybe =
small=20
finished hole sizes can be controlled, if necessary, but I don't know =
what's=20
involved. Do you have to use larger holes or tighter tolerances to =
permit=20
filling or does the filling process tolerate variations in hole =
size? Can=20
this process be used with blind vias? Yeah, I know, I really want=20
microvias.</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D305141123-05032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN =
class=3D305141123-05032002>Another=20
question is the flatness of the resulting pads. =
Obviously=20
they're flat enough for some things or you wouldn't have used =
them. What=20
component types is this suitable for?</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D305141123-05032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN =
class=3D305141123-05032002>Basically,=20
what I'm asking is how far can you go with this process =
without=20
breaking the bank. It would be really nice to have a process with =
a=20
density somewhere between conventional drilled boards and microvia =
boards at a=20
price that is also between the two.</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D305141123-05032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D305141123-05032002>Seth=20
Goodman</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D305141123-05032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D305141123-05032002>
<DIV align=3Dleft><FONT face=3DArial><FONT =
size=3D2></FONT></FONT> </DIV>
<DIV align=3Dleft><FONT face=3DArial><FONT size=3D2>> -----Original=20
Message-----<SPAN =
class=3D305141123-05032002> </SPAN></FONT></FONT></DIV>
<DIV align=3Dleft><FONT face=3DArial size=3D2>> From: TechNet=20
[mailto:[log in to unmask]]On Behalf Of Earl Moon</FONT></DIV>
<DIV align=3Dleft><FONT face=3DArial size=3D2>> Sent: Tuesday, March =
05, 2002 4:55=20
AM</FONT></DIV>
<DIV align=3Dleft><FONT face=3DArial size=3D2>> To: =
[log in to unmask]</FONT></DIV>
<DIV align=3Dleft><FONT face=3DArial size=3D2>> Subject: Re: [TN] Via =
in Pad? Need=20
Help!!!</FONT></DIV>
<DIV align=3Dleft><FONT face=3DArial size=3D2>> </FONT></DIV>
<DIV align=3Dleft><FONT face=3DArial size=3D2>> </FONT></DIV>
<DIV align=3Dleft><FONT face=3DArial size=3D2>> I/we have been using =
capped vias=20
for years. Jim's article is good </FONT><FONT face=3DArial =
size=3D2>and=20
points</FONT></DIV>
<DIV align=3Dleft><FONT face=3DArial size=3D2>> to the ability to =
plate over a hole=20
in a pad. This simply means </FONT><FONT face=3DArial =
size=3D2>plating=20
over</FONT></DIV>
<DIV align=3Dleft><FONT face=3DArial size=3D2>> a via, though not =
micro, in a way=20
assuring electrical continuity is</FONT></DIV>
<DIV align=3Dleft><FONT face=3DArial size=3D2>> effected. Otherwise, =
use a micro=20
via.</FONT></DIV>
<DIV align=3Dleft> </DIV></SPAN></FONT></DIV>
<BLOCKQUOTE=20
style=3D"PADDING-LEFT: 5px; MARGIN-LEFT: 5px; BORDER-LEFT: #0000ff 2px =
solid">
<DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of =
</B>[log in to unmask]<BR><B>Sent:</B>=20
Tuesday, March 05, 2002 7:17 AM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> Re: [TN] Via in Pad? Need=20
Help!!!<BR><BR></FONT></DIV>
<DIV><FONT face=3DArial size=3D2>In the next design I am sure you will =
either use=20
micro, sequential lam, cap or conductive fill/non conductive fill then =
plate.<SPAN class=3D305141123-05032002><FONT=20
=
color=3D#0000ff> </FONT></SPAN></FONT></DIV></BLOCKQUOTE></BODY></HT=
ML>
------=_NextPart_000_0015_01C1C483.366B5C10--
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---------------------------------------------------------------------------------
=========================================================================
Date: Tue, 5 Mar 2002 23:56:06 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Via in Pad? Need Help!!!
X-To: [log in to unmask]
Seth,
There are two basic ways to do it. One is, when necessary, to use sequential
lamination that forces resin up the "standard" size (not micro via) hole
leaving it relatively flat or flush to the surface. Then, the hole is
electrolessly deposited and electroplated over. The second is to fill the
holes with conductive material/resin and do the same. The conductive resin
usually is silver and does a nice job as well.
Flatness, to some, can be an issue. I'll post an image, showing a typical
condition, on Steve's site if he will be so kind. However, the surfaces are
suitable for BGA type devices because of their self aligning tendencies.
Haven't used it for others but chip components that don't find the surfaces
a problem especially compared to vias that are disastrous.
This whole issue, for me, revolves around some R/F folks, and their designs,
not recalculating the electrical requirements to get rid of vias in holes.
As you know, touching these parts up is not feasable as the solder still
keeps draining down the holes and chip cracking occurs during the process.
Chip devices just can't take to much thermal and shouldn't with good designs.
Oh Seth, before I forget, I forgot how to get either myself or other folks
into your ftp site. Some folks are asking me how and I need to know as well
as I'm on a different computer now and lost the info.
Thanks,
Earl
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Date: Wed, 6 Mar 2002 00:57:11 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Via in Pad? Need Help!!!
X-To: [log in to unmask]
Seth and other fine folks,
I do a lot of work in the R/F MLB world. Who doesn't. In this regard, I
asked Steve if he'd kindly post two x-section images. Both show blind vias
not of the micro type. One is shown from a bucket shop not knowing what they
had done really was pretty good but for obvious plating problems.
The first image shows a "normal" blind via that has been plated over. The
fill resin was formed in the sequential lamination process. I try to ignore
all the 7628 material but for its ability to fill the hole to the top with
resin. Then, the hole/resin fill was plated over. The hole diameter, as I
recal, was about ten mils. Therefore, it was producible through "norman"
drilling processes and should have shown no ill effects as the poor plating
shown. What's really important is the plating over the top. It is robust and
shows little depression, though exagerated by the micro section, at about a
mil or so. I rather like it as it is a near perfect depression and suits
BGA's very well though they need little help self aligning.
The second (color) image shows a "normal" drilled blind via. I think Proto
Engineering provided this section (how are my latest boards coming?). What's
interesting here is the possible plating over capability. If filled
properly, like Sanmina's tech center process and others, it would be plated
over without much notice.
I tried to find a surface photo but could not. The example is somewhere in
my endless collection of PCB stuff. When I find it, I'll photograph it and
post it as well. I do remember the old Praegitzer, in Fremont, CA, did it a
few years back. Trust me, the image is one looking down and shows minor
depressioning from the surface.
Anyway, that's my story and I'm sticking to it with photos to back it up,
MoonMan
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Date: Tue, 5 Mar 2002 23:08:18 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
peter lee <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: peter lee <[log in to unmask]>
Subject: Solder joint quality assessment
MIME-Version: 1.0
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Hello Technetters,
I am conducting an independent solder joint quality
assessment on one of our customer's product. The
result of the assessment will include general
observations on overall quality of the product, visual
inspection results on all components on board
(primarily SMT), noticeable soldering defects, process
deficiencies and recommendations.
I am looking for a formal template for my report with
a list of pass/fail criteria addressing the solder
joint quality of a product. Any advice would be
greatly appreciated.
__________________________________________________
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Date: Wed, 6 Mar 2002 01:24:50 -0600
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Seth Goodman <[log in to unmask]>
Subject: Re: Via in Pad? Need Help!!!
X-To: Earl Moon <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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> -----Original Message-----
> From: Earl Moon [mailto:[log in to unmask]]
> Sent: Tuesday, March 05, 2002 11:56 PM
> To: [log in to unmask]; [log in to unmask]
> Subject: Re: Via in Pad? Need Help!!!
>
>
> Oh Seth, before I forget, I forgot how to get either myself or other folks
> into your ftp site. Some folks are asking me how and I need to
> know as well
> as I'm on a different computer now and lost the info.
>
> Thanks,
>
> Earl
>
Just point your browser or FTP client (anonymous login) to
ftp.GoodmanAssociates.com and you should see a directory named "Earl's
files". Go into that directory and download anything that appeals. If
you're using a browser, you can copy and paste files onto your desktop (or
anyplace you want to store them). Here's a shortcut right to Earl's
directory: ftp.GoodmanAssociates.com/Earl's%20files
Seth
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Date: Wed, 6 Mar 2002 09:51:48 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: AUTOMOTIVE PACKAGING/SEALING REALIBILITY
X-To: Earl Moon <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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Carl
Despite Earl's elogious remarks (ta, much), I can hardly add anything to
what Peter has eloquently, sorry, elephantly said. Remember, ALL
synthetic materials are more or less like a sponge with very small pores
and epoxies are no exception. Furthermore, the pores are smallest only
under stoichiometric conditions, which produce the largest MW molecules.
How do you ensure stoichiometry? In my experience, the most critical
part are the connections, as this is the interface between the
electronics and the outside world. The best and most expensive way is a
hermetically sealed metal box with glass-to-metal seals (may be cheaper,
though, than having failures and returns). The worst way is the
elephant's trunk method, or a bundle of insulated cables coming out, as
these will form an effective pipe, straight to the electronics. In
between, you have some form of connector which, if not pre-treated to
ensure excellent adhesion of the epoxy, will soon leak salty wheel spray
straight into the animal's intestines. Remember, despite popular
thought, epoxy and some metals (including copper) are not really
compatible for adhesion (this is why the foil used for PCBs is very
rough and treated to promote adhesion). Rigid plastics are always
suspicious too, unless you can be sure there is no, no, no mould release
and they do not have a glossy surface. Flexible plastics are simply a
no-no. Finally, the epoxy for potting must be flexibilised and a good
electrical grade from a reliable manufacturer (mechanical grades have
reduced chloride elimination).
Please read Peter's message very carefully: everything he says is
important, especially his 2nd last paragraph, about qualification.
My 0.2 c worth.
Brian
Earl Moon wrote:
>
> Folks,
>
> Are there those of you out there doing automotive type packaging using
> various sealing techniques/processes ensuring high reliability and
> survivablity under hood? If so, I have an application needing similar
> packaging especially in areas of sealing "lids" on top of boxes containing
> electronic assemblies and parts.
>
> If you can share any information concerning this type box build and "lid"
> sealing, please advise and ask all the questions you wish.
>
> MoonMan
>
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> ---------------------------------------------------------------------------------
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Date: Wed, 6 Mar 2002 10:11:30 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Number of People on TechNet (non-technical)
X-To: Bev Christian <[log in to unmask]>
MIME-Version: 1.0
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Bev
Could it not be simpler than that? With the recession, those who are
lucky enough to still have jobs are ensuring they keep them by working
harder, to add the work of those who don't, as well. They therefore
either become lurkers or sign off, to reduce the temptation of losing
valuable time in replying. Guys like Earl, in his cave, and Doug, above
the Mountain Dewpoint, will always find time to help others, but others
may simply no longer have the time. I'll bet a pound to a penny that
when the cows become fat again, the situation will reverse.
I don't think the OT threads frighten anyone away: there is always the
delete button!
And I sure don't want to be tarred and feathered and don't think I
deserve it. The EnviroNet list still has only 117 subscribers, against
1,258 for TechNet and the few who post messages are to be seen on TN and
LF, as well.
Best regards,
Brian
Bev Christian wrote:
>
> Earl brings up a observation that I think several of us have made. I think
> this is an important issue.
>
> I do not think we can even jokingly tar and feather Brian or blame too much
> of it on the economy. I mean we are talking about a halving of our numbers!
> I would be interested if the IPC could tell us when the situation changed
> from growth to decline, rate, etc. Personally I signed off for a few
> weeks/months last year, when I started to receive copies of e-mails that had
> been posted several months earlier. I am wondering if this is when a lot of
> others jumped ship and never came back. Or did we drive some off with some
> of our incredibly fun, but off-topic threads?
>
> The reason I am concerned is that I think for a forum like this to be really
> useful it requires a fairly large critical mass, especially since the topics
> covered are so broad. We need a large base to be sure we have experts from
> all fields to answer the questions that are posed.
>
> A reply from the IPC would be appreciated.
>
> regards,
> Bev Christian
> Research in Motion
>
> -----Original Message-----
> From: Earl Moon [mailto:[log in to unmask]]
> Sent: March 5, 2002 9:35 AM
> To: [log in to unmask]
> Subject: Re: [TN] AUTOMOTIVE PACKAGING/SEALING REALIBILITY
>
> Brian,
>
> Thanks for the site/company/info. Just what I've been looking for and should
> do the job well. Also, not too far away, like you.
>
> You noticed the reduced number of participants on this forum? Can't remember
> seeing it this low. I remember when Steve said we are getting close to the
> 2000 member mark and was only off by a few hundred or so. I suspect you've
> been stealing them away to your environmental forum.
>
> In any event, everyone says the economy is back on track. Of course,
> contract engineers are being offered half what they made one year ago and I
> don't see too many jobs available but for JSF, power, drugs, and some
> strange stuff I've never heard of before.
>
> Just thinking, a self flattery statement, on paper,
>
> MoonMan
>
> ----------------------------------------------------------------------------
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> ext.5315
> ----------------------------------------------------------------------------
> -----
>
> ---------------------------------------------------------------------------------
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Date: Wed, 6 Mar 2002 10:19:37 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Water soluble w/BGA
X-To: Mary Jane Chism <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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MJ
My experience is that good batch cleaning is better than conveyorised
because a) you have better control over the cycle and b) you can orient
the boards so that the full effect of the separate wash jets and rinse
sprays can impinge at an acute angle onto the component edges (at the
risk of being accused of commercialism, there is a diagram illustrating
this in my book). Of course, design for cleaning is an important
consideration, alas, so often ignored.
Brian
> Mary Jane Chism wrote:
>
> Doug,
> Better late than never. Listed below are the answers to the questions.
> Thanks much.
>
> MJ
>
> -----Original Message-----
> From: [log in to unmask] [mailto:[log in to unmask]]
>
> Sent: Thursday, February 28, 2002 5:38 PM
> To: [log in to unmask]; [log in to unmask]
> Subject: Re: [TN] FW: Water soluble w/BGA
>
> Mary Jane wisely asks:
>
> I wanted to present this question out to the experts; What do you
> think
> about the validity of using water soluble flux with BGAs? Do you see a
>
> "residue" issue? Thanks.
>
> Doug Pauls, now way overdosed on Dew, replies:
>
> Maaaaaaaaaaaaaaayyyyyyyyyyybe.
> What water soluble flux? Alpha 609 paste
> What reflow method? Vapor phase, IR reflow, laser, hot gas? Air
> convection reflow
> What cleaning process? DI water
> Adding anything to the water? No
> In-line or batch cleaning? Both
> Itty bitty BGAs or big-honkin' BGAs?? Everything under the sun
> Full array or perimeter array? Same as above
> What standoffs? Same as above
> Are your boards clean going into it? Yes
> What do you mean by residue? Any contaminant
> What end use environment? It doesn't matter
> What reliability requirements? It doesn't matter
> What is the service life of the product? As long as it keeps on
> ticking
> What are the consequences of failure? Customer dissatisfaction
> Are you underfilling the BGA? No
> Why does the other line always move faster? Because the other line
> took their vitamins
> Is giving a year's supply of Captain Crunch cereal to my nieces a
> fitting
> revenge on my sister? Only if your sister embarrassed you when you
> were growing up.
>
> I should probably stop now. Too much Dew. Definitely too much Dew!!
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Date: Wed, 6 Mar 2002 17:47:52 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Pads, holes, traces and Class 3 field reliability
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Dear T-Nagers (PCB Design and Fab variety),
I am experiencing considerable difficulty in getting a number of fab houses
to produce our project's PCB's "right first time". Confident two week
turn-around quotes result in 4 and 6 week deliveries as they find they have
to re-fab two, three and even four times. Maybe we're using rubbish fab
shops, but they are certified MIL or IPC houses.
The only feedback on general points that I've had, and that's common to
them all, concerns our pad:hole ratio vs. 4 mils annular ring requirement.
Here's what we're asking them to produce at the moment:
-9" x 6" approx VME std boards (0.63 +/- 0.008" thk) class 3 for military
avionics.
-10 and 12 layers
-All layers are 1 oz copper except for layer 2, two middle layers and the
second last layer, which are 2 oz for planes.
-Material is FR4 IPC-4101/26
-Pad diameter (generally) = finished hole diameter + 12 mils
-Trace width = 10 mils signal, 15 mils power, spaces = 8 mils, reduced
locally to 8 mils where they have to pass through confined spaces such as
between fine-pitch connector pins.
-Via holes = 18 mils, via hole pads = 30 mils
-Outside layers start as 1/2 oz and are plated to minimum 1 oz
-Solder mask is 4 mils thick LPI (probably too thick, but I've no idea what
to specify)
-Finish plating is either HASL or ENIG
-Patterns of thermal via holes are filled with silver-loaded epoxy.
-Nothing particularly fancy otherwise on most of the boards, although one
type did have 3 blind via groups on each side as well as the through-hole
group.
Our designers do not include any allowance for manufacturing tolerences in
their selection of hole:pad ratio (I am arguing strongly for them to
include something, hence my proposal below). Pad diameter minus annular
ring requirement minus thickness of copper and finish plating equals zero.
I have proposed to our technical team a reduction in via hole diameter from
18 mils (aspect ratio 1:4) to 14 mils (aspect ratio 1:5), as a means of
giving the fab houses some manoeuvering room, but have received a reply
including the following arguments against it:
1) 1:5 aspect ratio is too great for long term reliability. Expansion
causes hole copper plating to segment under thermal cycling and break
contact with layers. IS THIS TRUE? Any evidence or can a voice of
experience out there answer this one?
2) Reducing trace widths further results in "weak traces and very weak
connection between traces and pads." HOW THIN CAN TRACES RELIABLY GET THESE
DAYS ON MILITARY BOARDS?
The boards are very densely populated, and a general increase in via hole
pad diameter of even 5 mils means losing 9% of our board area, such is the
number of holes. This we cannot afford, hence the proposal to reduce hole
diameter, especially for vias.
I could really use some support regarding what via hole aspect ratios,
plating thicknesses and minimum pad:hole ratios are reliable for military
use given teh baord info above. Our Tech Team are even proposing to remove
non-functional pads to free up real estate in some areas - a move I'm
strongly resisting.
MTIA,
Peter
[This e-mail is confidential and may also be privileged. If you are not the
intended recipient, please delete it and notify us immediately; you should
not copy or use it for any purpose, nor disclose its contents to any other
person. Thank you.]
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Date: Wed, 6 Mar 2002 10:54:28 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Keld Madsen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Keld Madsen <[log in to unmask]>
Subject: SV: [TN] Does My Mail Work?
X-To: ART HAMPTON <[log in to unmask]>
MIME-Version: 1.0
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YEP - all the way to Denmark.. :-)
Best Regards
bb electronics a/s
Keld Madsen
QUALITY ENGINEER
Direct (+45) 76 25 84 04
E-Mail: [log in to unmask]
----- oprindelig meddelelse-----
Fra: ART HAMPTON [mailto:[log in to unmask]]
Sendt: 5. marts 2002 22:58
Til: [log in to unmask]
Emne: [TN] Does My Mail Work?
Did this post?
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<DIV><SPAN class=126435009-06032002>YEP - all the way to Denmark..
:-)</SPAN></DIV>
<DIV><SPAN class=126435009-06032002></SPAN> </DIV>
<DIV><SPAN class=126435009-06032002>
<P>Best Regards <BR>bb electronics a/s </P>
<P>Keld Madsen <BR>QUALITY ENGINEER </P>
<P>Direct (+45) 76 25 84 04 <BR>E-Mail: [log in to unmask] </P></SPAN></DIV>
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<DIV align=left class=OutlookMessageHeader dir=ltr><FONT face=Tahoma><SPAN
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face=Tahoma>opr</FONT></SPAN>indelig meddelelse-----<BR><B>Fra:</B> ART
HAMPTON [mailto:[log in to unmask]]<BR><B>Sendt:</B> 5. marts 2002
22:58<BR><B>Til:</B> [log in to unmask]<BR><B>Emne:</B> [TN] Does My Mail
Work?<BR><BR></DIV></FONT>
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Date: Wed, 6 Mar 2002 11:17:49 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guenter Grossmann <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guenter Grossmann <[log in to unmask]>
Subject: Antw: [TN] Solder joint quality assessment
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IEC - A-610
Best regards
Guenter
.
EMPA
Swiss Federal Institute for Materials Testing and Research
Centre for Reliability
Dipl. Eng. Guenter Grossmann
8600 Duebendorf
Switzerland
Phone: xx41 1 823 4279
Fax : xx41 1823 4054
mail: [log in to unmask]
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Date: Wed, 6 Mar 2002 06:07:12 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: AUTOMOTIVE PACKAGING/SEALING REALIBILITY
X-To: [log in to unmask]
Brian,
You and everyone else knows I blame you for nothing. One thing though, damn
hard carrying an encyclopedia or dictionary around when you provide such
excellent information. Elogwhat?
MoonMan
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Date: Wed, 6 Mar 2002 06:10:08 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Number of People on TechNet (non-technical)
X-To: [log in to unmask]
Tarred and feathered? Now that's stretching it abit. Who started this
negative stuff anyway? Not me. Actually, I was complementing you for being
capable of starting another forum so importantly needed.
MoonMan
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Date: Wed, 6 Mar 2002 12:25:15 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"FOX, Ian (York Rd)" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "FOX, Ian (York Rd)" <[log in to unmask]>
Subject: Re: Pads, holes, traces and Class 3 field reliability
X-To: "[log in to unmask]" <[log in to unmask]>
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Peter, we use similar board types/constructions in our aircraft engine
mounted electronic systems. Our worst case aspect ratio is over 5:1,
although we try to keep to 4:1 as a maximum. We find that for unfilled vias
we need the presence of Ni plate for optimum via hole life (required MTBF
40,000+ hrs). Typically you will find extensive cracking on non-Ni plated
vias after 1000+ -55/125 degC thermal cycles, but you don't find the Ni
cracking until 4,000+ cycles. I would therefore suggest ENIG for optimum
reliability (we don't see the solderability issues some people report).
Internal traces on newest design currently are 6 thou track and 5 thou gap
on 1/2oz Cu (sometimes plated if we have buried vias, sometimes not), again
extensive T/C testing has not revealed an issue with this size of trace, but
for robustness, we don't go below 8 thou track and gap on outer layers.
Hope this is of help
Ian Fox
TRW Aeronautical Systems
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: 06 March 2002 09:48
To: [log in to unmask]
Subject: [TN] Pads, holes, traces and Class 3 field reliability
Dear T-Nagers (PCB Design and Fab variety),
I am experiencing considerable difficulty in getting a number of fab houses
to produce our project's PCB's "right first time". Confident two week
turn-around quotes result in 4 and 6 week deliveries as they find they have
to re-fab two, three and even four times. Maybe we're using rubbish fab
shops, but they are certified MIL or IPC houses.
The only feedback on general points that I've had, and that's common to
them all, concerns our pad:hole ratio vs. 4 mils annular ring requirement.
Here's what we're asking them to produce at the moment:
-9" x 6" approx VME std boards (0.63 +/- 0.008" thk) class 3 for military
avionics.
-10 and 12 layers
-All layers are 1 oz copper except for layer 2, two middle layers and the
second last layer, which are 2 oz for planes.
-Material is FR4 IPC-4101/26
-Pad diameter (generally) = finished hole diameter + 12 mils
-Trace width = 10 mils signal, 15 mils power, spaces = 8 mils, reduced
locally to 8 mils where they have to pass through confined spaces such as
between fine-pitch connector pins.
-Via holes = 18 mils, via hole pads = 30 mils
-Outside layers start as 1/2 oz and are plated to minimum 1 oz
-Solder mask is 4 mils thick LPI (probably too thick, but I've no idea what
to specify)
-Finish plating is either HASL or ENIG
-Patterns of thermal via holes are filled with silver-loaded epoxy.
-Nothing particularly fancy otherwise on most of the boards, although one
type did have 3 blind via groups on each side as well as the through-hole
group.
Our designers do not include any allowance for manufacturing tolerences in
their selection of hole:pad ratio (I am arguing strongly for them to
include something, hence my proposal below). Pad diameter minus annular
ring requirement minus thickness of copper and finish plating equals zero.
I have proposed to our technical team a reduction in via hole diameter from
18 mils (aspect ratio 1:4) to 14 mils (aspect ratio 1:5), as a means of
giving the fab houses some manoeuvering room, but have received a reply
including the following arguments against it:
1) 1:5 aspect ratio is too great for long term reliability. Expansion
causes hole copper plating to segment under thermal cycling and break
contact with layers. IS THIS TRUE? Any evidence or can a voice of
experience out there answer this one?
2) Reducing trace widths further results in "weak traces and very weak
connection between traces and pads." HOW THIN CAN TRACES RELIABLY GET THESE
DAYS ON MILITARY BOARDS?
The boards are very densely populated, and a general increase in via hole
pad diameter of even 5 mils means losing 9% of our board area, such is the
number of holes. This we cannot afford, hence the proposal to reduce hole
diameter, especially for vias.
I could really use some support regarding what via hole aspect ratios,
plating thicknesses and minimum pad:hole ratios are reliable for military
use given teh baord info above. Our Tech Team are even proposing to remove
non-functional pads to free up real estate in some areas - a move I'm
strongly resisting.
MTIA,
Peter
[This e-mail is confidential and may also be privileged. If you are not the
intended recipient, please delete it and notify us immediately; you should
not copy or use it for any purpose, nor disclose its contents to any other
person. Thank you.]
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Date: Wed, 6 Mar 2002 06:29:19 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Pads, holes, traces and Class 3 field reliability
X-To: [log in to unmask]
Peter,
It just doesn't seem too hard to me. 5:1 aspect ratio holes, especially the
diameter vs board thickness you describe is completely acceptable. Actually,
it is in the preferred comumn.
You know we've talked about this before realizing cu plating thickness and
ductility requirements must be met as .001" thickness, and all the rest
entailed in 6012, and ductility well exceeding 10%. Nothing will make the
hole walls come apart using this criteria to the extent all else meets
6012's figure 3.5 and associated requirements in that section. Of course,
laminate integrity is important as well and voiding requirements in the
laminate evaluation area cannot exceed that which is specified. Don't want
any voids propagating into cracks extending into the thermal evaluation
zones/holes and causing cracks.
Copper foil, for very high reliability boards, such as some Class III types,
also should be very ductile. This means using rolled annealed copper instead
of ED type. We need the plated hole interface to internal layers to be
capable of withstanding thermal stress and shock as well. Also, as indicated
in section 3, clear requirements must be met for hole plating to surface
conductors.
Actually, instead of more discussion on my part, IPC 2221, etc., and 6012
cover all the ground, and much more, you are concerned about. There's little
else to say.
Very best wishes on your endeavor and its success,
Earl
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Date: Wed, 6 Mar 2002 12:18:38 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Frank Davies <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Frank Davies <[log in to unmask]>
Subject: Re: SV: [TN] Does My Mail Work?
X-To: Keld Madsen <[log in to unmask]>
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-----Original Message-----
From: Keld Madsen <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Wednesday, March 06, 2002 12:00 PM
Subject: [TN] SV: [TN] Does My Mail Work?
Made it through Ireland on its way to Denmark!!!
Good Luck
Frank
YEP - all the way to Denmark.. :-)
=20
Best Regards=20
bb electronics a/s=20
Keld Madsen=20
QUALITY ENGINEER=20
Direct (+45) 76 25 84 04=20
E-Mail: [log in to unmask]
----- oprindelig meddelelse-----
Fra: ART HAMPTON [mailto:[log in to unmask]]
Sendt: 5. marts 2002 22:58
Til: [log in to unmask]
Emne: [TN] Does My Mail Work?
=20
=20
Did this post?=20
=20
=20
____________________________________________________
IncrediMail - Email has finally evolved - Click Here=20
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<DIV><FONT face=3DArial size=3D2><B>-----Original =
Message-----</B><BR><B>From:=20
</B>Keld Madsen <<A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A>><BR><B>T=
o: </B><A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A> <<A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A>><BR><B>Date: =
</B>Wednesday,=20
March 06, 2002 12:00 PM<BR><B>Subject: </B>[TN] SV: [TN] Does My Mail=20
Work?</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Made it through Ireland on its way to=20
Denmark!!!</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Good Luck</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Frank<BR><BR></DIV></FONT>
<DIV><SPAN class=3D126435009-06032002>YEP - all the way to Denmark..=20
:-)</SPAN></DIV>
<DIV><SPAN class=3D126435009-06032002></SPAN> </DIV>
<DIV><SPAN class=3D126435009-06032002>
<P>Best Regards <BR>bb electronics a/s </P>
<P>Keld Madsen <BR>QUALITY ENGINEER </P>
<P>Direct (+45) 76 25 84 04 <BR>E-Mail: [log in to unmask] =
</P></SPAN></DIV>
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Date: Wed, 6 Mar 2002 07:45:55 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dieselberg, Ron" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dieselberg, Ron" <[log in to unmask]>
Subject: Re: I need a better soldering iron
X-To: Phil Nutting <[log in to unmask]>
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Phil, call me old fashioned, but I prefer Weller as a first choice and
Metcal as a last choice. I have always had good results with Weller. =
Weller
has a variety of types and styles to chose from and the ones I used =
were
pretty much low maintenance.
Ron Dieselberg
Trainer/Auditor
CMC ELECTRONICS
CINCINNATI
[log in to unmask]
-----Original Message-----
From: Phil Nutting [mailto:[log in to unmask]]
Sent: Tuesday, March 05, 2002 14:45 PM
To: [log in to unmask]
Subject: [TN] I need a better soldering iron
I'm not happy with the reliability of our current soldering
irons. I have about 20 hand pieces in my office that are dead for one
reason or another. We do only through hole circuit boards and
electromechanical assemblies. Our present models are ESD safe. The =
irons
are typically on all shift (one shift) long and many are cranked up to =
max
temp (850=B0F).
Without getting into a long sales presentation, what is one
of the better soldering irons out there? I could chose by price or =
name
recognition, but I'd rather buy something that is really good, easy to
service when broken and is easy to get parts. Are these requests =
mutually
exclusive?
Thanks in advance for your collective wisdom.
Phil Nutting
Manufacturing Engineer
=09
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charset=3Diso-8859-1">
<META NAME=3D"Generator" CONTENT=3D"MS Exchange Server version =
5.5.2652.35">
<TITLE>RE: [TN] I need a better soldering iron</TITLE>
</HEAD>
<BODY>
<P><FONT SIZE=3D2 FACE=3D"Arial">Phil, call me old fashioned, but I =
prefer Weller as a first choice and Metcal as a last choice. I have =
always had good results with Weller. Weller has a variety of types and =
styles to chose from and the ones I used were pretty much low =
maintenance.</FONT></P>
<P><FONT SIZE=3D2 FACE=3D"Courier New">Ron Dieselberg</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">Trainer/Auditor</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">CMC ELECTRONICS</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">CINCINNATI</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">[log in to unmask]</FONT>
</P>
<UL><UL>
<P><A NAME=3D"_MailData"><FONT SIZE=3D2 FACE=3D"Arial">-----Original =
Message-----</FONT></A>
<BR><B><FONT SIZE=3D2 FACE=3D"Arial">From: Phil Nutting [<A =
HREF=3D"mailto:[log in to unmask]">mailto:PNutting@KAISERSYSTEMS=
.COM</A>]</FONT></B>
<BR><B><FONT SIZE=3D2 FACE=3D"Arial">Sent: </FONT></B> <FONT =
SIZE=3D2 FACE=3D"Arial">Tuesday, March 05, 2002 14:45 PM</FONT>
<BR><B><FONT SIZE=3D2 =
FACE=3D"Arial">To: </FONT></B> <FONT SIZE=3D2 =
FACE=3D"Arial">[log in to unmask]</FONT>
<BR><B><FONT SIZE=3D2 =
FACE=3D"Arial">Subject: </FONT>=
</B> <FONT SIZE=3D2 FACE=3D"Arial">[TN] I need a better soldering =
iron</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">I'm not happy with the reliability of =
our current soldering irons. I have about 20 hand pieces in my =
office that are dead for one reason or another. We do only =
through hole circuit boards and electromechanical assemblies. Our =
present models are ESD safe. The irons are typically on all shift =
(one shift) long and many are cranked up to max temp =
(850=B0F).</FONT></P>
<P><FONT SIZE=3D2 FACE=3D"Arial">Without getting into a long sales =
presentation, what is one of the better soldering irons out =
there? I could chose by price or name recognition, but I'd rather =
buy something that is really good, easy to service when broken and is =
easy to get parts. Are these requests mutually =
exclusive?</FONT></P>
<P><FONT SIZE=3D2 FACE=3D"Arial">Thanks in advance for your collective =
wisdom.</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">Phil Nutting</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">Manufacturing Engineer</FONT>
</P>
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Date: Wed, 6 Mar 2002 07:13:55 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
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Subject: Re: I need a better soldering iron
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You might also consider Hexacon soldering irons. They have always been
very reliable for me and well supported. You can see their stuff at
www.hexaconelectric.com.
Doug Pauls
Rockwell Collins
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Date: Wed, 6 Mar 2002 08:25:59 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Pads, holes, traces and Class 3 field reliability
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Peter,
I only have a moment to answer as I am going visiting Customers with similar
issues. I can assure you that these can be boring boards, albeit challenging
especially with the fill. Place a PO and ten working days later (plus one
for shipping) your parts are in your hands and certified to your chose of
IPC-6012, Class 3, MIL-PRF-31032 or the beloved MIL-PRF-55110. I have to
many years experience in high reliability Military boards than I will admit
to here, I will extrapolate a long winded answer this evening. Feel free to
call as I love to talk high tech with one hand on the wheel.
and remember a boring board is a happy board...
Respectfully,
Boston Brad
781 858 0783
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Date: Wed, 6 Mar 2002 08:30:30 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McGlaughlin, Jeffrey A" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McGlaughlin, Jeffrey A" <[log in to unmask]>
Subject: Re: Pads, holes, traces and Class 3 field reliability
X-To: "[log in to unmask]" <[log in to unmask]>
MIME-version: 1.0
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Peter -
Some of the tolerances you give seam to be a little on the tight side. An
18mil hole on a 30mil pad with a 4 mil annular ring allows only 4 mil for
registration, etch, plating and drilling accuracy. Our general design rule
for a 2.5mil annular ring would be 18/35 finished hole/pad for vias,
fabricator recommended 10 over drill (rot 2-3mil over finished hole) plus 2x
annular ring.
We use a 1:5 and 1:6 aspect ratio via for high reliability/military PCB on
a regular basis. We have had no incident of failure from thermal cycling.
6/6mil and 5/5mil trace and space designs can be ruggedized for mil style
applications by "teardrop"-ing the trace-to-pad transitions. I have even
done a few designs for "industrial" applications where I have used 4/4mil
design rules for signals using the teardrop design.
I am attaching a good design guide for your reference (sent to Peter
directly). This is the most complete and useable guide I have found. The
fabricator who supplied this is fairly reliable for small quantities (~100
piece lots, big for us) I don't know about using them for "real" production
levels.
Good Luck,
Jeffrey A. McGlaughlin CID
Sr. Designer
Battelle Memorial Institute
Columbus Ohio
[log in to unmask]
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Wednesday, March 06, 2002 4:48 AM
To: [log in to unmask]
Subject: [TN] Pads, holes, traces and Class 3 field reliability
Dear T-Nagers (PCB Design and Fab variety),
I am experiencing considerable difficulty in getting a number of fab houses
to produce our project's PCB's "right first time". Confident two week
turn-around quotes result in 4 and 6 week deliveries as they find they have
to re-fab two, three and even four times. Maybe we're using rubbish fab
shops, but they are certified MIL or IPC houses.
The only feedback on general points that I've had, and that's common to
them all, concerns our pad:hole ratio vs. 4 mils annular ring requirement.
Here's what we're asking them to produce at the moment:
-9" x 6" approx VME std boards (0.63 +/- 0.008" thk) class 3 for military
avionics.
-10 and 12 layers
-All layers are 1 oz copper except for layer 2, two middle layers and the
second last layer, which are 2 oz for planes.
-Material is FR4 IPC-4101/26
-Pad diameter (generally) = finished hole diameter + 12 mils
-Trace width = 10 mils signal, 15 mils power, spaces = 8 mils, reduced
locally to 8 mils where they have to pass through confined spaces such as
between fine-pitch connector pins.
-Via holes = 18 mils, via hole pads = 30 mils
-Outside layers start as 1/2 oz and are plated to minimum 1 oz
-Solder mask is 4 mils thick LPI (probably too thick, but I've no idea what
to specify)
-Finish plating is either HASL or ENIG
-Patterns of thermal via holes are filled with silver-loaded epoxy.
-Nothing particularly fancy otherwise on most of the boards, although one
type did have 3 blind via groups on each side as well as the through-hole
group.
Our designers do not include any allowance for manufacturing tolerences in
their selection of hole:pad ratio (I am arguing strongly for them to
include something, hence my proposal below). Pad diameter minus annular
ring requirement minus thickness of copper and finish plating equals zero.
I have proposed to our technical team a reduction in via hole diameter from
18 mils (aspect ratio 1:4) to 14 mils (aspect ratio 1:5), as a means of
giving the fab houses some manoeuvering room, but have received a reply
including the following arguments against it:
1) 1:5 aspect ratio is too great for long term reliability. Expansion
causes hole copper plating to segment under thermal cycling and break
contact with layers. IS THIS TRUE? Any evidence or can a voice of
experience out there answer this one?
2) Reducing trace widths further results in "weak traces and very weak
connection between traces and pads." HOW THIN CAN TRACES RELIABLY GET THESE
DAYS ON MILITARY BOARDS?
The boards are very densely populated, and a general increase in via hole
pad diameter of even 5 mils means losing 9% of our board area, such is the
number of holes. This we cannot afford, hence the proposal to reduce hole
diameter, especially for vias.
I could really use some support regarding what via hole aspect ratios,
plating thicknesses and minimum pad:hole ratios are reliable for military
use given teh baord info above. Our Tech Team are even proposing to remove
non-functional pads to free up real estate in some areas - a move I'm
strongly resisting.
MTIA,
Peter
[This e-mail is confidential and may also be privileged. If you are not the
intended recipient, please delete it and notify us immediately; you should
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Date: Wed, 6 Mar 2002 08:47:51 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Via in Pad? Need Help! Pictures are up!
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_27.23d3cea1.29b77807_boundary"
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Content-Type: text/plain; charset="US-ASCII"
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Earl,
Your pictures are up! Go to:
http://www.stevezeva.homestead.com
-Steve Gregory-
> Seth and other fine folks,
>
> I do a lot of work in the R/F MLB world. Who doesn't. In this regard, I
> asked Steve if he'd kindly post two x-section images. Both show blind vias
> not of the micro type. One is shown from a bucket shop not knowing what they
> had done really was pretty good but for obvious plating problems.
>
> The first image shows a "normal" blind via that has been plated over. The
> fill resin was formed in the sequential lamination process. I try to ignore
> all the 7628 material but for its ability to fill the hole to the top with
> resin. Then, the hole/resin fill was plated over. The hole diameter, as I
> recal, was about ten mils. Therefore, it was producible through "norman"
> drilling processes and should have shown no ill effects as the poor plating
> shown. What's really important is the plating over the top. It is robust and
> shows little depression, though exagerated by the micro section, at about a
> mil or so. I rather like it as it is a near perfect depression and suits
> BGA's very well though they need little help self aligning.
>
> The second (color) image shows a "normal" drilled blind via. I think Proto
> Engineering provided this section (how are my latest boards coming?). What's
> interesting here is the possible plating over capability. If filled
> properly, like Sanmina's tech center process and others, it would be plated
> over without much notice.
>
--part1_27.23d3cea1.29b77807_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Earl,
<BR>
<BR>Your pictures are up! Go to:
<BR>
<BR>http://www.stevezeva.homestead.com
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Seth and other fine folks,
<BR>
<BR>I do a lot of work in the R/F MLB world. Who doesn't. In this regard, I
<BR>asked Steve if he'd kindly post two x-section images. Both show blind vias
<BR>not of the micro type. One is shown from a bucket shop not knowing what they
<BR>had done really was pretty good but for obvious plating problems.
<BR>
<BR>The first image shows a "normal" blind via that has been plated over. The
<BR>fill resin was formed in the sequential lamination process. I try to ignore
<BR>all the 7628 material but for its ability to fill the hole to the top with
<BR>resin. Then, the hole/resin fill was plated over. The hole diameter, as I
<BR>recal, was about ten mils. Therefore, it was producible through "norman"
<BR>drilling processes and should have shown no ill effects as the poor plating
<BR>shown. What's really important is the plating over the top. It is robust and
<BR>shows little depression, though exagerated by the micro section, at about a
<BR>mil or so. I rather like it as it is a near perfect depression and suits
<BR>BGA's very well though they need little help self aligning.
<BR>
<BR>The second (color) image shows a "normal" drilled blind via. I think Proto
<BR>Engineering provided this section (how are my latest boards coming?). What's
<BR>interesting here is the possible plating over capability. If filled
<BR>properly, like Sanmina's tech center process and others, it would be plated
<BR>over without much notice.
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
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Date: Wed, 6 Mar 2002 08:53:36 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bev Christian <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bev Christian <[log in to unmask]>
Subject: Re: Number of People on TechNet (non-technical)
MIME-Version: 1.0
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It was a JOKE!
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: March 6, 2002 7:10 AM
To: [log in to unmask]
Subject: Re: [TN] Number of People on TechNet (non-technical)
Tarred and feathered? Now that's stretching it abit. Who started this
negative stuff anyway? Not me. Actually, I was complementing you for being
capable of starting another forum so importantly needed.
MoonMan
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Date: Wed, 6 Mar 2002 07:54:52 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Number of People on TechNet (non-technical)
X-To: [log in to unmask]
Bev,
Now I get it. To me, most of life is a bit of a joke. However, I do take
things a bit too seriously.
MoonMan
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Date: Wed, 6 Mar 2002 08:01:13 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Via in Pad? Need Help! Pictures are up!
X-To: [log in to unmask]
Thanks Steve,
I usually keep some good sections and other images too. Don't have anything
showing them with me on this computer. I'll find some and a surface shot of
the type of surface being discussed, another time.
I just can't get over what a really bad hole is shown but how really good
the surface plating is. Luck and no skill at work here. Funny thing is, I
didn't even know this board had been produced this way. Had an open
somewhere and buzzed it out and found a suspect are and sectioned it. Wala,
a blind, plated over via with no plating in the hole. I can't believe the
shop, who did very little in terms of sophistication, actually did the
sequential lamination and plated over the resin so well.
Earl
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Date: Wed, 6 Mar 2002 09:02:27 -0500
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Leo Lambert <[log in to unmask]>
Subject: Re: SV: [TN] Does My Mail Work?
X-To: Keld Madsen <[log in to unmask]>
In-Reply-To: <03189D423A0ED51182FD006097CEE4B1156FDA@MAIL>
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yup all the way to New Hampshire
Leo Lambert
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Keld Madsen
Sent: Wednesday, March 06, 2002 4:54 AM
To: [log in to unmask]
Subject: [TN] SV: [TN] Does My Mail Work?
YEP - all the way to Denmark.. :-)
Best Regards
bb electronics a/s
Keld Madsen
QUALITY ENGINEER
Direct (+45) 76 25 84 04
E-Mail: [log in to unmask]
----- oprindelig meddelelse-----
Fra: ART HAMPTON [mailto:[log in to unmask]]
Sendt: 5. marts 2002 22:58
Til: [log in to unmask]
Emne: [TN] Does My Mail Work?
Did this post?
____________________________________________________
IncrediMail - Email has finally evolved - Click Here
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<DIV><SPAN class=3D730040214-06032002>yup all the way to New=20
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<DIV><SPAN class=3D730040214-06032002></SPAN> </DIV>
<DIV><SPAN class=3D730040214-06032002>Leo Lambert</SPAN></DIV>
<BLOCKQUOTE style=3D"MARGIN-RIGHT: 0px">
<DIV align=3Dleft class=3DOutlookMessageHeader dir=3Dltr><FONT=20
face=3DTahoma>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of </B>Keld =
Madsen<BR><B>Sent:</B>=20
Wednesday, March 06, 2002 4:54 AM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> [TN] SV: [TN] Does My Mail=20
Work?<BR><BR></DIV></FONT>
<DIV><SPAN class=3D126435009-06032002>YEP - all the way to Denmark..=20
:-)</SPAN></DIV>
<DIV><SPAN class=3D126435009-06032002></SPAN> </DIV>
<DIV><SPAN class=3D126435009-06032002>
<P>Best Regards <BR>bb electronics a/s </P>
<P>Keld Madsen <BR>QUALITY ENGINEER </P>
<P>Direct (+45) 76 25 84 04 <BR>E-Mail: [log in to unmask] =
</P></SPAN></DIV>
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class=3D126435009-06032002><FONT =
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face=3DTahoma>opr</FONT></SPAN>indelig =
meddelelse-----<BR><B>Fra:</B> ART=20
HAMPTON [mailto:[log in to unmask]]<BR><B>Sendt:</B> 5. marts 2002=20
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=
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Date: Wed, 6 Mar 2002 09:11:04 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
James TerVeen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: James TerVeen <[log in to unmask]>
Subject: Re: I need a better soldering iron
X-To: Phil Nutting <[log in to unmask]>
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I think I agree with most everybody about Metcal. The only problem is
cost. they are not cheap and the tips will cost you a whole lot more =
than
anybody elses. We used Hakko 936 in my last job for those really tuf=
f
and high temp jobs and they worked great. But remember the Metcal is =
a
high dollar item and the tips if not maintained are a real budget break=
er.
=
=20
Phil Nutting =
=20
<PNutting@KAISERSY To: [log in to unmask] =
=20
STEMS.COM> cc: =
=20
Sent by: TechNet Subject: [TN] I need a=
better soldering iron =20
<[log in to unmask]> =
=20
=
=20
=
=20
03/05/02 02:44 PM =
=20
Please respond to =
=20
"TechNet E-Mail =
=20
Forum."; Please =
=20
respond to Phil =
=20
Nutting =
=20
=
=20
=
=20
I'm not happy with the reliability of our current soldering irons. I h=
ave
about 20 hand pieces in my office that are dead for one reason or anoth=
er.
We do only through hole circuit boards and electromechanical assemblies=
.
Our present models are ESD safe. The irons are typically on all shift =
(one
shift) long and many are cranked up to max temp (850=B0F).
Without getting into a long sales presentation, what is one of the bett=
er
soldering irons out there? I could chose by price or name recognition,=
but
I'd rather buy something that is really good, easy to service when brok=
en
and is easy to get parts. Are these requests mutually exclusive?
Thanks in advance for your collective wisdom.
Phil Nutting
Manufacturing Engineer
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Date: Wed, 6 Mar 2002 09:41:27 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bissonnette, Jean-Francois" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bissonnette, Jean-Francois" <[log in to unmask]>
Subject: Conformal coating: high humidity environment.
MIME-Version: 1.0
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Hi all,
What type of coating should be used when equipment is to be used in high
humidity environment (near sea water)?
Thanks in advance!
Jean-Fran=E7ois Bissonnette
V=E9rificateur, Contr=F4le de la Qualit=E9
=C9lectronique
Produits et Proc=E9d=E9s
Vapor Rail Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 x2021
(514) 335-4231 fax
<<Bissonnette, Jean-Francois.vcf>>=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally privileged and=
confidential information intended only for the use of the individual or en=
tity named herein. If the reader of this transmission is not the intended r=
ecipient, you are hereby notified that any dissemination, distribution, or =
copying of this transmission is strictly prohibited.
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Date: Wed, 6 Mar 2002 09:55:39 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Roger Stoops <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Roger Stoops <[log in to unmask]>
Subject: Re: AUTOMOTIVE PACKAGING/SEALING REALIBILITY
X-To: Carl VanWormer <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Carl,
Been readin' what everbody else is saying about potting and encapsulating,
thought I would jump into the fray.
We build equipment that is mounted on 'dozer blades, behind and under
motorgraders, and such. Pretty dirty and nasty environment. We have found
that, for consistent reliability, potting or coating a board (really squeaky
clean to begin with mind you), mounted in a custom aluminum enclosure, with
a sealing ring or o-ring under the lid, and using Mil-style circular
connectors (with gasket seal behind connector) seems to cure these problems.
Of course this may be more expensive than what your product can afford, but
illustrates how we solved such a problem. Even a small, inexpensive
off-the-shelf aluminum enclosure with a simple gasket system would go a long
way to reducing your problem with external moisture.
We would like to hear later about your efforts in solving your dilemma.
Roger M. Stoops, CID [log in to unmask]
TRIMBLE NAVIGATION LLC
Engineering and Construction Division
5475 Kellenburger Rd.
Dayton, OH 45424-1099 USA
Telephone: 937 233 8921 800 538 7800 ext. 288
Facsimile: 937 233 7511
http://www.trimble.com
-----Original Message-----
From: Carl VanWormer [mailto:[log in to unmask]]
Sent: Tuesday, March 05, 2002 11:36 AM
To: [log in to unmask]
Subject: Re: [TN] AUTOMOTIVE PACKAGING/SEALING RELIABILITY
I got excited after seeing the subject, but I haven't seen enough, yet . . .
We have a "potted" product that rides behind the wheels of a truck. All our
best protection efforts have yielding significant failure rates. Returned
units have had traces eaten off the board, with various colors of crud left
over. The green is probably copper oxides. Some of the copper seems to
have turned into a red powder. There is a lot of white crust around some of
the lost traces and vias. We are guessing that the boards were not cleaned
well enough before potting (Insulcast RTVS 27 thermally conductive potting
compound). We believe the boards were produced with a water soluble flux,
then washed, then a few hand-ads were installed with a "no-clean" flux. We
think that either (1) moisture sealed inside the potted units may be
"helping" the corrosion, or (2) moisture (with or without extra corrosive
elements) is leaking it through poorly sealed boundaries of the potting
compound. (we are using "primer" around the known "edges" of the units)
I know that "Detroit" has solved this problem many times. Where can I find
a "guide book" or a knowledgeable vendor to help me out of this board
cleaning/potting mess?
Carl Van Wormer
Cipher Systems
1815 NW 169th Place, Suite 5010
Beaverton, OR 97006
Phone (503)-617-7447 Fax (503)-617-6550
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Tuesday, March 05, 2002 6:35 AM
To: [log in to unmask]
Subject: Re: [TN] AUTOMOTIVE PACKAGING/SEALING RELIABILITY
Brian,
Thanks for the site/company/info. Just what I've been looking for and should
do the job well. Also, not too far away, like you.
You noticed the reduced number of participants on this forum? Can't remember
seeing it this low. I remember when Steve said we are getting close to the
2000 member mark and was only off by a few hundred or so. I suspect you've
been stealing them away to your environmental forum.
In any event, everyone says the economy is back on track. Of course,
contract engineers are being offered half what they made one year ago and I
don't see too many jobs available but for JSF, power, drugs, and some
strange stuff I've never heard of before.
Just thinking, a self flattery statement, on paper,
MoonMan
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Date: Wed, 6 Mar 2002 07:18:31 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: Re: Via in Pad? Need Help!!!
X-To: Ken Patel <[log in to unmask]>
MIME-version: 1.0
Content-type: text/plain; charset=iso-8859-1
Content-transfer-encoding: 7BIT
Ken,
If masking the bottom of the board is a real solution you could make a
stencil and apply a temporary, water soluble, mask. I have used this method
on some panels we had made with a pad to close to a pth.
Dan
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Date: Wed, 6 Mar 2002 10:59:37 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Environmental forum
MIME-Version: 1.0
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Hello,
What is the info on the new forum, not ComplianceNet but the new one
just started?
Steve Wentz
Florida CirTech
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Date: Wed, 6 Mar 2002 11:22:07 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Conformal coating: high humidity environment.
MIME-Version: 1.0
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Acrylics tend to have the best performance in high moisture environments, as
long as the temperatures are not extremely high.
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Date: Wed, 6 Mar 2002 16:52:52 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Naisbitt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Naisbitt <[log in to unmask]>
Subject: Re: Conformal coating: high humidity environment.
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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My best recommendation would be a single part urethane - well cooked.
Regards Graham Naisbitt
[log in to unmask] <mailto:[log in to unmask]>
Concoat Limited
Alasan House, Albany Park
Camberley GU16 7PH - UK
www.concoat.co.uk <http://www.concoat.co.uk>
Phone: +44 1276 691100
Fax: +44 1276 691227
Mobile: +44 79 6858 2121
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Bissonnette,
> Jean-Francois
> Sent: 06 March 2002 14:41
> To: [log in to unmask]
> Subject: [TN] Conformal coating: high humidity environment.
>
>
> Hi all,
>
> What type of coating should be used when equipment is to be used in high
> humidity environment (near sea water)?
>
> Thanks in advance!
>
> Jean-François Bissonnette
> Vérificateur, Contrôle de la Qualité
> Électronique
> Produits et Procédés
> Vapor Rail Inc.
> 10655 Henri-Bourassa O.
> St-Laurent, Qc
> H4S 1A1
>
> (514) 335-4200 x2021
> (514) 335-4231 fax
>
> <<Bissonnette, Jean-Francois.vcf>>
>
>
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally
> privileged and confidential information intended only for the use
> of the individual or entity named herein. If the reader of this
> transmission is not the intended recipient, you are hereby
> notified that any dissemination, distribution, or copying of this
> transmission is strictly prohibited.
>
> ------------------------------------------------------------------
> ---------------
> Technet Mail List provided as a free service by IPC using LISTSERV 1.8d
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> the BODY (NOT the subject field): SIGNOFF Technet
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> [log in to unmask]: SET Technet NOMAIL
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> Databases > E-mail Archives
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> information, or contact Keach Sasamori at [log in to unmask] or
> 847-509-9700 ext.5315
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>
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Date: Wed, 6 Mar 2002 18:55:28 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Environmental forum
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Steve
EnviroNet is a free and easy list server on anything to do with the
environment, health & safety or related subjects, either
industry-related or more generally. The subscribing etc. is done exactly
as for TechNet and the rest except you change the name, of course.
ComplianceNet is more about conforming to US regulations, I believe.
Obviously, there is some overlap between the various forums.
Best regards,
Brian
[log in to unmask] wrote:
>
> Hello,
> What is the info on the new forum, not ComplianceNet but the new one
> just started?
>
> Steve Wentz
> Florida CirTech
>
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Date: Wed, 6 Mar 2002 08:48:15 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Leonard Alexman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Leonard Alexman <[log in to unmask]>
Subject: Thermals, plane clearances etc.
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Hello All,
I am trying to determine the exact meaning of the IPC spec 2221
sections 9.1.2 thru 9.1.4 and have many questions hopefully
someone can answer.
From section 9.1.2 "A".
1. Is maximum hole size the drilled size or the finished hole size ?
2. The annular ring uses a 0.05 MM value for the annular ringsize.
In table 9.2 in spec IPC2221 0.05mm is for external Supported annular rings
shouldn't the value be 0.03mm since the plane is an internal layer ?
From Section 9.1.3 Figure 9.1.
1. The .25MM minimum for the nonfunctional land is this what should be
used to create the outer ring size on a thermal connection ?
2. Is the value "B" - standard manufacturing allowance the same as
fabrication allowance ?
3. For value "A" - electrical clearance - how are these values determined ?
From section 9.1.3.1.
1. In figure 9-2 on the bottom right side is shows A + B see fig 9-3.
Shouldn't that be
figure 9-1 ? Also why is this even mentioned if the clearance area is
determined by
hole diameter and fabrication allowance ?
2. Is the hole diameter (max) the finished hole size of the drill size ?
Lenny ALexman
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Date: Wed, 6 Mar 2002 09:02:04 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Carl VanWormer <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Carl VanWormer <[log in to unmask]>
Subject: Re: AUTOMOTIVE PACKAGING/SEALING REALIBILITY
MIME-Version: 1.0
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Thanks to all for the recent comments, questions, and suggestions. Here's a
"quick" update of my recent status and findings:
Our unit is mounted in an aluminum box (4 screws into the top) with some
style of heavy duty circular connectors (with rubber gaskets), and I've seen
no board corrosion around that area. The system is potted with Insulcast
RTVS 27, after treating the connector sides, box mating surfaces and holes,
and sides of 4 led (that protrude thru box holes) with the "proper" primer.
Previous batches of boards have been built, cleaned, then stocked. After
final programming (a J-leaded PROM, hand soldered with water soluble flux),
they are washed under hot, running water with vigorous brushing. Recent
testing (yesterday, thanks to QPL) indicated ionic contamination levels of 5
ug. NaCl/sq.in, initially, and 15 ug. NaCl/sq.in after the PROM is added and
"cleaned". This indicates that there is some bad stuff inside to start the
process. This is like putting one bullet in your Colt 45 and playing
Russian Roulette!
Now we have 2 possibilities for the second half of the equation . . . either
we are sealing enough moisture in the system to guarantee continued work for
our repair tech, or water is getting in through our impervious barriers.
Failure analysis shows the most common areas for the corrosion are in the
area of the 4 LEDs that protrude through the box. I am suspicious of the
quality of the adhesion to the "primered" LEDs, since they seem to pull
clear of the potting compound leaving a smooth surface, not torn and ragged.
Another area has been near the board (and box) edges, some of which have
shown what appears to be oil incursion into potting fractures at the box top
interface. I am wondering if vibration of the potting mass is causing
fractures, even though it is hard to imagine when looking at the system.
Has anyone seen anything like this with the Insulcast compound?
Since I have to make some more units, I have cleaned a dozen (for a second
time) and baked them overnight at 70 C, bagged them with desiccant to wait
for potting. We are planning to flood the boards and box with primer,
thinking that they may be more difficult to troubleshoot if they fail, but
maybe they won't fail (at least at the present 30% rate). Any thoughts on
this?
Thanks for listening,
Carl
Carl Van Wormer
Cipher Systems
1815 NW 169th Place, Suite 5010
Beaverton, OR 97006
Phone (503)-617-7447 Fax (503)-617-6550
-----Original Message-----
From: Roger Stoops [mailto:[log in to unmask]]
Carl,
Been readin' what everbody else is saying about potting and encapsulating,
thought I would jump into the fray.
We build equipment that is mounted on 'dozer blades, behind and under
motorgraders, and such. Pretty dirty and nasty environment. We have found
that, for consistent reliability, potting or coating a board (really squeaky
clean to begin with mind you), mounted in a custom aluminum enclosure, with
a sealing ring or o-ring under the lid, and using Mil-style circular
connectors (with gasket seal behind connector) seems to cure these problems.
Of course this may be more expensive than what your product can afford, but
illustrates how we solved such a problem. Even a small, inexpensive
off-the-shelf aluminum enclosure with a simple gasket system would go a long
way to reducing your problem with external moisture.
We would like to hear later about your efforts in solving your dilemma.
Roger M. Stoops, CID [log in to unmask]
TRIMBLE NAVIGATION LLC
Engineering and Construction Division
http://www.trimble.com
-----Original Message-----
From: Carl VanWormer [mailto:[log in to unmask]]
We have a "potted" product that rides behind the wheels of a truck. All our
best protection efforts have yielding significant failure rates. Returned
units have had traces eaten off the board, with various colors of crud left
over. The green is probably copper oxides. Some of the copper seems to
have turned into a red powder. There is a lot of white crust around some of
the lost traces and vias. We are guessing that the boards were not cleaned
well enough before potting (Insulcast RTVS 27 thermally conductive potting
compound). We believe the boards were produced with a water soluble flux,
then washed, then a few hand-ads were installed with a "no-clean" flux. We
think that either (1) moisture sealed inside the potted units may be
"helping" the corrosion, or (2) moisture (with or without extra corrosive
elements) is leaking it through poorly sealed boundaries of the potting
compound. (we are using "primer" around the known "edges" of the units)
I know that "Detroit" has solved this problem many times. Where can I find
a "guide book" or a knowledgeable vendor to help me out of this board
cleaning/potting mess?
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Date: Wed, 6 Mar 2002 12:14:19 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
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Sender: TechNet <[log in to unmask]>
From: Dan Cavaliere <[log in to unmask]>
Subject: Re: Environmental forum
X-To: [log in to unmask]
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[log in to unmask]
[log in to unmask]
Sent by: TechNet <[log in to unmask]>
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Please respond to "TechNet E-Mail Forum."; Please respond to HIHAT44
To: [log in to unmask]
cc:
Subject: Re: [TN] Environmental forum
Hello,
What is the info on the new forum, not ComplianceNet but the new
one
just started?
Steve Wentz
Florida CirTech
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<td><font size=1 face="sans-serif"><b>[log in to unmask]</b></font>
<br><font size=1 face="sans-serif">Sent by: TechNet <[log in to unmask]></font>
<p><font size=1 face="sans-serif">03/06/02 10:59 AM</font>
<br><font size=1 face="sans-serif">Please respond to "TechNet E-Mail Forum."; Please respond to HIHAT44</font>
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<br><font size=1 face="sans-serif"> Subject: Re: [TN] Environmental forum</font></table>
<br>
<br><font size=2 face="Courier New">Hello,<br>
What is the info on the new forum, not ComplianceNet but the new one<br>
just started?<br>
<br>
Steve Wentz<br>
Florida CirTech<br>
<br>
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Date: Wed, 6 Mar 2002 09:36:35 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
JaMi Smith <[log in to unmask]>
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It got to Sunny Southern California.
=20
-----Original Message-----
From: ART HAMPTON [mailto:[log in to unmask]]=20
Sent: Tuesday, March 05, 2002 1:58 PM
To: [log in to unmask]
Subject: [TN] Does My Mail Work?
=20
Did this post?
=20
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____________________________________________________
<http://www.incredimail.com/redir.asp?ad_id=3D309&lang=3D9> =
IncrediMail -
Email has finally evolved - Click Here
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Date: Wed, 6 Mar 2002 09:48:58 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Crepeau, Phil" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crepeau, Phil" <[log in to unmask]>
Subject: Re: Conformal coating: high humidity environment.
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hi,
do we need to say that the pwa needs to be perfectly clean? i didn't =
think so. if you can afford it, parylene is the best coating. why? =
because it is the only coating that will cover every sharp point, =
corner and edge. if you can't deposit parylene, there are vendors that =
will do it for you.
phil
-----Original Message-----
From: Bissonnette, Jean-Francois [mailto:[log in to unmask]]
Sent: Wednesday, March 06, 2002 6:41 AM
To: [log in to unmask]
Subject: [TN] Conformal coating: high humidity environment.
Hi all,
What type of coating should be used when equipment is to be used in =
high
humidity environment (near sea water)?
Thanks in advance!
Jean-Fran=E7ois Bissonnette
V=E9rificateur, Contr=F4le de la Qualit=E9
=C9lectronique
Produits et Proc=E9d=E9s
Vapor Rail Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 x2021
(514) 335-4231 fax
<<Bissonnette, Jean-Francois.vcf>>=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally privileged =
and confidential information intended only for the use of the =
individual or entity named herein. If the reader of this transmission =
is not the intended recipient, you are hereby notified that any =
dissemination, distribution, or copying of this transmission is =
strictly prohibited.
------------------------------------------------------------------------=
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Date: Wed, 6 Mar 2002 10:56:49 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: AUTOMOTIVE PACKAGING/SEALING REALIBILITY
X-To: Carl VanWormer <[log in to unmask]>
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Carl,
Some quick points:
1. The boards are too dirty (clean them with heated DI water at a minimum).
2. RTVS 27 - Is this a Room Temperature Vulcanization S??? potting compound?
If so be sure that the out gassing during the cure process does not contain acids.
3. RTV does not absorb sudden shocks and vibration. It is forgiving during thermal changes.
4. Your box leaks at numerous locations and RTV is very permeable to moisture and certain reactive
gases.
David A. Douthit
Manager
LoCan LLC
Carl VanWormer wrote:
> Thanks to all for the recent comments, questions, and suggestions. Here's a
> "quick" update of my recent status and findings:
>
> Our unit is mounted in an aluminum box (4 screws into the top) with some
> style of heavy duty circular connectors (with rubber gaskets), and I've seen
> no board corrosion around that area. The system is potted with Insulcast
> RTVS 27, after treating the connector sides, box mating surfaces and holes,
> and sides of 4 led (that protrude thru box holes) with the "proper" primer.
>
> Previous batches of boards have been built, cleaned, then stocked. After
> final programming (a J-leaded PROM, hand soldered with water soluble flux),
> they are washed under hot, running water with vigorous brushing. Recent
> testing (yesterday, thanks to QPL) indicated ionic contamination levels of 5
> ug. NaCl/sq.in, initially, and 15 ug. NaCl/sq.in after the PROM is added and
> "cleaned". This indicates that there is some bad stuff inside to start the
> process. This is like putting one bullet in your Colt 45 and playing
> Russian Roulette!
>
> Now we have 2 possibilities for the second half of the equation . . . either
> we are sealing enough moisture in the system to guarantee continued work for
> our repair tech, or water is getting in through our impervious barriers.
> Failure analysis shows the most common areas for the corrosion are in the
> area of the 4 LEDs that protrude through the box. I am suspicious of the
> quality of the adhesion to the "primered" LEDs, since they seem to pull
> clear of the potting compound leaving a smooth surface, not torn and ragged.
> Another area has been near the board (and box) edges, some of which have
> shown what appears to be oil incursion into potting fractures at the box top
> interface. I am wondering if vibration of the potting mass is causing
> fractures, even though it is hard to imagine when looking at the system.
> Has anyone seen anything like this with the Insulcast compound?
>
> Since I have to make some more units, I have cleaned a dozen (for a second
> time) and baked them overnight at 70 C, bagged them with desiccant to wait
> for potting. We are planning to flood the boards and box with primer,
> thinking that they may be more difficult to troubleshoot if they fail, but
> maybe they won't fail (at least at the present 30% rate). Any thoughts on
> this?
>
> Thanks for listening,
> Carl
>
> Carl Van Wormer
> Cipher Systems
> 1815 NW 169th Place, Suite 5010
> Beaverton, OR 97006
> Phone (503)-617-7447 Fax (503)-617-6550
>
> -----Original Message-----
> From: Roger Stoops [mailto:[log in to unmask]]
>
> Carl,
> Been readin' what everbody else is saying about potting and encapsulating,
> thought I would jump into the fray.
> We build equipment that is mounted on 'dozer blades, behind and under
> motorgraders, and such. Pretty dirty and nasty environment. We have found
> that, for consistent reliability, potting or coating a board (really squeaky
> clean to begin with mind you), mounted in a custom aluminum enclosure, with
> a sealing ring or o-ring under the lid, and using Mil-style circular
> connectors (with gasket seal behind connector) seems to cure these problems.
> Of course this may be more expensive than what your product can afford, but
> illustrates how we solved such a problem. Even a small, inexpensive
> off-the-shelf aluminum enclosure with a simple gasket system would go a long
> way to reducing your problem with external moisture.
> We would like to hear later about your efforts in solving your dilemma.
>
> Roger M. Stoops, CID [log in to unmask]
> TRIMBLE NAVIGATION LLC
> Engineering and Construction Division
> http://www.trimble.com
>
> -----Original Message-----
> From: Carl VanWormer [mailto:[log in to unmask]]
>
> We have a "potted" product that rides behind the wheels of a truck. All our
> best protection efforts have yielding significant failure rates. Returned
> units have had traces eaten off the board, with various colors of crud left
> over. The green is probably copper oxides. Some of the copper seems to
> have turned into a red powder. There is a lot of white crust around some of
> the lost traces and vias. We are guessing that the boards were not cleaned
> well enough before potting (Insulcast RTVS 27 thermally conductive potting
> compound). We believe the boards were produced with a water soluble flux,
> then washed, then a few hand-ads were installed with a "no-clean" flux. We
> think that either (1) moisture sealed inside the potted units may be
> "helping" the corrosion, or (2) moisture (with or without extra corrosive
> elements) is leaking it through poorly sealed boundaries of the potting
> compound. (we are using "primer" around the known "edges" of the units)
>
> I know that "Detroit" has solved this problem many times. Where can I find
> a "guide book" or a knowledgeable vendor to help me out of this board
> cleaning/potting mess?
>
> ---------------------------------------------------------------------------------
> Technet Mail List provided as a free service by IPC using LISTSERV 1.8d
> To unsubscribe, send a message to [log in to unmask] with following text in
> the BODY (NOT the subject field): SIGNOFF Technet
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> Please visit IPC web site http://www.ipc.org/html/forum.htm for additional
> information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315
> ---------------------------------------------------------------------------------
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=========================================================================
Date: Wed, 6 Mar 2002 10:15:40 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Carl VanWormer <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Carl VanWormer <[log in to unmask]>
Subject: Re: AUTOMOTIVE PACKAGING/SEALING REALIBILITY
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Thanks for your input. In regards to your questions (below):
1. When you say the boards are too dirty, is there some number (less than 5
ug/sq. in.) that is considered clean? The assembly house runs the finished
boards through a continuous process system that cleans the boards in
successively cleaner stations. The last one is "clean" DI water.
2. The RTVS 27 is a 2-part system. I don't think there is significant out
gassing.
3. Do you think the RTV is fracturing internally due to shocks?
4. Are there particular environmental elements in "behind the tire" road
spray that would attack RTVS 27?
Carl Van Wormer
Cipher Systems
1815 NW 169th Place, Suite 5010
Beaverton, OR 97006
Phone (503)-617-7447 Fax (503)-617-6550
-----Original Message-----
From: David Douthit [mailto:[log in to unmask]]
Sent: Wednesday, March 06, 2002 9:57 AM
To: TechNet E-Mail Forum.; Carl VanWormer
Subject: Re: [TN] AUTOMOTIVE PACKAGING/SEALING REALIBILITY
Carl,
Some quick points:
1. The boards are too dirty (clean them with heated DI water at a minimum).
2. RTVS 27 - Is this a Room Temperature Vulcanization S??? potting compound?
If so be sure that the out gassing during the cure process does not
contain acids.
3. RTV does not absorb sudden shocks and vibration. It is forgiving during
thermal changes.
4. Your box leaks at numerous locations and RTV is very permeable to
moisture and certain reactive
gases.
David A. Douthit
Manager
LoCan LLC
Carl VanWormer wrote:
> Thanks to all for the recent comments, questions, and suggestions. Here's
a
> "quick" update of my recent status and findings:
>
> Our unit is mounted in an aluminum box (4 screws into the top) with some
> style of heavy duty circular connectors (with rubber gaskets), and I've
seen
> no board corrosion around that area. The system is potted with Insulcast
> RTVS 27, after treating the connector sides, box mating surfaces and
holes,
> and sides of 4 led (that protrude thru box holes) with the "proper"
primer.
>
> Previous batches of boards have been built, cleaned, then stocked. After
> final programming (a J-leaded PROM, hand soldered with water soluble
flux),
> they are washed under hot, running water with vigorous brushing. Recent
> testing (yesterday, thanks to QPL) indicated ionic contamination levels of
5
> ug. NaCl/sq.in, initially, and 15 ug. NaCl/sq.in after the PROM is added
and
> "cleaned". This indicates that there is some bad stuff inside to start
the
> process. This is like putting one bullet in your Colt 45 and playing
> Russian Roulette!
>
> Now we have 2 possibilities for the second half of the equation . . .
either
> we are sealing enough moisture in the system to guarantee continued work
for
> our repair tech, or water is getting in through our impervious barriers.
> Failure analysis shows the most common areas for the corrosion are in the
> area of the 4 LEDs that protrude through the box. I am suspicious of the
> quality of the adhesion to the "primered" LEDs, since they seem to pull
> clear of the potting compound leaving a smooth surface, not torn and
ragged.
> Another area has been near the board (and box) edges, some of which have
> shown what appears to be oil incursion into potting fractures at the box
top
> interface. I am wondering if vibration of the potting mass is causing
> fractures, even though it is hard to imagine when looking at the system.
> Has anyone seen anything like this with the Insulcast compound?
>
> Since I have to make some more units, I have cleaned a dozen (for a second
> time) and baked them overnight at 70 C, bagged them with desiccant to wait
> for potting. We are planning to flood the boards and box with primer,
> thinking that they may be more difficult to troubleshoot if they fail, but
> maybe they won't fail (at least at the present 30% rate). Any thoughts on
> this?
>
> Thanks for listening,
> Carl
>
> Carl Van Wormer
> Cipher Systems
> 1815 NW 169th Place, Suite 5010
> Beaverton, OR 97006
> Phone (503)-617-7447 Fax (503)-617-6550
>
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Date: Wed, 6 Mar 2002 10:41:15 -0800
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Ahne Oosterhof <[log in to unmask]>
Subject: Re: Just Not In Time deliveries
In-Reply-To: <001101c1bb1f$d2523df0$6c01a8c0@LJOUWERT>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
What happened -- I am missing my IPC fix in the morning -- no 60
messages to wade through.
Actually no 1 message to wade through!!
Did the computer break or go broke?
Regards, Ahne.
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Date: Wed, 6 Mar 2002 13:50:15 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Conformal coating: high humidity environment.
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
My recent look at coatings leads toward a silicone based coating for
humidity and "salt-spray" environments.
-----Original Message-----
From: Graham Naisbitt [mailto:[log in to unmask]]
Sent: Wednesday, March 06, 2002 9:53 AM
To: [log in to unmask]
Subject: Re: [TN] Conformal coating: high humidity environment.
My best recommendation would be a single part urethane - well cooked.
Regards Graham Naisbitt
[log in to unmask] <mailto:[log in to unmask]>
Concoat Limited
Alasan House, Albany Park
Camberley GU16 7PH - UK
www.concoat.co.uk <http://www.concoat.co.uk>
Phone: +44 1276 691100
Fax: +44 1276 691227
Mobile: +44 79 6858 2121
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Bissonnette,
> Jean-Francois
> Sent: 06 March 2002 14:41
> To: [log in to unmask]
> Subject: [TN] Conformal coating: high humidity environment.
>
>
> Hi all,
>
> What type of coating should be used when equipment is to be used in =
high
> humidity environment (near sea water)?
>
> Thanks in advance!
>
> Jean-Fran=E7ois Bissonnette
> V=E9rificateur, Contr=F4le de la Qualit=E9
> =C9lectronique
> Produits et Proc=E9d=E9s
> Vapor Rail Inc.
> 10655 Henri-Bourassa O.
> St-Laurent, Qc
> H4S 1A1
>
> (514) 335-4200 x2021
> (514) 335-4231 fax
>
> <<Bissonnette, Jean-Francois.vcf>>
>
>
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally
> privileged and confidential information intended only for the use
> of the individual or entity named herein. If the reader of this
> transmission is not the intended recipient, you are hereby
> notified that any dissemination, distribution, or copying of this
> transmission is strictly prohibited.
>
> ------------------------------------------------------------------
> ---------------
> Technet Mail List provided as a free service by IPC using LISTSERV =
1.8d
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text in
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> ------------------------------------------------------------------
> ---------------
>
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Date: Wed, 6 Mar 2002 14:00:12 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Piezoelectric Crystal (Buzzer)
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_cf.138a324f.29b7c13c_boundary"
--part1_cf.138a324f.29b7c13c_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
Mary Jane,
The pictures are up! Heck, I don't charge anything, I do it because ya'll are
my buds! I posted three of them and everybody should get a good idea of the
part from the pictures. Go to:
http://www.stevezeva.homestead.com
As far as what I would use to evaluate the joints under, they kinda' look
like leads you would find on a tantalum capacitor...I would use that
criteria...
-Steve Gregory-
> Steve,
> Would it be possible to transfer the attached pictures of a component lead
> we are evaluating to your website? We have an issue where the solder joint
> on this particular component is questionable concerning if there is a
> sufficient solder joint. We have tried to evaluate the joint comparing it
> to a bottom only termination. It doesn't, however, truly fit that specific
> lead. I thought maybe everyone could view the lead and see what they
> thought. Please also give me your evaluation, if you have one.
> Is there a charge for this service? If so, let me know before they are
> shown. Thanks much!
>
--part1_cf.138a324f.29b7c13c_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Mary Jane,
<BR>
<BR>The pictures are up! Heck, I don't charge anything, I do it because ya'll are my buds! I posted three of them and everybody should get a good idea of the part from the pictures. Go to:
<BR>
<BR>http://www.stevezeva.homestead.com
<BR>
<BR>As far as what I would use to evaluate the joints under, they kinda' look like leads you would find on a tantalum capacitor...I would use that criteria...
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Steve,
<BR>Would it be possible to transfer the attached pictures of a component lead we are evaluating to your website? We have an issue where the solder joint on this particular component is questionable concerning if there is a sufficient solder joint. We have tried to evaluate the joint comparing it to a<B><I> bottom only termination</B></I>. It doesn't, however, truly fit that specific lead. I thought maybe everyone could view the lead and see what they thought. Please also give me your evaluation, if you have one.
<BR>Is there a charge for this service? If so, let me know before they are shown. Thanks much!
<BR></BLOCKQUOTE>
<BR>
<BR></FONT></HTML>
--part1_cf.138a324f.29b7c13c_boundary--
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Date: Wed, 6 Mar 2002 13:37:33 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Genny Gibbard <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Genny Gibbard <[log in to unmask]>
Subject: Re: Does My Mail Work?
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
You post got to freezing Saskatchewan, Canada... brrr.
Currently -18degC or 0degF
It was -25degC or -13degF last night.
I'm sure you all wanted to know that ...
The electronics in my car are still working, though. And this isn't the
coldest we've had by a long shot.
-----Original Message-----
From: JaMi Smith [mailto:[log in to unmask]]
Sent: March 6, 2002 11:37 AM
To: [log in to unmask]
Subject: Re: [TN] Does My Mail Work?
It got to Sunny Southern California.
-----Original Message-----
From: ART HAMPTON [mailto:[log in to unmask]]
Sent: Tuesday, March 05, 2002 1:58 PM
To: [log in to unmask]
Subject: [TN] Does My Mail Work?
Did this post?
____________________________________________________
<http://www.incredimail.com/redir.asp?ad_id=309&lang=9> IncrediMail -
Email has finally evolved - Click Here
<http://www.incredimail.com/redir.asp?ad_id=309&lang=9>
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Date: Wed, 6 Mar 2002 13:40:29 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Just Not In Time deliveries
X-To: Ahne Oosterhof <[log in to unmask]>
Ahne,
For me it's both relaxing and disconcerting - being the paranoid person I
am. On the one hand, no attacks from Sir Werner, Sir Guenter, or almost sir
Brian. On the other, what's going on? What have I done to offend so many?
Hell, is this it? Damn, is this damnation? I can't stand it anymore. Oh
wait, a message no matter good or bad. No, it's about PCB's and all that stuff.
I'm happy again but for a moment. Sure glad Steve's back to take off some of
the pressure,
MoonMan
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Date: Wed, 6 Mar 2002 13:44:33 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Piezoelectric Crystal (Buzzer)
X-To: [log in to unmask]
Gawd Steve,
Isn't Mary Jane a breath of our newly about to arive spring air? She sure
isn't like my old friends Brian or Sir Werner. I mean, she asks such good
questions. I gladly would work along side her if Reed would just hire me.
MoonMan
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Date: Wed, 6 Mar 2002 13:53:40 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Piezoelectric Crystal (Buzzer)
Man/Woman,
Mary Jane, the solder joint looks perfect but what a large physical mass. As
I recal piezo stuff is mostly ceramic so the thermal mismatch may be too
much as well. It's just too much mass and CTE mismatch for those little
solder joints, don't you think? Underfill or what?
MoonMan
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=========================================================================
Date: Wed, 6 Mar 2002 14:07:30 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: Piezoelectric Crystal (Buzzer)
Mime-Version: 1.0
Content-Type: multipart/mixed; boundary="=_A6FB1103.64056882"
This is a MIME message. If you are reading this text, you may want to
consider changing to a mail reader or gateway that understands how to
properly handle MIME multipart messages.
--=_A6FB1103.64056882
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: quoted-printable
Content-Disposition: inline
Hey Moonman another name for the future ex list?
Kathy
--=_A6FB1103.64056882
Content-Type: text/plain
Content-Disposition: attachment; filename="TEXT.htm"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=Content-Type content="text/html; charset=iso-8859-1">
<META content="MSHTML 6.00.2713.1100" name=GENERATOR></HEAD>
<BODY style="MARGIN-TOP: 2px; FONT: 10pt MS Sans Serif; MARGIN-LEFT: 2px">
<DIV>Hey Moonman another name for the future ex list?</DIV>
<DIV> </DIV>
<DIV>Kathy</DIV></BODY></HTML>
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Date: Wed, 6 Mar 2002 14:41:25 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Piezoelectric Crystal (Buzzer)
X-To: Kathy Kuhlow <[log in to unmask]>
Not on your watch or mine.
MoonMan
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Date: Wed, 6 Mar 2002 15:50:03 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bissonnette, Jean-Francois" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bissonnette, Jean-Francois" <[log in to unmask]>
Subject: Solder fines
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Hi all,
we have tiny solder balls on assembly manufactured for us. Most of the
little balls
are around SMT leads and are some times numerous. What can cause such
condition?
Jean-Fran=E7ois Bissonnette
V=E9rificateur, Contr=F4le de la Qualit=E9
=C9lectronique
Produits et Proc=E9d=E9s
Vapor Rail Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 x2021
(514) 335-4231 fax
<<Bissonnette, Jean-Francois.vcf>>=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally privileged and=
confidential information intended only for the use of the individual or en=
tity named herein. If the reader of this transmission is not the intended r=
ecipient, you are hereby notified that any dissemination, distribution, or =
copying of this transmission is strictly prohibited.
---------------------------------------------------------------------------------
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Date: Wed, 6 Mar 2002 15:51:04 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Kasprzak, Bill (sys) USX" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Kasprzak, Bill (sys) USX" <[log in to unmask]>
Subject: Re: Does My Mail Work?
X-To: Genny Gibbard <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
The message got to good ol Buffalo, NY. Home of the lake effect snow
squalls. Wierd week, on Monday an area 10 miles south of here got 14" of the
white fluffy stuff while the grass was still green here. Tuesday the same
area 10 miles south was basking in brilliant sun while we got 12". 10 miles
to the north, nothing. Strange stuff. Maybe your email problem has something
to do with lake effect.
Bill Kasprzak
Moog Inc. Manufacturing Engineering, Electronics
> -----Original Message-----
> From: Genny Gibbard [SMTP:[log in to unmask]]
> Sent: Wednesday, March 06, 2002 2:38 PM
> To: [log in to unmask]
> Subject: Re: [TN] Does My Mail Work?
>
> You post got to freezing Saskatchewan, Canada... brrr.
> Currently -18degC or 0degF
> It was -25degC or -13degF last night.
> I'm sure you all wanted to know that ...
> The electronics in my car are still working, though. And this isn't the
> coldest we've had by a long shot.
>
> -----Original Message-----
> From: JaMi Smith [mailto:[log in to unmask]]
> Sent: March 6, 2002 11:37 AM
> To: [log in to unmask]
> Subject: Re: [TN] Does My Mail Work?
>
>
> It got to Sunny Southern California.
>
> -----Original Message-----
> From: ART HAMPTON [mailto:[log in to unmask]]
> Sent: Tuesday, March 05, 2002 1:58 PM
> To: [log in to unmask]
> Subject: [TN] Does My Mail Work?
>
> Did this post?
>
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Date: Wed, 6 Mar 2002 15:53:51 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mark Charlton <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mark Charlton <[log in to unmask]>
Subject: Re: Solder fines
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Check your raw fabs from the vendor. The only time I experienced this =
we traced it back to the vendor's process, probably the HASL end of =
things.
Mark
-----Original Message-----
From: Bissonnette, Jean-Francois [mailto:[log in to unmask]]
Sent: Wednesday, March 06, 2002 3:50 PM
To: [log in to unmask]
Subject: Solder fines
Hi all,
we have tiny solder balls on assembly manufactured for us. Most of the
little balls
are around SMT leads and are some times numerous. What can cause such
condition?
Jean-Fran=E7ois Bissonnette
V=E9rificateur, Contr=F4le de la Qualit=E9
=C9lectronique
Produits et Proc=E9d=E9s
Vapor Rail Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 x2021
(514) 335-4231 fax
<<Bissonnette, Jean-Francois.vcf>>=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally privileged =
and confidential information intended only for the use of the individual =
or entity named herein. If the reader of this transmission is not the =
intended recipient, you are hereby notified that any dissemination, =
distribution, or copying of this transmission is strictly prohibited.
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Date: Wed, 6 Mar 2002 14:54:40 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jack Crawford <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jack Crawford <[log in to unmask]>
Subject: Re: Solder joint quality assessment
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
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"ppwlee"--
IPC/EIA J-STD-001C sets the material and process requirements with a =
minimum of illustrations to provide acceptance.
IPC-A-610C has 612 full-color illustrations with associated acceptance =
criteria (in consonance with J-STD-001C) to help you assess your product.
IPC-7912 End-item DPMO has a summary of defects to be used when determining=
DPMO on the end product; defects directly correlate to J-STD-001C and =
IPC-A-610C.
IPC-9261 In-Process DPMO is going to the printer this week. It uses the =
same summary of defects as IPC-7912 but is intended for use with each step =
in the assembly processes.=20
>>> [log in to unmask] 03/06/02 01:08AM >>>
Hello Technetters,
I am conducting an independent solder joint quality
assessment on one of our customer's product. The
result of the assessment will include general
observations on overall quality of the product, visual
inspection results on all components on board
(primarily SMT), noticeable soldering defects, process
deficiencies and recommendations.
I am looking for a formal template for my report with
a list of pass/fail criteria addressing the solder
joint quality of a product. Any advice would be
greatly appreciated.
__________________________________________________
Do You Yahoo!?
Try FREE Yahoo! Mail - the world's greatest free email!
http://mail.yahoo.com/=20
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Date: Wed, 6 Mar 2002 15:01:38 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Stephannie Caliendo <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Stephannie Caliendo <[log in to unmask]>
Subject: Designers Learning Symposiums CfP
Mime-Version: 1.0
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This is a MIME message. If you are reading this text, you may want to
consider changing to a mail reader or gateway that understands how to
properly handle MIME multipart messages.
--=_91CC26C0.117010F3
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Hello Everyone,
Attached you will find a .pdf file of the 2002 Designer Learning Symposiums=
Call for Papers:=20
Designers Learning Symposium - Texas
Designers Learning Symposium - Canada
If you have any questions please feel free to call or email me one on one. =
Please do not respond to all.=20
Kindest regards,
Stephannie Caliendo
IPC Designers Council
Program Manager
[log in to unmask]
847-790-5302
--=_91CC26C0.117010F3
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Date: Wed, 6 Mar 2002 16:00:43 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
ART HAMPTON <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: ART HAMPTON <[log in to unmask]>
Subject: Bottom Side Reflow!!
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Hello Out There,=0D
=0D
Recently I was assigned the task of creating profiles that would fall
within the ( PWI ) for solder paste Kester ( 562 ) for processing pcbs wi=
th
several (bga) components on the top side, however the bottom side of the =
pcb
also has 1,200 placements of cap, and res. reflowed not epoxyed, do I nee=
d
to be worried about losing my bottom side components? =0D
=0D
Art
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<DIV> Hello Out There,</DIV>
<DIV> </DIV>
<DIV> Recently I was assigned the task of creating profiles th=
at=20
would fall within the ( PWI ) for solder paste Keste=
r=20
( 562 ) for processing pcbs with several (bga) components=
on the=20
top side, however the bottom side of the pcb also has 1,200 placeme=
nts of=20
cap, and res. reflowed not epoxyed, do I need to be worried about l=
osing=20
my bottom side components? </DIV>
<DIV> </DIV>
<DIV>Art</DIV></TD>
</TR>
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Date: Wed, 6 Mar 2002 14:01:10 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jan Satterfield <[log in to unmask]>
Subject: Re: Conformal coating: high humidity environment.
X-To: [log in to unmask]
MIME-Version: 1.0
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Someone asked the questions regarding high humidity and the best conformal
coating to use and I read 4 different answers: Acrylics, urethanes,
paralyene and Silicone. I have always understood that acrylics were the
least moisture resistant, paralyene the most moisture resistant and
urethanes the most commonly used for moisture resistance on CCA's. Anyone
care to clarify?
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Wednesday, March 06, 2002 9:22 AM
To: [log in to unmask]
Subject: Re: [TN] Conformal coating: high humidity environment.
Acrylics tend to have the best performance in high moisture environments, as
long as the temperatures are not extremely high.
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Date: Wed, 6 Mar 2002 16:14:48 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
ART HAMPTON <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: ART HAMPTON <[log in to unmask]>
Subject: Re: Solder fines
X-To: [log in to unmask]
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Hi out there,=0D
=0D
Some causes for this condition, Misregistration between stencil aperture =
and
the pad, stencil thickness (too much paste applied) stencil snap-off, pas=
te
viscosity, reflow profile all of these things should be checked.=0D
=0D
Art Hampton=0D
Process Specialist=0D
=0D
-------Original Message-------=0D
=0D
From: TechNet E-Mail Forum.; Mark Charlton=0D
Date: Wednesday, March 06, 2002 03:53:51 PM=0D
To: [log in to unmask]
Subject: Re: [TN] Solder fines=0D
=0D
Check your raw fabs from the vendor. The only time I experienced this we
traced it back to the vendor's process, probably the HASL end of things.=0D
=0D
Mark=0D
=0D
=0D
-----Original Message-----=0D
From: Bissonnette, Jean-Francois [mailto:[log in to unmask]]=0D
Sent: Wednesday, March 06, 2002 3:50 PM=0D
To: [log in to unmask]
Subject: Solder fines=0D
=0D
=0D
Hi all,=0D
=0D
we have tiny solder balls on assembly manufactured for us. Most of the=0D
little balls=0D
are around SMT leads and are some times numerous. What can cause such=0D
condition?=0D
=0D
Jean-Fran=E7ois Bissonnette=0D
V=E9rificateur, Contr=F4le de la Qualit=E9=0D
=C9lectronique=0D
Produits et Proc=E9d=E9s=0D
Vapor Rail Inc.=0D
10655 Henri-Bourassa O.=0D
St-Laurent, Qc=0D
H4S 1A1=0D
=0D
(514) 335-4200 x2021=0D
(514) 335-4231 fax=0D
=0D
<<Bissonnette, Jean-Francois.vcf>> =0D
=0D
=0D
WABTEC CORPORATION CONFIDENTIALITY NOTE=0D
The content contained in this e-mail transmission is legally privileged a=
nd
confidential information intended only for the use of the individual or
entity named herein. If the reader of this transmission is not the intend=
ed
recipient, you are hereby notified that any dissemination, distribution, =
or
copying of this transmission is strictly prohibited.=0D
=0D
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DDING-LEFT: 7px; FONT-SIZE: 10pt; FONT-FAMILY: Arial"=20
>
<DIV>Hi out there,</DIV>
<DIV> </DIV>
<DIV>Some causes for this condition, Misregistration between stenci=
l=20
aperture and the pad, stencil thickness (too much paste applied) st=
encil=20
snap-off, paste viscosity, reflow profile all of these things shoul=
d be=20
checked.</DIV>
<DIV> </DIV>
<DIV>Art Hampton</DIV>
<DIV>Process Specialist</DIV>
<DIV> </DIV>
<DIV id=3DIncrediOriginalMessage><I>-------Original Message-------<=
/I></DIV>
<DIV> </DIV>
<DIV id=3Dreceivestrings>
<DIV dir=3Dltr style=3D"FONT-SIZE: 11pt" <i><B>From:</B></I> <A=20
href=3D"mailto:[log in to unmask]">TechNet E-Mail Forum.</A>; <A=20
href=3D"mailto:[log in to unmask]">Mark Charlton</A></DIV>
<DIV dir=3Dltr style=3D"FONT-SIZE: 11pt" <i><B>Date:</B></I> Wednes=
day, March=20
06, 2002 03:53:51 PM</DIV>
<DIV dir=3Dltr style=3D"FONT-SIZE: 11pt" <i><B>To:</B></I> <A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A></DIV>
<DIV dir=3Dltr style=3D"FONT-SIZE: 11pt" <i><B>Subject:</B></I> Re:=
[TN]=20
Solder fines</DIV></DIV>
<DIV> </DIV>Check your raw fabs from the vendor. The only time=
I=20
experienced this we traced it back to the vendor's process, probabl=
y the=20
HASL end of things.<BR><BR>Mark<BR><BR><BR>-----Original=20
Message-----<BR>From: Bissonnette, Jean-Francois [<A=20
href=3D"mailto:[log in to unmask]">mailto:[log in to unmask]
COM</A>]<BR>Sent:=20
Wednesday, March 06, 2002 3:50 PM<BR>To: <A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A><BR>Subject: Sol=
der=20
fines<BR><BR><BR>Hi all,<BR><BR>we have tiny solder balls on assemb=
ly=20
manufactured for us. Most of the<BR>little balls<BR>are around SMT =
leads=20
and are some times numerous. What can cause=20
such<BR>condition?<BR><BR>Jean-Fran=E7ois Bissonnette<BR>V=E9rifica=
teur,=20
Contr=F4le de la Qualit=E9<BR>=C9lectronique<BR>Produits et Proc=E9=
d=E9s<BR>Vapor=20
Rail Inc.<BR>10655 Henri-Bourassa O.<BR>St-Laurent, Qc<BR>H4S=20
1A1<BR><BR>(514) 335-4200 x2021<BR>(514) 335-4231=20
fax<BR><BR><<Bissonnette, Jean-Francois.vcf>>=20
<BR><BR><BR>WABTEC CORPORATION CONFIDENTIALITY NOTE<BR>The content=20
contained in this e-mail transmission is legally privileged and=20
confidential information intended only for the use of the individua=
l or=20
entity named herein. If the reader of this transmission is not the=20
intended recipient, you are hereby notified that any dissemination,=
=20
distribution, or copying of this transmission is strictly=20
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=========================================================================
Date: Wed, 6 Mar 2002 15:28:49 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jason Gregory <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jason Gregory <[log in to unmask]>
Subject: Re: Designers Learning Symposiums CfP
Mime-Version: 1.0
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Wow,
Is this a first???? A posting that came through with an attachment. I =
thought attachments were stripped. Jack, are we entering a new era? An era =
of rampant viruses!?!?!?!
Jason
>>> [log in to unmask] 03/06/02 03:01PM >>>
Hello Everyone,
Attached you will find a .pdf file of the 2002 Designer Learning Symposiums=
Call for Papers:=20
Designers Learning Symposium - Texas
Designers Learning Symposium - Canada
If you have any questions please feel free to call or email me one on one. =
Please do not respond to all.=20
Kindest regards,
Stephannie Caliendo
IPC Designers Council
Program Manager
[log in to unmask]
847-790-5302
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Date: Wed, 6 Mar 2002 16:37:54 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mary Jane Chism <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mary Jane Chism <[log in to unmask]>
Subject: Re: Piezoelectric Crystal (Buzzer)
X-To: Earl Moon <[log in to unmask]>
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MoonMan
Yes, it is a large mass and from what I have just learned, the design of the
PCB is in the process of being changed because of the issue of some solder
joints not fitting the criteria of IPC-A-610.
Hey, thanks for the complement, (I am taking your remark of "spring air" as
a complement). It could also mean a "little green behind the ears" for some
of the questions I ask.
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Wednesday, March 06, 2002 2:54 PM
To: [log in to unmask]
Subject: Re: [TN] Piezoelectric Crystal (Buzzer)
Man/Woman,
Mary Jane, the solder joint looks perfect but what a large physical mass. As
I recal piezo stuff is mostly ceramic so the thermal mismatch may be too
much as well. It's just too much mass and CTE mismatch for those little
solder joints, don't you think? Underfill or what?
MoonMan
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<TITLE>RE: [TN] Piezoelectric Crystal (Buzzer)</TITLE>
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<P><FONT SIZE=3D2>MoonMan</FONT>
<BR><FONT SIZE=3D2>Yes, it is a large mass and from what I have just =
learned, the design of the PCB is in the process of being changed =
because of the issue of some solder joints not fitting the criteria of =
IPC-A-610. </FONT></P>
<P><FONT SIZE=3D2>Hey, thanks for the complement, (I am taking your =
remark of "spring air" as a complement). It could also mean a =
"little green behind the ears" for some of the questions I =
ask. </FONT></P>
<P><FONT SIZE=3D2>-----Original Message-----</FONT>
<BR><FONT SIZE=3D2>From: Earl Moon [<A =
HREF=3D"mailto:[log in to unmask]">mailto:[log in to unmask]</A>]</FONT>
<BR><FONT SIZE=3D2>Sent: Wednesday, March 06, 2002 2:54 PM</FONT>
<BR><FONT SIZE=3D2>To: [log in to unmask]</FONT>
<BR><FONT SIZE=3D2>Subject: Re: [TN] Piezoelectric Crystal =
(Buzzer)</FONT>
</P>
<BR>
<BR>
<P><FONT SIZE=3D2>Man/Woman,</FONT>
</P>
<P><FONT SIZE=3D2>Mary Jane, the solder joint looks perfect but what a =
large physical mass. As</FONT>
<BR><FONT SIZE=3D2>I recal piezo stuff is mostly ceramic so the thermal =
mismatch may be too</FONT>
<BR><FONT SIZE=3D2>much as well. It's just too much mass and CTE =
mismatch for those little</FONT>
<BR><FONT SIZE=3D2>solder joints, don't you think? Underfill or =
what?</FONT>
</P>
<P><FONT SIZE=3D2>MoonMan</FONT>
</P>
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Date: Wed, 6 Mar 2002 16:39:48 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mary Jane Chism <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mary Jane Chism <[log in to unmask]>
Subject: Re: Piezoelectric Crystal (Buzzer)
X-To: "[log in to unmask]" <[log in to unmask]>
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Steve,
Thanks so much for posting the pics. I just learned that they are going to
make some design changes on the PCB for this particular reason. (Some of the
leads had insufficient solders) Thanks again.
Mary Jane
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Wednesday, March 06, 2002 2:00 PM
To: [log in to unmask]; [log in to unmask]
Subject: [TN] Piezoelectric Crystal (Buzzer)
Mary Jane,
The pictures are up! Heck, I don't charge anything, I do it because ya'll
are my buds! I posted three of them and everybody should get a good idea of
the part from the pictures. Go to:
http://www.stevezeva.homestead.com
As far as what I would use to evaluate the joints under, they kinda' look
like leads you would find on a tantalum capacitor...I would use that
criteria...
-Steve Gregory-
Steve,
Would it be possible to transfer the attached pictures of a component lead
we are evaluating to your website? We have an issue where the solder joint
on this particular component is questionable concerning if there is a
sufficient solder joint. We have tried to evaluate the joint comparing it to
a bottom only termination. It doesn't, however, truly fit that specific
lead. I thought maybe everyone could view the lead and see what they
thought. Please also give me your evaluation, if you have one.
Is there a charge for this service? If so, let me know before they are
shown. Thanks much!
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<DIV><SPAN class=100483821-06032002><FONT face=Arial color=#0000ff
size=2>Steve,</FONT></SPAN></DIV>
<DIV><SPAN class=100483821-06032002><FONT face=Arial color=#0000ff size=2>Thanks
so much for posting the pics. I just learned that they are going to make some
design changes on the PCB for this particular reason. (Some of the leads had
insufficient solders) Thanks again.</FONT></SPAN></DIV>
<DIV><SPAN class=100483821-06032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=100483821-06032002><FONT face=Arial color=#0000ff size=2>Mary
Jane</FONT></SPAN></DIV>
<BLOCKQUOTE>
<DIV class=OutlookMessageHeader><FONT face="Times New Roman"
size=2>-----Original Message-----<BR><B>From:</B> [log in to unmask]
[mailto:[log in to unmask]]<BR><B>Sent:</B> Wednesday, March 06, 2002 2:00
PM<BR><B>To:</B> [log in to unmask]; [log in to unmask]<BR><B>Subject:</B> [TN]
Piezoelectric Crystal (Buzzer)<BR><BR></FONT></DIV><FONT
face=arial,helvetica><FONT size=2>Mary Jane, <BR><BR>The pictures are up!
Heck, I don't charge anything, I do it because ya'll are my buds! I posted
three of them and everybody should get a good idea of the part from the
pictures. Go to: <BR><BR>http://www.stevezeva.homestead.com <BR><BR>As far as
what I would use to evaluate the joints under, they kinda' look like leads you
would find on a tantalum capacitor...I would use that criteria...
<BR><BR>-Steve Gregory- <BR><BR><BR>
<BLOCKQUOTE
style="PADDING-LEFT: 5px; MARGIN-LEFT: 5px; BORDER-LEFT: #0000ff 2px solid; MARGIN-RIGHT: 0px"
TYPE="CITE">Steve, <BR>Would it be possible to transfer the attached
pictures of a component lead we are evaluating to your website? We have an
issue where the solder joint on this particular component is questionable
concerning if there is a sufficient solder joint. We have tried to evaluate
the joint comparing it to a<B><I> bottom only termination</B></I>. It
doesn't, however, truly fit that specific lead. I thought maybe everyone
could view the lead and see what they thought. Please also give me your
evaluation, if you have one. <BR>Is there a charge for this service? If so,
let me know before they are shown. Thanks much!
<BR></BLOCKQUOTE><BR><BR></BLOCKQUOTE></FONT></FONT></BODY></HTML>
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Date: Thu, 7 Mar 2002 08:46:30 +1100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Richard van Beveren <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Richard van Beveren <[log in to unmask]>
Subject: Re: Solder joint quality assessment
X-To: peter lee <[log in to unmask]>
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Peter,
Sounds like IPC-A-610 is exactly what you're after - fantastic document on
which to "hang your hat" so to speak.
Richard van Beveren
NEWTRONICS PTY LTD
> -----Original Message-----
> From: peter lee [SMTP:[log in to unmask]]
> Sent: Wednesday, 6 March 2002 18:08
> To: [log in to unmask]
> Subject: [TN] Solder joint quality assessment
>
> Hello Technetters,
>
> I am conducting an independent solder joint quality
> assessment on one of our customer's product. The
> result of the assessment will include general
> observations on overall quality of the product, visual
> inspection results on all components on board
> (primarily SMT), noticeable soldering defects, process
> deficiencies and recommendations.
>
> I am looking for a formal template for my report with
> a list of pass/fail criteria addressing the solder
> joint quality of a product. Any advice would be
> greatly appreciated.
>
>
> __________________________________________________
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Date: Wed, 6 Mar 2002 16:06:09 -0600
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To Technetters
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IS Administrator
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Ph: (847) 790-5315=20
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Date: Wed, 6 Mar 2002 15:54:55 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Chris Sturm <[log in to unmask]>
Subject: BGA Ball Shear standard
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Hello,
I'm looking for an industry standard for BGA Ball Shear strength. The most
recent recollection from my associate's is 500 grams. I'm looking for a
specific industry standard that spells out the specific shear strengths.
Thank you.
Chris Sturm
Quality Assurance Manager
Thin Film Technology
1980 Commerce Drive
North Mankato, MN 56003
Phone: (507) 625-8445
Fax: (507) 386-9287
e-mail: [log in to unmask]
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Date: Wed, 6 Mar 2002 16:44:22 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jack Crawford <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jack Crawford <[log in to unmask]>
Subject: Re: Designers Learning Symposiums CfP
X-To: [log in to unmask]
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Could it be possible that if we work at the head-shed we have "priveleges"?=
We get daily updates to our antivirus software everytime we start our =
computers and log on to the network and our check scheme is set to =
"paranoid" so it'll be hard for any viruses to be on an attachment we =
post. Jack
>>> [log in to unmask] 03/06/02 03:28PM >>>
Wow,
Is this a first???? A posting that came through with an attachment. I =
thought attachments were stripped. Jack, are we entering a new era? An era =
of rampant viruses!?!?!?!
Jason
>>> [log in to unmask] 03/06/02 03:01PM >>>
Hello Everyone,
Attached you will find a .pdf file of the 2002 Designer Learning Symposiums=
Call for Papers:=20
Designers Learning Symposium - Texas
Designers Learning Symposium - Canada
If you have any questions please feel free to call or email me one on one. =
Please do not respond to all.=20
Kindest regards,
Stephannie Caliendo
IPC Designers Council
Program Manager
[log in to unmask]
847-790-5302
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Date: Wed, 6 Mar 2002 15:01:03 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: Re: Solder fines
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
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In addition to the other conditions mentioned I would add exceeding the
working time for the solder paste, the most common culprit I have seen.
Dan
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Date: Wed, 6 Mar 2002 18:12:08 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Piezoelectric Crystal (Buzzer)
X-To: [log in to unmask]
Mary Jane,
Not at all green, just doing your job as Ahne would say, right Ahne. Don't
stop. Keep it up. Ahne, Kathy, and I never quit. Hell, even Steve came back
after a severe bout with AOI and other crud.
Steve, how'd the AOI thing/trip turn out?
Mary Jane, tell Reed I'm sorry we didn't make a deal. He seemed like a nice
guy period and with whom to work.
MoonMan
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Date: Wed, 6 Mar 2002 18:16:31 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Solder fines
X-To: [log in to unmask]
Yes Dan,
And to followup on a previous post about using paste until reaching a
predescribed "room" temperature, within a specified use range (thanks
Chris), please use your anal (no retentiveness here) thermometer if a
standard "lab" variety is not available.
MoonMan
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Date: Wed, 6 Mar 2002 18:04:04 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: AUTOMOTIVE PACKAGING/SEALING REALIBILITY
X-To: Carl VanWormer <[log in to unmask]>
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Carl,
1. There is no "magic" number. The only way to find out is to test the product in chamber
Accurate testing prior to fielding this product would have prevented all of this. The sooner you
start testing the sooner these problems end. Designing or correcting problems using "WAGs"
is very expensive.
2. Okay
3. Don't know and it doesn't matter. RTV is about as elastic as aluminum during vibration or mechanical
shock.
It will tend to delaminate due to cleanliness issues and moisture ingress.
4. Yes, but there is not enough space to go through them and the synergistic reactions which occur.
I will send you a copy of my paper "Avionics System, Reliability, and Harsh Environments"
Even though it says "Avionics" it centers on Tropospheric chemistry and effects on electronic
circuitry.
As Phil pointed out use a parylene coating (.001 in thick), which requires a very clean circuit, and
seal that unit up better.
Your management must determine how much correcting this issue is costing and compare it to a
well managed testing program integrated into the design process.
If they fail to grasp this concept you should probably update your resume!
David A. Douthit
Manager
LoCan LLC
Carl VanWormer wrote:
> Thanks for your input. In regards to your questions (below):
>
> 1. When you say the boards are too dirty, is there some number (less than 5
> ug/sq. in.) that is considered clean? The assembly house runs the finished
> boards through a continuous process system that cleans the boards in
> successively cleaner stations. The last one is "clean" DI water.
>
> 2. The RTVS 27 is a 2-part system. I don't think there is significant out
> gassing.
>
> 3. Do you think the RTV is fracturing internally due to shocks?
>
> 4. Are there particular environmental elements in "behind the tire" road
> spray that would attack RTVS 27?
>
> Carl Van Wormer
> Cipher Systems
> 1815 NW 169th Place, Suite 5010
> Beaverton, OR 97006
> Phone (503)-617-7447 Fax (503)-617-6550
>
> -----Original Message-----
> From: David Douthit [mailto:[log in to unmask]]
> Sent: Wednesday, March 06, 2002 9:57 AM
> To: TechNet E-Mail Forum.; Carl VanWormer
> Subject: Re: [TN] AUTOMOTIVE PACKAGING/SEALING REALIBILITY
>
> Carl,
>
> Some quick points:
>
> 1. The boards are too dirty (clean them with heated DI water at a minimum).
> 2. RTVS 27 - Is this a Room Temperature Vulcanization S??? potting compound?
> If so be sure that the out gassing during the cure process does not
> contain acids.
> 3. RTV does not absorb sudden shocks and vibration. It is forgiving during
> thermal changes.
> 4. Your box leaks at numerous locations and RTV is very permeable to
> moisture and certain reactive
> gases.
>
> David A. Douthit
> Manager
> LoCan LLC
>
> Carl VanWormer wrote:
>
> > Thanks to all for the recent comments, questions, and suggestions. Here's
> a
> > "quick" update of my recent status and findings:
> >
> > Our unit is mounted in an aluminum box (4 screws into the top) with some
> > style of heavy duty circular connectors (with rubber gaskets), and I've
> seen
> > no board corrosion around that area. The system is potted with Insulcast
> > RTVS 27, after treating the connector sides, box mating surfaces and
> holes,
> > and sides of 4 led (that protrude thru box holes) with the "proper"
> primer.
> >
> > Previous batches of boards have been built, cleaned, then stocked. After
> > final programming (a J-leaded PROM, hand soldered with water soluble
> flux),
> > they are washed under hot, running water with vigorous brushing. Recent
> > testing (yesterday, thanks to QPL) indicated ionic contamination levels of
> 5
> > ug. NaCl/sq.in, initially, and 15 ug. NaCl/sq.in after the PROM is added
> and
> > "cleaned". This indicates that there is some bad stuff inside to start
> the
> > process. This is like putting one bullet in your Colt 45 and playing
> > Russian Roulette!
> >
> > Now we have 2 possibilities for the second half of the equation . . .
> either
> > we are sealing enough moisture in the system to guarantee continued work
> for
> > our repair tech, or water is getting in through our impervious barriers.
> > Failure analysis shows the most common areas for the corrosion are in the
> > area of the 4 LEDs that protrude through the box. I am suspicious of the
> > quality of the adhesion to the "primered" LEDs, since they seem to pull
> > clear of the potting compound leaving a smooth surface, not torn and
> ragged.
> > Another area has been near the board (and box) edges, some of which have
> > shown what appears to be oil incursion into potting fractures at the box
> top
> > interface. I am wondering if vibration of the potting mass is causing
> > fractures, even though it is hard to imagine when looking at the system.
> > Has anyone seen anything like this with the Insulcast compound?
> >
> > Since I have to make some more units, I have cleaned a dozen (for a second
> > time) and baked them overnight at 70 C, bagged them with desiccant to wait
> > for potting. We are planning to flood the boards and box with primer,
> > thinking that they may be more difficult to troubleshoot if they fail, but
> > maybe they won't fail (at least at the present 30% rate). Any thoughts on
> > this?
> >
> > Thanks for listening,
> > Carl
> >
> > Carl Van Wormer
> > Cipher Systems
> > 1815 NW 169th Place, Suite 5010
> > Beaverton, OR 97006
> > Phone (503)-617-7447 Fax (503)-617-6550
> >
>
> ---------------------------------------------------------------------------------
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> information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315
> ---------------------------------------------------------------------------------
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=========================================================================
Date: Wed, 6 Mar 2002 18:12:00 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: Conformal coating: high humidity environment.
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii; x-mac-type="54455854";
x-mac-creator="4D4F5353"
Content-Transfer-Encoding: 7bit
Jan,
The IPC is in the final stages (draft) of creating a Conformal Coatings Handbook. It should be
available
by Fall. It is currently 90 pages and contains a great deal of info to guide you.
David A. Douthit
Manager
LoCan LLC
Jan Satterfield wrote:
> Someone asked the questions regarding high humidity and the best conformal
> coating to use and I read 4 different answers: Acrylics, urethanes,
> paralyene and Silicone. I have always understood that acrylics were the
> least moisture resistant, paralyene the most moisture resistant and
> urethanes the most commonly used for moisture resistance on CCA's. Anyone
> care to clarify?
>
> -----Original Message-----
> From: [log in to unmask] [mailto:[log in to unmask]]
> Sent: Wednesday, March 06, 2002 9:22 AM
> To: [log in to unmask]
> Subject: Re: [TN] Conformal coating: high humidity environment.
>
> Acrylics tend to have the best performance in high moisture environments, as
> long as the temperatures are not extremely high.
>
> ----------------------------------------------------------------------------
> -----
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> ext.5315
> ----------------------------------------------------------------------------
> -----
>
> ---------------------------------------------------------------------------------
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> ---------------------------------------------------------------------------------
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=========================================================================
Date: Wed, 6 Mar 2002 20:53:00 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: AUTOMOTIVE PACKAGING/SEALING REALIBILITY
X-To: David Douthit <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Dave,
You are a cookin'.
Love it,
MoonMan
----- Original Message -----
From: "David Douthit" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, March 06, 2002 12:56 PM
Subject: Re: [TN] AUTOMOTIVE PACKAGING/SEALING REALIBILITY
> Carl,
>
> Some quick points:
>
> 1. The boards are too dirty (clean them with heated DI water at a
minimum).
> 2. RTVS 27 - Is this a Room Temperature Vulcanization S??? potting
compound?
> If so be sure that the out gassing during the cure process does not
contain acids.
> 3. RTV does not absorb sudden shocks and vibration. It is forgiving during
thermal changes.
> 4. Your box leaks at numerous locations and RTV is very permeable to
moisture and certain reactive
> gases.
>
> David A. Douthit
> Manager
> LoCan LLC
>
> Carl VanWormer wrote:
>
> > Thanks to all for the recent comments, questions, and suggestions.
Here's a
> > "quick" update of my recent status and findings:
> >
> > Our unit is mounted in an aluminum box (4 screws into the top) with some
> > style of heavy duty circular connectors (with rubber gaskets), and I've
seen
> > no board corrosion around that area. The system is potted with
Insulcast
> > RTVS 27, after treating the connector sides, box mating surfaces and
holes,
> > and sides of 4 led (that protrude thru box holes) with the "proper"
primer.
> >
> > Previous batches of boards have been built, cleaned, then stocked.
After
> > final programming (a J-leaded PROM, hand soldered with water soluble
flux),
> > they are washed under hot, running water with vigorous brushing. Recent
> > testing (yesterday, thanks to QPL) indicated ionic contamination levels
of 5
> > ug. NaCl/sq.in, initially, and 15 ug. NaCl/sq.in after the PROM is added
and
> > "cleaned". This indicates that there is some bad stuff inside to start
the
> > process. This is like putting one bullet in your Colt 45 and playing
> > Russian Roulette!
> >
> > Now we have 2 possibilities for the second half of the equation . . .
either
> > we are sealing enough moisture in the system to guarantee continued work
for
> > our repair tech, or water is getting in through our impervious barriers.
> > Failure analysis shows the most common areas for the corrosion are in
the
> > area of the 4 LEDs that protrude through the box. I am suspicious of
the
> > quality of the adhesion to the "primered" LEDs, since they seem to pull
> > clear of the potting compound leaving a smooth surface, not torn and
ragged.
> > Another area has been near the board (and box) edges, some of which have
> > shown what appears to be oil incursion into potting fractures at the box
top
> > interface. I am wondering if vibration of the potting mass is causing
> > fractures, even though it is hard to imagine when looking at the system.
> > Has anyone seen anything like this with the Insulcast compound?
> >
> > Since I have to make some more units, I have cleaned a dozen (for a
second
> > time) and baked them overnight at 70 C, bagged them with desiccant to
wait
> > for potting. We are planning to flood the boards and box with primer,
> > thinking that they may be more difficult to troubleshoot if they fail,
but
> > maybe they won't fail (at least at the present 30% rate). Any thoughts
on
> > this?
> >
> > Thanks for listening,
> > Carl
> >
> > Carl Van Wormer
> > Cipher Systems
> > 1815 NW 169th Place, Suite 5010
> > Beaverton, OR 97006
> > Phone (503)-617-7447 Fax (503)-617-6550
> >
> > -----Original Message-----
> > From: Roger Stoops [mailto:[log in to unmask]]
> >
> > Carl,
> > Been readin' what everbody else is saying about potting and
encapsulating,
> > thought I would jump into the fray.
> > We build equipment that is mounted on 'dozer blades, behind and under
> > motorgraders, and such. Pretty dirty and nasty environment. We have
found
> > that, for consistent reliability, potting or coating a board (really
squeaky
> > clean to begin with mind you), mounted in a custom aluminum enclosure,
with
> > a sealing ring or o-ring under the lid, and using Mil-style circular
> > connectors (with gasket seal behind connector) seems to cure these
problems.
> > Of course this may be more expensive than what your product can afford,
but
> > illustrates how we solved such a problem. Even a small, inexpensive
> > off-the-shelf aluminum enclosure with a simple gasket system would go a
long
> > way to reducing your problem with external moisture.
> > We would like to hear later about your efforts in solving your dilemma.
> >
> > Roger M. Stoops, CID [log in to unmask]
> > TRIMBLE NAVIGATION LLC
> > Engineering and Construction Division
> > http://www.trimble.com
> >
> > -----Original Message-----
> > From: Carl VanWormer [mailto:[log in to unmask]]
> >
> > We have a "potted" product that rides behind the wheels of a truck. All
our
> > best protection efforts have yielding significant failure rates.
Returned
> > units have had traces eaten off the board, with various colors of crud
left
> > over. The green is probably copper oxides. Some of the copper seems to
> > have turned into a red powder. There is a lot of white crust around
some of
> > the lost traces and vias. We are guessing that the boards were not
cleaned
> > well enough before potting (Insulcast RTVS 27 thermally conductive
potting
> > compound). We believe the boards were produced with a water soluble
flux,
> > then washed, then a few hand-ads were installed with a "no-clean" flux.
We
> > think that either (1) moisture sealed inside the potted units may be
> > "helping" the corrosion, or (2) moisture (with or without extra
corrosive
> > elements) is leaking it through poorly sealed boundaries of the potting
> > compound. (we are using "primer" around the known "edges" of the units)
> >
> > I know that "Detroit" has solved this problem many times. Where can I
find
> > a "guide book" or a knowledgeable vendor to help me out of this board
> > cleaning/potting mess?
> >
>
> --------------------------------------------------------------------------
-------
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additional
> > information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700
ext.5315
>
> --------------------------------------------------------------------------
-------
>
> --------------------------------------------------------------------------
-------
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>
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=========================================================================
Date: Wed, 6 Mar 2002 20:20:04 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Piezoelectric Crystal (Buzzer)
X-To: Kathy Kuhlow <[log in to unmask]>
Kathy,
Now I get it. Now I get it. At age 97, it gets a little slower.
Damn you women are sharp. It took me at least four hours for your message to
even catch hold.
Future ex? No way! This is the real thing. I'm ready to settle down. To what
I've no idea but settle down I will, or not.
MoonMan
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=========================================================================
Date: Thu, 7 Mar 2002 10:59:38 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Pads, holes, traces and Class 3 field reliability
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
To Ian, Jeffrey and the very respectful Boston Brad, my very grateful
thanks for the time taken and information sent in response to my [lengthy]
posting. Jeff, guide is like an Alladin's cave to me - full of very useful
stuff that I can't seem to prise from the fab houses I use.
Humble regards
Peter
[This e-mail is confidential and may also be privileged. If you are not the
intended recipient, please delete it and notify us immediately; you should
not copy or use it for any purpose, nor disclose its contents to any other
person. Thank you.]
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=========================================================================
Date: Thu, 7 Mar 2002 14:22:23 +1100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Colin Weber <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Colin Weber <[log in to unmask]>
Subject: PBGA - Bow & Twist
Mime-Version: 1.0
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I am trying to determine how large I can go for a new board design,
and am wondering what experiences some of you may have had.
The design will house fine pitch devices and a PBGA
1.6mm thick FR4
8/10 layers
Components are on both sides
P0.65mm/H0.3mm Vias and 0.2mm space/clearance
SMT reflow & most likely Wave for THT parts
Co-Planarity/Warpage kept to a minimum (This PCB will go into a
moving/hinged frame. I am looking to keep the flexibility of the PCB
to a minimum. There will also be a large number of wiring harness
connecting to the PWA)
Is anyone able to suggest what a reasonable limit is to aim for?
Regards,
Colin Weber
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=========================================================================
Date: Wed, 6 Mar 2002 21:48:37 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Stephannie Caliendo <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Stephannie Caliendo <[log in to unmask]>
Subject: 2002 Designers Learning Symposiums
Mime-Version: 1.0
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HEADS UP DESIGNERS...IT'S TIME TO DESIGN YOUR CAREER PATH & LOOK FORWARD =
TO TOMORROW!!! =20
You need to stay tuned, yet the economy forces you to scrutinize your =
pennies. This is where you can keep your skills sharpened, learn new =
technologies and stay in the loop affordably with highly qualified and =
knowledgeable instructors and professionals in the industry.=20
The IPC Designers Council is pleased to announce the Designers Learning =
Symposium - Texas and the Designers Learning Symposium - Canada. Both =
events will concentrate on practical education and training that you can =
take back to the workplace and use in the "real world." These first-class =
technical events include full-day workshops on the hottest topics in =
design, technical paper presentations, general sessions, intriguing =
roundtable discussions, hands-on training, facility tour with a reception, =
a self-development forum, tabletop exhibits, an evening show floor =
reception, refreshments, lunches, a technical proceedings, and plenty of =
networking opportunities! As the economy improves so should your skills, =
so don't forget about the Designer Certification Workshop & Exam (CID) and =
the NEW Advanced Designer Certification Workshop & Exam (CID+).
Dates & Locations:=09
May 20 - 25, 2002 at the Ramada Plaza-Market Place in Dallas, Texas
Sept 30 - Oct 5, 2002 at the Sheraton Parkway Toronto N. Hotel & Conference=
Centre in Richmond Hill, Ontario, Canada=20
Hotel Information:
TEXAS
May 20 - 25, 2002
Ramada Plaza - Market Center
1055 Regal Row
Dallas, Texas 75247
IPC Room Rate: $69 US
Number for Reservations: 800-441-3318 or 214-634-8550
Cut-off Date for reservations: May 10, 2002
CANADA
September 30 - October 5, 2002
Sheraton Parkway Toronto North Hotel & Conference Centre
600 Highway 7 East
Richmond Hill, Ontario, Canada L4B 1B2
IPC Room Rate: $109 CAD at the Best Western Parkway Inn
or $149 CAD at the Sheraton Parkway
Number for Reservations: 800-668-0101 or 905-881-2121
Cut-off Date for reservations: September 9, 2002
Currently $109 CAD is about $68.50 USD and $149 CAD is about $88 USD . =
Both hotels are attached to the conference centre and reservations can be =
made for either through both of the numbers provided.=20
For more information on the Designers Learning Symposiums visit: www.ipcdes=
ignerscouncil.org
If you have any questions please feel free to call or email me one on one. =
Please do not respond to all.=20
Kindest regards,
Stephannie Caliendo
IPC Designers Council
Program Manager
[log in to unmask]
847-790-5302
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=========================================================================
Date: Thu, 7 Mar 2002 12:31:08 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Pads, holes, traces and Class 3 field reliability
X-To: Earl Moon <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hi, Moonman and All, especially Ian, Brad and Jeff,
I'm trying to correlate the information each of you has shared with me, and
I want to ask one or two more questions (first one aimed mostly at Ian, I
think):
Given the ductility information given by Earl and IPC 2221/6012, and
Ian's gen on copper cracking under temp cycling, do you know if the T/C
failure info was obtained using IPC 2221/6012 boards and the Cu plating
thickness of 1 mil? If not, do you know what boards were used? BTW, our
hole copper thickness is between 0.7 mils and 1 mil as a rule.
Do you have an opinion one way or the other about retaining
'non-functional' pads on inner layers when considering copper ductility
in holes? Do they help or hinder? I contributed to the recent TechNet
thread on this issue and strongly favour retaining them, but my
Technical Director is now seriously considering taking them out to use
the space for trace routing, etc (functional stuff). He know my opinion
and reasons, but other design considerations may make him over-rule my
humble manufacturing experience.
My profound thanks to you all again for coming to the rescue. Earl, what's
a comumn?
Peter
Earl Moon
<[log in to unmask] To: [log in to unmask], DUNCAN
M.COM> Peter/Asst Prin Engr/ST Aero/ST Group@ST Domain
cc:
03/06/02 Subject: Re: Pads, holes, traces and Class 3
08:29 PM field reliability
Peter,
It just doesn't seem too hard to me. 5:1 aspect ratio holes, especially the
diameter vs board thickness you describe is completely acceptable.
Actually,
it is in the preferred comumn.
You know we've talked about this before realizing cu plating thickness and
ductility requirements must be met as .001" thickness, and all the rest
entailed in 6012, and ductility well exceeding 10%. Nothing will make the
hole walls come apart using this criteria to the extent all else meets
6012's figure 3.5 and associated requirements in that section. Of course,
laminate integrity is important as well and voiding requirements in the
laminate evaluation area cannot exceed that which is specified. Don't want
any voids propagating into cracks extending into the thermal evaluation
zones/holes and causing cracks.
Copper foil, for very high reliability boards, such as some Class III
types,
also should be very ductile. This means using rolled annealed copper
instead
of ED type. We need the plated hole interface to internal layers to be
capable of withstanding thermal stress and shock as well. Also, as
indicated
in section 3, clear requirements must be met for hole plating to surface
conductors.
Actually, instead of more discussion on my part, IPC 2221, etc., and 6012
cover all the ground, and much more, you are concerned about. There's
little
else to say.
Very best wishes on your endeavor and its success,
Earl
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Date: Thu, 7 Mar 2002 09:06:43 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Solder fines
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=iso-8859-1
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One of the most common causes is using solder paste that has been either
badly stored or past the "use-by" date, especially if it is of low flux
activity which cannot cope with the coat of metal oxides/carbonates that
gradually form on each solder particle.
Brian
"Bissonnette, Jean-Francois" wrote:
>
> Hi all,
>
> we have tiny solder balls on assembly manufactured for us. Most of the
> little balls
> are around SMT leads and are some times numerous. What can cause such
> condition?
>
> Jean-François Bissonnette
> Vérificateur, Contrôle de la Qualité
> Électronique
> Produits et Procédés
> Vapor Rail Inc.
> 10655 Henri-Bourassa O.
> St-Laurent, Qc
> H4S 1A1
>
> (514) 335-4200 x2021
> (514) 335-4231 fax
>
> <<Bissonnette, Jean-Francois.vcf>>
>
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally privileged and confidential information intended only for the use of the individual or entity named herein. If the reader of this transmission is not the intended recipient, you are hereby notified that any dissemination, distribution, or copying of this transmission is strictly prohibited.
>
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Date: Thu, 7 Mar 2002 15:16:11 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Bottom Side Reflow!!
X-To: ART HAMPTON <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Hello in there,
No, you do not need to worry about losing bits off the bottom during second
reflow. The surface tension of liquid solder is more than enough to keep
little passives in place. All my boards have many, many passives underneath
and a few IC's besides, and they all hang on there perfectly.
Peter
STAero
ART HAMPTON
<smt@Q-TRONIC To: [log in to unmask]
S.NET> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
Sent by: Aero/ST Group)
TechNet Subject: [TN] Bottom Side Reflow!!
<[log in to unmask]
ORG>
03/07/02
05:00 AM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
ART HAMPTON
Hello Out There,
Recently I was assigned the task of creating profiles that would fall
within the ( PWI ) for solder paste Kester ( 562 ) for processing pcbs
with several (bga) components on the top side, however the bottom side
of the pcb also has 1,200 placements of cap, and res. reflowed not
epoxyed, do I need to be worried about losing my bottom side components?
Art
____________________________________________________
(Embedded image moved to file: pic13944.gif) IncrediMail - Email has
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Date: Thu, 7 Mar 2002 09:31:38 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Conformal coating: high humidity environment.
X-To: [log in to unmask]
MIME-Version: 1.0
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Jan
The order from good to bad, at temperatures < 40°C, but ONLY, say again,
ONLY FOR MOISTURE RESISTANCE.
paraxylylene (Parylene (R) ) 1
acrylics 2
epoxy 3
polyurethane 4
silicone 5
For mechanical resistance, the order is 3, 1, 4, 2, 5
For chemical resistance. 1, 3, 5, 4, 2
For electrical properties (dry conditions) 2, 1, 5, 4, 3
For ease/cost 2, (3, 4, 5), 1
Repairability 2, 4, 5, 3, 1
Obviously, these orders may vary somewhat with individual coatings, and
are just a rough categorisation, but they will give you an idea
according to which characteristics are most interesting for your
application. Where there is a choice between single and 2-component
products, go for solventless 2-component ones for best results, PROVIDED
you can meter and mix them accurately, otherwise forget them. The reason
there is such a choice is because there is no single ideal solution and
you have to compromise somewhere along the line. If you draw up a
"league table" from the above scores, you will find them all roughly
equal, certainly within the tolerances between individual products.
FWIW
Brian
Jan Satterfield wrote:
>
> Someone asked the questions regarding high humidity and the best conformal
> coating to use and I read 4 different answers: Acrylics, urethanes,
> paralyene and Silicone. I have always understood that acrylics were the
> least moisture resistant, paralyene the most moisture resistant and
> urethanes the most commonly used for moisture resistance on CCA's. Anyone
> care to clarify?
>
> -----Original Message-----
> From: [log in to unmask] [mailto:[log in to unmask]]
> Sent: Wednesday, March 06, 2002 9:22 AM
> To: [log in to unmask]
> Subject: Re: [TN] Conformal coating: high humidity environment.
>
> Acrylics tend to have the best performance in high moisture environments, as
> long as the temperatures are not extremely high.
>
> ----------------------------------------------------------------------------
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Date: Thu, 7 Mar 2002 09:39:21 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: AUTOMOTIVE PACKAGING/SEALING REALIBILITY
X-To: Carl VanWormer <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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Carl
A silicone product would be the last choice for this application. As
mentioned in another post on coatings, the choice of product is a
compromise, but for this application I would choose a flexibilised
electrical grade 2- or more epoxy.
Remember, by definition, RTV polymerises by the absorption of moisture.
Brian
Carl VanWormer wrote:
>
> Thanks to all for the recent comments, questions, and suggestions. Here's a
> "quick" update of my recent status and findings:
>
> Our unit is mounted in an aluminum box (4 screws into the top) with some
> style of heavy duty circular connectors (with rubber gaskets), and I've seen
> no board corrosion around that area. The system is potted with Insulcast
> RTVS 27, after treating the connector sides, box mating surfaces and holes,
> and sides of 4 led (that protrude thru box holes) with the "proper" primer.
>
> Previous batches of boards have been built, cleaned, then stocked. After
> final programming (a J-leaded PROM, hand soldered with water soluble flux),
> they are washed under hot, running water with vigorous brushing. Recent
> testing (yesterday, thanks to QPL) indicated ionic contamination levels of 5
> ug. NaCl/sq.in, initially, and 15 ug. NaCl/sq.in after the PROM is added and
> "cleaned". This indicates that there is some bad stuff inside to start the
> process. This is like putting one bullet in your Colt 45 and playing
> Russian Roulette!
>
> Now we have 2 possibilities for the second half of the equation . . . either
> we are sealing enough moisture in the system to guarantee continued work for
> our repair tech, or water is getting in through our impervious barriers.
> Failure analysis shows the most common areas for the corrosion are in the
> area of the 4 LEDs that protrude through the box. I am suspicious of the
> quality of the adhesion to the "primered" LEDs, since they seem to pull
> clear of the potting compound leaving a smooth surface, not torn and ragged.
> Another area has been near the board (and box) edges, some of which have
> shown what appears to be oil incursion into potting fractures at the box top
> interface. I am wondering if vibration of the potting mass is causing
> fractures, even though it is hard to imagine when looking at the system.
> Has anyone seen anything like this with the Insulcast compound?
>
> Since I have to make some more units, I have cleaned a dozen (for a second
> time) and baked them overnight at 70 C, bagged them with desiccant to wait
> for potting. We are planning to flood the boards and box with primer,
> thinking that they may be more difficult to troubleshoot if they fail, but
> maybe they won't fail (at least at the present 30% rate). Any thoughts on
> this?
>
> Thanks for listening,
> Carl
>
> Carl Van Wormer
> Cipher Systems
> 1815 NW 169th Place, Suite 5010
> Beaverton, OR 97006
> Phone (503)-617-7447 Fax (503)-617-6550
>
> -----Original Message-----
> From: Roger Stoops [mailto:[log in to unmask]]
>
> Carl,
> Been readin' what everbody else is saying about potting and encapsulating,
> thought I would jump into the fray.
> We build equipment that is mounted on 'dozer blades, behind and under
> motorgraders, and such. Pretty dirty and nasty environment. We have found
> that, for consistent reliability, potting or coating a board (really squeaky
> clean to begin with mind you), mounted in a custom aluminum enclosure, with
> a sealing ring or o-ring under the lid, and using Mil-style circular
> connectors (with gasket seal behind connector) seems to cure these problems.
> Of course this may be more expensive than what your product can afford, but
> illustrates how we solved such a problem. Even a small, inexpensive
> off-the-shelf aluminum enclosure with a simple gasket system would go a long
> way to reducing your problem with external moisture.
> We would like to hear later about your efforts in solving your dilemma.
>
> Roger M. Stoops, CID [log in to unmask]
> TRIMBLE NAVIGATION LLC
> Engineering and Construction Division
> http://www.trimble.com
>
> -----Original Message-----
> From: Carl VanWormer [mailto:[log in to unmask]]
>
> We have a "potted" product that rides behind the wheels of a truck. All our
> best protection efforts have yielding significant failure rates. Returned
> units have had traces eaten off the board, with various colors of crud left
> over. The green is probably copper oxides. Some of the copper seems to
> have turned into a red powder. There is a lot of white crust around some of
> the lost traces and vias. We are guessing that the boards were not cleaned
> well enough before potting (Insulcast RTVS 27 thermally conductive potting
> compound). We believe the boards were produced with a water soluble flux,
> then washed, then a few hand-ads were installed with a "no-clean" flux. We
> think that either (1) moisture sealed inside the potted units may be
> "helping" the corrosion, or (2) moisture (with or without extra corrosive
> elements) is leaking it through poorly sealed boundaries of the potting
> compound. (we are using "primer" around the known "edges" of the units)
>
> I know that "Detroit" has solved this problem many times. Where can I find
> a "guide book" or a knowledgeable vendor to help me out of this board
> cleaning/potting mess?
>
> ---------------------------------------------------------------------------------
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=========================================================================
Date: Thu, 7 Mar 2002 09:43:47 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Sasha Miladinovic <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Sasha Miladinovic <[log in to unmask]>
Subject: Re: I need a better soldering iron
X-To: Phil Nutting <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=iso-8859-1
Content-transfer-encoding: quoted-printable
Hello Phil,
I agree with others that promote Metcal. Those are bit more expensive b=
ut
also are durable and have great performance. We use Metcal (last 4 year=
s)
and have 60 something of those. Low maintenance costs comparing to Well=
er
and Hakko that we used earlier (during 15 years).
But if you have shortage of money, I could recommend the alternative th=
at
is good compromise to Metcal and Weller. It is competitive both conside=
ring
economical and practical aspects. Check www.jbc.es and compare the
performance and price with Metcal.
My first choice would be Metcal and JBC the second.
***********************************************************************=
**
Sasha Miladinovic - Production Engineering
Amersham Biosciences, PCB Production, Ume=E5
Tel: +46 (0) 90 150 232
Fax: +46 (0) 90 138 372
E-mail: [log in to unmask]
***********************************************************************=
**
=
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Date: Thu, 7 Mar 2002 09:09:36 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"FOX, Ian (York Rd)" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "FOX, Ian (York Rd)" <[log in to unmask]>
Subject: Re: Pads, holes, traces and Class 3 field reliability
X-To: "[log in to unmask]" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Peter, our PCB's basically use IPC-D-275 design rules and are fabricated as
class III in accordance with 6012. We specify a minimum plating thickness of
20 microns Cu down the hole supported with 3-8 microns of electroless Ni. I
read the non-functional pad thread and was tempted to contribute, but with
one thing and another didn't get round to it. I come down strongly in your
corner. For me the non-functional pads help tie the whole thing together and
we only remove them if pushed.
Regards
Ian
TRW AS
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: 07 March 2002 04:31
To: [log in to unmask]
Subject: Re: [TN] Pads, holes, traces and Class 3 field reliability
Hi, Moonman and All, especially Ian, Brad and Jeff,
I'm trying to correlate the information each of you has shared with me, and
I want to ask one or two more questions (first one aimed mostly at Ian, I
think):
Given the ductility information given by Earl and IPC 2221/6012, and
Ian's gen on copper cracking under temp cycling, do you know if the T/C
failure info was obtained using IPC 2221/6012 boards and the Cu plating
thickness of 1 mil? If not, do you know what boards were used? BTW, our
hole copper thickness is between 0.7 mils and 1 mil as a rule.
Do you have an opinion one way or the other about retaining
'non-functional' pads on inner layers when considering copper ductility
in holes? Do they help or hinder? I contributed to the recent TechNet
thread on this issue and strongly favour retaining them, but my
Technical Director is now seriously considering taking them out to use
the space for trace routing, etc (functional stuff). He know my opinion
and reasons, but other design considerations may make him over-rule my
humble manufacturing experience.
My profound thanks to you all again for coming to the rescue. Earl, what's
a comumn?
Peter
Earl Moon
<[log in to unmask] To: [log in to unmask],
DUNCAN
M.COM> Peter/Asst Prin Engr/ST Aero/ST
Group@ST Domain
cc:
03/06/02 Subject: Re: Pads, holes,
traces and Class 3
08:29 PM field reliability
Peter,
It just doesn't seem too hard to me. 5:1 aspect ratio holes, especially the
diameter vs board thickness you describe is completely acceptable.
Actually,
it is in the preferred comumn.
You know we've talked about this before realizing cu plating thickness and
ductility requirements must be met as .001" thickness, and all the rest
entailed in 6012, and ductility well exceeding 10%. Nothing will make the
hole walls come apart using this criteria to the extent all else meets
6012's figure 3.5 and associated requirements in that section. Of course,
laminate integrity is important as well and voiding requirements in the
laminate evaluation area cannot exceed that which is specified. Don't want
any voids propagating into cracks extending into the thermal evaluation
zones/holes and causing cracks.
Copper foil, for very high reliability boards, such as some Class III
types,
also should be very ductile. This means using rolled annealed copper
instead
of ED type. We need the plated hole interface to internal layers to be
capable of withstanding thermal stress and shock as well. Also, as
indicated
in section 3, clear requirements must be met for hole plating to surface
conductors.
Actually, instead of more discussion on my part, IPC 2221, etc., and 6012
cover all the ground, and much more, you are concerned about. There's
little
else to say.
Very best wishes on your endeavor and its success,
Earl
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Date: Thu, 7 Mar 2002 10:46:05 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Busko, Wolfgang" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Busko, Wolfgang" <[log in to unmask]>
Subject: Re: Bottom Side Reflow!!
X-To: ART HAMPTON <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----_=_NextPart_001_01C1C5BC.E6566630"
This message is in MIME format. Since your mail reader does not understand
this format, some or all of this message may not be legible.
------_=_NextPart_001_01C1C5BC.E6566630
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Hi Art,
=20
if everything is "normal" you shouldn=B4t worry, done that =
over=B4n=B4over again.
All you have to do is make sure there=B4s no mechanical interferance =
with
those babes, means watch your transport, a meshbelt isn=B4t the best =
choice
without any precautions.
=20
Wolfgang
=20
------_=_NextPart_001_01C1C5BC.E6566630
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4807.2300" =
name=3DGENERATOR><!--IncrdiXMLRemarkStart>
<IncrdiX-Info>
<X-FID>FLAVOR00-NONE-0000-0000-000000000000</X-FID>
<X-FVER>2.0</X-FVER>
<X-CNT>;</X-CNT>
</IncrdiX-Info>
<IncrdiXMLRemarkEnd--></HEAD>
<BODY=20
style=3D"BACKGROUND-POSITION: 0px 0px; FONT-SIZE: 10pt; MARGIN: 1px; =
FONT-FAMILY: Arial"=20
bgColor=3D#ffffff background=3D"" scroll=3Dyes X-FVER=3D"2.0" =
ORGYPOS=3D"0">
<DIV><SPAN class=3D961043909-07032002>Hi Art,</SPAN></DIV>
<DIV><SPAN class=3D961043909-07032002></SPAN> </DIV>
<DIV><SPAN class=3D961043909-07032002>if everything is "normal" you =
shouldn=B4t=20
worry, done that over=B4n=B4over again. All you have to do is make sure =
there=B4s no=20
mechanical interferance with those babes, means watch your transport, a =
meshbelt=20
isn=B4t the best choice without any precautions.</SPAN></DIV>
<DIV><SPAN class=3D961043909-07032002></SPAN> </DIV>
<DIV><SPAN class=3D961043909-07032002>Wolfgang</SPAN></DIV>
<DIV><SPAN class=3D961043909-07032002></SPAN> </DIV></BODY></HTML>
------_=_NextPart_001_01C1C5BC.E6566630--
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Date: Thu, 7 Mar 2002 03:45:09 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Pads, holes, traces and Class 3 field reliability
X-To: [log in to unmask]
Peter,
Comumn is an old hi reliability, Class III term, synonomous with column when
wrong key depressed while typing, eating, drinking (probably this one mostly
as Bud), and reading at same time.
Wasn't it 275, can't find my copy now, that had the famous three comumns as
preferred, standard, and reduced producibility. Anyway, I still use the
three as guidlines today but having evolved from reduced to preferred over
the very long time I've been designing and building these type boards.
At any rate 5:1 works fine. I still stick with my previous views concerning
non-functional pad removal as being totally acceptable. My previous comments
brought up the old requirements for two plies of prepreg per dielectric
thickness minimum meaning resin rich material was always present in high
layer count (over 8) MLB's. Because it was so rich, it "pushed" and "pulled"
its way into and out of hole walls effecting separation and such. Now, in
the single ply world, this is not as much a factor or concern, as the resin
to glass ratios are nearly balanced so much less movement is apparent.
Also, I belive 2221 talks to Class III plating thickness requirements as 25
um minimum. What is that table?
MoonMan
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Date: Thu, 7 Mar 2002 03:51:01 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: PBGA - Bow & Twist
X-To: [log in to unmask]
Have worked with some very large boards with high layer counts up to 52
layers and 17"x21" and there were no problems even considering the number of
area array devices and what was connected to the boards - lots of stuff.
However, I would mention the board thickness and material selections played
a large roll in keeping these MLB's flat as a pancake. Therefore, I might
consider a thicker than normal (.062") construction.
MoonMan
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Date: Thu, 7 Mar 2002 03:55:11 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Pads, holes, traces and Class 3 field reliability
X-To: [log in to unmask]
2221 table 4-3 on page 20 for plating thicknesses.
MoonMan
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Date: Thu, 7 Mar 2002 04:05:25 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Pads, holes, traces and Class 3 field reliability
2221 table 5-1, page 25 provides information concerning aspect ratios and
board thickness compromises relating to bow and twist.
I'm really starting to like this document, over 275, and the 6012
requirements as well, over 55110. It's just hard giving up the old stuff
sometimes. What was her name? I'm calling today.
MoonMan
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Date: Thu, 7 Mar 2002 04:09:39 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Bottom Side Reflow!!
X-To: [log in to unmask]
Wolfy,
Right on and Peter as well. Wolfgang brings up an important point concerning
transport. Some of my current students doubt the whole thing works as
surface tension an the like.
My good friend, Ken Carlile, has joined our fine group and needs to get his
designer more up to date concerning this and related issues.
Could you talk the precautions you mentioned. What's needed to to transport
these boards successfully?
Earl
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Date: Thu, 7 Mar 2002 11:30:40 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Busko, Wolfgang" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Busko, Wolfgang" <[log in to unmask]>
Subject: Re: Bottom Side Reflow!!
X-To: Earl Moon <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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>=20
> Could you talk the precautions you mentioned. What's needed=20
> to to transport
> these boards successfully?
>=20
> Earl
.. sure, ya need a smooth transport, not these shaking, rattling ones =
-if
they still exist???- and than maybe you need some kinda cage with some =
kinda
standoff for your board that it=B4s not interfering with your support =
or
meshbelt. A pallet that can be used during p=B4n=B4p and reflow would =
be my
prefered choice for a more pure inline solution.
Isn=B4t it a bit early for you or are you more on the late side
Wolfgang
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Date: Thu, 7 Mar 2002 12:28:53 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Grant Emandien <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Grant Emandien <[log in to unmask]>
Subject: Re: Solder fines
MIME-Version: 1.0
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Hi All,
On the matter of using paste beyond its 'use-by' date, what other
defects/evidence indicates its usage or poor storage?
TIA
Grant
-----Original Message-----
From: Brian Ellis [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 9:07 AM
To: [log in to unmask]
Subject: Re: [TN] Solder fines
One of the most common causes is using solder paste that has been either
badly stored or past the "use-by" date, especially if it is of low flux
activity which cannot cope with the coat of metal oxides/carbonates that
gradually form on each solder particle.
Brian
"Bissonnette, Jean-Francois" wrote:
>
> Hi all,
>
> we have tiny solder balls on assembly manufactured for us. Most of the
> little balls
> are around SMT leads and are some times numerous. What can cause such
> condition?
>
> Jean-Fran=E7ois Bissonnette
> V=E9rificateur, Contr=F4le de la Qualit=E9
> =C9lectronique
> Produits et Proc=E9d=E9s
> Vapor Rail Inc.
> 10655 Henri-Bourassa O.
> St-Laurent, Qc
> H4S 1A1
>
> (514) 335-4200 x2021
> (514) 335-4231 fax
>
> <<Bissonnette, Jean-Francois.vcf>>
>
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally privileged
and confidential information intended only for the use of the individual or
entity named herein. If the reader of this transmission is not the intended
recipient, you are hereby notified that any dissemination, distribution, or
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>
>
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Notice:
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ntain commercially sensitive or confidential information which may be legal=
ly privileged and is for the sole use of the intended recipient(s). If you =
are not, or believe you may not be, the intended recipient, you are hereby =
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Date: Thu, 7 Mar 2002 07:03:14 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: Bottom Side Reflow!!
X-To: ART HAMPTON <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Typically, the surface tension of the molten solder for components on the
bottom is enough to hole the parts in place. It does depend on the size of
the component and amount of solder. We reflow boards with chip components
on the bottom without any problems. I guess you'll have to try and see.
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: ART HAMPTON [SMTP:[log in to unmask]]
Sent: Wednesday, March 06, 2002 4:01 PM
To: [log in to unmask]
Subject: [TN] Bottom Side Reflow!!
Hello Out There,
Recently I was assigned the task of creating profiles that would
fall within the ( PWI ) for solder paste Kester ( 562 ) for processing pcbs
with several (bga) components on the top side, however the bottom side of
the pcb also has 1,200 placements of cap, and res. reflowed not epoxyed, do
I need to be worried about losing my bottom side components?
Art
____________________________________________________
<< File: ATT43641.gif >>
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Date: Thu, 7 Mar 2002 08:27:40 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Chris Almeras <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Chris Almeras <[log in to unmask]>
Subject: Re: Conformal coating: high humidity environment.
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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I would personally go with a one part urethane. We have coated
assemblies used in an "oceanside" humidity application, and have had
good results from the Humiseal line of urethanes.
Chris Almeras
-----Original Message-----
From: Bissonnette, Jean-Francois [mailto:[log in to unmask]]
Sent: Wednesday, March 06, 2002 9:41 AM
To: [log in to unmask]
Subject: [TN] Conformal coating: high humidity environment.
Hi all,
What type of coating should be used when equipment is to be used in high
humidity environment (near sea water)?
Thanks in advance!
Jean-Fran=E7ois Bissonnette
V=E9rificateur, Contr=F4le de la Qualit=E9
=C9lectronique
Produits et Proc=E9d=E9s
Vapor Rail Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 x2021
(514) 335-4231 fax
<<Bissonnette, Jean-Francois.vcf>>=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally privileged
and confidential information intended only for the use of the individual
or entity named herein. If the reader of this transmission is not the
intended recipient, you are hereby notified that any dissemination,
distribution, or copying of this transmission is strictly prohibited.
------------------------------------------------------------------------
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Date: Thu, 7 Mar 2002 08:07:02 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Antonio Souza <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Antonio Souza <[log in to unmask]>
Subject: Solder Joint Reliability
Please
Does anybody know some information about Vibration and Thermal Cycling Test
to qualify Conector and terminals solder joints?
Thanks
Antonio
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Date: Thu, 7 Mar 2002 08:15:03 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jason Gregory <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jason Gregory <[log in to unmask]>
Subject: Re: Designers Learning Symposiums CfP
X-To: [log in to unmask]
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: quoted-printable
Ouch! I didn't see that the post was from "@ipc.org". You're right, Jack, =
you guys do have priviledges and rightfully so. I am hanging my head in =
utter shame.
Disillusionally Yours,
Jason Gregory
>>> [log in to unmask] 03/06/02 04:44PM >>>
Could it be possible that if we work at the head-shed we have "priveleges"?=
We get daily updates to our antivirus software everytime we start our =
computers and log on to the network and our check scheme is set to =
"paranoid" so it'll be hard for any viruses to be on an attachment we =
post. Jack
>>> [log in to unmask] 03/06/02 03:28PM >>>
Wow,
Is this a first???? A posting that came through with an attachment. I =
thought attachments were stripped. Jack, are we entering a new era? An era =
of rampant viruses!?!?!?!
Jason
>>> [log in to unmask] 03/06/02 03:01PM >>>
Hello Everyone,
Attached you will find a .pdf file of the 2002 Designer Learning Symposiums=
Call for Papers:=20
Designers Learning Symposium - Texas
Designers Learning Symposium - Canada
If you have any questions please feel free to call or email me one on one. =
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Date: Thu, 7 Mar 2002 08:17:07 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jason Gregory <[log in to unmask]>
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I think I'll go home early today. (sigh)
Jason
>>> [log in to unmask] 03/06/02 04:06PM >>>
To Technetters
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only. We still will filter out attachments for virus protection.
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Date: Thu, 7 Mar 2002 08:15:55 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
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From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: 2002 Designers Learning Symposiums
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Will there be any lecture or session regarding the assembly process =
concerns?
Kathy
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Date: Thu, 7 Mar 2002 08:39:42 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Dan Cavaliere <[log in to unmask]>
Subject: SMT vs. Through-hole statistics
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I am looking for information to show the quality and reliability
comparisons of Through-hole vs. SMT (yes we are stilling doing a lot of
through-hole boards.!).
It is for a presentation to get funding to invest in SMT equipment. Any
data would be helpful, such as First Pass Yield comparisons, DPMO's,
etc.
Thanks!
--=_alternative 004B77D085256B75_=
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<br><font size=2 face="sans-serif">I am looking for information to show the quality and reliability comparisons of Through-hole vs. SMT (yes we are stilling doing a lot of through-hole boards.!).</font>
<br><font size=2 face="sans-serif">It is for a presentation to get funding to invest in SMT equipment. Any data would be helpful, such as First Pass Yield comparisons, DPMO's,</font>
<br><font size=2 face="sans-serif">etc.</font>
<br>
<br><font size=2 face="sans-serif">Thanks!</font>
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Date: Thu, 7 Mar 2002 14:20:36 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Naisbitt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Naisbitt <[log in to unmask]>
Subject: Re: Conformal coating: high humidity environment.
X-To: Brian Ellis <[log in to unmask]>
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Hello Techies,
Following Brian's posting, I saved another he made a little time ago that
you might find useful.
However, before I do that, may I only point out that there is no such thing
as the perfect or ideal conformal coating - it is all a question of
trade-off's.
For the original question of high humidity AND high levels of salt spray (or
should that be salt fog or salt mist? It does make a difference in test
conditions and results.) then a single part urethane will work well and we
can prove it. For those who want this proof, ask off-line please.
Selecting the right material is critical and making sure that it is:
a Applied correctly in accordance with the anticipated production
method
b Cured properly BEFORE testing commences
2 Part Urethanes are excellent but, a major pain and expense in production.
There are single part versions but these tend to be very moisture sensitive
thus have a short shelf-life and "use-by" time when opened (hours not days!)
However, there are even more urethanes (alkyds) that are far more forgiving
in every sense - and consequently highly popular.
So finally here is part of another Sermon according to "St Brian of Cyprus"
:-)
The Problem with Silicone Conformal Coatings...
Silicone coatings are a wee bittie of a con, IMHO (sorry, Dow Corning et
al.!). Their behaviour under humid conditions is roughly 10-20 times worse,
as a rule than other types. Let me expand on this sweeping statement. Single
component silicones usually require the presence of free hydroxyl radicals
to crosslink. That means that they will not cure in a perfectly dry
atmosphere. In this sense, before curing, they are hygroscopic. After
curing, the hygroscopicity is reduced, but they are porous (otherwise, the
trapped humidity would not have escaped). Two component products use other
mechanisms of curing, so are less hygroscopic prior to curing. However, they
are almost equally porous.
Other polymers, such as acrylics, epoxies and polyurethanes use other
mechanisms for curing and are considerably less porous (but they are all
porous).
Many years ago, I cast discs of typical products (the results are reported
in my book), which I used as a diaphragm between a humid and a dry
compartment. The comparison was striking.
However, in the popular imagination, silicones are the nec plus ultra
because the are not wet by water in the liquid phase, without consideration
of its behaviour in the gaseous phase.
So what can happen in worst case conditions? Let's imagine you have a tiny
salt crystal (or any other hygroscopic contaminant) stuck between two
conductors. Without a coating, the scenario is obvious, as soon as the
circuit is put into service in a humid environment. Aha!, you say, that is
why we coat, so that it would stop such a catastrophe. Not so! The zone of
polymer close to the crystal will haves it absorbed humidity sucked into our
salt crystal, drying it out. But, as nature abhors a vacuum, so do polymers
like to strike a humidity equilibrium with the surrounding air, so more
humidity is absorbed and the process continues. But, you may say that a tiny
speck of humidity not bridging conductors is relatively harmless. Again, not
so. As more humidity is absorbed by the crystal, osmotic pressure starts to
rise and will start to lift the coating off the substrate and this process
may continue to form a humid pool between conductors and, WHAM! This process
is called vesication and is more common than you think. It is illustrated
graphically and by photographs in my book. The result is sometimes also
called mealing, not to be confused with measling.
So your coating has only delayed a catastrophe and the delay time with a
silicone coating is only a fraction than with other coating types. One hopes
that cycling temperatures and humidities are such that the catastrophe will
never happen but the best way of assessing a minimum risk is by ensuring
that the minute crystal is never there, in the first place, by a thorough
and effective cleaning before coating. This was the philosophy behind the
long-defunct MIL-P-28809, but is still very valid. There may be some **very
rare** exceptions to the application of this rule, which are too complex to
discuss just now but you are safe in assuming that a proven cleaning quality
is a sine qua non to conformal coating.
Acrylic is better than silicones in this respect and electrically, but not
so good in terms of chemical resistance.
Another little known feature about silicones is that they transmit shock
better than most other materials. If you underfill an IC with a silicone and
the board is subjected to a shock test, the ICs will suffer more than with,
say, an epoxy underfill. This is because silicones are virtually
incompressible at high rates of stress (hence your super-bouncing ball).
Hope this helps (and raises the cat among the pigeons!)
And another:
A 0.2 cents worth: the TCE of silicones are ginormous (e.g. 300-350 ppm/°C)
compared with solder (c. 16 ppm/°C) and I suggest you may be right about
worrying about it. Furthermore, silicones have a unique property that,
however squausshy (thanks, Graham, for the term) they feel under the thumb,
they are rock-hard when subjected to a shock (hence super-bouncer balls and
bouncing putty). The combination could result in a squished silicone at
slightly elevated temperatures which would place a tension on the
BGA-ball-pad combination, which could increase by orders of magnitude should
it be subjected to a small shock at the same time. Any gap in the underfill,
especially if accompanied by flux residues or other hydrophilic contaminant,
could even fill with water under humid conditions of use. I feel vacuum
impregantion would be a must.
A few pages are devoted to silicones in Bartholomew's classic book on
underfilling in the chapter on properties of encapsulants, emphasising the
moisture permeability. He suggests that the TCE problem may be reduced by
silica filling, but that high filling ratios may result in micro-cracking
during high temperature cycling. Otherwise, I don't think he devotes much
space to silicones as underfills, compared with other resin systems.
Hope this helps you all.......
Regards Graham Naisbitt
[log in to unmask] <mailto:[log in to unmask]>
Concoat Limited
Alasan House, Albany Park
Camberley GU16 7PH - UK
www.concoat.co.uk <http://www.concoat.co.uk>
Phone: +44 1276 691100
Fax: +44 1276 691227
Mobile: +44 79 6858 2121
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Brian Ellis
> Sent: 07 March 2002 07:32
> To: [log in to unmask]
> Subject: Re: [TN] Conformal coating: high humidity environment.
>
>
> Jan
>
> The order from good to bad, at temperatures < 40°C, but ONLY, say again,
> ONLY FOR MOISTURE RESISTANCE.
> paraxylylene (Parylene (R) ) 1
> acrylics 2
> epoxy 3
> polyurethane 4
> silicone 5
>
> For mechanical resistance, the order is 3, 1, 4, 2, 5
> For chemical resistance. 1, 3, 5, 4, 2
> For electrical properties (dry conditions) 2, 1, 5, 4, 3
> For ease/cost 2, (3, 4, 5), 1
> Repairability 2, 4, 5, 3, 1
>
> Obviously, these orders may vary somewhat with individual coatings, and
> are just a rough categorisation, but they will give you an idea
> according to which characteristics are most interesting for your
> application. Where there is a choice between single and 2-component
> products, go for solventless 2-component ones for best results, PROVIDED
> you can meter and mix them accurately, otherwise forget them. The reason
> there is such a choice is because there is no single ideal solution and
> you have to compromise somewhere along the line. If you draw up a
> "league table" from the above scores, you will find them all roughly
> equal, certainly within the tolerances between individual products.
>
> FWIW
>
> Brian
>
> Jan Satterfield wrote:
> >
> > Someone asked the questions regarding high humidity and the
> best conformal
> > coating to use and I read 4 different answers: Acrylics, urethanes,
> > paralyene and Silicone. I have always understood that acrylics were the
> > least moisture resistant, paralyene the most moisture resistant and
> > urethanes the most commonly used for moisture resistance on
> CCA's. Anyone
> > care to clarify?
> >
> > -----Original Message-----
> > From: [log in to unmask] [mailto:[log in to unmask]]
> > Sent: Wednesday, March 06, 2002 9:22 AM
> > To: [log in to unmask]
> > Subject: Re: [TN] Conformal coating: high humidity environment.
> >
> > Acrylics tend to have the best performance in high moisture
> environments, as
> > long as the temperatures are not extremely high.
> >
> >
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Date: Thu, 7 Mar 2002 09:41:34 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Subject: Re: Conformal coating: high humidity environment.
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Good Morning All,
I love the concept of parylene - vapor dep. is close to my heart but we =
had
trouble when some cards were handled roughly and scrapped the coating =
off.
They came back from the field very quickly. The solution was to use a
secondary coat with better mechanical properties but the customer =
wasn't
interested in sticking with parylene unfortunately.
Recently, I got a CC manufacturer recommendation to use a double coat -
urethane basecoat and a silicone overcoat. =20
Hans
Integrity First - Service Before Self - Excellence in All We Do
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: Chris Almeras [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 8:28 AM
To: [log in to unmask]
Subject: Re: [TN] Conformal coating: high humidity environment.
I would personally go with a one part urethane. We have coated
assemblies used in an "oceanside" humidity application, and have had
good results from the Humiseal line of urethanes.
Chris Almeras
-----Original Message-----
From: Bissonnette, Jean-Francois [mailto:[log in to unmask]]
Sent: Wednesday, March 06, 2002 9:41 AM
To: [log in to unmask]
Subject: [TN] Conformal coating: high humidity environment.
Hi all,
What type of coating should be used when equipment is to be used in =
high
humidity environment (near sea water)?
Thanks in advance!
Jean-Fran=E7ois Bissonnette
V=E9rificateur, Contr=F4le de la Qualit=E9
=C9lectronique
Produits et Proc=E9d=E9s
Vapor Rail Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 x2021
(514) 335-4231 fax
<<Bissonnette, Jean-Francois.vcf>>=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally privileged
and confidential information intended only for the use of the =
individual
or entity named herein. If the reader of this transmission is not the
intended recipient, you are hereby notified that any dissemination,
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Date: Thu, 7 Mar 2002 17:09:16 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Crash! very slightly OT
MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
Graham Naisbitt posted a message at 16.20 today with the subject Re:
[TN] Conformal Coating. For some reason or other, every time I try to
open this message in Netscape, it crashes the e-mail client Messenger.
This is the only message to do it, so it must be something therein
that's causing it, I think. I've read other messages posted before and
after with no problem.
Has anyone else experienced a problem with this message?
Graham: could you please resend it, just to me and not to TechNet?
Brian
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Date: Thu, 7 Mar 2002 10:29:47 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: NTC this is a question regarding employee involvment
Mime-Version: 1.0
Content-Type: multipart/mixed; boundary="=_C29F7484.6A0B6693"
This is a MIME message. If you are reading this text, you may want to
consider changing to a mail reader or gateway that understands how to
properly handle MIME multipart messages.
--=_C29F7484.6A0B6693
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: quoted-printable
Content-Disposition: inline
If you have no opinion or want to get in a discussion regarding this topic =
please delete this message....=20
I publish a company newsletter each month. Each month I try to add an =
article in this paper regarding principles. Most of the principles are =
written to help inspire Leadership, commitment, etc. The goal of the =
article is to help educate fellow employees and hopefully get some of them =
involved. I firmly feel that a involved, caring work force produces more, =
faster, and correctly. =20
This month's topic is Employee involvement. Do or have any of you been =
involved with any programs within this topic range? Any opinions on what =
are the better methods or results of involvement? Let me know. I hope to =
publish the paper for the month soon and would like to explore possible =
actual programs like this. =20
A couple of weeks a go a forum was suggested for Managers, well here I am. =
You know one of those upper managers who enjoys being in technet to =
learn and share if possible. I really hope you will let me know your =
opinion. =20
Kathy=20
--=_C29F7484.6A0B6693
Content-Type: text/plain
Content-Disposition: attachment; filename="TEXT.htm"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=Content-Type content="text/html; charset=iso-8859-1">
<META content="MSHTML 6.00.2713.1100" name=GENERATOR></HEAD>
<BODY style="MARGIN-TOP: 2px; FONT: 10pt MS Sans Serif; MARGIN-LEFT: 2px">
<DIV>If you have no opinion or want to get in a discussion regarding this topic
please delete this message.... </DIV>
<DIV> </DIV>
<DIV>I publish a company newsletter each month. Each month I try to add an
article in this paper regarding principles. Most of the principles are
written to help inspire Leadership, commitment, etc. The goal of the
article is to help educate fellow employees and hopefully get some of them
involved. I firmly feel that a involved, caring work force produces more,
faster, and correctly. </DIV>
<DIV> </DIV>
<DIV>This month's topic is Employee involvement. Do or have any of you
been involved with any programs within this topic range? Any opinions on
what are the better methods or results of involvement? Let me know.
I hope to publish the paper for the month soon and would like to explore
possible actual programs like this. </DIV>
<DIV> </DIV>
<DIV>A couple of weeks a go a forum was suggested for Managers, well here I
am. You know one of those upper managers who enjoys being in
technet to learn and share if possible. I really hope you will let
me know your opinion. </DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
--=_C29F7484.6A0B6693--
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Date: Thu, 7 Mar 2002 17:47:46 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"d. terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: Flattening a board during assembly
MIME-Version: 1.0 (Generated by NET-TEL Mailguard SMTP version 4.0.0.22)
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: quoted-printable
Hi Technetters,
We've got a batch of boards here that's really twisted (about 1.5 % when =
measured according to IPC-TM-650) due to imbalanced design. The customers =
is not willing to change the design, and we discussed with them the =
possibility of using a carrier-frame for flattening these boards while =
they are processed through our SMT-line.
My worry is that this results in unacceptable stress in the solder joints =
as soon as the board is released from the carrier. Fortunately there's no =
BGA on this board, but it does have a small QFP and some 40 mm long =
SMT-connectors. It's supposed to be a high-reliability military product.
Does anyone have any data on the effects of such internal stresses ? =20
Also other comments are welcome.
Best regards.
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
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Date: Thu, 7 Mar 2002 10:00:27 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Beerman, Dennis" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Beerman, Dennis" <[log in to unmask]>
Subject: Re: NTC this is a question regarding employee involvment
X-To: Kathy Kuhlow <[log in to unmask]>
One of my main issues with employee involvement is when management solicits
employees opinions on an issue and then ignore those suggestions.
Communication and Action (by management) are key to employee involvement.
-----Original Message-----
From: Kathy Kuhlow [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 11:30 AM
To: [log in to unmask]
Subject: [TN] NTC this is a question regarding employee involvment
If you have no opinion or want to get in a discussion regarding this topic
please delete this message....
I publish a company newsletter each month. Each month I try to add an
article in this paper regarding principles. Most of the principles are
written to help inspire Leadership, commitment, etc. The goal of the
article is to help educate fellow employees and hopefully get some of them
involved. I firmly feel that a involved, caring work force produces more,
faster, and correctly.
This month's topic is Employee involvement. Do or have any of you been
involved with any programs within this topic range? Any opinions on what
are the better methods or results of involvement? Let me know. I hope to
publish the paper for the month soon and would like to explore possible
actual programs like this.
A couple of weeks a go a forum was suggested for Managers, well here I am.
You know one of those upper managers who enjoys being in technet to learn
and share if possible. I really hope you will let me know your opinion.
Kathy
---------------------------------------------------------------------------------
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=========================================================================
Date: Thu, 7 Mar 2002 12:24:44 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: NTC this is a question regarding employee involvment
X-To: Kathy Kuhlow <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
You know I have one. I'll happily provide my story, fact, not opinion when I
end my contract here tomorrow. The employees, for the most part are great
but could be better but for really bad management born out of greed and lack
of concern for their employees, suppliers, or customers. They want only to
sell out and make money at any risk.
If interested in a simple, non-opinionated story like this, let me know. If
you don't, simply don't reply.
Enjoy Kathy,
MoonMan
----- Original Message -----
From: "Kathy Kuhlow" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 07, 2002 11:29 AM
Subject: [TN] NTC this is a question regarding employee involvment
If you have no opinion or want to get in a discussion regarding this topic
please delete this message....
I publish a company newsletter each month. Each month I try to add an
article in this paper regarding principles. Most of the principles are
written to help inspire Leadership, commitment, etc. The goal of the
article is to help educate fellow employees and hopefully get some of them
involved. I firmly feel that a involved, caring work force produces more,
faster, and correctly.
This month's topic is Employee involvement. Do or have any of you been
involved with any programs within this topic range? Any opinions on what
are the better methods or results of involvement? Let me know. I hope to
publish the paper for the month soon and would like to explore possible
actual programs like this.
A couple of weeks a go a forum was suggested for Managers, well here I am.
You know one of those upper managers who enjoys being in technet to learn
and share if possible. I really hope you will let me know your opinion.
Kathy
---------------------------------------------------------------------------------
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=========================================================================
Date: Thu, 7 Mar 2002 09:40:27 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Patel <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Patel <[log in to unmask]>
Organization: interWAVE Communications, Inc.
Subject: Fab Process question related to ENIG
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
At what stage the electroless nickel and immersion gold process is
applied, is it after the solder mask application or before? I believe
normally it is after the solder mask application but I want to verify
it. I have heard that chemistry involved is very nasty if left on the
board. If I plug or mask via holes from one side, I want to make sure
that there is no residue left of that nasty chemistry. Can it be cleaned
if mask from one end? Any comments?
re,
Ken Patel
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Date: Thu, 7 Mar 2002 12:01:41 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ted Edwards <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ted Edwards <[log in to unmask]>
Subject: Re: NTC this is a question regarding employee involvment
X-To: Kathy Kuhlow <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
In my opinion; employee involvement is a very powerful tool. I started
being involved with the concept in the 80's when I was a plant manager of a
printed circuit fabrication operation and consultant named Bill Van Horn
helped us initiate it in the form of Quality Circles.
The bottom line is nobody knows their job better than the operator and
nobody can reduce variation or improve the process better than they can.
Both the employer and the operator benefit because it shows each the value
of the person and teamwork; and it exposes tribal knowledge which in many
cases is how the work is actually performed not how some engineer wrote the
procedure. And before everyone jumps on that, yes I am an engineer and
before I got involved I wrote some of the best methods I though ever
existed. It is a humbling thing to realize that no matter what you wrote;
the operator really does know how to do their job better than you the
engineer or you the manager.
In the 90's I supported another operation that used employee involvement and
the value of teaming and operator involvement helped us improve consistency
and raise the yields on some pretty challenging boards with four active
planes of Copper Invar Copper in them. I think what works best is an
approached where teaming, training, and chartering is done in a group
setting involving operator, support personnel, and management together where
each person gets to see the tasks from the others perspective.
Once you buy in to the concept you get to the key words, document what you
do and do what you document, and both the company and the employee benefit.
Opinion Submitted by Ted Edwards
--- Original Message -----
From: "Kathy Kuhlow" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 07, 2002 9:29 AM
Subject: [TN] NTC this is a question regarding employee involvment
If you have no opinion or want to get in a discussion regarding this topic
please delete this message....
I publish a company newsletter each month. Each month I try to add an
article in this paper regarding principles. Most of the principles are
written to help inspire Leadership, commitment, etc. The goal of the
article is to help educate fellow employees and hopefully get some of them
involved. I firmly feel that a involved, caring work force produces more,
faster, and correctly.
This month's topic is Employee involvement. Do or have any of you been
involved with any programs within this topic range? Any opinions on what
are the better methods or results of involvement? Let me know. I hope to
publish the paper for the month soon and would like to explore possible
actual programs like this.
A couple of weeks a go a forum was suggested for Managers, well here I am.
You know one of those upper managers who enjoys being in technet to learn
and share if possible. I really hope you will let me know your opinion.
Kathy
---------------------------------------------------------------------------------
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---------------------------------------------------------------------------------
=========================================================================
Date: Thu, 7 Mar 2002 12:57:58 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Carlile <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Carlile <[log in to unmask]>
Subject: Tantalum Capacitor Failure
I am wondering if anybody has had similiar issues or can help resolve
a failure we are experiencing. On about 4% of our units at first time
power up 1 of two capacitors that are in parallel are burning up. Upon
replacement the capacitor it to will work fine.
The cap we are using is Vishay Sprague 594D336X9035R2. Since the other
capacitor in parallel is unaffected, I am assuming that it is a Vishay
issue.
Per Vishay:
The root cause of failure could not be identified. It is requested that the
failure circumstances be reviewed. Failures can occur due to thermal stress
during board mounting, strenuous application conditions, or because of
reduced capacitor capability. There was no specific evidence of reduced
capacitor capability identified. Please be aware, the thermal profile used
for board mounting, and the application conditions (even transient
conditions such as may occur with unregulated power supplies) can affect
product performance.
Has anyone else experienced a similiar failure or have an opinion? I wish I
could pre-test the caps prior to them burning to supply an intact
capacitor to Vishay for their analysis.
Please note: When allowed to play its course the cap turned red hot,
unsoldered itself from the PCB and burned a whole in the lab bench!
---------------------------------------------------------------------------------
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=========================================================================
Date: Thu, 7 Mar 2002 14:22:38 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Louis, Edwin @ CSE" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Louis, Edwin @ CSE" <[log in to unmask]>
Subject: IPC-4552
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Could someone send me a preliminary copy of IPC-4552 the ENIG specification?
---------------------------------------------------------------------------------
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=========================================================================
Date: Thu, 7 Mar 2002 13:38:25 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Gene Felder <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Gene Felder <[log in to unmask]>
Subject: Re: Is this for real?
ANSI/ESD S20.20 covers items susceptible to damage by electrostatic
discharges greater than or equal to 100 volts Human Body Model (HBM).
Wireless wrist straps do not reliably remove charges to less than 500
volts.
Here's information from a company selling wireless wrist straps:
"In effect, the wireless wrist strap slowly neutralizes static electricity
on a human body and maintains the potential of a human body below 500V,
which is a great improvement from 3 to 5 kV measured without the wrist
strap.
The wireless wrist strap is not intended to replace conventional wrist
straps. However, a wireless wrist strap, supplied with an additional coil
cord for direct grounding, not only replaces conventional wrist straps, but
provides additional protection when a person using it has to move away from
the hard wired grounding point, (which is often a case in the electronics
assembly, kiting, stock room, inspection, service or development working
environments).
Source: http://www.bomir.com/online/zerocharge/ground/wireless.htm
Practical Points, Benefits and Precautions:
* Please, do not touch electronics components immediately after installing
the wireless wrist strap on your wrist. Allow minimum 60 seconds for the
wrist strap to neutralize high levels of static electricity already
existing on your body.
* Do not use wireless wrist straps as your primary grounding device (unless
it is a 2 in 1, Model AML-301A and is used with the grounding cord)."
Source: www.bomir.com/online/zerocharge/ground/wireless.htm
See http://www.esdjournal.com/techpapr/sfowler/wireless.htm
Evaluation of Wireless Wrist Straps
by: ESD Journal Lab
We have been asked many times over the past few years about the viability
of wireless wrist straps. The following is our evaluation of one wireless
wrist strap.
We used a wireless wrist strap that is advertises :
"It operates using a combination of several physics phenomena like "Ion
Neutralization,
Skin Effect, Point Discharge and Corona Discharge Effect" combined with the
principle of differential potential to collect and dissipate static
electricity.
It is a combination of bio-industrial and electronic technologies.
In effect, the wireless wrist strap neutralizes over 80% of the static
electricity on a human body and maintains the potential of a human body
below 150V which is low enough to protect electronic components."
The following is a summary of our evaluation of the strap:
The wrist strap came with a conventional cord for use at the workbench.
However, it is claimed to neutralize the static on a person without the
cord attached "after 15 seconds."
* Our tests showed that the wrist strap when connected by it cord had a
resistance from the wearer's hand to ground of 1.3 MegOhms.
* Our technician wore insulative shoes (> 10,000 MegOhms) and walked on an
insulative floor.
* We charged the technician to 2,000 volts.
* When and he walked around with the uncorded wrist strap on, we saw a
decay of the static charge to about 1,000 Volts in 90 seconds.
* When and he walked around without the wrist strap, we saw a decay of the
static charge to about 1,000 Volts in 90 seconds.
* There was no difference in the time to decay to 1,000 with or without the
wrist strap in place.
* With the wrist strap on the walking technician, his potential never went
below 700 volts for over 3 minutes.
We dissected the wrist strap to see what inside would account for the
claimed neutralization. We found only a 1 MegOhm resistor. This supports
our findings that the wireless wrist strap no method for neutralizing a
person not connected to ground by a conventional cord.
It is our opinion that no currently available methods or devices exist
which will effectively ground a person without a tethered cord to ground or
at least a large capacitance.
Sorry! Something that sounds too good to be true probably is.
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=========================================================================
Date: Thu, 7 Mar 2002 14:55:51 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Phil Nutting <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Nutting <[log in to unmask]>
Subject: Re: Tantalum Capacitor Failure
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Ken,
We have seen a similar thing happen with some thru-hole tantalums when =
they went through the wave solder machine. I haven't heard of a recent =
problem with these. We never implemented a fix, it seemed the problem =
went away... or maybe we haven't made any of those boards in the recent =
past.
Phil=20
-----Original Message-----
From: Ken Carlile [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 1:58 PM
To: [log in to unmask]
Subject: [TN] Tantalum Capacitor Failure
I am wondering if anybody has had similiar issues or can help resolve
a failure we are experiencing. On about 4% of our units at first time
power up 1 of two capacitors that are in parallel are burning up. Upon
replacement the capacitor it to will work fine.
The cap we are using is Vishay Sprague 594D336X9035R2. Since the other
capacitor in parallel is unaffected, I am assuming that it is a Vishay
issue.
Per Vishay:
The root cause of failure could not be identified. It is requested that =
the
failure circumstances be reviewed. Failures can occur due to thermal =
stress
during board mounting, strenuous application conditions, or because of
reduced capacitor capability. There was no specific evidence of reduced
capacitor capability identified. Please be aware, the thermal profile =
used
for board mounting, and the application conditions (even transient
conditions such as may occur with unregulated power supplies) can affect
product performance.
Has anyone else experienced a similiar failure or have an opinion? I =
wish I
could pre-test the caps prior to them burning to supply an intact
capacitor to Vishay for their analysis.
Please note: When allowed to play its course the cap turned red hot,
unsoldered itself from the PCB and burned a whole in the lab bench!
-------------------------------------------------------------------------=
--------
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in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt delivery of Technet send e-mail to [log in to unmask]: =
SET Technet NOMAIL
To receive ONE mailing per day of all the posts: send e-mail to =
[log in to unmask]: SET Technet Digest
Search previous postings at: www.ipc.org > On-Line Resources & Databases =
> E-mail Archives
Please visit IPC web site http://www.ipc.org/html/forum.htm for =
additional
information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 =
ext.5315
-------------------------------------------------------------------------=
--------
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Date: Thu, 7 Mar 2002 12:00:02 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Crepeau, Phil" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crepeau, Phil" <[log in to unmask]>
Subject: Re: Flattening a board during assembly
X-To: [log in to unmask]
MIME-Version: 1.0
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hi,
it seems to me that you need to have the customer sign a letter stating that they accept all responsibility for issues related to the reliability of this assembly. if they do that, then party on. if they don't do that, you should refuse this work.
phil
-----Original Message-----
From: d. terstegge [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 8:48 AM
To: [log in to unmask]
Subject: [TN] Flattening a board during assembly
Hi Technetters,
We've got a batch of boards here that's really twisted (about 1.5 % when measured according to IPC-TM-650) due to imbalanced design. The customers is not willing to change the design, and we discussed with them the possibility of using a carrier-frame for flattening these boards while they are processed through our SMT-line.
My worry is that this results in unacceptable stress in the solder joints as soon as the board is released from the carrier. Fortunately there's no BGA on this board, but it does have a small QFP and some 40 mm long SMT-connectors. It's supposed to be a high-reliability military product.
Does anyone have any data on the effects of such internal stresses ?
Also other comments are welcome.
Best regards.
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
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Date: Thu, 7 Mar 2002 12:12:04 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
John Maxwell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: John Maxwell <[log in to unmask]>
Subject: Re: Tantalum Capacitor Failure
X-To: Ken Carlile <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
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Ken,
As a side note, tantalum is like most other valve metals and burns when
localized heating gets too high. There is plenty of oxygen (Ta2O5) in the
dielectric and extra provided by the manganese dioxide cathode (MnO2) so
once failure starts the part consumes itself. Unfortunately one looses the
evidence. Over voltage, unrestricted voltage ramp up (that's why vendors
recommend a series resistor), reflow profile especially if the part has a
polymer cathode or if there is too rapid a cool down after reflow and of
course weak parts all are on the list for potential root cause. I suggest
getting their recommended application notes along with those from Kemet and
AVX and see if thermal or electrical conditions are outside manufacturers
recommendations. That analysis should get you down the trail of determining
what is happening.
John Maxwell
At 12:57 PM 3/7/02 -0600, you wrote:
>I am wondering if anybody has had similiar issues or can help resolve
>a failure we are experiencing. On about 4% of our units at first time
>power up 1 of two capacitors that are in parallel are burning up. Upon
>replacement the capacitor it to will work fine.
>The cap we are using is Vishay Sprague 594D336X9035R2. Since the other
>capacitor in parallel is unaffected, I am assuming that it is a Vishay
>issue.
>
>Per Vishay:
>The root cause of failure could not be identified. It is requested that the
>failure circumstances be reviewed. Failures can occur due to thermal stress
>during board mounting, strenuous application conditions, or because of
>reduced capacitor capability. There was no specific evidence of reduced
>capacitor capability identified. Please be aware, the thermal profile used
>for board mounting, and the application conditions (even transient
>conditions such as may occur with unregulated power supplies) can affect
>product performance.
>
>Has anyone else experienced a similiar failure or have an opinion? I wish I
>could pre-test the caps prior to them burning to supply an intact
>capacitor to Vishay for their analysis.
>
>Please note: When allowed to play its course the cap turned red hot,
>unsoldered itself from the PCB and burned a whole in the lab bench!
>
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Date: Thu, 7 Mar 2002 12:38:44 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Keel, Mike" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Keel, Mike" <[log in to unmask]>
Subject: Re: NTC this is a question regarding employee involvment
X-To: Kathy Kuhlow <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
What a co-in-key-dink . . .
the following came off the www today
Before you laugh ( this is HEALTHY )
And dismiss . . .
Please read thru to the end
'Up-Titling' Keeps Workers Poor but Happy [NL]Thu Mar 7, 8:49 AM ET
[PARA]LONDON (Reuters) - British workers are being given bigger job titles
rather than bigger salaries as cash-strapped companies try to keep employees
happy, according to a survey published on Thursday. [PARA]
Examples of the phenomenon dubbed "up-titling" include a receptionist
rebranded as "Head of Verbal Telecommunications" and a window cleaner given
the impressive designation of "Optical Illuminator Enhancer." [PARA]"The
research demonstrates how motivational it can be to gain a prestigious job
title. At parties...swapping elaborate job titles breaks the ice," said Paul
Rapacioli, director of employment agency Reed's Internet service, which
carried out the survey. [PARA]He said companies were using the fancy titles
as an incentive to retain staff rather than pay them more at a time of
economic uncertainty. [PARA]Businesses seeking "Stock Replenishment
Executives" were actually looking for shelf stackers and successful
candidates for a post as "Technical Sanitation Assistant" would find
themselves cleaning washrooms. [PARA]"Up-titling" seems to have won
converts. Of the 1,700 workers Reed surveyed, around half thought a better
job title would make them happier even if there was no change in what they
actually did. [PARA]"People view a grander title as recognition of their
contribution to the organization and feel more committed as a result,"
Rapacioli said.
This probably doesn't have any relevance
To anyone @ tech-net
Present company always excepted . . .
Best Regards to All
M Keel
= = = EMPERIOR OF SPACE = = =
-----Original Message-----
From: Kathy Kuhlow [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 4:30 PM
To: [log in to unmask]
Subject: [TN] NTC this is a question regarding employee involvment
<< File: TEXT.htm >> If you have no opinion or want to get in a discussion
regarding this topic please delete this message....
I publish a company newsletter each month. Each month I try to add an
article in this paper regarding principles. Most of the principles are
written to help inspire Leadership, commitment, etc. The goal of the
article is to help educate fellow employees and hopefully get some of them
involved. I firmly feel that a involved, caring work force produces more,
faster, and correctly.
This month's topic is Employee involvement. Do or have any of you been
involved with any programs within this topic range? Any opinions on what
are the better methods or results of involvement? Let me know. I hope to
publish the paper for the month soon and would like to explore possible
actual programs like this.
A couple of weeks a go a forum was suggested for Managers, well here I am.
You know one of those upper managers who enjoys being in technet to learn
and share if possible. I really hope you will let me know your opinion.
Kathy
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Date: Thu, 7 Mar 2002 16:06:53 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: CIC... ONCE AGAIN
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Remember all of those e-mails back in November regarding MLBs with CIC
layers? Well, it's time again... We went ahead and designed a CIC board,
mainly because our present board house said "no problem, we do it all the
time". Well, he fell on his face and now, 3 months after placing the order,
he can't deliver. Obviously, he has little, if any, experience with CIC.
His problem is "...inserting the invar material into the copper tanks kills
the solution and provide no plating". He is suggesting gold plating the
vias first, then copper plating. Has anyone ever heard of this before? Is
this a viable solution? Anyway, we're now looking for a new board supplier
who HAS experience with CIC. Any recommendations? This is a prototype run
of 5 boards only.
Thanks again for all your help,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
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Date: Thu, 7 Mar 2002 15:18:53 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: VERY IMPORTANT QUESTION CONCERNING CLEANING TEST PINS
Ok you folks, especially Doug and Brian,
You let this gentleman down and me as well. So much for my appeal but the
question is:
Techneters,
I would like to know if some of you have a suggested procedure for cleaning
of pins for In Circuit Testing, and if is possible to use a solvent, and
what kind of.
Is it possible that flux residues can go into spring machinery? If that
true, how can I clean them of flux residues and how often I must do it?
Regards,
Mario,
I answered knowing you all would come through:
I'm definitely not a cleaning or cleanliness expert. Doug Pauls and Big
Brian Ellis, who contribute greatly to the forum is/are.
I only know flux chemistries are varied. What it takes to clean or
neutralize one, is not right for another.
This is a big issue faced everyday by so many throughout industry, I'm
surprised more people aren't asking your vital qestion.
I would post again or contact someone more qualified as Doug Pauls
([log in to unmask]) and/or Brian Ellis ([log in to unmask]).
I too would be very interested in the chemistry, though it must be
"compatible" and capable of cleaning the indicated flux/chemistry in some
sort of optimized process whether batch or other.
Best regards,
Earl
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Date: Thu, 7 Mar 2002 15:24:46 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: CIC... ONCE AGAIN
X-To: [log in to unmask]
Jim,
How much BS is there in the world.
As I said way back when:
CIC, once drilled as part of the MLB structure, oxidizes almost immediately.
Your HIGHLY QUALIFIED board shop must use a 20% HCL solution, followed by an
immediate rinse without exposing hole walls to air. Then, the electroless,
followed by electroplating process must be well managed and exercised. THATS
THAT. I've built thousands of these things and have posted this many times
before.
BEST OF LUCK
EARL MOON
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Date: Thu, 7 Mar 2002 13:41:42 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: Re: NTC this is a question regarding employee involvment
X-To: Kathy Kuhlow <[log in to unmask]>
MIME-version: 1.0
Content-type: text/plain; charset=iso-8859-1
Content-transfer-encoding: 7BIT
Kathy,
This is a subject that is near and dear to me. The best ECO's I have ever
seen came from the production floor. Here are some ways I have increased
employee involvement.
Provide employees with the means to affect change, in my case we supply
blank ECO's and support filling them out.
Never reject any suggestion without serious consideration and always provide
a justification when a suggestion is rejected. Discussion of even the most
absurd idea can often lead to a good practical solution to a problem, just
ask the guys in R&D.
Implement changes as rapidly as possible. This lets people know you value
their input and are not only willing but eager to make changes based on
their input.
I hope you find some value in these suggestions,
Dan
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Date: Thu, 7 Mar 2002 17:20:31 -0500
Reply-To: "[log in to unmask]" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Lou Hart <[log in to unmask]>
Organization: Compunetix, Inc.
Subject: Care of Metcal tips
TechNetters, I've noted with interest the discussion of Metcal and other
soldering irons over the past few days. A question has come up here about
care of Metcal tips. We've gone to some lengths to eliminate RMA flux from
the plant. However, Metcal recommends tinning tips with RMA-flux wire
solder. We would like to use no-clean flux to tin tips. How risky would
such a practice be? Any comments would be greatly appreciated. I called
Metcal for advice and found the people I talked with to be very pleasant
and eager to help. But no data were available, and, frankly, the people
sounded very youthful. Lou Hart
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Date: Thu, 7 Mar 2002 15:00:00 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Crepeau, Phil" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crepeau, Phil" <[log in to unmask]>
Subject: Re: CIC... ONCE AGAIN
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
time for thermount.
-----Original Message-----
From: Marsico, James [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 1:07 PM
To: [log in to unmask]
Subject: [TN] CIC... ONCE AGAIN
Remember all of those e-mails back in November regarding MLBs with CIC
layers? Well, it's time again... We went ahead and designed a CIC board,
mainly because our present board house said "no problem, we do it all the
time". Well, he fell on his face and now, 3 months after placing the order,
he can't deliver. Obviously, he has little, if any, experience with CIC.
His problem is "...inserting the invar material into the copper tanks kills
the solution and provide no plating". He is suggesting gold plating the
vias first, then copper plating. Has anyone ever heard of this before? Is
this a viable solution? Anyway, we're now looking for a new board supplier
who HAS experience with CIC. Any recommendations? This is a prototype run
of 5 boards only.
Thanks again for all your help,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
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Date: Thu, 7 Mar 2002 18:06:07 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Care of Metcal tips
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_107.e1f32c2.29b94c5f_boundary"
--part1_107.e1f32c2.29b94c5f_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
Hi Lou!
No Clean flux is actually the worse flux to use when you're talking tip life.
Go to:
http://www.metcal.com/tips/1.3.2.htm
There's so little solids (it's mostly alcohol) that it flashes off the tip
and doesn't protect the tip the same way a RMA does from oxidation. I think
you'll find that you will go through more tips soldering with no clean fluxes
than you do with any other flux type.
-Steve Gregory-
> TechNetters, I've noted with interest the discussion of Metcal and other
> soldering irons over the past few days. A question has come up here about
> care of Metcal tips. We've gone to some lengths to eliminate RMA flux from
> the plant. However, Metcal recommends tinning tips with RMA-flux wire
> solder. We would like to use no-clean flux to tin tips. How risky would
> such a practice be? Any comments would be greatly appreciated. I called
> Metcal for advice and found the people I talked with to be very pleasant
> and eager to help. But no data were available, and, frankly, the people
> sounded very youthful. Lou Hart
>
>
>
>
>
>
> ---------------------------------------------------------------------------------
> Technet Mail List provided as a free service by IPC using LISTSERV 1.8d
> To unsubscribe, send a message to [log in to unmask] with following text in
> the BODY (NOT the subject field): SIGNOFF Technet
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> SET Technet NOMAIL
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> [log in to unmask]: SET Technet Digest
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> E-mail Archives
> Please visit IPC web site http://www.ipc.org/html/forum.htm for additional
> information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700
> ext.5315
>
--part1_107.e1f32c2.29b94c5f_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Lou!
<BR>
<BR>No Clean flux is actually the worse flux to use when you're talking tip life. Go to:
<BR>
<BR>http://www.metcal.com/tips/1.3.2.htm
<BR>
<BR>There's so little solids (it's mostly alcohol) that it flashes off the tip and doesn't protect the tip the same way a RMA does from oxidation. I think you'll find that you will go through more tips soldering with no clean fluxes than you do with any other flux type.
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">TechNetters, I've noted with interest the discussion of Metcal and other
<BR>soldering irons over the past few days. A question has come up here about
<BR>care of Metcal tips. We've gone to some lengths to eliminate RMA flux from
<BR>the plant. However, Metcal recommends tinning tips with RMA-flux wire
<BR>solder. We would like to use no-clean flux to tin tips. How risky would
<BR>such a practice be? Any comments would be greatly appreciated. I called
<BR>Metcal for advice and found the people I talked with to be very pleasant
<BR>and eager to help. But no data were available, and, frankly, the people
<BR>sounded very youthful. Lou Hart
<BR>
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Date: Thu, 7 Mar 2002 18:07:29 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: CIC... ONCE AGAIN
MIME-Version: 1.0
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Or Stablcor...
-Steve Gregory-
> time for thermount.
>
> -----Original Message-----
> From: Marsico, James [mailto:[log in to unmask]]
> Sent: Thursday, March 07, 2002 1:07 PM
> To: [log in to unmask]
> Subject: [TN] CIC... ONCE AGAIN
>
>
> Remember all of those e-mails back in November regarding MLBs with CIC
> layers? Well, it's time again... We went ahead and designed a CIC board,
> mainly because our present board house said "no problem, we do it all the
> time". Well, he fell on his face and now, 3 months after placing the order,
> he can't deliver. Obviously, he has little, if any, experience with CIC.
> His problem is "...inserting the invar material into the copper tanks kills
> the solution and provide no plating". He is suggesting gold plating the
> vias first, then copper plating. Has anyone ever heard of this before? Is
> this a viable solution? Anyway, we're now looking for a new board supplier
> who HAS experience with CIC. Any recommendations? This is a prototype run
> of 5 boards only.
>
> Thanks again for all your help,
>
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
--part1_62.1c06dec6.29b94cb1_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Or Stablcor...
<BR>
<BR>-Steve Gregory-
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">time for thermount.
<BR>
<BR>-----Original Message-----
<BR>From: Marsico, James [mailto:[log in to unmask]]
<BR>Sent: Thursday, March 07, 2002 1:07 PM
<BR>To: [log in to unmask]
<BR>Subject: [TN] CIC... ONCE AGAIN
<BR>
<BR>
<BR>Remember all of those e-mails back in November regarding MLBs with CIC
<BR>layers? Well, it's time again... We went ahead and designed a CIC board,
<BR>mainly because our present board house said "no problem, we do it all the
<BR>time". Well, he fell on his face and now, 3 months after placing the order,
<BR>he can't deliver. Obviously, he has little, if any, experience with CIC.
<BR>His problem is "...inserting the invar material into the copper tanks kills
<BR>the solution and provide no plating". He is suggesting gold plating the
<BR>vias first, then copper plating. Has anyone ever heard of this before? Is
<BR>this a viable solution? Anyway, we're now looking for a new board supplier
<BR>who HAS experience with CIC. Any recommendations? This is a prototype run
<BR>of 5 boards only.
<BR>
<BR>Thanks again for all your help,
<BR>
<BR>Jim Marsico
<BR>Senior Engineer
<BR>Production Engineering
<BR>EDO Electronics Systems Group
<BR>[log in to unmask] <mailto:[log in to unmask]>
<BR>631-595-5879
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Date: Thu, 7 Mar 2002 17:06:42 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: CIC... ONCE AGAIN
X-To: [log in to unmask]
With all due respect Phil,
This is a question about process management and qualified suppliers. Kevlar
and all the rest are great, but without proven supplier capabilities, as a
function of efficient, effective process management, it doesn't matter
you're still going to react to results as defect. It's too simple.
Suppliers, no matter the technology, must be carefully evaluated and
qualified. While Jim has this particular problem, it simply means BS has
attacked again. Show me the beef or another valuable period WAISTED.
Can't live with that, can you,
MoonMan
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Date: Thu, 7 Mar 2002 15:16:13 -0800
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jim Axton <[log in to unmask]>
Subject: Re: VERY IMPORTANT QUESTION CONCERNING CLEANING TEST PINS
X-To: Earl Moon <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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Techies,
We should get some input from the test pins manufacturers...
But, I'll share my experiences until we hear from them.
In any test application using spring loaded test pins, my
best experience was using a stiff nylon brush and a vacuum
with ESD capabilities....
We have universal grid testers for bare boards. The large
test grids on .100", 080", or .050" get filthy with tin/lead,
gold slivers, bits of copper, and routing dust. Our requirements
are to remove the test fixtures, brush the grid (.062" dia.
waffle head pins) with the nylon brush, while vacuuming. Never
use shop air... first of all, it's not perfectly clean or dry.
Secondly, the forced air drives the dust and contamination further
into the grid and electronics.
On our wired fixtures for MDA/In-cirucit regardless of the flux
used... same procedure.... stay away from brass brushes, they are
hard on the gold finish with is very minimal (just a few microns)
and the brass strands are very conductive. Cleaning the test pins
with any type of cleaner is difficult. If the cleaner (solvent) gets
into the barrel it will induce rust or contamination. Even if you
take the test pins out of the receptacles, use an ultrasonic tank
(for rings,etc) with a mild cleaner. It's damn near impossible to
completely remove 100% of the moisture...(even with baking) Within
a few hundred test cycles you'll start seeing higher resistance levels...
then premature spring failures... Just brush and vacuum on a very
frequent basis.. Unfortunately, I've been there, bought the t-shirt,
and have the scars to prove it.
Jim Axton, Corp. Director of Test, DDI
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Earl Moon
Sent: Thursday, March 07, 2002 1:19 PM
To: [log in to unmask]
Subject: [TN] VERY IMPORTANT QUESTION CONCERNING CLEANING TEST PINS
Ok you folks, especially Doug and Brian,
You let this gentleman down and me as well. So much for my appeal but the
question is:
Techneters,
I would like to know if some of you have a suggested procedure for cleaning
of pins for In Circuit Testing, and if is possible to use a solvent, and
what kind of.
Is it possible that flux residues can go into spring machinery? If that
true, how can I clean them of flux residues and how often I must do it?
Regards,
Mario,
I answered knowing you all would come through:
I'm definitely not a cleaning or cleanliness expert. Doug Pauls and Big
Brian Ellis, who contribute greatly to the forum is/are.
I only know flux chemistries are varied. What it takes to clean or
neutralize one, is not right for another.
This is a big issue faced everyday by so many throughout industry, I'm
surprised more people aren't asking your vital qestion.
I would post again or contact someone more qualified as Doug Pauls
([log in to unmask]) and/or Brian Ellis ([log in to unmask]).
I too would be very interested in the chemistry, though it must be
"compatible" and capable of cleaning the indicated flux/chemistry in some
sort of optimized process whether batch or other.
Best regards,
Earl
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Date: Thu, 7 Mar 2002 18:15:14 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: CIC... ONCE AGAIN
MIME-Version: 1.0
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Hello Jim,
I can and do build CIC PWBs. Let me know if you would like me to access and
quote.
Boston Brad
781 858 0783
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Date: Thu, 7 Mar 2002 17:20:09 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: BGA Soldersphere Attach - low tech method Inquiry
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Hi TechNet Land! I have had one too many Diet Cokes today and thus my
brains have quit functioning (both braincells at once) - therefore I pose
the following question to ya'all:
I distinctly remember a company called "Raychem" which used to sell a
solderball area "preform" which you could use to re-bump a BGA component
after you removed it off an assembly. The "preform" used a water soluble
material which could be removed in a water cleaning system after reflowing
the solderspheres onto the BGA. I went looking on the web and can't find a
"Raychem preform" group (I found lots of Raychem but not the one I
remember). Have I had too much Diet Coke? Does anyone remember these guys?
Or have they closed up shop?
As always, thank in advance!
Dave Hillman
Rockwell Collins
[log in to unmask]
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Date: Thu, 7 Mar 2002 17:28:41 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: VERY IMPORTANT QUESTION CONCERNING CLEANING TEST PINS
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Hi Earl! Doug went home for the day but I sure he'll chime in tomorrow
(right after his first Mtn. Dew)! We have looked at this issue at Collins
as we slowly move into using reduced clean/no-clean solder practices. One
method which does work is to use a brush and an appropriate solvent to
"scrub" the test points of your test fixture. The type of flux residue you
are dealing with will determine the type of solvent and the "robustness" of
your test pin will determine the stiffness of the brush bristles/amount of
pressure you can use without damaging the test pins. This methodology would
not be appropriate for a high volume operation but if you are in a high
mix/low volume assembly mode it can be setup as a preventative maintenance
operation. Not rocket science but effective. Good Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
Earl Moon <[log in to unmask]>@ipc.org> on 03/07/2002 03:18:53 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Earl Moon <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: [TN] VERY IMPORTANT QUESTION CONCERNING CLEANING TEST PINS
Ok you folks, especially Doug and Brian,
You let this gentleman down and me as well. So much for my appeal but the
question is:
Techneters,
I would like to know if some of you have a suggested procedure for cleaning
of pins for In Circuit Testing, and if is possible to use a solvent, and
what kind of.
Is it possible that flux residues can go into spring machinery? If that
true, how can I clean them of flux residues and how often I must do it?
Regards,
Mario,
I answered knowing you all would come through:
I'm definitely not a cleaning or cleanliness expert. Doug Pauls and Big
Brian Ellis, who contribute greatly to the forum is/are.
I only know flux chemistries are varied. What it takes to clean or
neutralize one, is not right for another.
This is a big issue faced everyday by so many throughout industry, I'm
surprised more people aren't asking your vital qestion.
I would post again or contact someone more qualified as Doug Pauls
([log in to unmask]) and/or Brian Ellis ([log in to unmask]).
I too would be very interested in the chemistry, though it must be
"compatible" and capable of cleaning the indicated flux/chemistry in some
sort of optimized process whether batch or other.
Best regards,
Earl
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Date: Thu, 7 Mar 2002 18:40:48 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: BGA Soldersphere Attach - low tech method Inquiry
MIME-Version: 1.0
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boundary="part1_179.4bbcc1b.29b95480_boundary"
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Hi Dave!
You're thinking of SolderQuik BGA preforms...go to:
http://www.winslowautomation.com/bga.htm
The water soluble paper used in the preforms is a proprietary paper developed
by Raychem that Winslow Automation bought the rights to...
-Steve Gregory-
> Hi TechNet Land! I have had one too many Diet Cokes today and thus my
> brains have quit functioning (both braincells at once) - therefore I pose
> the following question to ya'all:
>
> I distinctly remember a company called "Raychem" which used to sell a
> solderball area "preform" which you could use to re-bump a BGA component
> after you removed it off an assembly. The "preform" used a water soluble
> material which could be removed in a water cleaning system after reflowing
> the solderspheres onto the BGA. I went looking on the web and can't find a
> "Raychem preform" group (I found lots of Raychem but not the one I
> remember). Have I had too much Diet Coke? Does anyone remember these guys?
> Or have they closed up shop?
>
> As always, thank in advance!
>
> Dave Hillman
> Rockwell Collins
> [log in to unmask]
>
--part1_179.4bbcc1b.29b95480_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Dave!<BR>
<BR>
You're thinking of SolderQuik BGA preforms...go to:<BR>
<BR>
http://www.winslowautomation.com/bga.htm<BR>
<BR>
The water soluble paper used in the preforms is a proprietary paper developed by Raychem that Winslow Automation bought the rights to...<BR>
<BR>
-Steve Gregory-<BR>
<BR>
<BR>
<BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Hi TechNet Land! I have had one too many Diet Cokes today and thus my<BR>
brains have quit functioning (both braincells at once) - therefore I pose<BR>
the following question to ya'all:<BR>
<BR>
I distinctly remember a company called "Raychem" which used to sell a<BR>
solderball area "preform" which you could use to re-bump a BGA component<BR>
after you removed it off an assembly. The "preform" used a water soluble<BR>
material which could be removed in a water cleaning system after reflowing<BR>
the solderspheres onto the BGA. I went looking on the web and can't find a<BR>
"Raychem preform" group (I found lots of Raychem but not the one I<BR>
remember). Have I had too much Diet Coke? Does anyone remember these guys?<BR>
Or have they closed up shop?<BR>
<BR>
As always, thank in advance!<BR>
<BR>
Dave Hillman<BR>
Rockwell Collins<BR>
[log in to unmask]<BR>
</BLOCKQUOTE><BR>
<BR>
</FONT></HTML>
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Date: Thu, 7 Mar 2002 18:44:22 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Rudy Sedlak <[log in to unmask]>
Subject: Re: [TN} CLEANING TEST PINS
MIME-Version: 1.0
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You have asked a timely question, for us.
We have been doing research to develop such a cleaner for some time, and
given the nature of the test, which makes "success" extremely difficult to
measure, we are feeling frustrated.
First, tell us what your pins are made of, we know there are different kinds,
and are having trouble even finding the alloy of the most common pins.
Second, does anyone have an idea on a different test for the cleaner.
At this time, we clean a "load" of pins for a fixture, say300 pins, and
insert them into the device, and test the pins. The way we are doing it, so
far, if even ONE PIN is not cleaned, the whole lot fails. This makes telling
if we are getting closer to success quite difficult.
Anybody got any better ideas?
Anyone want to work with us on this concept?
Anyone want us to clean a load of pins for them?
We are looking for cooperators.
Contact me off Technet at [log in to unmask]
Rudy Sedlak
RD Chemical Company
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Date: Thu, 7 Mar 2002 18:49:05 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: BGA Soldersphere Attach - low tech method Inquiry
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Dave,
As the ole song goes... I remember them well. The fellow that "invented" the
preforms bought that division back from Raychem and is now located in
southern California. I just can't remember the name, sorry. When I looked
them up a year or two ago the folks at Raychem were able to give me his name
and number. Good luck. I eventually went to the "add-a-lead" folks for my
application.
Boston Brad
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Date: Thu, 7 Mar 2002 19:00:30 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: BGA Soldersphere Attach - low tech method Inquiry
MIME-Version: 1.0
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Brad,
It's Russ Winslow, he used to be a Technetter, but I haven't seen a post from
him for quite a while...
-Steve Gregory-
> Dave,
> As the ole song goes... I remember them well. The fellow that "invented"
> the
> preforms bought that division back from Raychem and is now located in
> southern California. I just can't remember the name, sorry. When I looked
> them up a year or two ago the folks at Raychem were able to give me his
> name
> and number. Good luck. I eventually went to the "add-a-lead" folks for my
> application.
>
> Boston Brad
>
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Brad,<BR>
<BR>
It's Russ Winslow, he used to be a Technetter, but I haven't seen a post from him for quite a while...<BR>
<BR>
-Steve Gregory-<BR>
<BR>
<BR>
<BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Dave,<BR>
As the ole song goes... I remember them well. The fellow that "invented" the<BR>
preforms bought that division back from Raychem and is now located in<BR>
southern California. I just can't remember the name, sorry. When I looked<BR>
them up a year or two ago the folks at Raychem were able to give me his name<BR>
and number. Good luck. I eventually went to the "add-a-lead" folks for my<BR>
application.<BR>
<BR>
Boston Brad<BR>
</BLOCKQUOTE><BR>
<BR>
</FONT></HTML>
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Date: Thu, 7 Mar 2002 18:05:13 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: VERY IMPORTANT QUESTION CONCERNING CLEANING TEST PINS
X-To: [log in to unmask]
Do you guys alternate going home early? It's only 1900 or so. What, no more
16 your days for you all? Man, I'd sure get Doug squared away.
MoonMan
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Date: Thu, 7 Mar 2002 19:11:54 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Rudy Sedlak <[log in to unmask]>
Subject: Cleaning Contact Pins for universal grid testers
MIME-Version: 1.0
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We are all talking about cleaning rigid pins?
We are quite interested in developing a cleaner for rigid pins.
We will let our honorable competition crash against the rocks of chemical
clean for spring loaded pins.
Rudy Sedlak
RD Chemical Company
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Date: Thu, 7 Mar 2002 18:09:01 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: CIC... ONCE AGAIN
X-To: [log in to unmask]
Steve,
You know how much I love you but it ain't the material. It's the process and
how well it's managed. Jim didn't get someone who could do the job.
Boogie,
Earl
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Date: Thu, 7 Mar 2002 18:11:22 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: VERY IMPORTANT QUESTION CONCERNING CLEANING TEST PINS
X-To: [log in to unmask]
You folks all go great responses. I just hope Mario is in tune. I couldn't
get through to his email as it was rejected. No matter, we all need this
stuff as test gets more difficult and much tighter and dirtier.
MoonMan
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Date: Thu, 7 Mar 2002 18:19:50 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Cleaning Contact Pins for universal grid testers
X-To: Rudy Sedlak <[log in to unmask]>
Rudy,
Mario, with whom I've never met, was asking about spring loaded types. I
can't comment more than that. I'm simply relaying the question.
What's your competetion doing about the pogo stuff?
Earl
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Date: Thu, 7 Mar 2002 19:45:33 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: CIC... ONCE AGAIN
X-To: [log in to unmask]
MIME-Version: 1.0
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I know Earl, I guess I was fishing to see if anybody else has experience with
Stablcor....we're going forward with a ruggedization project withis material.
Ruggedizing a commercial VME card that has 4-PowerPC processors on it along
with 14 other BGA devices...16-layers that have to stay under .070" along
with the Stablcor layers...it's gonna be fun.
-Steve Gregory-
> Steve,
>
> You know how much I love you but it ain't the material. It's the process
> and
> how well it's managed. Jim didn't get someone who could do the job.
>
> Boogie,
>
> Earl
>
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>I know Earl, I guess I was fishing to see if anybody else has experience with Stablcor....we're going forward with a ruggedization project withis material. <BR>
<BR>
Ruggedizing a commercial VME card that has 4-PowerPC processors on it along with 14 other BGA devices...16-layers that have to stay under .070" along with the Stablcor layers...it's gonna be fun.<BR>
<BR>
-Steve Gregory-<BR>
<BR>
<BR>
<BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Steve,<BR>
<BR>
You know how much I love you but it ain't the material. It's the process and<BR>
how well it's managed. Jim didn't get someone who could do the job.<BR>
<BR>
Boogie,<BR>
<BR>
Earl<BR>
</BLOCKQUOTE><BR>
<BR>
</FONT></HTML>
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Date: Thu, 7 Mar 2002 19:54:52 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Neil Flatter <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Neil Flatter <[log in to unmask]>
Subject: Re-running product through a wave
We had a problem which caused our spray fluxer to kick off. When the
panels came out of the wave, they showed definite webbing. After they
cool down [and we fix the source of the fluxer problem], what concerns
should I have running them back through the wave with Alpha NR330 flux?
Neil Flatter
QC - Nights
TRW Automotive
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Date: Thu, 7 Mar 2002 18:54:56 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jeff Ferry <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jeff Ferry <[log in to unmask]>
Subject: Re: BGA Soldersphere Attach - low tech method Inquiry
Dave,
Suggest you visit Wisnlow Automation. Think they have some sort of
exclusive on the Raychem stuff you're looking for.
Go to http://www.winslowautomation.com/bga.htm
Jeff Ferry
CEO
Circuit Technology Center, Inc.
[log in to unmask]
www.circuittechctr.com
Sign up for our Free E-mail Newsletter at:
www.circuittechctr.com/general/free_email.htm
On Thu, 7 Mar 2002 17:20:09 -0600, [log in to unmask] wrote:
>Hi TechNet Land! I have had one too many Diet Cokes today and thus my
>brains have quit functioning (both braincells at once) - therefore I pose
>the following question to ya'all:
>
>I distinctly remember a company called "Raychem" which used to sell a
>solderball area "preform" which you could use to re-bump a BGA component
>after you removed it off an assembly. The "preform" used a water soluble
>material which could be removed in a water cleaning system after reflowing
>the solderspheres onto the BGA. I went looking on the web and can't find a
>"Raychem preform" group (I found lots of Raychem but not the one I
>remember). Have I had too much Diet Coke? Does anyone remember these guys?
>Or have they closed up shop?
>
>As always, thank in advance!
>
>Dave Hillman
>Rockwell Collins
>[log in to unmask]
>
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Date: Thu, 7 Mar 2002 19:59:05 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Rudy Sedlak <[log in to unmask]>
Subject: Re: Cleaning Contact Pins for universal grid testers
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In a message dated 3/7/02 4:26:52 PM Pacific Standard Time, [log in to unmask]
writes:
<< What's your competetion doing about the pogo stuff? >>
Nothing, to my knowledge, it was a tongue-in-cheek response. It is a very
difficult issue, as Jim Axton brought up, getting rid of the solvent is only
one issue. I believe that the pins have a VERY light coating of lubricant,
and reapplying it could prove, "interesting"....
The opportunity is not large enough to justify the huge development costs,
with the spring loaded pins. Hell, it may not be enough to justify coming up
with a cleaner for the rigid types..but we are attempting it.
All you have to do with those puppies is get them clean....
Rudy Sedlak
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Date: Thu, 7 Mar 2002 17:25:14 -0800
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jim Axton <[log in to unmask]>
Subject: Re: Cleaning Contact Pins for universal grid testers
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
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Rudy,
Spring loaded test pins...
Jim Axton, DDI
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Rudy Sedlak
Sent: Thursday, March 07, 2002 4:12 PM
To: [log in to unmask]
Subject: [TN] Cleaning Contact Pins for universal grid testers
We are all talking about cleaning rigid pins?
We are quite interested in developing a cleaner for rigid pins.
We will let our honorable competition crash against the rocks of chemical
clean for spring loaded pins.
Rudy Sedlak
RD Chemical Company
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Date: Thu, 7 Mar 2002 22:08:36 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Flattening a board during assembly
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Hi Daan,
Phil's advise is sound. Do NOT acccept responsibility for product of this
design. Your customer unfortunately does not know what they are talking
about. Many years ago Ericsson tried an unbalanced PCB design, only having to
abandon it aftermuch trial and, of course, time and resources.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 386-437-8747, Fax: 386-437-8737
E-mail: [log in to unmask], Website: www.engelmaier.com
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Date: Thu, 7 Mar 2002 22:08:37 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Pads, holes, traces and Class 3 field reliability
MIME-Version: 1.0
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Hi MoonMan, Peter, et al,
In a message dated 03/07/2002 0:38:57, [log in to unmask] writes:
>Actually, instead of more discussion on my part, IPC 2221, etc., and 6012
>cover all the ground, and much more, you are concerned about. There's
>little else to say.
Well, that is not quite accurate, neither document adequately addresses the
reliabiliity issues--for that you need to go to IPC-D-279.
IPC-D-279 also will help you correlate some of the info; additional helpcan
be found in IPC-TR-486 and IPC-TR-579.
Any copper barrel plating thickness below 1.0 mils should be considered
especially vulnerable.
Werner Engelmaier
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Date: Thu, 7 Mar 2002 22:08:35 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: BGA Ball Shear standard
MIME-Version: 1.0
Content-Type: text/plain; charset="ISO-8859-1"
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Hi Chris,
In answer to a very similar question asked in the past Sir G=FCnter wrote:
I wouldn't know a standard test method but I am somewhat critical about shea=
r=20
testing of solder joints because of the following points:
- The forces you measure depend very much on the speed of the deformation yo=
u=20
apply. Maybe the folks I heard so far working with this test methods where=20
not the best informed ones, but I never heard somebody mentioning this test=20
parameter.
- The same applies to the thickness of the solder layer you are testing,=20
since the stress necessary to induce a certain deformation speed depends on=20
the strain rate which is the speed of deformation divided by the layer=20
thickness. The thickness of this layer varies between 2 and 30um.
- The deformation speed also influences the evolution of damage in solder.=20
This means, in my opinion, that you never now how big the load bearing area=20
was at the moment of fracture.
- The point where the force is applied influences your result. You will for=20
sure induce not pure shear stress but also tensile stress to varying extends=
,=20
depending on where on the component the force is applied.
Because of these reasons, I believe, that shear testing of soldered joints o=
f=20
components only gives an extremely rough impression of the quality of a=20
solder joint and is not a very suitable method to evaluate the quality of a=20
solder production.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 386-437-8747, Fax: 386-437-8737
E-mail: [log in to unmask], Website: www.engelmaier.com=20
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Date: Thu, 7 Mar 2002 22:27:06 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Dennis Fritz <[log in to unmask]>
Subject: Re: Fab Process question related to ENIG
MIME-Version: 1.0
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In a message dated 3/7/02 12:46:50 PM Eastern Standard Time, [log in to unmask]
writes:
<< At what stage the electroless nickel and immersion gold process is
applied, is it after the solder mask application or before? I believe
normally it is after the solder mask application but I want to verify
it. I have heard that chemistry involved is very nasty if left on the
board. If I plug or mask via holes from one side, I want to make sure
that there is no residue left of that nasty chemistry. Can it be cleaned
if mask from one end? Any comments? >>
Ken,
Yes, ENIG is normally applied after solder mask. Some shops have made boards
doing the ENIG before mask - a process with pros and cons. Pro - it avoids
attack on the solder mask. Cons - Solder mask can have adhesion issues to
gold compared to copper, and obviously, you use more gold to plate all the
circuitry rather than just the pads in the ENIG last process.
The Electrolesss Nickel solution is quite hot in some processes - 160 to 190
degrees F. This tends to soften the mask and allow chemistry to "soak in".
All the plating chemistry for ENIG is aqueous based - so long rinses in water
- especially DI should clean up the board. Of course, chemistry that has
"soaked in" will take a while to leach out again.
If you mask from one end, this just makes the solution trasfer from hole wall
to rinse water take longer. You are not getting fresh water into the hole
barrel to dilute (rinse away) the contaminants. Would not suggest single
sided mask down the ENIG line. Remember, all the solutions are aqueous, and
the gold bath will try to "clean" the Electroless nickel solution out the
holes too. Result - contaminated gold bath that plates too thin or shuts
down.
Denny Fritz
MacDermid, Inc.
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Date: Fri, 8 Mar 2002 12:31:12 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Fab Process question related to ENIG
X-To: Ken Patel <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hi, Ken,
I believe ENIG (or any other plating) can be applied either before or after
soldermask, but normally it's applied before to save on plating solution
costs among other things.
Yes, the immersion gold process is aggressive, so be sure your fab house is
using an ENIG-compatible mask. This often involves using an alternative
hardener in the mask mix, and it's better if your pads are not solder mask
defined, as the plating tends to get underneath the edges.
Masking from one side only, the holes can be cleaned, but it depends to a
large extent on the diameter of the holes and the capability of your fab
house. 10 mils and above, I believe, are OK, but smaller than that, the
cleaning process may have trouble penetrating properly and cleaning out the
bottom of the holes. I suggest you leave the holes open at both ends unless
you absolutely have to mask one end.
Peter
Ken Patel
<[log in to unmask] To: [log in to unmask]
OM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
Sent by: Aero/ST Group)
TechNet Subject: [TN] Fab Process question related to
<[log in to unmask] ENIG
ORG>
03/08/02
01:40 AM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
Ken Patel
At what stage the electroless nickel and immersion gold process is
applied, is it after the solder mask application or before? I believe
normally it is after the solder mask application but I want to verify
it. I have heard that chemistry involved is very nasty if left on the
board. If I plug or mask via holes from one side, I want to make sure
that there is no residue left of that nasty chemistry. Can it be cleaned
if mask from one end? Any comments?
re,
Ken Patel
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Date: Thu, 7 Mar 2002 22:54:55 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: CIC... ONCE AGAIN
X-To: [log in to unmask]
I thought you were fisnin. Just where I should be now and will when this
winter wears off. I just get a little hot, not at you, when improper
supplier evaluation and qualification is done and things "happen" (BS) like
with Jim's project. No excuse for it really.
The thermount stuff, as you well know, has been around for many years like
CIC. It has a special set of process requirements as well. The stuff frays
around the edges and in the hole walls, is difficult to do a good fiber
removal process, and dulls drills til the cows are hair lipped all over
Texas plus some other neat stuff. Again, though, good process management in
a highly qualified board shop with lot's of experience, and prooof of it,
goes a long way.
What happened to your AOI hunting adventure? Anything new or exciting?
Earl
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Date: Thu, 7 Mar 2002 22:57:18 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Pads, holes, traces and Class 3 field reliability
X-To: [log in to unmask]
Sir Werner,
I knew you'd throw in that 279 reference as I should have. Damn right! I
just didn't know you'd throw out those others.
MoonMan
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Date: Fri, 8 Mar 2002 13:02:44 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: NTC this is a question regarding employee involvment
X-To: "Keel, Mike" <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hmmm .... ! I wonder how many Technical Sanitation Assistants go to the
sort of parties where job titles are a major means of pigeon-holing
people/find out if they're worth cultivating. Besides, it quickly becomes
apparent that such a job title is pure window dressing and the real job
underneath is still much less glamourous.
I people are gullible enough to be impressed by such nonsense, I dispair.
If Reeds et al think they're doing anyone a favour with this 'up-titling',
they'll find its effect very short term, and people will either revert (or
be reverted) to their old, simpler job titles or be lumbered with a half
mile long title that does nothing but make the tongue tired (or tied)
having to say it.
An old expression involving silk purses and sow's ears springs to mind -
you can't make one out of the other.
Peter - just an old fashioned engineer from the days when spades were
spades and not horticultural medium excavators.
"Keel, Mike"
<mike.keel@SD-A To: [log in to unmask]
XIOHM.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
Sent by: Aero/ST Group)
TechNet Subject: Re: [TN] NTC this is a question
<[log in to unmask] regarding employee involvment
G>
03/08/02 04:38
AM
Please respond
to "TechNet
E-Mail Forum.";
Please respond
to "Keel, Mike"
What a co-in-key-dink . . .
the following came off the www today
Before you laugh ( this is HEALTHY )
And dismiss . . .
Please read thru to the end
'Up-Titling' Keeps Workers Poor but Happy [NL]Thu Mar 7, 8:49 AM ET
[PARA]LONDON (Reuters) - British workers are being given bigger job titles
rather than bigger salaries as cash-strapped companies try to keep
employees
happy, according to a survey published on Thursday. [PARA]
Examples of the phenomenon dubbed "up-titling" include a receptionist
rebranded as "Head of Verbal Telecommunications" and a window cleaner given
the impressive designation of "Optical Illuminator Enhancer." [PARA]"The
research demonstrates how motivational it can be to gain a prestigious job
title. At parties...swapping elaborate job titles breaks the ice," said
Paul
Rapacioli, director of employment agency Reed's Internet service, which
carried out the survey. [PARA]He said companies were using the fancy titles
as an incentive to retain staff rather than pay them more at a time of
economic uncertainty. [PARA]Businesses seeking "Stock Replenishment
Executives" were actually looking for shelf stackers and successful
candidates for a post as "Technical Sanitation Assistant" would find
themselves cleaning washrooms. [PARA]"Up-titling" seems to have won
converts. Of the 1,700 workers Reed surveyed, around half thought a better
job title would make them happier even if there was no change in what they
actually did. [PARA]"People view a grander title as recognition of their
contribution to the organization and feel more committed as a result,"
Rapacioli said.
This probably doesn't have any relevance
To anyone @ tech-net
Present company always excepted . . .
Best Regards to All
M Keel
= = = EMPERIOR OF SPACE = = =
-----Original Message-----
From: Kathy Kuhlow [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 4:30 PM
To: [log in to unmask]
Subject: [TN] NTC this is a question regarding employee involvment
<< File: TEXT.htm >> If you have no opinion or want to get in a discussion
regarding this topic please delete this message....
I publish a company newsletter each month. Each month I try to add an
article in this paper regarding principles. Most of the principles are
written to help inspire Leadership, commitment, etc. The goal of the
article is to help educate fellow employees and hopefully get some of them
involved. I firmly feel that a involved, caring work force produces more,
faster, and correctly.
This month's topic is Employee involvement. Do or have any of you been
involved with any programs within this topic range? Any opinions on what
are the better methods or results of involvement? Let me know. I hope to
publish the paper for the month soon and would like to explore possible
actual programs like this.
A couple of weeks a go a forum was suggested for Managers, well here I am.
You know one of those upper managers who enjoys being in technet to learn
and share if possible. I really hope you will let me know your opinion.
Kathy
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Date: Thu, 7 Mar 2002 23:41:27 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Fab Process question related to ENIG
X-To: [log in to unmask]
Peter,
You bring up an interesting point. I got involved in an almost hopeless
situation, as usual and love so much, involving incredibly poorly designed
MLB's with interesting BGA's. We've gone over most of this drama before.
First, I don't like tenting/masking over vias of any kind. Second, I like
using blind dogbone vias, temp mask, selective solder pallets, double sided
reflow when possible, and/or solder shields beneath BGA's to prevent solder
welling/wetting up BGA dogbone vias and shorting out my balls - all this not
necessarily in that order.
Question is, what are some good design guidelines so solder shields can be
used under BGA's on the back side if one has to use through hole dogbone
vias? It must be kinda like the .200" keep out for the rework process but on
the back side?
Do you have any thoughts?
Earl
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Date: Fri, 8 Mar 2002 14:51:59 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Fab Process question related to ENIG
X-To: Earl Moon <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Several thoughts, Moonbase 1, but mostly distracted by the one thought of
your balls being shorted out. What would Kathy, Genny and Mary Jane have to
say about that as some of your future ex's, I ponder? Better not ponder too
long ....
I don't like tenting either, especially double sided tenting since there's
then no chance of cleaning anything out that might be imprisoned inside the
hole. I also have to say I don't use blind vias (dogbone or in-pad) either
at the moment, as they add complexity to the board and therefore processing
cost, unless you happen to have a fab house that's very good at laser
drilling. So far, our one attempt (or rather one of our fab house's
attempt) to laser drill was an unmitigated disaster, and there seems to be
some considerable doubt about the reliability of the process as far as
military boards are concerned anyway. So we continue to use up real estate
with through holes.
I would prefer to use blind dogbones in some ways, since they get rid of
the physical weakness inherent in having a closely spaced pattern of
through-holes right where you also have a lot of heat, especially if having
to replace a BGA. The downside, though, is you've then got nowhere to put a
test probe when carrying out fault diagnosis, and boundary scanning with
ICT doesn't always cut it unless you have some very slick techniques to
hand.
Double sided reflow means gluing components to at least one side of the
board (doesn't it?) - something we try to avoid to facilitate repairs and
mods. I used to hate having to break all those adhesive bonds. It does mean
two thermal excursions to solder, though, which may be the greater of the
two evils, or not depending on your point of view. Going back to your short
balls, for a moment, wouldn't this only happen with wave soldering? Or a
serious over-abundance of solder paste if reflowing? My BGA boards have all
been print one side, mount, reflow, print side 2, mount, reflow. No solder
has ever gotten near the via holes to well out and cause shorts.
I've no experience of using pallets at all, as we opted to hand solder
connectors after CR soldering the components. Ditto with shields, except
years ago when we had to use some heat shunts on Tant Caps to stop them
overheating and blowing up. As for a 0.200" keep-out for rework, I can just
hear the consternation from the Dream Team about loss of real estate for no
good purpose - such is the lack of respect we spanner monkeys have to
endure out here in the tropics where monkeys are common. But, yeah, I would
guess shields would require that sort of keep-out.
Aye, it's a sair fecht, as they say where I came from.
Peter
Earl Moon
<[log in to unmask] To: [log in to unmask], DUNCAN
M.COM> Peter/Asst Prin Engr/ST Aero/ST Group@ST Domain
cc:
03/08/02 Subject: Re: Fab Process question related to
01:41 PM ENIG
Peter,
You bring up an interesting point. I got involved in an almost hopeless
situation, as usual and love so much, involving incredibly poorly designed
MLB's with interesting BGA's. We've gone over most of this drama before.
First, I don't like tenting/masking over vias of any kind. Second, I like
using blind dogbone vias, temp mask, selective solder pallets, double sided
reflow when possible, and/or solder shields beneath BGA's to prevent solder
welling/wetting up BGA dogbone vias and shorting out my balls - all this
not
necessarily in that order.
Question is, what are some good design guidelines so solder shields can be
used under BGA's on the back side if one has to use through hole dogbone
vias? It must be kinda like the .200" keep out for the rework process but
on
the back side?
Do you have any thoughts?
Earl
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=========================================================================
Date: Fri, 8 Mar 2002 08:50:47 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Steve Owen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Steve Owen <[log in to unmask]>
Subject: Re: BGA Soldersphere Attach - low tech method Inquiry
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Dave,
If you go to www.intertronics.co.uk you should be able to find the
"preforms" you need we have just received samples.
Steve.
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: 07 March 2002 23:20
To: [log in to unmask]
Subject: [TN] BGA Soldersphere Attach - low tech method Inquiry
Hi TechNet Land! I have had one too many Diet Cokes today and thus my
brains have quit functioning (both braincells at once) - therefore I pose
the following question to ya'all:
I distinctly remember a company called "Raychem" which used to sell a
solderball area "preform" which you could use to re-bump a BGA component
after you removed it off an assembly. The "preform" used a water soluble
material which could be removed in a water cleaning system after reflowing
the solderspheres onto the BGA. I went looking on the web and can't find a
"Raychem preform" group (I found lots of Raychem but not the one I
remember). Have I had too much Diet Coke? Does anyone remember these guys?
Or have they closed up shop?
As always, thank in advance!
Dave Hillman
Rockwell Collins
[log in to unmask]
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Date: Fri, 8 Mar 2002 10:58:11 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: VERY IMPORTANT QUESTION CONCERNING CLEANING TEST PINS
X-To: Earl Moon <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Sorry, Earl, I'm letting you down. No-one has ever asked me the question
before, but I guess the other respondees have stated along the same
lines I'd be thinking: a good wet brushing with a solvent (I'd possibly
suggest two stiff brushes: one for the initial filthy work, the other
reserved for final cleaning with clean solvent: when the latter needs
replacing, downgrade it to # and chuck away the original #1) which will
dissolve the crud, according to the flux type and general s..t they pick
up. I agree: no shop air.
Doug will suggest Mountain Dew as the universal solvent.
Brian
Earl Moon wrote:
>
> Ok you folks, especially Doug and Brian,
>
> You let this gentleman down and me as well. So much for my appeal but the
> question is:
>
> Techneters,
>
> I would like to know if some of you have a suggested procedure for cleaning
> of pins for In Circuit Testing, and if is possible to use a solvent, and
> what kind of.
>
> Is it possible that flux residues can go into spring machinery? If that
> true, how can I clean them of flux residues and how often I must do it?
>
> Regards,
>
> Mario,
>
> I answered knowing you all would come through:
>
> I'm definitely not a cleaning or cleanliness expert. Doug Pauls and Big
> Brian Ellis, who contribute greatly to the forum is/are.
>
> I only know flux chemistries are varied. What it takes to clean or
> neutralize one, is not right for another.
>
> This is a big issue faced everyday by so many throughout industry, I'm
> surprised more people aren't asking your vital qestion.
>
> I would post again or contact someone more qualified as Doug Pauls
> ([log in to unmask]) and/or Brian Ellis ([log in to unmask]).
>
> I too would be very interested in the chemistry, though it must be
> "compatible" and capable of cleaning the indicated flux/chemistry in some
> sort of optimized process whether batch or other.
>
> Best regards,
>
> Earl
>
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Date: Fri, 8 Mar 2002 11:02:36 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Crash! very slightly OT
MIME-Version: 1.0
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Sorry about this, I guess it must have been an Internet problem. The
same message came in again about an hour after I sent this plea and this
time it is perfectly readable. I can't delete the first one though - and
it still crashes the app.
Brian
Brian Ellis wrote:
>
> Graham Naisbitt posted a message at 16.20 today with the subject Re:
> [TN] Conformal Coating. For some reason or other, every time I try to
> open this message in Netscape, it crashes the e-mail client Messenger.
> This is the only message to do it, so it must be something therein
> that's causing it, I think. I've read other messages posted before and
> after with no problem.
>
> Has anyone else experienced a problem with this message?
>
> Graham: could you please resend it, just to me and not to TechNet?
>
> Brian
>
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Date: Fri, 8 Mar 2002 11:19:24 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Conformal coating: high humidity environment.
X-To: Graham Naisbitt <[log in to unmask]>
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Gawd, Graham. I haven't been raised to the peerage, let alone to
sainthood during my lifetime. Not even Mother Teresa managed that :-)
Seriously, I'll have to watch my Ps and Qs when responding to TN posts.
I never realised that my words were recorded for posterity. You are
placing a heavy responsibility on my shoulders by publishing the
collected works of Brian Ellis (they would fill a library :-( , as they
go back 40 years or more) because I've BSed as much as anyone and events
have proved my forecasts and ideas wrong as much as they've been right.
(Remember the Plop-plop-Meter for detecting blowholing: it worked but
never took off!!!!)
Brian
Graham Naisbitt wrote:
>
> Hello Techies,
>
> Following Brian's posting, I saved another he made a little time ago that
> you might find useful.
>
> However, before I do that, may I only point out that there is no such thing
> as the perfect or ideal conformal coating - it is all a question of
> trade-off's.
>
> For the original question of high humidity AND high levels of salt spray (or
> should that be salt fog or salt mist? It does make a difference in test
> conditions and results.) then a single part urethane will work well and we
> can prove it. For those who want this proof, ask off-line please.
>
> Selecting the right material is critical and making sure that it is:
>
> a Applied correctly in accordance with the anticipated production
> method
> b Cured properly BEFORE testing commences
>
> 2 Part Urethanes are excellent but, a major pain and expense in production.
> There are single part versions but these tend to be very moisture sensitive
> thus have a short shelf-life and "use-by" time when opened (hours not days!)
> However, there are even more urethanes (alkyds) that are far more forgiving
> in every sense - and consequently highly popular.
>
> So finally here is part of another Sermon according to "St Brian of Cyprus"
> :-)
>
> The Problem with Silicone Conformal Coatings...
>
> Silicone coatings are a wee bittie of a con, IMHO (sorry, Dow Corning et
> al.!). Their behaviour under humid conditions is roughly 10-20 times worse,
> as a rule than other types. Let me expand on this sweeping statement. Single
> component silicones usually require the presence of free hydroxyl radicals
> to crosslink. That means that they will not cure in a perfectly dry
> atmosphere. In this sense, before curing, they are hygroscopic. After
> curing, the hygroscopicity is reduced, but they are porous (otherwise, the
> trapped humidity would not have escaped). Two component products use other
> mechanisms of curing, so are less hygroscopic prior to curing. However, they
> are almost equally porous.
>
> Other polymers, such as acrylics, epoxies and polyurethanes use other
> mechanisms for curing and are considerably less porous (but they are all
> porous).
>
> Many years ago, I cast discs of typical products (the results are reported
> in my book), which I used as a diaphragm between a humid and a dry
> compartment. The comparison was striking.
>
> However, in the popular imagination, silicones are the nec plus ultra
> because the are not wet by water in the liquid phase, without consideration
> of its behaviour in the gaseous phase.
>
> So what can happen in worst case conditions? Let's imagine you have a tiny
> salt crystal (or any other hygroscopic contaminant) stuck between two
> conductors. Without a coating, the scenario is obvious, as soon as the
> circuit is put into service in a humid environment. Aha!, you say, that is
> why we coat, so that it would stop such a catastrophe. Not so! The zone of
> polymer close to the crystal will haves it absorbed humidity sucked into our
> salt crystal, drying it out. But, as nature abhors a vacuum, so do polymers
> like to strike a humidity equilibrium with the surrounding air, so more
> humidity is absorbed and the process continues. But, you may say that a tiny
> speck of humidity not bridging conductors is relatively harmless. Again, not
> so. As more humidity is absorbed by the crystal, osmotic pressure starts to
> rise and will start to lift the coating off the substrate and this process
> may continue to form a humid pool between conductors and, WHAM! This process
> is called vesication and is more common than you think. It is illustrated
> graphically and by photographs in my book. The result is sometimes also
> called mealing, not to be confused with measling.
>
> So your coating has only delayed a catastrophe and the delay time with a
> silicone coating is only a fraction than with other coating types. One hopes
> that cycling temperatures and humidities are such that the catastrophe will
> never happen but the best way of assessing a minimum risk is by ensuring
> that the minute crystal is never there, in the first place, by a thorough
> and effective cleaning before coating. This was the philosophy behind the
> long-defunct MIL-P-28809, but is still very valid. There may be some **very
> rare** exceptions to the application of this rule, which are too complex to
> discuss just now but you are safe in assuming that a proven cleaning quality
> is a sine qua non to conformal coating.
>
> Acrylic is better than silicones in this respect and electrically, but not
> so good in terms of chemical resistance.
>
> Another little known feature about silicones is that they transmit shock
> better than most other materials. If you underfill an IC with a silicone and
> the board is subjected to a shock test, the ICs will suffer more than with,
> say, an epoxy underfill. This is because silicones are virtually
> incompressible at high rates of stress (hence your super-bouncing ball).
>
> Hope this helps (and raises the cat among the pigeons!)
>
> And another:
>
> A 0.2 cents worth: the TCE of silicones are ginormous (e.g. 300-350 ppm/°C)
> compared with solder (c. 16 ppm/°C) and I suggest you may be right about
> worrying about it. Furthermore, silicones have a unique property that,
> however squausshy (thanks, Graham, for the term) they feel under the thumb,
> they are rock-hard when subjected to a shock (hence super-bouncer balls and
> bouncing putty). The combination could result in a squished silicone at
> slightly elevated temperatures which would place a tension on the
> BGA-ball-pad combination, which could increase by orders of magnitude should
> it be subjected to a small shock at the same time. Any gap in the underfill,
> especially if accompanied by flux residues or other hydrophilic contaminant,
> could even fill with water under humid conditions of use. I feel vacuum
> impregantion would be a must.
>
> A few pages are devoted to silicones in Bartholomew's classic book on
> underfilling in the chapter on properties of encapsulants, emphasising the
> moisture permeability. He suggests that the TCE problem may be reduced by
> silica filling, but that high filling ratios may result in micro-cracking
> during high temperature cycling. Otherwise, I don't think he devotes much
> space to silicones as underfills, compared with other resin systems.
>
> Hope this helps you all.......
>
> Regards Graham Naisbitt
>
> [log in to unmask] <mailto:[log in to unmask]>
>
> Concoat Limited
> Alasan House, Albany Park
> Camberley GU16 7PH - UK
>
> www.concoat.co.uk <http://www.concoat.co.uk>
>
> Phone: +44 1276 691100
> Fax: +44 1276 691227
> Mobile: +44 79 6858 2121
>
> > -----Original Message-----
> > From: TechNet [mailto:[log in to unmask]]On Behalf Of Brian Ellis
> > Sent: 07 March 2002 07:32
> > To: [log in to unmask]
> > Subject: Re: [TN] Conformal coating: high humidity environment.
> >
> >
> > Jan
> >
> > The order from good to bad, at temperatures < 40°C, but ONLY, say again,
> > ONLY FOR MOISTURE RESISTANCE.
> > paraxylylene (Parylene (R) ) 1
> > acrylics 2
> > epoxy 3
> > polyurethane 4
> > silicone 5
> >
> > For mechanical resistance, the order is 3, 1, 4, 2, 5
> > For chemical resistance. 1, 3, 5, 4, 2
> > For electrical properties (dry conditions) 2, 1, 5, 4, 3
> > For ease/cost 2, (3, 4, 5), 1
> > Repairability 2, 4, 5, 3, 1
> >
> > Obviously, these orders may vary somewhat with individual coatings, and
> > are just a rough categorisation, but they will give you an idea
> > according to which characteristics are most interesting for your
> > application. Where there is a choice between single and 2-component
> > products, go for solventless 2-component ones for best results, PROVIDED
> > you can meter and mix them accurately, otherwise forget them. The reason
> > there is such a choice is because there is no single ideal solution and
> > you have to compromise somewhere along the line. If you draw up a
> > "league table" from the above scores, you will find them all roughly
> > equal, certainly within the tolerances between individual products.
> >
> > FWIW
> >
> > Brian
> >
> > Jan Satterfield wrote:
> > >
> > > Someone asked the questions regarding high humidity and the
> > best conformal
> > > coating to use and I read 4 different answers: Acrylics, urethanes,
> > > paralyene and Silicone. I have always understood that acrylics were the
> > > least moisture resistant, paralyene the most moisture resistant and
> > > urethanes the most commonly used for moisture resistance on
> > CCA's. Anyone
> > > care to clarify?
> > >
> > > -----Original Message-----
> > > From: [log in to unmask] [mailto:[log in to unmask]]
> > > Sent: Wednesday, March 06, 2002 9:22 AM
> > > To: [log in to unmask]
> > > Subject: Re: [TN] Conformal coating: high humidity environment.
> > >
> > > Acrylics tend to have the best performance in high moisture
> > environments, as
> > > long as the temperatures are not extremely high.
> > >
> > >
> > ------------------------------------------------------------------
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Date: Fri, 8 Mar 2002 05:34:35 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Fab Process question related to ENIG
X-To: [log in to unmask]
Yeh, they and many other things get shorted out often. Our design engineers,
in their infinite wisdom did many things wrong. There's one 3 inch square
analog area they placed at the corner of an 11x11" board with you know what
- about a dozen of those blue beuaties, electrolytic caps that is so wave
solder a necessity. Some other through hole stuff as well that needn't be.
Could have been SMT or left on the R/F daughter card. It's all a big compromise.
Just thinking out loud really about the bottom side solder shields. Anyone
else so I don't have to go to blind vias or wave pallets?
MoonBaseMan
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Date: Fri, 8 Mar 2002 05:49:28 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Fab Process question related to ENIG
And Peter,
With reference to those fabulous ladies, have no fear as I'm sure they are
very secure in their soderality.
I case I or you are not allowed to post anymore, I've been thrown out of a
whole lot of bars for much worse phraseology, or however that goes.
MoonMan
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Date: Fri, 8 Mar 2002 06:25:15 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: IPC-9151
Folks,
I've just downloaded my copy of the formative IPC-9151. Just wonder how many
others have done the same.
I cannot comment on the docuement but in one way. This seems an awsome
undertaking to say the least. Not a negative comment, but this seems not
only an endless task but one almost impossible due to almost daily technical
advances.
Having said that, it is easy to see not all of us are doing complex SMT
only. Questions still arise, as they should, concerning conversion factors
from thru hole to SMT with respect to reliability and cost.
Damn interesting stuff and must reflect how all those 279 equations are
being applied.
What a database this and will be,
Earl Moon
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Date: Fri, 8 Mar 2002 08:03:15 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Phil Nutting <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Nutting <[log in to unmask]>
Subject: Re: Care of Metcal tips
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----_=_NextPart_001_01C1C6A1.9C63D18A"
This is a multi-part message in MIME format.
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charset="iso-8859-1"
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Based upon hour comments Steve, it sounds like this would be true for =
most soldering tips regardless of manufacturer. I'll have to pay closer =
attention to tip life here.
=20
Phil Nutting
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 6:06 PM
To: [log in to unmask]
Subject: Re: [TN] Care of Metcal tips
Hi Lou!=20
No Clean flux is actually the worse flux to use when you're talking tip =
life. Go to:=20
http://www.metcal.com/tips/1.3.2.htm=20
There's so little solids (it's mostly alcohol) that it flashes off the =
tip and doesn't protect the tip the same way a RMA does from oxidation. =
I think you'll find that you will go through more tips soldering with no =
clean fluxes than you do with any other flux type.=20
-Steve Gregory-=20
TechNetters, I've noted with interest the discussion of Metcal and other =
soldering irons over the past few days. A question has come up here =
about=20
care of Metcal tips. We've gone to some lengths to eliminate RMA flux =
from=20
the plant. However, Metcal recommends tinning tips with RMA-flux wire=20
solder. We would like to use no-clean flux to tin tips. How risky =
would=20
such a practice be? Any comments would be greatly appreciated. I =
called=20
Metcal for advice and found the people I talked with to be very pleasant =
and eager to help. But no data were available, and, frankly, the people =
sounded very youthful. Lou Hart=20
-------------------------------------------------------------------------=
--------=20
Technet Mail List provided as a free service by IPC using LISTSERV 1.8d=20
To unsubscribe, send a message to [log in to unmask] with following text =
in=20
the BODY (NOT the subject field): SIGNOFF Technet=20
To temporarily halt delivery of Technet send e-mail to [log in to unmask]: =
SET Technet NOMAIL=20
To receive ONE mailing per day of all the posts: send e-mail to =
[log in to unmask]: SET Technet Digest=20
Search previous postings at: www.ipc.org > On-Line Resources & Databases =
> E-mail Archives=20
Please visit IPC web site http://www.ipc.org/html/forum.htm for =
additional=20
information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 =
ext.5315=20
------_=_NextPart_001_01C1C6A1.9C63D18A
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charset="iso-8859-1"
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 6.00.2712.300" name=3DGENERATOR></HEAD>
<BODY>
<DIV><SPAN class=3D248530113-08032002><FONT face=3DArial color=3D#0000ff =
size=3D2>Based=20
upon hour comments Steve, it sounds like this would be true for most =
soldering=20
tips regardless of manufacturer. I'll have to pay closer attention =
to tip=20
life here.</FONT></SPAN></DIV>
<DIV><SPAN class=3D248530113-08032002><FONT face=3DArial color=3D#0000ff =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D248530113-08032002><FONT face=3DArial color=3D#0000ff =
size=3D2>Phil=20
Nutting</FONT></SPAN></DIV>
<BLOCKQUOTE>
<DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> [log in to unmask]
[mailto:[log in to unmask]]<BR><B>Sent:</B> Thursday, March 07, 2002 =
6:06=20
PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> Re: [TN] Care of =
Metcal=20
tips<BR><BR></FONT></DIV><FONT face=3Darial,helvetica><FONT =
size=3D2>Hi Lou!=20
<BR><BR>No Clean flux is actually the worse flux to use when you're =
talking=20
tip life. Go to: <BR><BR>http://www.metcal.com/tips/1.3.2.htm =
<BR><BR>There's=20
so little solids (it's mostly alcohol) that it flashes off the tip and =
doesn't=20
protect the tip the same way a RMA does from oxidation. I think you'll =
find=20
that you will go through more tips soldering with no clean fluxes than =
you do=20
with any other flux type. <BR><BR>-Steve Gregory- <BR><BR><BR><BR><BR>
<BLOCKQUOTE=20
style=3D"PADDING-LEFT: 5px; MARGIN-LEFT: 5px; BORDER-LEFT: #0000ff 2px =
solid; MARGIN-RIGHT: 0px"=20
TYPE=3D"CITE">TechNetters, I've noted with interest the discussion of =
Metcal=20
and other <BR>soldering irons over the past few days. A =
question has=20
come up here about <BR>care of Metcal tips. We've gone to some =
lengths=20
to eliminate RMA flux from <BR>the plant. However, Metcal =
recommends=20
tinning tips with RMA-flux wire <BR>solder. We would like to =
use=20
no-clean flux to tin tips. How risky would <BR>such a practice =
be?=20
Any comments would be greatly appreciated. I called =
<BR>Metcal=20
for advice and found the people I talked with to be very pleasant =
<BR>and=20
eager to help. But no data were available, and, frankly, the =
people=20
<BR>sounded very youthful. Lou Hart=20
=
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Date: Fri, 8 Mar 2002 14:19:27 +0100
Reply-To: Roland Jaquet <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Roland Jaquet <[log in to unmask]>
Subject: LDI - LDS - Users / Experiences / Comments
X-cc: Frank Linda DeArmond <[log in to unmask]>
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C'est un message de format MIME en plusieurs parties.
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charset="iso-8859-1"
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Dear Technetters,
I am soliciting your help in :
1 - Knowing which company is equipped with Laser Direct Imaging
2 - Which company is equipped with Laser Direct Structuring
3 - Any comments on personal experience(s), costs, opinion..=20
In order to know more about the current status from you all Ladies and =
Gentlemen Technetters in regards of the below tutorial.
IPC PRINTED CIRCUITS EXPO 2002
TUTORIAL T-07 IMAGING TECHNOLOGIES for ADVANCED PRINTED CIRCUITS
SUNDAY, MARCH 24, 2002, 8:30 AM - 4:00 PM
LONG BEACH CONVENTION CENTER, LONG BEACH, CA
My US Partner, Frank B. De Armond, Ph.D., and I, will be presenting =
TUTORIAL T-07, as outlined above in blue.
We invite those of you who will be attending Subject Expo to attend =
TUTORIAL T-07 and join in the discussions to follow.
As this is a subject that is receiving much attention with the advent of =
HDI Technology, we anticipate better than average attendance and look =
forward to=20
a spirited technical interchange after the presentation.
Frank and I look forward to seeing each of you at Subject EXPO.
With very best regards,
Roland
Http://www.PCBspecialist.com
Roland Jaquet - PCBspecialist - 14 ch. de Vers - CH-1228 Plan-Les-Ouates =
- Geneva - Switzerland - Tel. +41-22-880-0405 - GSM (cellphone) =
+41-79-203-3723 - Fax +41-22-880-0409 - Company Viability - Technical =
Viability - Technology Choice - Yield Improvement - Company Strategy - =
Equipment Choice - Company Acquisition
EIPC Member
Frank B. De Armond, Ph.D.
DE ARMOND ENTERPRISES
PROVIDING COST-EFFECTIVE SOLUTIONS FOR ADVANCED SUBSTRATE TECHNOLOGY =
AND OTHER ELECTRONIC INTERCONNECT PRODUCTS
3086 Raven Crest Circle
Prescott, AZ 86303-5790
Phone: 928.717.2326 Fax: 928.717.2328=20
e-mail: [log in to unmask] Mobile: 602.501.4837
Web Site: www.cableone.net/frankdearmond=20
------=_NextPart_000_00F1_01C1C6AC.41A2AFE0
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charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4913.1100" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Dear Technetters,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>I am soliciting your help in =
:</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>1 - Knowing which company is equipped =
with Laser=20
Direct Imaging</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>2 - Which company is equipped with =
Laser Direct=20
Structuring</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>3 - Any comments on personal =
experience(s), costs,=20
opinion.. </FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>In order to know more about the current =
status from=20
you all Ladies and Gentlemen Technetters in regards of the below=20
tutorial.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>IPC PRINTED CIRCUITS EXPO 2002
<DIV><BR></DIV>
<DIV align=3Dcenter><FONT color=3D#0000ff><B><U>TUTORIAL T-07 IMAGING =
TECHNOLOGIES=20
for ADVANCED PRINTED CIRCUITS<BR><BR></U>SUNDAY, MARCH 24, 2002, 8:30 AM =
- 4:00=20
PM<BR><BR>LONG BEACH CONVENTION CENTER, LONG BEACH,=20
CA<BR><BR></B></FONT></DIV>My US Partner, Frank B. De Armond, =
Ph.D., and I,=20
will be presenting TUTORIAL T-07, as outlined above in blue.<BR><BR>We =
invite=20
those of you who will be attending Subject Expo to attend TUTORIAL T-07 =
and join=20
in the discussions to follow.<BR><BR>As this is a subject that is =
receiving much=20
attention with the advent of HDI Technology, we anticipate better than =
average=20
attendance and look forward to <BR>a spirited technical interchange =
after the=20
presentation.<BR><BR>Frank and I look forward to seeing each of you at =
Subject=20
EXPO.<BR><X-SIGSEP>
<P></X-SIGSEP>With very best regards,</FONT></P></DIV>
<DIV>Roland</DIV>
<DIV> </DIV>
<DIV><A=20
href=3D"http://www.PCBspecialist.com">Http://www.PCBspecialist.com</A><BR=
>Roland=20
Jaquet - PCBspecialist - 14 ch. de Vers - CH-1228 Plan-Les-Ouates - =
Geneva -=20
Switzerland - Tel. +41-22-880-0405 - GSM (cellphone) +41-79-203-3723 - =
Fax=20
+41-22-880-0409 - Company Viability - Technical Viability - Technology =
Choice -=20
Yield Improvement - Company Strategy - Equipment Choice - Company=20
Acquisition<BR>EIPC Member</DIV>
<DIV> </DIV>
<DIV>Frank B. De Armond, Ph.D.<BR><B>DE ARMOND =
ENTERPRISES<BR><BR></B>PROVIDING=20
COST-EFFECTIVE SOLUTIONS FOR ADVANCED SUBSTRATE TECHNOLOGY AND =
OTHER=20
ELECTRONIC INTERCONNECT PRODUCTS<BR>3086 Raven Crest Circle<BR>Prescott, =
AZ=20
86303-5790<BR><BR>Phone: 928.717.2326 Fax: 928.717.2328 =
<BR>e-mail:=20
[log in to unmask] Mobile: 602.501.4837<BR>Web Site: =
<A=20
href=3D"http://www.cableone.net/frankdearmond"=20
eudora=3D"autourl">www.cableone.net/frankdearmond</A> </DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
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Date: Fri, 8 Mar 2002 08:28:35 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: 2002 Designers Learning Symposiums
MIME-Version: 1.0
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Kathy,
I will be doing a comprehensive session on DFM that includes assembly issues
such as test, materials, coatings and placement to name a few. Assembly is a
major factor for the desinger to consider during the design process and is
touched upon in most of the other sessions as well.
Regards,
Gary Ferrari
Executive Director
IPC Designers Council
(860) 350-9300
Fax (413) 771-5386
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<HTML><FONT FACE=arial,helvetica><FONT COLOR="#8000ff" SIZE=2 FAMILY="SCRIPT" FACE="Comic Sans MS" LANG="0"><B><I>Kathy,<BR>
<BR>
I will be doing a comprehensive session on DFM that includes assembly issues such as test, materials, coatings and placement to name a few. Assembly is a major factor for the desinger to consider during the design process and is touched upon in most of the other sessions as well.<BR>
<BR>
Regards,<BR>
<BR>
Gary Ferrari<BR>
Executive Director<BR>
IPC Designers Council<BR>
(860) 350-9300<BR>
Fax (413) 771-5386</B></I></FONT></HTML>
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Date: Fri, 8 Mar 2002 08:39:56 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Nancy Trumbull <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Nancy Trumbull <[log in to unmask]>
Subject: Thermal Shock
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Hi Everyone,
It has been awhile for me. I have had so much work that I've had no =
time to take part in Technet. So please forgive me.
My Question :
1)What is the equivalent of a Thermal shock cycle?
2) How do I evaluate a failure if it fails with-in 80 cycles?
3) How do I break down a cycle so it would pretain to the part?
The cycle we have been told to use and evaluate our parts with is the =
following:
160 cycles
At -30=B0C =BD hr =AE + 80=B0C =BD hr
If needed this is an assembled board.
As it is now I can only say it passed or it failed. I can not say how long =
the part will last, good or bad.
I have looked in IPC Test Method book TM-650 but could not find any =
thing.=20
Well if any one has any thing let me know. If not I thank each and every =
one of you for your time.=20
Have a good week end.
Nancy T.
=20
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Date: Fri, 8 Mar 2002 07:42:52 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: LDI - LDS - Users / Experiences / Comments
X-To: [log in to unmask]
This subject, to me, is huge. Direct laser imaging had one of its first
starts in the early/mid '80's with a company called Greyhawk systems.
Some of the fine folks there borrowed the idea from a now forgotten medical
device technology company. Can't remember the name.
The concept would forever change the then high density PCB design/imaging
world. It involved laser "writing" a direct design image on a liquid crystal
panel. Subsequently, using a very low frequency sensitive photo imageable
dry film, the LCD "wrote" its stored images onto the film. The project
coulda, shoulda worked but seemed a bit ahead of its time. Now is the time
for the latest and greatest.
As much time, money, and effort our best board shops put into their
photoploting and imaging processes, the LDI process puts them to shame
though not at all useful in all applications but for HDI and other hi-rel
requirements.
I'd sure appreciate information concerning advancements over the years or,
in this case, weeks and/or months.
Super stuff,
MoonMan
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Date: Fri, 8 Mar 2002 08:00:05 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Don Vischulis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Don Vischulis <[log in to unmask]>
Subject: Re: Fab Process question related to ENIG
X-To: Earl Moon <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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Earl
Have you considered a solder fountain for those caps? Less controlled than
the wave, but probably better than an iron or a selective pallet for a 3X3
area.
Don Vischulis
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Earl Moon
Sent: Friday, March 08, 2002 5:35 AM
To: [log in to unmask]
Subject: Re: [TN] Fab Process question related to ENIG
Yeh, they and many other things get shorted out often. Our design engineers,
in their infinite wisdom did many things wrong. There's one 3 inch square
analog area they placed at the corner of an 11x11" board with you know what
- about a dozen of those blue beuaties, electrolytic caps that is so wave
solder a necessity. Some other through hole stuff as well that needn't be.
Could have been SMT or left on the R/F daughter card. It's all a big
compromise.
Just thinking out loud really about the bottom side solder shields. Anyone
else so I don't have to go to blind vias or wave pallets?
MoonBaseMan
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Date: Fri, 8 Mar 2002 08:01:56 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Fab Process question related to ENIG
X-To: [log in to unmask]
Don,
Thank you much. I honestly forgot about one of my favorite processes. I'll
check out the possibility relative to the design and assembler
capability/recommendation feedback.
Thanks again,
Earl
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Date: Fri, 8 Mar 2002 09:11:39 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Steve Telgen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Steve Telgen <[log in to unmask]>
Subject: (NTC) Adios
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I would like to bid you all farewell for the time being, as yet another
board house bites the dust. It's been interesting reading about all the
problems and solutions that can present themselves on a daily basis,
although I could only relate to the fab end.
Good luck to all
Steve Telgen
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Date: Fri, 8 Mar 2002 08:32:11 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: (NTC) Adios
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Good Bye and Good luck. =20
Kathy=20
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<DIV>Good Bye and Good luck. </DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
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Date: Fri, 8 Mar 2002 08:45:03 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jason Gregory <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jason Gregory <[log in to unmask]>
Subject: Re: BGA Soldersphere Attach - low tech method Inquiry
X-To: [log in to unmask]
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Guys,
It's Winslow Automation and the product is Solderquik. It works
GREAT!!! (I have always been a big supporter of this). Info is:
Winslow Automation
1940 Concourse Dr.
San Jose, CA. 95131
(408)526-1213 (I think the area code changed, to what...I don't know)
Hope this helps.
If you want off-line details of operation, let me know.
Jason Gregory
Software Specialist
Sanmina-SCI - Tech Center Austin
15508 Bratton Lane
Austin, Tx. 78728
(512)246-5648
(512)796-1997 cell
(512)388-0898 fax
[log in to unmask]
>>> [log in to unmask] 03/07/02 06:00PM >>>
Brad,
It's Russ Winslow, he used to be a Technetter, but I haven't seen a
post from
him for quite a while...
-Steve Gregory-
> Dave,
> As the ole song goes... I remember them well. The fellow that
"invented"
> the
> preforms bought that division back from Raychem and is now located
in
> southern California. I just can't remember the name, sorry. When I
looked
> them up a year or two ago the folks at Raychem were able to give me
his
> name
> and number. Good luck. I eventually went to the "add-a-lead" folks
for my
> application.
>
> Boston Brad
>
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Date: Fri, 8 Mar 2002 08:50:10 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: (NTC) Adios
X-To: Kathy Kuhlow <[log in to unmask]>
Kathy,
I sure echo that. Damn sad we all go through this. Part of it is the stuff
you currently spoke to and, as management, must be very concerned about.
Certainly wish everyone the best when going through this and there are many.
I just would like to know how many individuals, and how many companies lost
as well.
Earl
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Date: Fri, 8 Mar 2002 10:03:35 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
tony steinke <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: tony steinke <[log in to unmask]>
Subject: oxide weight gain
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Greetings,
Just taking a little survey on oxide weight gain prior to press =
lamination.. Can anyone tell me what kind of weight gain(ex. milligrams =
per sq. centimeter) that you are consistently achieving and what =
chemistry you are currently using.
Thanks in advance,
Tony Steinke
[log in to unmask]
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<BODY bgColor=3D#fff8e0>
<DIV><FONT face=3DArial size=3D2>Greetings,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Just taking a little survey on oxide =
weight gain=20
prior to press lamination.. Can anyone tell me </FONT><FONT face=3DArial =
size=3D2>what kind of weight gain(ex. milligrams per sq. =
centimeter) that you=20
are consistently achieving </FONT><FONT face=3DArial size=3D2>and what =
chemistry you=20
are currently using.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Thanks in advance,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Tony Steinke</FONT></DIV>
<DIV><FONT face=3DArial size=3D2><A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A></FO=
NT></DIV>
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Date: Fri, 8 Mar 2002 09:11:25 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Houston, Terri" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Houston, Terri" <[log in to unmask]>
Subject: Looking for 18-mil-diameter, gold-plated, nail-head pins
Hi folks - happy Friday,
We have an assembly "situation" that can be solved by using an 18-mil gold
pin, which we plan to wirebond to its top--so we're looking for a nailhead
design with gold plating. It can be anywhere from 1/4 to 1/2" in length.
Our thought was to go to the folks making pin grid arrays to see if we can
buy/get some (only need about 100 or so), but no luck.
Any sources for such pins would be gratefully appreciated.
Thanks in advance,
Terri
Terri Houston
ATK
Clearwater, FL
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Date: Fri, 8 Mar 2002 15:14:18 -0000
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Mike Fenner <[log in to unmask]>
Subject: Re: VERY IMPORTANT QUESTION CONCERNING CLEANING TEST PINS
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
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I was hoping someone else would make this suggestion, but they haven't so I
will risk it.
Alternatively you could use a solderpaste designed for pin testing. When
properly formulated these do not clog pins or machinery so none of these
questions, additional processes and uncertainties arise.
Kind Regards
Mike Fenner
Applications Engineer, European Operations
Indium Corporation
T: + 44 1908 580 400
M: + 44 7810 526 317
F: + 44 1908 580 411
E: [log in to unmask]
W: www.indium.com
Leadfree: www.Pb-Free.com
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of
[log in to unmask]
Sent: Thursday, March 07, 2002 11:29 PM
To: [log in to unmask]
Subject: Re: [TN] VERY IMPORTANT QUESTION CONCERNING CLEANING TEST PINS
Hi Earl! Doug went home for the day but I sure he'll chime in tomorrow
(right after his first Mtn. Dew)! We have looked at this issue at Collins
as we slowly move into using reduced clean/no-clean solder practices. One
method which does work is to use a brush and an appropriate solvent to
"scrub" the test points of your test fixture. The type of flux residue you
are dealing with will determine the type of solvent and the "robustness" of
your test pin will determine the stiffness of the brush bristles/amount of
pressure you can use without damaging the test pins. This methodology would
not be appropriate for a high volume operation but if you are in a high
mix/low volume assembly mode it can be setup as a preventative maintenance
operation. Not rocket science but effective. Good Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
Earl Moon <[log in to unmask]>@ipc.org> on 03/07/2002 03:18:53 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Earl Moon <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: [TN] VERY IMPORTANT QUESTION CONCERNING CLEANING TEST PINS
Ok you folks, especially Doug and Brian,
You let this gentleman down and me as well. So much for my appeal but the
question is:
Techneters,
I would like to know if some of you have a suggested procedure for cleaning
of pins for In Circuit Testing, and if is possible to use a solvent, and
what kind of.
Is it possible that flux residues can go into spring machinery? If that
true, how can I clean them of flux residues and how often I must do it?
Regards,
Mario,
I answered knowing you all would come through:
I'm definitely not a cleaning or cleanliness expert. Doug Pauls and Big
Brian Ellis, who contribute greatly to the forum is/are.
I only know flux chemistries are varied. What it takes to clean or
neutralize one, is not right for another.
This is a big issue faced everyday by so many throughout industry, I'm
surprised more people aren't asking your vital qestion.
I would post again or contact someone more qualified as Doug Pauls
([log in to unmask]) and/or Brian Ellis ([log in to unmask]).
I too would be very interested in the chemistry, though it must be
"compatible" and capable of cleaning the indicated flux/chemistry in some
sort of optimized process whether batch or other.
Best regards,
Earl
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Date: Fri, 8 Mar 2002 11:05:45 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Phil Nutting <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Nutting <[log in to unmask]>
Subject: looking for a name
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Good morning all,
I know what I'm going to ask is outside the realm of circuit boards, but =
here goes anyway. Back in my formative years I used what I remember as =
a Rotodex Punch. It is a sheet metal punch with a large rotating head =
with round punches from 1/16 inch up to about 1=BD diameter. It is used =
mostly for one-off jobs as this sort of thing would be part of the =
modern computer controlled sheet metal punching machines.
I'm looking for the right name so I can look for one on the used market. =
It is always easier to find equipment when you use the right name or =
terminology.
Thanks in advance.
Phil Nutting
Manufacturing Engineer
Kaiser Systems, Inc.
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Date: Fri, 8 Mar 2002 17:13:56 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guenter Grossmann <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guenter Grossmann <[log in to unmask]>
Subject: Antw: [TN] Thermal Shock
Mime-Version: 1.0
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Nancy
- Depending on which degradation your after I believe results from =
thermal shocks are meaningless when it comes to lifetime in service. =
Actually I suspect most of the time this is the case.
- What do you define as thermal shock in terms of deg. C / min temperature =
ramp anyway?
Have a great weekend
Guenter
.
EMPA
Swiss Federal Institute for Materials Testing and Research
Centre for Reliability
Dipl. Eng. Guenter Grossmann
8600 Duebendorf
Switzerland
Phone: xx41 1 823 4279
Fax : xx41 1823 4054
mail: [log in to unmask]
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Date: Fri, 8 Mar 2002 11:21:39 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
tony steinke <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: tony steinke <[log in to unmask]>
Subject: Re: (NTC) Adios
MIME-Version: 1.0
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Steve,
Take care and keep your head high. Along with Earl it is very
disheartening when a board shop can no longer stay afloat, although
fingers can be pointed to management I believe the true reason is
overseas competition and pricing. I recently had a three year stint
with a small volume shop producing medium to low end density
of boards and the pricing wars are incredible. Double sided 18 x 24
inch panels are being produced overseas for less than $45.00. The ironic
thing is they resorted to subcontracting through an overseas broker to stay
competetive and the quality of the boards being built were terrible.(voids,
barrel cracks, low copper thickness, wrong hole size)
Just my 2 cents.
----- Original Message -----
From: Steve Telgen <[log in to unmask]>
To: <[log in to unmask]>
Sent: Friday, March 08, 2002 6:11 AM
Subject: [TN] (NTC) Adios
> I would like to bid you all farewell for the time being, as yet another
> board house bites the dust. It's been interesting reading about all the
> problems and solutions that can present themselves on a daily basis,
> although I could only relate to the fab end.
> Good luck to all
>
> Steve Telgen
>
> --------------------------------------------------------------------------
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Date: Fri, 8 Mar 2002 10:41:11 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: (NTC) Adios
X-To: [log in to unmask]
Lot more than 2. The whole situation can get out of hand.
I have a company here that designs, terribly, semi-sophisticated baords,
hence my recent posts, based on price alone but for some minor management
efforts to placate customers in the East to buy them. The designs are
horrible but the folks in Asia find, they think, ways to work around C clamp
mentality and product. They'll take anything and we bitch about it rightly
so but need the bucks, or not.
It is amazing what happens when an economy turns South when the efforts
should be directed North to keep things upward and onward. Damned if I'll
buy another PDA made of no intention of providing quality or anything
resembling crap. Hell, with crap, you can smell it.
Damn shame,
Earl
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Date: Fri, 8 Mar 2002 09:08:10 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Patel <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Patel <[log in to unmask]>
Organization: interWAVE Communications, Inc.
Subject: Re: Fab Process question related to ENIG
X-To: [log in to unmask]
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I visited my fab house yesterday and according to them they do apply ENIG after solder mask application
but if there is a tenting/plugging of vias are required then that portion (of plugging) they do after
ENIG application.
I believe this should be a better solution as now solder won't go other side during reflow at assembly
house (via in pad). Engineering manager at assembly house said that most of flux will evaporate during
reflow and filler plus flux residue will be neutralized if not cleaned from the small vias using DI
water at wash.
Give me your thoughts
re,
ken patel
[log in to unmask] wrote:
> Hi, Ken,
>
> I believe ENIG (or any other plating) can be applied either before or after
> soldermask, but normally it's applied before to save on plating solution
> costs among other things.
>
> Yes, the immersion gold process is aggressive, so be sure your fab house is
> using an ENIG-compatible mask. This often involves using an alternative
> hardener in the mask mix, and it's better if your pads are not solder mask
> defined, as the plating tends to get underneath the edges.
>
> Masking from one side only, the holes can be cleaned, but it depends to a
> large extent on the diameter of the holes and the capability of your fab
> house. 10 mils and above, I believe, are OK, but smaller than that, the
> cleaning process may have trouble penetrating properly and cleaning out the
> bottom of the holes. I suggest you leave the holes open at both ends unless
> you absolutely have to mask one end.
>
> Peter
>
> Ken Patel
> <[log in to unmask] To: [log in to unmask]
> OM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
> Sent by: Aero/ST Group)
> TechNet Subject: [TN] Fab Process question related to
> <[log in to unmask] ENIG
> ORG>
>
> 03/08/02
> 01:40 AM
> Please
> respond to
> "TechNet
> E-Mail
> Forum.";
> Please
> respond to
> Ken Patel
>
> At what stage the electroless nickel and immersion gold process is
> applied, is it after the solder mask application or before? I believe
> normally it is after the solder mask application but I want to verify
> it. I have heard that chemistry involved is very nasty if left on the
> board. If I plug or mask via holes from one side, I want to make sure
> that there is no residue left of that nasty chemistry. Can it be cleaned
> if mask from one end? Any comments?
>
> re,
> Ken Patel
>
> ---------------------------------------------------------------------------------
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Date: Fri, 8 Mar 2002 11:16:21 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dupuis, Dave" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dupuis, Dave" <[log in to unmask]>
Subject: Re: looking for a name
X-To: Phil Nutting <[log in to unmask]>
In-Reply-To: <[log in to unmask]
sys.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"; format=flowed
Content-Transfer-Encoding: quoted-printable
At 11:05 AM 3/8/2002 -0500, you wrote:
>Good morning all,
>
>I know what I'm going to ask is outside the realm of circuit boards, but=20
>here goes anyway. Back in my formative years I used what I remember as a=
=20
>Rotodex Punch. It is a sheet metal punch with a large rotating head with=
=20
>round punches from 1/16 inch up to about 1=BD diameter. It is used mostly=
=20
>for one-off jobs as this sort of thing would be part of the modern=20
>computer controlled sheet metal punching machines.
>
>I'm looking for the right name so I can look for one on the used=20
>market. It is always easier to find equipment when you use the right name=
=20
>or terminology.
>
>Thanks in advance.
>
>Phil Nutting
>Manufacturing Engineer
>Kaiser Systems, Inc.
>
>---------------------------------------------------------------------------=
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------
Phil,
I remember using such a device and I think the name was ROTEX.
Regards,
David DuPuis, Associate Engineer
Rice Lake Weighing Systems
The Content of this message and/or attachments is proprietary and=
confidential.
Please forward any misuse or inadvertent receipt to [log in to unmask]
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Date: Fri, 8 Mar 2002 11:19:25 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: VERY IMPORTANT QUESTION CONCERNING CLEANING TEST PINS
X-To: [log in to unmask]
MIME-Version: 1.0
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The Moonman takes a shot with:
Ok you folks, especially Doug and Brian,
You let this gentleman down and me as well. So much for my appeal but the
question is:
Doug, wounded, replies:
Sheesh, give a guy a break. I DO occasionally go off and work for my
employer.
The question has been asked about cleaning off built-up flux residues in
in-circuit testing (ICT) pins. Many good answers have been given so far.
I would stay away from any kind of immersion or heavy liquid applications
of solvent. You don't want the solvents or cleaning agents to get down in
the spring areas, because you won't get them out, and corrosion can occur.
To clean or solvate the residue begs the question of what the residue
consists of. Different low solids fluxes will have different solubility
parameters, so the solvent chosen depends on the flux used. Pose the
question back to the manufacturer of the flux you are using.
I like the idea of a stiff nylon brush *moistened* with a suitable solvent
and carefully applied. And NO, I would not suggest Mountain Dew as a
universal solvent. I've seen what it does to keyboards.
Your fixture should also be inverted or canted such that the fluid will not
run down into the barrel of the pin. The idea of two brushes, one for
primary cleaning and one for "rinsing" was a good one as well. If you
choose to do the operation dry, as I have heard some people do, then the
vacuum cleaner and ESD ionizer is a good way to go.
I don't know how often you replace pins. We replace ours every X hits, but
I don't have that figure immediately handy. You may just have to replace
pins more often, depending on how costly that is for your volume.
As Dave Hillman pointed out, we are now starting to face the same question
as well as we start to try to cut down on the cleaning we do after our
primary clean. Since ICT is affected, we have to answer that question. I
wish I had a better answer to give.
Doug Pauls
Rockwell Collins
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Date: Fri, 8 Mar 2002 12:20:30 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Subject: Re: CIC... ONCE AGAIN
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hey Jim,
I'm curious. Did you hear, "no problem . . . " from the Fab house or the
Sales guy? You're giving me flashbacks, Sales booked a new order (with
material we haven't even played with) and us Fab Engineers developed a new
process on the fly - for a quick turn! Fortunately, my lamination stuff
usually required only minor tweaking. I feel your pain.
Hans
Gunship Motto: "You can run . . . but you'll only die tired."
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: Marsico, James [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 4:07 PM
To: [log in to unmask]
Subject: [TN] CIC... ONCE AGAIN
Remember all of those e-mails back in November regarding MLBs with CIC
layers? Well, it's time again... We went ahead and designed a CIC board,
mainly because our present board house said "no problem, we do it all the
time". Well, he fell on his face and now, 3 months after placing the order,
he can't deliver. Obviously, he has little, if any, experience with CIC.
His problem is "...inserting the invar material into the copper tanks kills
the solution and provide no plating". He is suggesting gold plating the
vias first, then copper plating. Has anyone ever heard of this before? Is
this a viable solution? Anyway, we're now looking for a new board supplier
who HAS experience with CIC. Any recommendations? This is a prototype run
of 5 boards only.
Thanks again for all your help,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
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Date: Fri, 8 Mar 2002 10:19:49 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: (NTC) Adios
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
huh???
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Friday, March 08, 2002 9:41 AM
To: [log in to unmask]
Subject: Re: [TN] (NTC) Adios
Lot more than 2. The whole situation can get out of hand.
I have a company here that designs, terribly, semi-sophisticated baords,
hence my recent posts, based on price alone but for some minor management
efforts to placate customers in the East to buy them. The designs are
horrible but the folks in Asia find, they think, ways to work around C clamp
mentality and product. They'll take anything and we bitch about it rightly
so but need the bucks, or not.
It is amazing what happens when an economy turns South when the efforts
should be directed North to keep things upward and onward. Damned if I'll
buy another PDA made of no intention of providing quality or anything
resembling crap. Hell, with crap, you can smell it.
Damn shame,
Earl
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Date: Fri, 8 Mar 2002 12:36:02 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: IPC-9151
X-To: Earl Moon <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Did you mean 9251? I could not find 9151 on IPC's site.
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Earl Moon
> Sent: Friday, March 08, 2002 7:25 AM
> To: [log in to unmask]
> Subject: [TN] IPC-9151
>
>
> Folks,
>
> I've just downloaded my copy of the formative IPC-9151. Just
> wonder how many
> others have done the same.
>
> I cannot comment on the docuement but in one way. This seems an awsome
> undertaking to say the least. Not a negative comment, but this seems not
> only an endless task but one almost impossible due to almost
> daily technical
> advances.
>
> Having said that, it is easy to see not all of us are doing complex SMT
> only. Questions still arise, as they should, concerning conversion factors
> from thru hole to SMT with respect to reliability and cost.
>
> Damn interesting stuff and must reflect how all those 279 equations are
> being applied.
>
> What a database this and will be,
>
> Earl Moon
>
> ------------------------------------------------------------------
> ---------------
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> ---------------
>
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Date: Fri, 8 Mar 2002 10:31:23 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: looking for a name
X-To: [log in to unmask]
MIME-Version: 1.0
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Strippit made one of these waaaay back when.
-----Original Message-----
From: Dupuis, Dave [mailto:[log in to unmask]]
Sent: Friday, March 08, 2002 10:16 AM
To: [log in to unmask]
Subject: Re: [TN] looking for a name
At 11:05 AM 3/8/2002 -0500, you wrote:
>Good morning all,
>
>I know what I'm going to ask is outside the realm of circuit boards, =
but=20
>here goes anyway. Back in my formative years I used what I remember =
as a=20
>Rotodex Punch. It is a sheet metal punch with a large rotating head =
with=20
>round punches from 1/16 inch up to about 1=BD diameter. It is used =
mostly=20
>for one-off jobs as this sort of thing would be part of the modern=20
>computer controlled sheet metal punching machines.
>
>I'm looking for the right name so I can look for one on the used=20
>market. It is always easier to find equipment when you use the right =
name=20
>or terminology.
>
>Thanks in advance.
>
>Phil Nutting
>Manufacturing Engineer
>Kaiser Systems, Inc.
>
>-----------------------------------------------------------------------=
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------
>Technet Mail List provided as a free service by IPC using LISTSERV =
1.8d
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in
>the BODY (NOT the subject field): SIGNOFF Technet
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[log in to unmask]:=20
>SET Technet NOMAIL
>To receive ONE mailing per day of all the posts: send e-mail to=20
>[log in to unmask]: SET Technet Digest
>Search previous postings at: www.ipc.org > On-Line Resources & =
Databases >=20
>E-mail Archives
>Please visit IPC web site http://www.ipc.org/html/forum.htm for =
additional
>information, or contact Keach Sasamori at [log in to unmask] or =
847-509-9700=20
>ext.5315
>-----------------------------------------------------------------------=
----
------
Phil,
I remember using such a device and I think the name was ROTEX.
Regards,
David DuPuis, Associate Engineer
Rice Lake Weighing Systems
The Content of this message and/or attachments is proprietary and
confidential.
Please forward any misuse or inadvertent receipt to [log in to unmask]
------------------------------------------------------------------------=
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in
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[log in to unmask]: SET
Technet NOMAIL
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additional
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847-509-9700
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Date: Fri, 8 Mar 2002 11:36:51 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: IPC-9151
X-To: [log in to unmask]
9151....
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Date: Fri, 8 Mar 2002 11:37:49 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: (NTC) Adios
X-To: [log in to unmask]
what?
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Date: Fri, 8 Mar 2002 12:51:26 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Creswick, Steven" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Creswick, Steven" <[log in to unmask]>
Subject: Re: Looking for 18-mil-diameter, gold-plated, nail-head pins
X-To: "Houston, Terri" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Terri,
The nail head pin which you describe sounds very much like what us "hybrid"
users would find in a bath-tub, or 'stamped' package. Unfortunately for
glass/metal sealed packages such as this, they are plated after the glass
sealing operation so they are not likely to be of great use to you (in the
unplated state). First two sites.
http://www.sinclairmfg.com/
http://www.olinaegis.com/
Your thoughts of checking with PGA manufacturers is good. Check with these
for PGA package pins. They will be plated prior to brazing (soldering for
Amkor) to the package. The hard part may be in finding just exactly who to
talk to, to get what you want, due to their large size. You could also
check out a few others that make laminate-based PGA's
http://www.kyocera.com/Kai/semiparts/Products/aln.htm
http://generalceramics.com/
http://www.amkor.com
The nail-head pins are typically made from Alloy 42, or kovar - so if not
plated, they can rust. If you look for nail-heads for power packages, they
will be OFHC copper, but also typically much larger in diameter.
As a word to your processing people. The closer the nail-head is to the
'substrate/solder joint' the more ultrasonically stable it will be = less
grief bonding to it.
Fine wire bonding (<2 mil diameter gold or aluminum) to 18 mil dia leads
with nail-heads more than 25-35 mils above the mounting braze, glass, or
solder is problematic. Get the head as low to the solder joint as possible
(without getting it INTO the solder). Make sure all condensed volatiles are
removed from the heads for more consistent bond results.
Heavy wire bonding (>3-20 mil dia aluminum) to an 18 mil dia lead & nail
head will essentially not be possible, due to the pin being far to unstable
during the bonding cycle (unless the underside of the nail head is in
contact with
the solder - just make sure the solder does not wrap around the nail head to
the top-side of the nail.
Hope this has been of some assistance.
Steven Creswick - Gentex Corporation
-----Original Message-----
From: Houston, Terri [mailto:[log in to unmask]]
Sent: Friday, March 08, 2002 10:11 AM
To: [log in to unmask]
Subject: [TN] Looking for 18-mil-diameter, gold-plated, nail-head pins
Hi folks - happy Friday,
We have an assembly "situation" that can be solved by using an 18-mil gold
pin, which we plan to wirebond to its top--so we're looking for a nailhead
design with gold plating. It can be anywhere from 1/4 to 1/2" in length.
Our thought was to go to the folks making pin grid arrays to see if we can
buy/get some (only need about 100 or so), but no luck.
Any sources for such pins would be gratefully appreciated.
Thanks in advance,
Terri
Terri Houston
ATK
Clearwater, FL
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Date: Fri, 8 Mar 2002 10:22:22 -0800
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jim Axton <[log in to unmask]>
Subject: Re: (NTC) Adios
X-To: Steve Telgen <[log in to unmask]>
In-Reply-To: <001201c1c6ab$2b3b5320$4200a8c0@stelgen>
MIME-Version: 1.0
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Steve,
Good luck,
Jim Axton, DDI
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Steve Telgen
Sent: Friday, March 08, 2002 6:12 AM
To: [log in to unmask]
Subject: [TN] (NTC) Adios
I would like to bid you all farewell for the time being, as yet another
board house bites the dust. It's been interesting reading about all the
problems and solutions that can present themselves on a daily basis,
although I could only relate to the fab end.
Good luck to all
Steve Telgen
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Date: Fri, 8 Mar 2002 10:22:22 -0800
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jim Axton <[log in to unmask]>
Subject: Re: Looking for 18-mil-diameter, gold-plated, nail-head pins
X-To: "Houston, Terri" <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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Terri,
Call Test Connections...909-981-1810...
They are very good and fast with
custom applications....Ask for Ed Shea
Jim Axton, DDI
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Houston, Terri
Sent: Friday, March 08, 2002 7:11 AM
To: [log in to unmask]
Subject: [TN] Looking for 18-mil-diameter, gold-plated, nail-head pins
Hi folks - happy Friday,
We have an assembly "situation" that can be solved by using an 18-mil gold
pin, which we plan to wirebond to its top--so we're looking for a nailhead
design with gold plating. It can be anywhere from 1/4 to 1/2" in length.
Our thought was to go to the folks making pin grid arrays to see if we can
buy/get some (only need about 100 or so), but no luck.
Any sources for such pins would be gratefully appreciated.
Thanks in advance,
Terri
Terri Houston
ATK
Clearwater, FL
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Date: Fri, 8 Mar 2002 18:27:27 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Subject: Re: Flattening a board during assembly
MIME-Version: 1.0
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Hey Daan,
Here's a generic dewarp I've used in the past. You or preferably the Fab
house should have an oven large enough to load the panels or boards. If
done properly you won't see re-warp during the assembly process. Dewarp is
not a board friendly process and I shudder to consider the longer term
reliability issues but it gets them flat when nothing else will. It's
usually better to dewarp boards instead of panels because of stress relief
that occurs at Route. On the other hand a 2 or 4 up panel cuts your cycle
time down considerably.
1. Load warped panels into oven. (Keep stacks reasonable sized: ~500 mils
of board stock or less - 6-10 panels depending on thickness)
2. Place several Caul plates (that match or overlap panel size) ~50 pounds
of weight & Use Kraft Paper (Sulfur Free) to protect panels
3. Bake at 340+ F for 4-6 hours (Material must be at or slightly above Tg)
4. Cool slowly to room temp.
5. Manually assist (Bend & Twist) the dewarp at Final Inspect. (Great
upper body workout on those 200+ board shipments)
6. Inspect Panels on Flatness (Granite) Table. ("Tap" test the 4 corners.
If the board's corners don't touch the table you've got more flexing to do.)
Hans
AC-130 Gunship Motto: "You can run but, you'll only die tired."
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: d. terstegge [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 11:48 AM
To: [log in to unmask]
Subject: [TN] Flattening a board during assembly
Hi Technetters,
We've got a batch of boards here that's really twisted (about 1.5 % when
measured according to IPC-TM-650) due to imbalanced design. The customers is
not willing to change the design, and we discussed with them the possibility
of using a carrier-frame for flattening these boards while they are
processed through our SMT-line.
My worry is that this results in unacceptable stress in the solder joints as
soon as the board is released from the carrier. Fortunately there's no BGA
on this board, but it does have a small QFP and some 40 mm long
SMT-connectors. It's supposed to be a high-reliability military product.
Does anyone have any data on the effects of such internal stresses ?
Also other comments are welcome.
Best regards.
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
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Date: Fri, 8 Mar 2002 13:59:41 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Yacovitch, Bill" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Yacovitch, Bill" <[log in to unmask]>
Subject: Re: Mil spec translation to IPC needed
X-To: "Houston, Terri" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Terri,
The answer to your technical question is:
MIL-S-13949/10 (GIN) is now IPC-4101/40 [Polyimide, 200 degree C min Tg]
MIL-S-13949/10 (GIL) is now IPC-4101/41 [Polyimide, 250 degree C min Tg]
MIL-S-13949/10 (GIJ) is now IPC-4101/42 [Polyimide, 200-250 degree C Tg]
I recommend you use the IPC-4101/41 as it is most commonly available and
good stuff.
These are all standard Eglass woven. The 4101 does not differentiate
between B and C stage, hence the one slash number. Be careful when using
the Poly in today's complex surface mount, the FR4 has a better peel
strength for small SM lands and high aspect holes in small inner lands run
into tough challenges relative to etchback.
Bill Yac
-----Original Message-----
From: Houston, Terri [mailto:[log in to unmask]]
Sent: Monday, February 18, 2002 2:33 PM
To: [log in to unmask]
Subject: [TN] Mil spec translation to IPC needed
Hi folks,
I'm looking for the IPC equivalent for laminate MIL-S-13949/10 type GIN and
prepreg MIL-S13949/13 type PGI materials.
If anyone knows what these materials are currently called in the IPC specs,
it would be greatly appreciated.
Thanks,
Terri
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Date: Fri, 8 Mar 2002 14:08:40 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: (NTC) Adios
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Steve,
We will see you in the hallways of high tech. Send me a resume and I will
plug around for you. I also know a few very good placement people that
national connections. Keep in touch.
Coretec's Boston Brad
781 858 0783
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Date: Fri, 8 Mar 2002 14:39:34 -0500
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Gerard O'Brien <[log in to unmask]>
Subject: test lab recommendations
MIME-Version: 1.0
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I need a recommendation for a test lab with capability to differentiate
different grades of Aluminum, i.e. 3003 from 6061 etc.
Regards
Gerard O'Brien
Photocircuits Corp.
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Date: Fri, 8 Mar 2002 14:22:23 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Tantalum Capacitor Failure
MIME-Version: 1.0
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Ken,
We use 20 tantalum caps in parallel in a military radio and have seen a
much higher fallout in our factory testing in the last few years. I
believe the cell phone industry placed a major burden on the major
capacitor suppliers, who could barely keep up. It appears the quality
levels have dipped slightly because of the extra demand. This makes proper
derating and series resistance even more critical. ESR comes into play as
well when these caps are in parallel. The good caps will also dump their
energy into the leaky one, as well as your supply voltage, to burn them up.
I agree with John, AVX & Kemet have valuable technical information
abstracts on surge failures and construction. They also supply a more
surge robust, low ESR, capacitor that can take more abuse if your
application requires it.
Good luck
Jim Carlson
Rockwell Collins Reliability Engineer
John Maxwell <[log in to unmask]>@ipc.org> on 03/07/2002 02:12:04 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to John Maxwell <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: Re: [TN] Tantalum Capacitor Failure
Ken,
As a side note, tantalum is like most other valve metals and burns when
localized heating gets too high. There is plenty of oxygen (Ta2O5) in the
dielectric and extra provided by the manganese dioxide cathode (MnO2) so
once failure starts the part consumes itself. Unfortunately one looses the
evidence. Over voltage, unrestricted voltage ramp up (that's why vendors
recommend a series resistor), reflow profile especially if the part has a
polymer cathode or if there is too rapid a cool down after reflow and of
course weak parts all are on the list for potential root cause. I suggest
getting their recommended application notes along with those from Kemet and
AVX and see if thermal or electrical conditions are outside manufacturers
recommendations. That analysis should get you down the trail of determining
what is happening.
John Maxwell
At 12:57 PM 3/7/02 -0600, you wrote:
>I am wondering if anybody has had similiar issues or can help resolve
>a failure we are experiencing. On about 4% of our units at first time
>power up 1 of two capacitors that are in parallel are burning up. Upon
>replacement the capacitor it to will work fine.
>The cap we are using is Vishay Sprague 594D336X9035R2. Since the other
>capacitor in parallel is unaffected, I am assuming that it is a Vishay
>issue.
>
>Per Vishay:
>The root cause of failure could not be identified. It is requested that
the
>failure circumstances be reviewed. Failures can occur due to thermal
stress
>during board mounting, strenuous application conditions, or because of
>reduced capacitor capability. There was no specific evidence of reduced
>capacitor capability identified. Please be aware, the thermal profile used
>for board mounting, and the application conditions (even transient
>conditions such as may occur with unregulated power supplies) can affect
>product performance.
>
>Has anyone else experienced a similiar failure or have an opinion? I wish
I
>could pre-test the caps prior to them burning to supply an intact
>capacitor to Vishay for their analysis.
>
>Please note: When allowed to play its course the cap turned red hot,
>unsoldered itself from the PCB and burned a whole in the lab bench!
>
>
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Date: Fri, 8 Mar 2002 14:23:17 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: BGA Soldersphere Attach - FYI Thanks
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Hi folks! Just a quick thanks to everyone who sent me a response on my
preform question - exactly what I needed! Ya just gotta love this forum -
quick, concise, no commercials, and absolutely straightforward assistance.
Now that I am armed with my preform information, I shall go out and attempt
to remove the alligators in the swamp. Thanks again.
Dave
Steve Owen <[log in to unmask]>@ipc.org> on 03/08/2002 02:50:47 AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Steve Owen <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: Re: [TN] BGA Soldersphere Attach - low tech method Inquiry
Dave,
If you go to www.intertronics.co.uk you should be able to find the
"preforms" you need we have just received samples.
Steve.
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: 07 March 2002 23:20
To: [log in to unmask]
Subject: [TN] BGA Soldersphere Attach - low tech method Inquiry
Hi TechNet Land! I have had one too many Diet Cokes today and thus my
brains have quit functioning (both braincells at once) - therefore I pose
the following question to ya'all:
I distinctly remember a company called "Raychem" which used to sell a
solderball area "preform" which you could use to re-bump a BGA component
after you removed it off an assembly. The "preform" used a water soluble
material which could be removed in a water cleaning system after reflowing
the solderspheres onto the BGA. I went looking on the web and can't find a
"Raychem preform" group (I found lots of Raychem but not the one I
remember). Have I had too much Diet Coke? Does anyone remember these guys?
Or have they closed up shop?
As always, thank in advance!
Dave Hillman
Rockwell Collins
[log in to unmask]
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Date: Fri, 8 Mar 2002 12:29:01 -0800
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Hans Shin <[log in to unmask]>
Subject: Re: test lab recommendations
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
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What kind of samples are they? Size?
Hans Shin
PTL
www.pacifictesting.com
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Gerard O'Brien
Sent: Friday, March 08, 2002 11:40 AM
To: [log in to unmask]
Subject: [TN] test lab recommendations
I need a recommendation for a test lab with capability to differentiate
different grades of Aluminum, i.e. 3003 from 6061 etc.
Regards
Gerard O'Brien
Photocircuits Corp.
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Date: Fri, 8 Mar 2002 14:26:18 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: (NTC) Adios
X-To: [log in to unmask]
bad post. bad day/week/month. you had/have to be here. carlile is right for
me not to rag so much but I won't stop until people like this stop regarding
workers for management gains alone no matter the poor quality, or they shape
up or go out of business. Employees should examine companies better as well
just for job sake.
apologies, kinda of,
moonman
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Date: Fri, 8 Mar 2002 12:27:12 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Pelkey, Glenn" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Pelkey, Glenn" <[log in to unmask]>
Subject: Re: Thermal Shock
X-To: Nancy Trumbull <[log in to unmask]>
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Hi Nancy,
Question 1:
Thermal Shock has some room for interpretation, but in general, it
is a high rate of temperature change. When I say high, I mean greater =
than
30 C/min. Even within the mil specs there is some confusion: =
Mil-Std-883,
Method 1010 is termed "Temperature Cycling" and requires less than 1 =
minute
transfer time between extremes. However, a similar test method in
Mil-Std-202, Method 107 is termed "Thermal Shock" and allows up to 5 =
minutes
transfer time. Other Thermal Shock test methods use liquid as the =
medium of
heat exchange rather than air, but I'm assuming you're using air.
Question 2:
If the failure mechanism from the Thermal Shock test is the same as
would be expected in the field, then there is an Acceleration Factor =
you can
use to relate the two. Just do an internet search for "Coffin-Manson" =
for
the equation or let me know if you need further help...I can set you up =
a
quick spreadsheet. However, the key is same failure mechanism. As =
pointed
out by others in this group, most soldered assemblies experience slow =
rates
of change, which affect solder joints more than fast rates of change. =
But,
your end use environment may be different.
Question 3:
I'm not sure what you're asking here. Can you elaborate?
Glenn
-----Original Message-----
From: Nancy Trumbull [mailto:[log in to unmask]]
Sent: Friday, March 08, 2002 5:40 AM
To: [log in to unmask]
Subject: [TN] Thermal Shock
Hi Everyone,
It has been awhile for me. I have had so much work that I've had =
no
time to take part in Technet. So please forgive me.
My Question :
1)What is the equivalent of a Thermal shock cycle?
2) How do I evaluate a failure if it fails with-in 80 cycles?
3) How do I break down a cycle so it would pretain to the part?
The cycle we have been told to use and evaluate our parts with is the
following:
160 cycles
At -30=B0C =BD hr =AE + 80=B0C =BD hr
If needed this is an assembled board.
As it is now I can only say it passed or it failed. I can not say how =
long
the part will last, good or bad.
I have looked in IPC Test Method book TM-650 but could not find any =
thing.=20
Well if any one has any thing let me know. If not I thank each and =
every one
of you for your time.=20
Have a good week end.
Nancy T.
=20
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in
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[log in to unmask]: SET
Technet NOMAIL
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E-mail Archives
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<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META NAME=3D"Generator" CONTENT=3D"MS Exchange Server version =
5.5.2653.12">
<TITLE>RE: [TN] Thermal Shock</TITLE>
</HEAD>
<BODY>
<P><FONT SIZE=3D2>Hi Nancy,</FONT>
</P>
<P><FONT SIZE=3D2>Question 1:</FONT>
<BR> <FONT SIZE=3D2>Thermal =
Shock has some room for interpretation, but in general, it is a high =
rate of temperature change. When I say high, I mean greater than =
30 C/min. Even within the mil specs there is some =
confusion: Mil-Std-883, Method 1010 is termed "Temperature =
Cycling" and requires less than 1 minute transfer time between =
extremes. However, a similar test method in Mil-Std-202, Method =
107 is termed "Thermal Shock" and allows up to 5 minutes =
transfer time. Other Thermal Shock test methods use liquid as the =
medium of heat exchange rather than air, but I'm assuming you're using =
air.</FONT></P>
<P><FONT SIZE=3D2>Question 2:</FONT>
<BR> <FONT SIZE=3D2>If the =
failure mechanism from the Thermal Shock test is the same as would be =
expected in the field, then there is an Acceleration Factor you can use =
to relate the two. Just do an internet search for =
"Coffin-Manson" for the equation or let me know if you need =
further help...I can set you up a quick spreadsheet. However, the =
key is same failure mechanism. As pointed out by others in this =
group, most soldered assemblies experience slow rates of change, which =
affect solder joints more than fast rates of change. But, your =
end use environment may be different.</FONT></P>
<P><FONT SIZE=3D2>Question 3:</FONT>
<BR> <FONT SIZE=3D2>I'm not =
sure what you're asking here. Can you elaborate?</FONT>
</P>
<P><FONT SIZE=3D2>Glenn</FONT>
</P>
<P><FONT SIZE=3D2>-----Original Message-----</FONT>
<BR><FONT SIZE=3D2>From: Nancy Trumbull [<A =
HREF=3D"mailto:[log in to unmask]">mailto:Ntrumbull@TOKAI-RIKA=
-USA.COM</A>]</FONT>
<BR><FONT SIZE=3D2>Sent: Friday, March 08, 2002 5:40 AM</FONT>
<BR><FONT SIZE=3D2>To: [log in to unmask]</FONT>
<BR><FONT SIZE=3D2>Subject: [TN] Thermal Shock</FONT>
</P>
<BR>
<P><FONT SIZE=3D2>Hi Everyone,</FONT>
</P>
<P><FONT SIZE=3D2> It has been =
awhile for me. I have had so much work that I've had no time to take =
part in Technet. So please forgive me.</FONT></P>
<P><FONT SIZE=3D2> My Question =
:</FONT>
</P>
<P><FONT SIZE=3D2> 1)What is the equivalent of =
a Thermal shock cycle?</FONT>
<BR><FONT SIZE=3D2> 2) How do I evaluate a =
failure if it fails with-in 80 cycles?</FONT>
<BR><FONT SIZE=3D2> 3) How do I break down a =
cycle so it would pretain to the part?</FONT>
</P>
<P><FONT SIZE=3D2>The cycle we have been told to use and evaluate our =
parts with is the following:</FONT>
</P>
<P><FONT SIZE=3D2> 160 cycles</FONT>
<BR><FONT SIZE=3D2>At -30=B0C =BD hr =AE + 80=B0C =BD hr</FONT>
</P>
<P><FONT SIZE=3D2>If needed this is an assembled board.</FONT>
</P>
<BR>
<P><FONT SIZE=3D2>As it is now I can only say it passed or it failed. I =
can not say how long the part will last, good or bad.</FONT>
</P>
<P><FONT SIZE=3D2>I have looked in IPC Test Method book TM-650 but =
could not find any thing. </FONT>
<BR><FONT SIZE=3D2>Well if any one has any thing let me know. If not I =
thank each and every one of you for your time. </FONT>
</P>
<P><FONT SIZE=3D2>Have a good week end.</FONT>
<BR><FONT SIZE=3D2>Nancy T.</FONT>
</P>
<P><FONT SIZE=3D2> </FONT>
</P>
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SIZE=3D2>---------------------------------------------------------------=
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Date: Fri, 8 Mar 2002 14:28:56 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: VERY IMPORTANT QUESTION CONCERNING CLEANING TEST PINS
X-To: [log in to unmask]
Doug,
Not a shot fired in anger. Just trying to relay a message from Mario who
seems to have dissapeared.
Mario, where are you. I'm in the middle of fire from the giants of industry.
Hope you get the message.
MoonMan
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Date: Fri, 8 Mar 2002 15:39:30 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: CIC... ONCE AGAIN
X-To: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Unfortunately, the fab house said that they did this before. After trying
(and failing), they said that they didn't want it anymore. The Sales guy is
forcing them into trying some more. Obviously, we're not buying these
boards from them. I hope they're not listening... we haven't told them
yet.
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Hinners Hans M Civ WRALC/LUGE
[SMTP:[log in to unmask]]
Sent: Friday, March 08, 2002 12:21 PM
To: [log in to unmask]
Subject: Re: [TN] CIC... ONCE AGAIN
Hey Jim,
I'm curious. Did you hear, "no problem . . . " from the Fab house
or the
Sales guy? You're giving me flashbacks, Sales booked a new order
(with
material we haven't even played with) and us Fab Engineers developed
a new
process on the fly - for a quick turn! Fortunately, my lamination
stuff
usually required only minor tweaking. I feel your pain.
Hans
Gunship Motto: "You can run . . . but you'll only die tired."
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: Marsico, James [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 4:07 PM
To: [log in to unmask]
Subject: [TN] CIC... ONCE AGAIN
Remember all of those e-mails back in November regarding MLBs with
CIC
layers? Well, it's time again... We went ahead and designed a CIC
board,
mainly because our present board house said "no problem, we do it
all the
time". Well, he fell on his face and now, 3 months after placing
the order,
he can't deliver. Obviously, he has little, if any, experience with
CIC.
His problem is "...inserting the invar material into the copper
tanks kills
the solution and provide no plating". He is suggesting gold plating
the
vias first, then copper plating. Has anyone ever heard of this
before? Is
this a viable solution? Anyway, we're now looking for a new board
supplier
who HAS experience with CIC. Any recommendations? This is a
prototype run
of 5 boards only.
Thanks again for all your help,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
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Date: Fri, 8 Mar 2002 15:40:42 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Thermal Shock
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Hi Nancy,
My answers, while somewhat facicious and perhaps too general because of
lacking details, should nevertheless pretty close.
In a message dated 03/08/2002 9:43:40, [log in to unmask] writes:
> 1) What is the equivalent of a Thermal shock cycle?
A: Dropping from the Empire State building.
> 2) How do I evaluate a failure if it fails with-in 80 cycles?
A: Generally, you cannot relate T-shock failures to T-cycle failures, with
some exceptions such as bare boards.
> 3) How do I break down a cycle so it would pretain to the part?
A: You can not.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 386-437-8747, Fax: 386-437-8737
E-mail: [log in to unmask], Website: www.engelmaier.com
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Date: Fri, 8 Mar 2002 14:43:03 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: CIC... ONCE AGAIN
X-To: [log in to unmask]
Don't care if they are listening. I am, for what that's worth, and saying
again there ain't no excuse for not using a PROVEN, as in qualified, board
house or any other supplier even if times and sales people/approaches are
bad. We even had some sales schlock offer to build 5 of our more difficulet
designs free. Free from what was my question and answer.
MoonMan
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Date: Fri, 8 Mar 2002 12:47:30 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Roger Stoops <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Roger Stoops <[log in to unmask]>
Subject: Re: Thermals, plane clearances etc.
X-To: Leonard Alexman <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
In case nobody else answered your questions...
-----Original Message-----
From: Leonard Alexman [mailto:[log in to unmask]]
Sent: Wednesday, March 06, 2002 11:48 AM
To: [log in to unmask]
Subject: [TN] Thermals, plane clearances etc.
Hello All,
I am trying to determine the exact meaning of the IPC spec 2221
sections 9.1.2 thru 9.1.4 and have many questions hopefully
someone can answer.
From section 9.1.2 "A".
1. Is maximum hole size the drilled size or the finished hole size ?
Finished size for plated holes, drilled size for non-plated holes (ref 2221
section 9.1.1)
2. The annular ring uses a 0.05 MM value for the annular ringsize.
In table 9.2 in spec IPC2221 0.05mm is for external Supported annular rings
shouldn't the value be 0.03mm since the plane is an internal layer
Table 9-2 gives the figure for Internal Supported Annular Ring as 0.03mm
(Amendment 1 gives the figure of 0.025mm)
From Section 9.1.3 Figure 9.1.
1. The .25MM minimum for the nonfunctional land is this what should be
used to create the outer ring size on a thermal connection ?
At this point in time I discovered you meant to also say "IPC-2222". Yes.
2. Is the value "B" - standard manufacturing allowance the same as
fabrication allowance ? Yes.
3. For value "A" - electrical clearance - how are these values determined ?
See Table 6-1. (Your board fabricator may also have a minimum spacing
requirement. Can make inspection a real pain.) Could be the same (or
greater) than your trace-trace spacing.
From section 9.1.3.1.
1. In figure 9-2 on the bottom right side is shows A + B see fig 9-3.
Shouldn't that be
figure 9-1 ? Probably. Also why is this even mentioned if the clearance
area is
determined by
hole diameter and fabrication allowance ? Clearance area is determined by
electrical clearance + fabrication allowance, and what the board vendor can
produce. IPC was just trying to be thorough in their documentation.
2. Is the hole diameter (max) the finished hole size of the drill size ?
Think "finished hole size" for plated holes, "drill size" for non-plated
holes.
Lenny ALexman
Roger M. Stoops, CID [log in to unmask]
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Date: Fri, 8 Mar 2002 17:13:35 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Dave Pahlas <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dave Pahlas <[log in to unmask]>
Subject: Re: Flattening a board during assembly
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Sounds like in a past life we were the recipients of boards "not done
properly". We had 14"x16" double sided PCBs that would twist pretty bad
during first assembly reflow making stencil gasketing at second assembly
pretty tough. We ran a sample of unpopulated boards through the reflow oven
riding flat on the mesh and the diagonal corners actually curled up. We
weren't very knowledgeable on PCB fabrication but thought maybe the internal
stresses created in the board shop's flattening process were being released
in our reflow oven. We never had this problem with the previous (more
expensive) supplier. Hmmmm. The product went EOL before resolution was
reached, but ...
Enjoy your weekend.
-----Original Message-----
From: Hinners Hans M Civ WRALC/LUGE [mailto:[log in to unmask]]
Sent: Friday, March 08, 2002 11:27 AM
To: [log in to unmask]
Subject: Re: [TN] Flattening a board during assembly
Hey Daan,
Here's a generic dewarp I've used in the past. You or preferably the Fab
house should have an oven large enough to load the panels or boards. If
done properly you won't see re-warp during the assembly process. Dewarp is
not a board friendly process and I shudder to consider the longer term
reliability issues but it gets them flat when nothing else will. It's
usually better to dewarp boards instead of panels because of stress relief
that occurs at Route. On the other hand a 2 or 4 up panel cuts your cycle
time down considerably.
1. Load warped panels into oven. (Keep stacks reasonable sized: ~500 mils
of board stock or less - 6-10 panels depending on thickness)
2. Place several Caul plates (that match or overlap panel size) ~50 pounds
of weight & Use Kraft Paper (Sulfur Free) to protect panels
3. Bake at 340+ F for 4-6 hours (Material must be at or slightly above Tg)
4. Cool slowly to room temp.
5. Manually assist (Bend & Twist) the dewarp at Final Inspect. (Great
upper body workout on those 200+ board shipments)
6. Inspect Panels on Flatness (Granite) Table. ("Tap" test the 4 corners.
If the board's corners don't touch the table you've got more flexing to do.)
Hans
AC-130 Gunship Motto: "You can run but, you'll only die tired."
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: d. terstegge [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 11:48 AM
To: [log in to unmask]
Subject: [TN] Flattening a board during assembly
Hi Technetters,
We've got a batch of boards here that's really twisted (about 1.5 % when
measured according to IPC-TM-650) due to imbalanced design. The customers is
not willing to change the design, and we discussed with them the possibility
of using a carrier-frame for flattening these boards while they are
processed through our SMT-line.
My worry is that this results in unacceptable stress in the solder joints as
soon as the board is released from the carrier. Fortunately there's no BGA
on this board, but it does have a small QFP and some 40 mm long
SMT-connectors. It's supposed to be a high-reliability military product.
Does anyone have any data on the effects of such internal stresses ?
Also other comments are welcome.
Best regards.
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
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Date: Fri, 8 Mar 2002 15:10:17 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Patel <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Patel <[log in to unmask]>
Organization: interWAVE Communications, Inc.
Subject: Repair shop: HAKKO 472 desoldering iron
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Does anybody repair the HAKKO 472 desolder iron in San Jose Bay area? We
are located in menlo Park.
re,
ken patel
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Date: Fri, 8 Mar 2002 18:26:17 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Repair shop: HAKKO 472 desoldering iron
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_108.e90f294.29baa299_boundary"
--part1_108.e90f294.29baa299_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
Hi Ken,
I just had a 472 repaired. You'll need to send the unit to:
American Hakko Products, Inc.
28920 N. Avenue Williams
Valencia, CA., 91355
Phone: (661) 294-0090
Fax: (661) 294-0096
Toll-Free: 1-800-88-HAKKO (42556)
But before you ship it to them, you will need to get a RMA number from them:
Returns & Repairs
Should you need to return your product to American Hakko for service or
repair, please contact our customer service department at 1-800-88-HAKKO
(42556) for a Return Merchandise Authorization (RMA) Number prior to
shipping.
Typical turn around time is approximately three(3) working days from the day
we receive your unit.
-Steve Gregory-
> Does anybody repair the HAKKO 472 desolder iron in San Jose Bay area? We
> are located in menlo Park.
>
> re,
> ken patel
>
--part1_108.e90f294.29baa299_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">Hi Ken,<BR>
<BR>
I just had a 472 repaired. You'll need to send the unit to:<BR>
<BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Verdana" LANG="0"><SMALL><SMALL><SMALL><B>American Hakko Products, Inc.<BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=1 FAMILY="SANSSERIF" FACE="Verdana" LANG="0"></SMALL></SMALL></B>28920 N. Avenue Williams<BR>
Valencia, CA., 91355<BR>
Phone: (661) 294-0090<BR>
Fax: (661) 294-0096<BR>
Toll-Free: 1-800-88-HAKKO (42556)<BR>
<BR>
But before you ship it to them, you will need to get a RMA number from them:<BR>
<BR>
</FONT><FONT COLOR="#0b339d" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Verdana" LANG="0"><SMALL><SMALL><SMALL><B><U>Returns & Repairs</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Verdana" LANG="0"></SMALL></SMALL></B></U> <BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Verdana" LANG="0"><SMALL><SMALL><SMALL>Should you need to return your product to American Hakko for service or repair, please contact our customer service department at 1-800-88-HAKKO (42556) for a Return Merchandise Authorization (RMA) Number prior to shipping. <BR>
<BR>
Typical turn around time is approximately three(3) working days from the day we receive your unit.<BR>
<BR>
-Steve Gregory-</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Verdana" LANG="0"></SMALL></SMALL> <BR>
<BR>
<BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Verdana" LANG="0"><SMALL><SMALL><SMALL><BR>
<BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Verdana" LANG="0"></SMALL></SMALL> <BR>
<BR>
<BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Verdana" LANG="0"> <BR>
<BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
<BR>
<BR>
<BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Does anybody repair the HAKKO 472 desolder iron in San Jose Bay area? We<BR>
are located in menlo Park.<BR>
<BR>
re,<BR>
ken patel<BR>
</BLOCKQUOTE><BR>
<BR>
<BR>
<BR>
</SMALL></SMALL></SMALL></SMALL></FONT></HTML>
--part1_108.e90f294.29baa299_boundary--
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Date: Fri, 8 Mar 2002 18:33:20 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Fab Process question related to ENIG
MIME-Version: 1.0
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ENIG is either befor or after, big digital boards after. RF boards before.
It depends on the part, either way the PCB supplier makes a difficult task
appear easy.
I say, HiHo Silver!
BB
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Date: Sat, 9 Mar 2002 16:44:03 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
My Nguyen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: My Nguyen <[log in to unmask]>
Subject: Trapped moisture underneath solder mask?
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Dear Technettors,
Have you ever heard that term?
We have been baking the Immersion/Flash gold PCB
because of the following theory:
During PCB making process, moisture, somehow, get
trapped underneath the solder mask. Thus, in order to
get them out, the Immersion/Flash gold PCB need to be
baked for 2-3 hours at 200 degree C before SMT
process. If PCB is not baked, during reflow in SMT
process, the moisture would find way to outgas at the
least resistance area. If it is at the solderpaste
location, it would splash the solder paste and as it
drop down, there will be solder on gold-finger.
However, after they bake it, they use to leave the PCB
to open air environment (CA area) sometime for 1-2
days before SMT process.
Here are my questions:
1. Moisture trapped underneath the solder mask will
eventually outgas during reflow if it did not get
baked: IS THAT A MYTH OR FACT?
2. Does baking the PCB at 200C for 2-3 hours help to
reduce the outgassing problem (if it is fact).
3. After baking, by leaving the PCB to open air
environment, for about 24 hours, is it enough for the
moisture get back to where it was?
4. If there is really moisture trapped underneath the
solder mask, what are your reccommended solution?
Your help is greatly appreciated.
Stacy
__________________________________________________
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Date: Sun, 10 Mar 2002 06:19:54 -0800
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: MOONMAN STUFF
X-To: Kathy Kuhlow <[log in to unmask]>
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Kathy,
See attached if you will,
Earl
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Date: Sun, 10 Mar 2002 05:18:22 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: MOONMAN STUFF
Kathy,
Thought I was posting to your email address.
Earl
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Date: Sun, 10 Mar 2002 05:26:21 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: ENIG AND NON WETTING
Folks,
Don't know yet for sure but I may have gotten my client and self in a bit of
a problem. Used this very highly qualified fab supplier for some time. Used
ENIG from them and other quppliers equally qualified and never had this
issue arise and I'm not sure of the cause. I know even the best loose the
recipe but rarely.
Can't post the pictures now as I'm on a different computer without them. The
non wetted pads are on the wave solder side (my assembly house didn't reflow
the important top side using paste per my instructions. Some pads are
partially wetted to about 50%. Many through hole pads wetted and many didn't.
The board was requested to be a solder mask over bare copper, ENIG. Type. As
the ENIG was the last wet chemical process, I'm trying to understand what is
the problem. I mean, there is no resist left as the gold looks as it should
and SM stripping was done over bare copper. What contamination could cause
such problems?
Thanks,
Earl Moon
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Date: Sun, 10 Mar 2002 14:51:49 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Marki Sasportas <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Marki Sasportas <[log in to unmask]>
Subject: Gold/Nickel plating - what is the recommended thickness?
MIME-Version: 1.0
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Dear Technettors,
I would like to know what is the recommended thickness for Ni & Au.
Thanks in advance,
Marki Sasportas.
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Date: Mon, 11 Mar 2002 08:41:31 -0000
Reply-To: Dougal Stewart <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dougal Stewart <[log in to unmask]>
Subject: Re: ENIG AND NON WETTING
MIME-Version: 1.0
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ask yourself why there is a problem on just the wave solder side.....
doesn't this suggest that there is an assembly issue here ? Remember first
and foremost that ENIG takes longer to wet than HASL or tin or silver, and
wicking through holes is limited. In my experience you should look at a)
the fluxing prior to wave solder - spray works best, b) is the wave height
correct and conveyor parallel, c) is it a double wave, d) is the soldermask
too thick - this can effectively leave the flux trapped and actually
repelling the solder before it has a time to wet e)are the soldermask
apertures too small - same effect as d)
Dougal Stewart
email: [log in to unmask]
phone: +44 1896 822204
mob: +44 7984 629667
----- Original Message -----
From: "Earl Moon" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Sunday, March 10, 2002 11:26 AM
Subject: [TN] ENIG AND NON WETTING
> Folks,
>
> Don't know yet for sure but I may have gotten my client and self in a bit
of
> a problem. Used this very highly qualified fab supplier for some time.
Used
> ENIG from them and other quppliers equally qualified and never had this
> issue arise and I'm not sure of the cause. I know even the best loose the
> recipe but rarely.
>
> Can't post the pictures now as I'm on a different computer without them.
The
> non wetted pads are on the wave solder side (my assembly house didn't
reflow
> the important top side using paste per my instructions. Some pads are
> partially wetted to about 50%. Many through hole pads wetted and many
didn't.
>
> The board was requested to be a solder mask over bare copper, ENIG. Type.
As
> the ENIG was the last wet chemical process, I'm trying to understand what
is
> the problem. I mean, there is no resist left as the gold looks as it
should
> and SM stripping was done over bare copper. What contamination could cause
> such problems?
>
> Thanks,
>
> Earl Moon
>
> --------------------------------------------------------------------------
-------
> Technet Mail List provided as a free service by IPC using LISTSERV 1.8d
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> --------------------------------------------------------------------------
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Date: Mon, 11 Mar 2002 09:37:09 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Albin, David" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Albin, David" <[log in to unmask]>
Subject: Re: LDI - LDS - Users / Experiences / Comments
X-To: Earl Moon <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Earl,
I think the technology is now something that quite a few prototype
shops are using routinely. Referring only to the dry film/ liquid =
resist LDI
market, I think there are (were?) five machine manufacturers world =
wide, as
follows:
* Orbotech.
* Etec Polyscan.
* Barco/ Mania.
* Automa-tech.
* Asahi - Pentax.
Of these, I'm fairly sure that Orbotech (DP-100) has the largest market
share. I think Etec used to have some machines in the industry, but =
have no
idea about the Asahi units. Barco's Gemini and Automa-tech DI2700 =
machines
still appear to be at beta- trial stage.
Orbotech, Etec & Automa-tech all appear to use a similar argon-ion =
laser
(DI2700 uses two), Barco are pioneering the use of a solid state laser =
that
seems to have lower operating costs. I don't know too much about the
Asahi-Pentax machine - maybe someone could shed more light on this?
In terms of productivity, most companies supplying resist material for =
LDI
would be aiming at ~10mJ/cm=B2 exposure sensitivity for etch resist =
materials.
For solder mask (which is coming soon) the level is 30mJ - 40mJ/cm=B2. =
This
gives etch resist processing times for a 18"x24" panel of ~120 sides/ =
hour
for Orbotech & Etec units, 180 - 200 for Barco Gemini (estimate) and =
300-350
sides for Automa-tech (estimate again). For the solder mask materials, =
you
are looking at roughly half that level of productivity at present.
I hope that helps your quest.
Regards,
David Albin
Project Leader, Development Section
Coates Circuit Products
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: 08 March 2002 13:43
To: [log in to unmask]
Subject: Re: [TN] LDI - LDS - Users / Experiences / Comments
This subject, to me, is huge. Direct laser imaging had one of its first
starts in the early/mid '80's with a company called Greyhawk systems.
Some of the fine folks there borrowed the idea from a now forgotten =
medical
device technology company. Can't remember the name.
The concept would forever change the then high density PCB =
design/imaging
world. It involved laser "writing" a direct design image on a liquid =
crystal
panel. Subsequently, using a very low frequency sensitive photo =
imageable
dry film, the LCD "wrote" its stored images onto the film. The project
coulda, shoulda worked but seemed a bit ahead of its time. Now is the =
time
for the latest and greatest.
As much time, money, and effort our best board shops put into their
photoploting and imaging processes, the LDI process puts them to shame
though not at all useful in all applications but for HDI and other =
hi-rel
requirements.
I'd sure appreciate information concerning advancements over the years =
or,
in this case, weeks and/or months.
Super stuff,
MoonMan
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Date: Mon, 11 Mar 2002 11:41:45 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"d. terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: Re: ENIG AND NON WETTING
X-To: [log in to unmask]
MIME-Version: 1.0 (Generated by NET-TEL Mailguard SMTP version 4.0.0.22)
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Hi Earl,
I'm not sure if I understand you correctly, you mean topside-reflow worked =
fine, but wetting problems on the wave-soldered bottomside ?
If so, perhaps the time between reflow and wave was longer than it should =
? ENIG is normally promoted as a finishing that keeps it's solderability =
as long as the bare board hasn't been in the storage room too long. In =
reality however, the time between the subsequent soldering steps is also =
very important.
We've had some bad experiences where after reflow we had to wait several =
weeks for leaded components to be supplied. Nowadays we don't start =
production until we've got all the parts. We haven't had any solderability =
issues since.
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
>>> Earl Moon <[log in to unmask]> 03/10 12:26 pm >>>
Folks,
Don't know yet for sure but I may have gotten my client and self in a bit =
of
a problem. Used this very highly qualified fab supplier for some time. =
Used
ENIG from them and other quppliers equally qualified and never had this
issue arise and I'm not sure of the cause. I know even the best loose the
recipe but rarely.
Can't post the pictures now as I'm on a different computer without them. =
The
non wetted pads are on the wave solder side (my assembly house didn't =
reflow
the important top side using paste per my instructions. Some pads are
partially wetted to about 50%. Many through hole pads wetted and many =
didn't.
The board was requested to be a solder mask over bare copper, ENIG. Type. =
As
the ENIG was the last wet chemical process, I'm trying to understand what =
is
the problem. I mean, there is no resist left as the gold looks as it =
should
and SM stripping was done over bare copper. What contamination could cause
such problems?
Thanks,
Earl Moon
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Date: Mon, 11 Mar 2002 05:10:05 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: ENIG AND NON WETTING
X-To: [log in to unmask]
Doug,
I really have a pretty good handle on wave soldering, and most other types,
as well as the ENIG process and its effects as quality, or not. What I'm
asking here is if anyone knows what, in the fab process, might contribute to
non wetting as previously described.
I'm looking for some process step, after solder mask strip leaving bare
copper over which ENIG was applied and after. The after must hold some kind
of answer as the gold looks as it should though no cleanliness/contamination
tests have been conducted, nor will they likely be as time is too short. I
said that?
I'll try to get the pics up today and, with good luck, I should have the
reflow side images as well. I hope this answers Daan's questions as well
because I couldn't really describe the events and effects without the
photos. Steve has spoiled us all with his site and great service.
Earl Moon
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Date: Mon, 11 Mar 2002 05:13:05 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: LDI - LDS - Users / Experiences / Comments
X-To: [log in to unmask]
David,
Thanks for the fine input. Now, I hope all the designers in the printed
circus world can realize more benefits offered by taking advantage of this
capability.
Could you elaborate on that a bit David?
Thanks again,
Earl
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Date: Mon, 11 Mar 2002 12:21:26 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Franco Vezzoli <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Franco Vezzoli <[log in to unmask]>
Subject: Back-light
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_0007_01C1C8F7.442F1C60"
This is a multi-part message in MIME format.
------=_NextPart_000_0007_01C1C8F7.442F1C60
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Does anyone have a back light test reference.
What I'm looking for is a picture of a back light test for every point =
in a scale from 1 to 10 to use as comparison when checking the back =
light test.
Thankyou in advance
------=_NextPart_000_0007_01C1C8F7.442F1C60
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META content=3D"text/html; charset=3Diso-8859-1" =
http-equiv=3DContent-Type>
<META content=3D"MSHTML 5.00.3314.2100" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Does anyone have a back light test=20
reference.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>What I'm looking for is a picture of a =
back light=20
test for every point in a scale from 1 to 10 to use as comparison when =
checking=20
the back light test.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Thankyou in =
advance</FONT></DIV></BODY></HTML>
------=_NextPart_000_0007_01C1C8F7.442F1C60--
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Date: Mon, 11 Mar 2002 06:56:07 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: Thermal Shock
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Glenn (or anyone else), could you elaborate on your statement that slow
rates of change affect solder joints more than fast rates of change.
Thanks,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>=20
631-595-5879
-----Original Message-----
From: Pelkey, Glenn [SMTP:[log in to unmask]]
Sent: Friday, March 08, 2002 3:27 PM
To: [log in to unmask]
Subject: Re: [TN] Thermal Shock
Hi Nancy,=20
Question 1:=20
Thermal Shock has some room for interpretation, but in
general, it is a high rate of temperature change. When I say high, I =
mean
greater than 30 C/min. Even within the mil specs there is some =
confusion:
Mil-Std-883, Method 1010 is termed "Temperature Cycling" and requires =
less
than 1 minute transfer time between extremes. However, a similar test
method in Mil-Std-202, Method 107 is termed "Thermal Shock" and allows =
up to
5 minutes transfer time. Other Thermal Shock test methods use liquid =
as the
medium of heat exchange rather than air, but I'm assuming you're using =
air.
Question 2:=20
If the failure mechanism from the Thermal Shock test is the
same as would be expected in the field, then there is an Acceleration =
Factor
you can use to relate the two. Just do an internet search for
"Coffin-Manson" for the equation or let me know if you need further =
help...I
can set you up a quick spreadsheet. However, the key is same failure
mechanism. As pointed out by others in this group, most soldered =
assemblies
experience slow rates of change, which affect solder joints more than =
fast
rates of change. But, your end use environment may be different.
Question 3:=20
I'm not sure what you're asking here. Can you elaborate?=20
Glenn=20
-----Original Message-----=20
From: Nancy Trumbull [ mailto:[log in to unmask]
<mailto:[log in to unmask]> ]=20
Sent: Friday, March 08, 2002 5:40 AM=20
To: [log in to unmask]
Subject: [TN] Thermal Shock=20
Hi Everyone,=20
It has been awhile for me. I have had so much work that I've
had no time to take part in Technet. So please forgive me.
My Question :=20
1)What is the equivalent of a Thermal shock cycle?=20
2) How do I evaluate a failure if it fails with-in 80 cycles?=20
3) How do I break down a cycle so it would pretain to the
part?=20
The cycle we have been told to use and evaluate our parts with is
the following:=20
160 cycles=20
At -30=B0C =BD hr =AE + 80=B0C =BD hr=20
If needed this is an assembled board.=20
As it is now I can only say it passed or it failed. I can not say
how long the part will last, good or bad.=20
I have looked in IPC Test Method book TM-650 but could not find any
thing.=20
Well if any one has any thing let me know. If not I thank each and
every one of you for your time.=20
Have a good week end.=20
Nancy T.=20
=20
=09
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=09
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=09
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Date: Mon, 11 Mar 2002 05:57:13 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: ENIG AND NON WETTING
X-To: [log in to unmask]
Daan,
As always, I appreciate your input. To clarify, the boards were freshly
received from a major international supplier. I instructed our assembly
house (the same major international supplier - how about that for strategic
planning as the same boards, in volume will be, guess what, assembled by the
same major international supplier in another location) to reflow and wave
solder the solder samples. The supplier wave soldered the side in which I
had little interest. It was the SMT side, with all the little bastard TI
CSP's that held the most interest for obvious reasons or that should have
been obvious to all as it's all I've been yacking about for two months to
you all and all prospective suppliers.
I got the wave results last week with the non wetting as I described. The
wave solder process was "normal" to the major international assembly
operation with flux type, flux application, conveyor speed, wave types, wave
height, preheat temps, solder temp, and all the other stuff we all know and
love about wave soldering and its process management requirements.
The board showed, clearly, non wetting on some bottom side SMT pads, at
about 50% non wetted. It also showed, clarly through hole pads about 50%, by
quantity, non wetted with some obviously adhacent.
My question, again, is what in the ENIG, over bare copper after SM
application, is possibly affecting this type solderability. It's a mystery
worth more investigation.
Again, thanks Daan and I hope I clarified.
Earl
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Date: Mon, 11 Mar 2002 06:02:04 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: VIRUS ALERT
Received 12 messages this AM at about 0600. My latested updated Norton 2002
anti stuff detected and quarantined the Trojan back door strain in my
Windows Startup folder as msg.exe.
I scan incoming and outgoing email. I also practice safe Norton updating on
an every other day basis.
Just wanted to pass this along to all who sent me stuff and to those
receiving my stuff. Just an alert as I did receive 3 spams at the same time.
MoonMan
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Date: Mon, 11 Mar 2002 06:55:59 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jim Kittel <[log in to unmask]>
Subject: Re: ENIG AND NON WETTING
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain
Earl,
I sympathize with you on this problem because we have also seen similar
situations with ENIG finishes. We a particular board which is mixed
technology board (SMT and thru hole) and there is one thru hole connector
area in particular that consistently exhibits poor wetting. The entire rest
of the board wets fine, SMT and thru hole. This connector area has pads
tied into heavy ground planes and they typically don't wet. In a simple
minded model, it seems like the gold dissolves into the solder before the
nickel reaches wetting temperature, thus the nickel becomes passsivated?
Any ideas.
Jim Kittel
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Monday, March 11, 2002 4:57 AM
To: [log in to unmask]
Subject: Re: [TN] ENIG AND NON WETTING
Daan,
As always, I appreciate your input. To clarify, the boards were freshly
received from a major international supplier. I instructed our assembly
house (the same major international supplier - how about that for strategic
planning as the same boards, in volume will be, guess what, assembled by the
same major international supplier in another location) to reflow and wave
solder the solder samples. The supplier wave soldered the side in which I
had little interest. It was the SMT side, with all the little bastard TI
CSP's that held the most interest for obvious reasons or that should have
been obvious to all as it's all I've been yacking about for two months to
you all and all prospective suppliers.
I got the wave results last week with the non wetting as I described. The
wave solder process was "normal" to the major international assembly
operation with flux type, flux application, conveyor speed, wave types, wave
height, preheat temps, solder temp, and all the other stuff we all know and
love about wave soldering and its process management requirements.
The board showed, clearly, non wetting on some bottom side SMT pads, at
about 50% non wetted. It also showed, clarly through hole pads about 50%, by
quantity, non wetted with some obviously adhacent.
My question, again, is what in the ENIG, over bare copper after SM
application, is possibly affecting this type solderability. It's a mystery
worth more investigation.
Again, thanks Daan and I hope I clarified.
Earl
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Date: Mon, 11 Mar 2002 08:11:49 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: ENIG AND NON WETTING
X-To: Jim Kittel <[log in to unmask]>
Jim,
I don't have a clue. I appreciate you input as reflecting on what may be a
newer ENIG problem area. Never seen this before but hoping some fab experts
will come forth.
Of course, I'm still awaiting the final outcome.
Earl
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Date: Mon, 11 Mar 2002 06:16:51 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bloomquist, Ken" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bloomquist, Ken" <[log in to unmask]>
Subject: Electronic Manufacturers Association Meeting (Seattle)
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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YOU ARE INVITED . . . . Electronics Manufacturers Association=20
March 12 meeting. If you have already sent your RSVP, please=20
disregard this notice.
"A Shirt Pocket Guide to EMC"
presented by Patrick G. Andre of Patrick G. Andre Consulting
This meeting will be held at the Honeywell facility in Redmond=20
(see tour description below). For security reasons, RSVPs are=20
REQUIRED for this meeting! Send your RSVP to=20
mailto:[log in to unmask]
For complete meeting details, including driving directions, go to=20
http://www.ema-wa.org
March 12, 2002
5:30 p.m. - Networking and Refreshments
6:00 p.m. - Presentation, followed by tour of Honeywell
Honeywell
15001 NE 36th St
Redmond
The cost is $20 per person, cash or checks only - at the door. =20
Members always attend free!
THE TOUR
Attendees will be given a tour of the Honeywell facility that=20
manufactures products for the aerospace industry. These include=20
ground proximity systems, cockpit voice and data recorders,=20
communications and data management systems and weather radar. =20
During the tour, we will get a look at how Honeywell has=20
successfully set up their product teams which empower the work=20
force as well as many of their Lean Manufacturing initiatives.
THE PROGRAM - A SHIRT POCKET GUIDE TO EMC
The presentation is titled "A Shirt Pocket Guide to EMC". Patrick=20
Andr=E9 will share a variety of equations and design techniques.=20
These will include impedance equations, wavelength calculations,=20
case shielding and design considerations, and even how to wind a=20
balun. Included will be examples from actual situations. The talk=20
will include documentation for future reference of the attendees.=20
There will be a short question and answer period following his=20
talk.
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Date: Mon, 11 Mar 2002 08:20:25 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: ENIG AND NON WETTING
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Hi Moonman! One potential source of contamination would be a soldermask
residue remaining on the pads after the soldermask application (due to a
fabrication oops) prior to the application of the ENIG. Depending on your
ability to get a reasonable sample, you can use FTIR analysis to determine
if soldermask residue is remaining on the nonwetted pads. Good Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
Earl Moon <[log in to unmask]>@ipc.org> on 03/11/2002 05:57:13 AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Earl Moon <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: Re: [TN] ENIG AND NON WETTING
Daan,
As always, I appreciate your input. To clarify, the boards were freshly
received from a major international supplier. I instructed our assembly
house (the same major international supplier - how about that for strategic
planning as the same boards, in volume will be, guess what, assembled by
the
same major international supplier in another location) to reflow and wave
solder the solder samples. The supplier wave soldered the side in which I
had little interest. It was the SMT side, with all the little bastard TI
CSP's that held the most interest for obvious reasons or that should have
been obvious to all as it's all I've been yacking about for two months to
you all and all prospective suppliers.
I got the wave results last week with the non wetting as I described. The
wave solder process was "normal" to the major international assembly
operation with flux type, flux application, conveyor speed, wave types,
wave
height, preheat temps, solder temp, and all the other stuff we all know and
love about wave soldering and its process management requirements.
The board showed, clearly, non wetting on some bottom side SMT pads, at
about 50% non wetted. It also showed, clarly through hole pads about 50%,
by
quantity, non wetted with some obviously adhacent.
My question, again, is what in the ENIG, over bare copper after SM
application, is possibly affecting this type solderability. It's a mystery
worth more investigation.
Again, thanks Daan and I hope I clarified.
Earl
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Date: Mon, 11 Mar 2002 08:32:43 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: ENIG AND NON WETTING
X-To: [log in to unmask]
Dave,
I do appreciate the input. I need to clarify that the solder mask was
applied over bare copper and the subsequent gold "coating" process seems to
have been effected properly. I mean, the gold appears as gold should or has
always looked to me and solder mask contamination could not have been a
factor as, again, it was applied and stripped over bare copper before ENIG.
I sure appreciate the suggestion about FTIR. I'll employ the analysis
process ASAP.
Enjoy,
MoonMan
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Date: Mon, 11 Mar 2002 08:41:49 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Thermal Shock
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset=iso-8859-1
Content-transfer-encoding: quoted-printable
Hi Jim! A simple way to understand the impact of a conditioning cycle o=
n a
solder joint is to think of the two dominate failure phenomena - creep =
and
fatigue. Creep is a time dependent strain under a given stress (e.g. ap=
ply
a load and the solder joint crack grows over time) and fatigue is solde=
r
joint crack resulting from a repeated or fluctuating stress which is le=
ss
than the solder alloy tensile strength (e.g. apply a repetitive load an=
d
the solder joint cracks grows in relation to the stress cycles). If sol=
der
behaved like steel then life would be pretty mundane and a bunch of us
metallurgical engineers would be looking for work! However, solder join=
t
microstructure changes just sitting at room temperature. Depending on h=
ow
you apply stress and how you apply temperature you can get either creep=
or
fatigue or both interacting thus understanding how the solder joint cra=
ck
is progressing very tough (this is the focus area where Guenter, Werner=
,
and many other folks have spent thousands of hours attempting to unders=
tand
which mechanisms are dominate for a given conditioning recipe). The rat=
e of
change of a conditioning recipe has a direct impact on dominate failure=
mode - that's why trying to mimic your use environment conditions with =
a
conditioning cycle can be important. Hope this helps.
Dave Hillman
Rockwell Collins
[log in to unmask]
"Marsico, James" <[log in to unmask]>@ipc.org> on 03/11/2002 05:5=
6:07
AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please res=
pond
to "Marsico, James" <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: Re: [TN] Thermal Shock
Glenn (or anyone else), could you elaborate on your statement that slow=
rates of change affect solder joints more than fast rates of change.
Thanks,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Pelkey, Glenn [SMTP:[log in to unmask]]
Sent: Friday, March 08, 2002 3:27 PM
To: [log in to unmask]
Subject: Re: [TN] Thermal Shock
Hi Nancy,
Question 1:
Thermal Shock has some room for interpretation, but in
general, it is a high rate of temperature change. When I say high, I m=
ean
greater than 30 C/min. Even within the mil specs there is some confusi=
on:
Mil-Std-883, Method 1010 is termed "Temperature Cycling" and requires l=
ess
than 1 minute transfer time between extremes. However, a similar test
method in Mil-Std-202, Method 107 is termed "Thermal Shock" and allows =
up
to
5 minutes transfer time. Other Thermal Shock test methods use liquid a=
s
the
medium of heat exchange rather than air, but I'm assuming you're using =
air.
Question 2:
If the failure mechanism from the Thermal Shock test is=
the
same as would be expected in the field, then there is an Acceleration
Factor
you can use to relate the two. Just do an internet search for
"Coffin-Manson" for the equation or let me know if you need further
help...I
can set you up a quick spreadsheet. However, the key is same failure
mechanism. As pointed out by others in this group, most soldered
assemblies
experience slow rates of change, which affect solder joints more than f=
ast
rates of change. But, your end use environment may be different.
Question 3:
I'm not sure what you're asking here. Can you elaborat=
e?
Glenn
-----Original Message-----
From: Nancy Trumbull [ mailto:[log in to unmask]
<mailto:[log in to unmask]> ]
Sent: Friday, March 08, 2002 5:40 AM
To: [log in to unmask]
Subject: [TN] Thermal Shock
Hi Everyone,
It has been awhile for me. I have had so much work that =
I've
had no time to take part in Technet. So please forgive me.
My Question :
1)What is the equivalent of a Thermal shock cycle?
2) How do I evaluate a failure if it fails with-in 80 cycl=
es?
3) How do I break down a cycle so it would pretain to the=
part?
The cycle we have been told to use and evaluate our parts with =
is
the following:
160 cycles
At -30=B0C =BD hr =AE + 80=B0C =BD hr
If needed this is an assembled board.
As it is now I can only say it passed or it failed. I can not s=
ay
how long the part will last, good or bad.
I have looked in IPC Test Method book TM-650 but could not find=
any
thing.
Well if any one has any thing let me know. If not I thank each =
and
every one of you for your time.
Have a good week end.
Nancy T.
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=========================================================================
Date: Mon, 11 Mar 2002 07:17:51 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Crepeau, Phil" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crepeau, Phil" <[log in to unmask]>
Subject: CIC... ONCE AGAIN
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
hi,
in our applications there are three huge advantages to thermount. they are:
1. weight
2. weight, and
3. weight.
phil
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 8:55 PM
To: [log in to unmask]
Subject: Re: [TN] CIC... ONCE AGAIN
I thought you were fisnin. Just where I should be now and will when this
winter wears off. I just get a little hot, not at you, when improper
supplier evaluation and qualification is done and things "happen" (BS) like
with Jim's project. No excuse for it really.
The thermount stuff, as you well know, has been around for many years like
CIC. It has a special set of process requirements as well. The stuff frays
around the edges and in the hole walls, is difficult to do a good fiber
removal process, and dulls drills til the cows are hair lipped all over
Texas plus some other neat stuff. Again, though, good process management in
a highly qualified board shop with lot's of experience, and prooof of it,
goes a long way.
What happened to your AOI hunting adventure? Anything new or exciting?
Earl
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Date: Mon, 11 Mar 2002 07:20:09 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bloomquist, Ken" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bloomquist, Ken" <[log in to unmask]>
Subject: Packaging Material Question
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
We have CMs assemble all of our circuit card assemblies. They package each
assembly in a static shielding bag, then bubble wrap and into a box along
with other assemblies. We receive each shipment and as soon as it hits the
floor we throw away all that material. We've looked into divider boxes and
clamshell boxes and sending them back and forth but there is a lot of
expense associated with that too. We hate to keep filling up the land fills
but haven't found a good alternative.
By the way, our CMs are not in the local area. The closest one is about 300
miles away.
Any great ideas out there in TechNet land?
Ken Bloomquist
Sr. Principal Process Engineer
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Date: Mon, 11 Mar 2002 15:25:38 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Subject: Re: NTC this is a question regarding employee involvement
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi Kathy & All,
Let me guess, I'm a week late and a dollar short.
This is one of my favorite subjects. The Gallup Group has an on-going
series on employee & customer engagement. The latest article, "Debunking
the Myths About Engagement" (
http://www.gallupjournal.com/CA/ee/20020311.asp ) is focused on religious
organizations but the info applies to companies as well. Unfortunately, the
previous articles are only available to subscribers. I might have saved a
copy (for personal use) of a particular article - let me know off list if
there's any interest. Gallup has linked customer & employee satisfaction to
overall business success - interesting stuff.
My latest business read, "The Self Managing Organization" has the following
to say. Improving employee engagement is about creating & reinforcing a
high commitment work culture. Businesses have a social structure that need
to provide employees:
1. Autonomy & Discretion
2. Opportunities to Learn
3. Optimal Level of Variety
4. Need for social support & an opportunity to exchange help & respect
5. Sense of meaningful contribution
6. Prospects for a desirable future
I like to think that most people start-off wanting to excel and win. If
someone has disengaged from work there has to be reason(s) why. I've met
some very interesting characters over the years that have amazed me on how
people interpret employee engagement. I'm still surprised by the
assumptions both management and staff make when it comes to changing things.
Hans
AC-130 Gunship Motto: "You can run but you'll only die tired."
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Friday, March 08, 2002 12:03 AM
To: [log in to unmask]
Subject: Re: [TN] NTC this is a question regarding employee involvment
Hmmm .... ! I wonder how many Technical Sanitation Assistants go to the
sort of parties where job titles are a major means of pigeon-holing
people/find out if they're worth cultivating. Besides, it quickly becomes
apparent that such a job title is pure window dressing and the real job
underneath is still much less glamourous.
I people are gullible enough to be impressed by such nonsense, I dispair.
If Reeds et al think they're doing anyone a favour with this 'up-titling',
they'll find its effect very short term, and people will either revert (or
be reverted) to their old, simpler job titles or be lumbered with a half
mile long title that does nothing but make the tongue tired (or tied)
having to say it.
An old expression involving silk purses and sow's ears springs to mind -
you can't make one out of the other.
Peter - just an old fashioned engineer from the days when spades were
spades and not horticultural medium excavators.
"Keel, Mike"
<mike.keel@SD-A To: [log in to unmask]
XIOHM.COM> cc: (bcc: DUNCAN Peter/Asst
Prin Engr/ST
Sent by: Aero/ST Group)
TechNet Subject: Re: [TN] NTC this is
a question
<[log in to unmask] regarding employee involvment
G>
03/08/02 04:38
AM
Please respond
to "TechNet
E-Mail Forum.";
Please respond
to "Keel, Mike"
What a co-in-key-dink . . .
the following came off the www today
Before you laugh ( this is HEALTHY )
And dismiss . . .
Please read thru to the end
'Up-Titling' Keeps Workers Poor but Happy [NL]Thu Mar 7, 8:49 AM ET
[PARA]LONDON (Reuters) - British workers are being given bigger job titles
rather than bigger salaries as cash-strapped companies try to keep
employees
happy, according to a survey published on Thursday. [PARA]
Examples of the phenomenon dubbed "up-titling" include a receptionist
rebranded as "Head of Verbal Telecommunications" and a window cleaner given
the impressive designation of "Optical Illuminator Enhancer." [PARA]"The
research demonstrates how motivational it can be to gain a prestigious job
title. At parties...swapping elaborate job titles breaks the ice," said
Paul
Rapacioli, director of employment agency Reed's Internet service, which
carried out the survey. [PARA]He said companies were using the fancy titles
as an incentive to retain staff rather than pay them more at a time of
economic uncertainty. [PARA]Businesses seeking "Stock Replenishment
Executives" were actually looking for shelf stackers and successful
candidates for a post as "Technical Sanitation Assistant" would find
themselves cleaning washrooms. [PARA]"Up-titling" seems to have won
converts. Of the 1,700 workers Reed surveyed, around half thought a better
job title would make them happier even if there was no change in what they
actually did. [PARA]"People view a grander title as recognition of their
contribution to the organization and feel more committed as a result,"
Rapacioli said.
This probably doesn't have any relevance
To anyone @ tech-net
Present company always excepted . . .
Best Regards to All
M Keel
= = = EMPERIOR OF SPACE = = =
-----Original Message-----
From: Kathy Kuhlow [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 4:30 PM
To: [log in to unmask]
Subject: [TN] NTC this is a question regarding employee involvment
<< File: TEXT.htm >> If you have no opinion or want to get in a discussion
regarding this topic please delete this message....
I publish a company newsletter each month. Each month I try to add an
article in this paper regarding principles. Most of the principles are
written to help inspire Leadership, commitment, etc. The goal of the
article is to help educate fellow employees and hopefully get some of them
involved. I firmly feel that a involved, caring work force produces more,
faster, and correctly.
This month's topic is Employee involvement. Do or have any of you been
involved with any programs within this topic range? Any opinions on what
are the better methods or results of involvement? Let me know. I hope to
publish the paper for the month soon and would like to explore possible
actual programs like this.
A couple of weeks a go a forum was suggested for Managers, well here I am.
You know one of those upper managers who enjoys being in technet to learn
and share if possible. I really hope you will let me know your opinion.
Kathy
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Date: Mon, 11 Mar 2002 11:08:38 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: ENIG AND NON WETTING
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Jim,
Sounds to me like your non wetting issue is related to the connector thermal
planes. I have seen this time and time again. The culprit is always thought
to be PWB, finish or connector, or assy process. If you have luxury of
xsection of soldered connector (destructive) it will definitively show the
effect of planes on the solder wetting. The only way to avoid this (if it is
your problem) is redesign the I/O entry of planes to the connector by using
trace entry (verses thermal), reducing or eliminating same hit thermals on
same pin, reducing from four to two spoke thermal and or increasing OD on
thermal diameter.
As far as non wetting attributed to ENIG, we have not had a problem (never
say never), but I still recommend moving away from it (using Silver or Tin).
I differ in the upcoming IPC ENIG spec in that I prefer minimizing the amount
of nickel to the 45-75 microinch thickness (and no high phos). This compels
the user to FIFO or even better the JIT that has been discussed previously.
Mind you, I am not knocking gold but in the case of an issue [i.e. Moonman
dilemma] it is a nagging point of contention.
Brad
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Date: Mon, 11 Mar 2002 11:10:01 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
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Subject: Re: ENIG AND NON WETTING
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Earl,
Nothing comes to mind but I have forwarded to my hands on partners and will
let you know results.
BB
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Date: Mon, 11 Mar 2002 11:15:23 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
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Subject: Re: ENIG AND NON WETTING
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Dave,
I like that answer, I have even chased it before... Epoxy, pigmentless
appears as non wetting. Would explain one side. The supplier should 'fess
up to other same time part numbers having similar problems. This is either a
process problem at PCB supplier, problem due to the complexity of PCB itself
(during the bare part fab), process problem at assy or alas... OE (Operator
Error). Sounds like a tuff nut to crack.
Boston Brad
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Date: Mon, 11 Mar 2002 11:22:13 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Tempea, Ioan" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Tempea, Ioan" <[log in to unmask]>
Subject: Automated wire insertion
MIME-Version: 1.0
Content-Type: text/plain
Hi Technos,
please consider this:
* a PCB, .75"x2.875", panelized 27-up, double side SMT, supposed to be
mass production
* the only TH parts are 5 wires, different colors; four of them are
somehow grouped together, but the fouth one is .875" away. Don't know the
length or the gage number.
Can the wire insertion/soldering be automated? Any idea which company would
make this kind of equipment?
Any clue would be largely appreciated.
Thanks,
Ioan
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Date: Mon, 11 Mar 2002 10:14:56 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: ENIG AND NON WETTING
X-To: [log in to unmask]
Do appreciate your input Big Brad. Need the gold for the R/F stuff at least
for now. I know what you mean about never never land. Also, see the two pics
up on Steve's site. Just don't make sense yet.
Moonman
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Date: Mon, 11 Mar 2002 10:20:39 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: ENIG PICS UP ON STEVE'S SITE AND MUCHAS GRACIAS
Two pics up. One showing the SMT site half wetted with what looks like
normal gold considering the thousands or so I've seen. Never had this
problem before but for black pad. This ain't that, of course. This situation
is not in any way related to thermal plane connections.
The through hole stuff looks a little flakey. Don't know about the thermal
connections but possible though contamination is my first guess.
Did the solder paste print and reflow sample and it looked acceptable.
Design sucks but did not interfere, so far, with solderability.
Anxiously awaiting final product/solder joint quality. Keep you all posted.
Kathy, did you get my ramblings about management worker stuff?
MoonMan
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Date: Mon, 11 Mar 2002 08:18:47 -0800
Reply-To: Rene Lopez <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rene Lopez <[log in to unmask]>
Subject: Re: Back-light
X-To: Franco Vezzoli <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_0118_01C1C8D5.5E51E860"
This is a multi-part message in MIME format.
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charset="iso-8859-1"
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Hi Frank,
Provided you're looking for a reference to verify coverage of =
electroless copper plating,=20
I've a copy of a back-light methods procedure which may be of great help =
to you. It's in adobe acrobat format .. it's yours if you want it.
Rene
----- Original Message -----=20
From: Franco Vezzoli=20
To: [log in to unmask]
Sent: Monday, March 11, 2002 3:21 AM
Subject: [TN] Back-light
Does anyone have a back light test reference.
What I'm looking for is a picture of a back light test for every point =
in a scale from 1 to 10 to use as comparison when checking the back =
light test.
Thankyou in advance
------=_NextPart_000_0118_01C1C8D5.5E51E860
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4134.100" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Hi Frank,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Provided you're looking for =
a reference to=20
verify coverage of electroless copper plating, </FONT></DIV>
<DIV><FONT face=3DArial size=3D2>I've a copy of a back-light methods =
procedure which=20
may be of great help to you. It's in adobe acrobat format .. it's =
yours if=20
you want it.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Rene</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<BLOCKQUOTE dir=3Dltr=20
style=3D"PADDING-RIGHT: 0px; PADDING-LEFT: 5px; MARGIN-LEFT: 5px; =
BORDER-LEFT: #000000 2px solid; MARGIN-RIGHT: 0px">
<DIV style=3D"FONT: 10pt arial">----- Original Message ----- </DIV>
<DIV=20
style=3D"BACKGROUND: #e4e4e4; FONT: 10pt arial; font-color: =
black"><B>From:</B>=20
<A [log in to unmask]
href=3D"mailto:[log in to unmask]">Franco Vezzoli</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>To:</B> <A [log in to unmask]
href=3D"mailto:[log in to unmask]">[log in to unmask]</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>Sent:</B> Monday, March 11, 2002 =
3:21=20
AM</DIV>
<DIV style=3D"FONT: 10pt arial"><B>Subject:</B> [TN] Back-light</DIV>
<DIV><BR></DIV>
<DIV><FONT face=3DArial size=3D2>Does anyone have a back light test=20
reference.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>What I'm looking for is a picture of =
a back light=20
test for every point in a scale from 1 to 10 to use as comparison when =
checking the back light test.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Thankyou in=20
advance</FONT></DIV></BLOCKQUOTE></BODY></HTML>
------=_NextPart_000_0118_01C1C8D5.5E51E860--
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Date: Mon, 11 Mar 2002 11:32:07 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: CIC... ONCE AGAIN
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Hello...
Wait, wait and wait... I am no advocate of CIC, but Thermount does have its
flaws. The attractive low CTE in the nonwoven configuration takes on similar
CTE properties as adjacent copper planes, negating much if not all its CTE
advantages. Conservative design criteria must me employed due to the
.003-.007 Kevlar fibers and their resistance to drilling. This resistance
has them pullout of drilled holes giving the PTH a much more "leaching"
appearance. These copper fingers horizontally extending to opposite polarity
planes is reason for concern. Add to this the moisture absorption and there
is real "potential" trouble in HDI type packaging (pun intended). The "BI"
(and even BF) material has a difficult and challenging time passing the
stringent moisture acceptance criteria of boards. My advice I hand out for
Thermount Customers is watch out for PTH to plane clearances, don't go below
8 and 8, and don't place planes directly below SMT layers (i.e. layer two).
From a bare board fab perspective the layer stability is somewhat erratic and
not stable registration as it was thought.
Every material and configuration is application specific.
Boston Brad
781 858 0783
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Date: Mon, 11 Mar 2002 08:18:20 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ed Popielarski <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ed Popielarski <[log in to unmask]>
Subject: Re: looking for a name
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Hello Phil,
Try searching ebay for turret punch. Once in a while a manual one comes =
up, but this CNC is on there right now.
http://cgi.ebay.com/ws/eBayISAPI.dll?ViewItem&item=3D1711533666
Regards,
Ed Popielarski
QTA Machine
10 Mc Laren, Ste D
Irvine, Ca. 92618
Phone:949-581-6601
Fax: 949-581-2448
Cel: 949-337-2578
WWW.QTA.NET
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Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4807.2300" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Hello Phil,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Try searching ebay for turret punch. =
Once in a=20
while a manual one comes up, but this CNC is on there right =
now.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><A=20
href=3D"http://cgi.ebay.com/ws/eBayISAPI.dll?ViewItem&item=3D17115336=
66">http://cgi.ebay.com/ws/eBayISAPI.dll?ViewItem&item=3D1711533666</=
A></FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Regards,</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Ed Popielarski<BR>QTA Machine<BR>10 Mc =
Laren, Ste=20
D<BR>Irvine, Ca. 92618</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Phone:949-581-6601<BR>Fax: =
949-581-2448<BR>Cel:=20
949-337-2578</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2><A=20
href=3D"http://www.QTA.NET">WWW.QTA.NET</A></FONT></DIV></BODY></HTML>
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Date: Mon, 11 Mar 2002 18:43:02 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: NTC this is a question regarding employee involvement
X-To: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
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Hans
As you brought up the question about religion, even though it is not the
subject of your message there is a relationship with engagement. On the
whole, the guys I've employed or otherwise associated with, who have a
strong religious faith, are those I found generally (not absolutely!)
who had the greatest engagement to their jobs. On two occasions, I hired
Jehovah's Witnesses and, in both cases, they were really committed to
doing their job well, although neither was the most intelligent nor had
the most initiative of my employees. Notwithstanding, I was very
satisfied with both of them except for one regard. When hiring anyone
from a minority, I always warned them that I would not tolerate any
proselytising or similar activity. I also made it clear to the others I
would not tolerate any intolerance towards religious or racial
minorities. Despite this, there was often a cool distance between these
persons and the rest. On analysis, I think it was because of dietary
restrictions. The JWs would not drink coffee or tea at the morning break
and we had a Muslim who would not join in the boozing for any
celebration. I don't believe that this changed the guys' engagement to
their work but it did, I feel, change how others interacted with them on
professional matters (not very significantly, but sufficient to be
noticeable).
Just a thought...
Brian
Hinners Hans M Civ WRALC/LUGE wrote:
>
> Hi Kathy & All,
>
> Let me guess, I'm a week late and a dollar short.
>
> This is one of my favorite subjects. The Gallup Group has an on-going
> series on employee & customer engagement. The latest article, "Debunking
> the Myths About Engagement" (
> http://www.gallupjournal.com/CA/ee/20020311.asp ) is focused on religious
> organizations but the info applies to companies as well. Unfortunately, the
> previous articles are only available to subscribers. I might have saved a
> copy (for personal use) of a particular article - let me know off list if
> there's any interest. Gallup has linked customer & employee satisfaction to
> overall business success - interesting stuff.
>
> My latest business read, "The Self Managing Organization" has the following
> to say. Improving employee engagement is about creating & reinforcing a
> high commitment work culture. Businesses have a social structure that need
> to provide employees:
> 1. Autonomy & Discretion
> 2. Opportunities to Learn
> 3. Optimal Level of Variety
> 4. Need for social support & an opportunity to exchange help & respect
> 5. Sense of meaningful contribution
> 6. Prospects for a desirable future
>
> I like to think that most people start-off wanting to excel and win. If
> someone has disengaged from work there has to be reason(s) why. I've met
> some very interesting characters over the years that have amazed me on how
> people interpret employee engagement. I'm still surprised by the
> assumptions both management and staff make when it comes to changing things.
>
> Hans
>
> AC-130 Gunship Motto: "You can run but you'll only die tired."
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> Hans M. Hinners
> Electronics Engineer
> Warner Robins - Air Logistics Center (WR-ALC/LUGE)
> 226 Cochran Street
> Robins AFB GA 31098-1622
>
> mailto:[log in to unmask]
>
> Com: (478) 926 - 5224
> Fax: (478) 926 - 4911
> DSN Prefix: 468
>
> -----Original Message-----
> From: [log in to unmask] [mailto:[log in to unmask]]
> Sent: Friday, March 08, 2002 12:03 AM
> To: [log in to unmask]
> Subject: Re: [TN] NTC this is a question regarding employee involvment
>
> Hmmm .... ! I wonder how many Technical Sanitation Assistants go to the
> sort of parties where job titles are a major means of pigeon-holing
> people/find out if they're worth cultivating. Besides, it quickly becomes
> apparent that such a job title is pure window dressing and the real job
> underneath is still much less glamourous.
>
> I people are gullible enough to be impressed by such nonsense, I dispair.
> If Reeds et al think they're doing anyone a favour with this 'up-titling',
> they'll find its effect very short term, and people will either revert (or
> be reverted) to their old, simpler job titles or be lumbered with a half
> mile long title that does nothing but make the tongue tired (or tied)
> having to say it.
>
> An old expression involving silk purses and sow's ears springs to mind -
> you can't make one out of the other.
>
> Peter - just an old fashioned engineer from the days when spades were
> spades and not horticultural medium excavators.
>
> "Keel, Mike"
> <mike.keel@SD-A To: [log in to unmask]
> XIOHM.COM> cc: (bcc: DUNCAN Peter/Asst
> Prin Engr/ST
> Sent by: Aero/ST Group)
> TechNet Subject: Re: [TN] NTC this is
> a question
> <[log in to unmask] regarding employee involvment
> G>
>
> 03/08/02 04:38
> AM
> Please respond
> to "TechNet
> E-Mail Forum.";
> Please respond
> to "Keel, Mike"
>
> What a co-in-key-dink . . .
> the following came off the www today
> Before you laugh ( this is HEALTHY )
> And dismiss . . .
> Please read thru to the end
>
> 'Up-Titling' Keeps Workers Poor but Happy [NL]Thu Mar 7, 8:49 AM ET
> [PARA]LONDON (Reuters) - British workers are being given bigger job titles
> rather than bigger salaries as cash-strapped companies try to keep
> employees
> happy, according to a survey published on Thursday. [PARA]
> Examples of the phenomenon dubbed "up-titling" include a receptionist
> rebranded as "Head of Verbal Telecommunications" and a window cleaner given
> the impressive designation of "Optical Illuminator Enhancer." [PARA]"The
> research demonstrates how motivational it can be to gain a prestigious job
> title. At parties...swapping elaborate job titles breaks the ice," said
> Paul
> Rapacioli, director of employment agency Reed's Internet service, which
> carried out the survey. [PARA]He said companies were using the fancy titles
> as an incentive to retain staff rather than pay them more at a time of
> economic uncertainty. [PARA]Businesses seeking "Stock Replenishment
> Executives" were actually looking for shelf stackers and successful
> candidates for a post as "Technical Sanitation Assistant" would find
> themselves cleaning washrooms. [PARA]"Up-titling" seems to have won
> converts. Of the 1,700 workers Reed surveyed, around half thought a better
> job title would make them happier even if there was no change in what they
> actually did. [PARA]"People view a grander title as recognition of their
> contribution to the organization and feel more committed as a result,"
> Rapacioli said.
>
> This probably doesn't have any relevance
> To anyone @ tech-net
> Present company always excepted . . .
>
> Best Regards to All
>
> M Keel
>
> = = = EMPERIOR OF SPACE = = =
>
> -----Original Message-----
> From: Kathy Kuhlow [mailto:[log in to unmask]]
> Sent: Thursday, March 07, 2002 4:30 PM
> To: [log in to unmask]
> Subject: [TN] NTC this is a question regarding employee involvment
>
> << File: TEXT.htm >> If you have no opinion or want to get in a discussion
> regarding this topic please delete this message....
>
> I publish a company newsletter each month. Each month I try to add an
> article in this paper regarding principles. Most of the principles are
> written to help inspire Leadership, commitment, etc. The goal of the
> article is to help educate fellow employees and hopefully get some of them
> involved. I firmly feel that a involved, caring work force produces more,
> faster, and correctly.
>
> This month's topic is Employee involvement. Do or have any of you been
> involved with any programs within this topic range? Any opinions on what
> are the better methods or results of involvement? Let me know. I hope to
> publish the paper for the month soon and would like to explore possible
> actual programs like this.
>
> A couple of weeks a go a forum was suggested for Managers, well here I am.
> You know one of those upper managers who enjoys being in technet to learn
> and share if possible. I really hope you will let me know your opinion.
>
> Kathy
>
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Date: Mon, 11 Mar 2002 11:48:53 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: ENIG PICS UP ON STEVE'S SITE AND MUCHAS GRACIAS
MIME-Version: 1.0
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Shame on me I don't have Steves website on hand, send that address over and I
will take a peek.
Brad
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Date: Mon, 11 Mar 2002 12:42:06 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Trapped moisture underneath solder mask?
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Stacy,
There will always be pro and con discussion on benefits of baking bare boards
prior to solder assembly. The "prebake" numbers you showed looked good. The
above 100 degree C will get the moisture gaseous and the duration will drive
it out of the substrate. The word being substrate. Generally, prebake
drives moisture out of the fiberglass weave of board dielectric. Polyimide
substrate is particularly prone to moisture absorption; to such an extent
flex circuit suppliers usually enclose a "PREBAKE WARNING" with all
deliveries [warning: prebake prior to soldering]. This is the first I have
heard of solder mask entrapment of moisture. It is usually the combined Z
axis expansion that delivers delamination (we hate that word). The issue
with solder mask may be one of "Popcorning" where less than optimum "tenting"
design of vias is causation
to micro explosions (akin to volcanic eruptions) that will lead to
delamination (ugly word again) of solder mask to substrate. The bond of mask
to substrate may be so great that the fiberglass weave is actually upset. In
any case any board with the ill fated design inadequacy is destined to be
problematic. Prebake may lessen propensity but in itself not eliminate it.
Lastly, boards needs to be populated ASAP/RUSH after prebake [here come the
cards and letters for those whom have not pressed delete yet] there are
studies that show 80% of moisture is reintroduced within 20 minutes of bake.
A sort of inverse 80/20 rule. I have seen all kinds of prebake and storage
including nitrogen filled storage bags. The best thing is to have constant
room and humidity controlled assembly area. If you are going to prebake do
it prior to assembly... hmmm, both sides.
Just a little insight it is a very hot topic.
Boston Brad
781 858 0783
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Date: Mon, 11 Mar 2002 18:02:06 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"FOX, Ian (York Rd)" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "FOX, Ian (York Rd)" <[log in to unmask]>
Subject: Re: CIC... ONCE AGAIN
X-To: "[log in to unmask]" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
I have to agree with thermount and CTE. It is difficult to realise a
functional design with a CTE less than about 11-12ppm using thermount
material. We've also had very bad experience with this material and humidity
testing which I won't go into here.
Ian Fox
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: 11 March 2002 16:32
To: [log in to unmask]
Subject: Re: [TN] CIC... ONCE AGAIN
Hello...
Wait, wait and wait... I am no advocate of CIC, but Thermount does have its
flaws. The attractive low CTE in the nonwoven configuration takes on
similar
CTE properties as adjacent copper planes, negating much if not all its CTE
advantages. Conservative design criteria must me employed due to the
.003-.007 Kevlar fibers and their resistance to drilling. This resistance
has them pullout of drilled holes giving the PTH a much more "leaching"
appearance. These copper fingers horizontally extending to opposite
polarity
planes is reason for concern. Add to this the moisture absorption and there
is real "potential" trouble in HDI type packaging (pun intended). The "BI"
(and even BF) material has a difficult and challenging time passing the
stringent moisture acceptance criteria of boards. My advice I hand out for
Thermount Customers is watch out for PTH to plane clearances, don't go below
8 and 8, and don't place planes directly below SMT layers (i.e. layer two).
From a bare board fab perspective the layer stability is somewhat erratic
and
not stable registration as it was thought.
Every material and configuration is application specific.
Boston Brad
781 858 0783
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Date: Mon, 11 Mar 2002 13:15:17 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Thermal Shock
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Hi Jim,
In a message dated 03/11/2002 7:59:02, [log in to unmask] writes:
>Glenn (or anyone else), could you elaborate on your statement that slow
>rates of change affect solder joints more than fast rates of change.
A: No, the statement is incorrect. The rate of change in temperature is more
detrimental when high due to possible component/PCB warping. What is more
detrimental is a longer hold times typically associated with slower heating
rates and not T-shock.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 386-437-8747, Fax: 386-437-8737
E-mail: [log in to unmask], Website: www.engelmaier.com
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Date: Mon, 11 Mar 2002 13:26:55 -0800
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: ENIG PICS UP ON STEVE'S SITE AND MUCHAS GRACIAS
X-To: [log in to unmask]
MIME-Version: 1.0
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Shame indeed
http://stevezeva.homestead.com/index.html
----- Original Message -----
From: <[log in to unmask]>
To: <[log in to unmask]>
Sent: Monday, March 11, 2002 8:48 AM
Subject: Re: [TN] ENIG PICS UP ON STEVE'S SITE AND MUCHAS GRACIAS
> Shame on me I don't have Steves website on hand, send that address over
and I
> will take a peek.
>
> Brad
>
> --------------------------------------------------------------------------
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Date: Mon, 11 Mar 2002 10:27:02 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jac Kroeker <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jac Kroeker <[log in to unmask]>
Subject: Re: ENIG AND NON WETTING
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask] m>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; format=flowed
Dave;
Can you plate ENIG on top of soldermask residue? If you can, would the
board pass final inspection or bare board electrical test? We use White tin
and a flying probe tester. I think both of these processes would register a
Fail if we didn't have clean copper to plate white tin on.
Jac Kroeker
At 08:20 AM 03/11/2002 -0600, you wrote:
>Hi Moonman! One potential source of contamination would be a soldermask
>residue remaining on the pads after the soldermask application (due to a
>fabrication oops) prior to the application of the ENIG. Depending on your
>ability to get a reasonable sample, you can use FTIR analysis to determine
>if soldermask residue is remaining on the nonwetted pads. Good Luck.
>
>Dave Hillman
>Rockwell Collins
>[log in to unmask]
>
>
>
>
>
>Earl Moon <[log in to unmask]>@ipc.org> on 03/11/2002 05:57:13 AM
>
>Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
> to Earl Moon <[log in to unmask]>
>
>Sent by: TechNet <[log in to unmask]>
>
>
>To: [log in to unmask]
>cc:
>
>Subject: Re: [TN] ENIG AND NON WETTING
>
>
>Daan,
>
>As always, I appreciate your input. To clarify, the boards were freshly
>received from a major international supplier. I instructed our assembly
>house (the same major international supplier - how about that for strategic
>planning as the same boards, in volume will be, guess what, assembled by
>the
>same major international supplier in another location) to reflow and wave
>solder the solder samples. The supplier wave soldered the side in which I
>had little interest. It was the SMT side, with all the little bastard TI
>CSP's that held the most interest for obvious reasons or that should have
>been obvious to all as it's all I've been yacking about for two months to
>you all and all prospective suppliers.
>
>I got the wave results last week with the non wetting as I described. The
>wave solder process was "normal" to the major international assembly
>operation with flux type, flux application, conveyor speed, wave types,
>wave
>height, preheat temps, solder temp, and all the other stuff we all know and
>love about wave soldering and its process management requirements.
>
>The board showed, clearly, non wetting on some bottom side SMT pads, at
>about 50% non wetted. It also showed, clarly through hole pads about 50%,
>by
>quantity, non wetted with some obviously adhacent.
>
>My question, again, is what in the ENIG, over bare copper after SM
>application, is possibly affecting this type solderability. It's a mystery
>worth more investigation.
>
>Again, thanks Daan and I hope I clarified.
>
>Earl
>
>---------------------------------------------------------------------------------
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>
========================================================
Omni Graphics Ltd. 2 - 12760 Bathgate Way, Richmond BC, Canada V6V 1Z4
Tel 604-276-9717 Fax 604-276-2514
[log in to unmask] www.omnigraph.com
========================================================
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Date: Mon, 11 Mar 2002 13:36:26 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: PBGA - Bow & Twist
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Colin,
More importantly than mandating a "tuff" bow and twist requirement ensure you
have a soundly designed board that will be conducive to flatness by having
vertical and horizontal symmetry. The IPC spec calls out for .075% worst
case (as I recall, and I hope I am not messing up the decimal point), I have
seen even less ALA .05. You really need a copy of the design and fabrication
spec procured from IPC (and use it, unlike me that didn't have it at finger
tips to check number). It may be an aggravating question now but with parts
in hand it is down right awful and you should know first hand. The well
balanced stack up is everything. Let me know if you would like me to dive
into the gory details.
Boston Brad
781 858 0783
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Date: Mon, 11 Mar 2002 13:48:46 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Pads, holes, traces and Class 3 field reliability
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Peter,
Removing inner pads and using the newly found area is certain death. I have
a fellow FAE that does a seminar on the error of blindly removing pads to
gain trace area. Less than .001 average wall thickness on a conventional PTH
in a Military PWB is death. Aspect ratio's of 7/1 are much much more
reliable than this pad removal scheme and allowing less than the .001 PTH
wall thickness. The PTH thickness plays with aspect ratio; to the extent
that .0007 will work for MicroVia, but the Z axis is from .002 to .005. That
is a big difference. Finally in reference to pad deletion your better off
making the entire board tougher to fab with smaller pads than to arbitrarily
delete and bump traces.
Boston Brad
781 858 0783
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Date: Mon, 11 Mar 2002 18:59:33 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Subject: Re: Flattening a board during assembly
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi Dave,
Hey, I used to make stuff for Jabil - and your panels always came out flat,
honest. Your example is a Lamination Engineer's dream - I never would have
seen a double sided board in lamination - unless it's the UL Cert. panels.
Two guesses at your double sided problem - either the circuit design top to
bottom gave it an induced twist or the material had some flaw from the
manufacturer. Diagonal twist makes me think grain direction, No?
Normally, you laminate a nice balanced mlb with a reasonable cooldown cycle
and the panels come out flat. It really saves wear and tear on your Quality
Engineers that way.
Hans
AC-130 Gunship Motto: "You can run but you'll only die tired."
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: Dave Pahlas [mailto:[log in to unmask]]
Sent: Friday, March 08, 2002 5:14 PM
To: [log in to unmask]
Subject: Re: [TN] Flattening a board during assembly
Sounds like in a past life we were the recipients of boards "not done
properly". We had 14"x16" double sided PCBs that would twist pretty bad
during first assembly reflow making stencil gasketing at second assembly
pretty tough. We ran a sample of unpopulated boards through the reflow oven
riding flat on the mesh and the diagonal corners actually curled up. We
weren't very knowledgeable on PCB fabrication but thought maybe the internal
stresses created in the board shop's flattening process were being released
in our reflow oven. We never had this problem with the previous (more
expensive) supplier. Hmmmm. The product went EOL before resolution was
reached, but ...
Enjoy your weekend.
-----Original Message-----
From: Hinners Hans M Civ WRALC/LUGE [mailto:[log in to unmask]]
Sent: Friday, March 08, 2002 11:27 AM
To: [log in to unmask]
Subject: Re: [TN] Flattening a board during assembly
Hey Daan,
Here's a generic dewarp I've used in the past. You or preferably the Fab
house should have an oven large enough to load the panels or boards. If
done properly you won't see re-warp during the assembly process. Dewarp is
not a board friendly process and I shudder to consider the longer term
reliability issues but it gets them flat when nothing else will. It's
usually better to dewarp boards instead of panels because of stress relief
that occurs at Route. On the other hand a 2 or 4 up panel cuts your cycle
time down considerably.
1. Load warped panels into oven. (Keep stacks reasonable sized: ~500 mils
of board stock or less - 6-10 panels depending on thickness)
2. Place several Caul plates (that match or overlap panel size) ~50 pounds
of weight & Use Kraft Paper (Sulfur Free) to protect panels
3. Bake at 340+ F for 4-6 hours (Material must be at or slightly above Tg)
4. Cool slowly to room temp.
5. Manually assist (Bend & Twist) the dewarp at Final Inspect. (Great
upper body workout on those 200+ board shipments)
6. Inspect Panels on Flatness (Granite) Table. ("Tap" test the 4 corners.
If the board's corners don't touch the table you've got more flexing to do.)
Hans
AC-130 Gunship Motto: "You can run but, you'll only die tired."
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: d. terstegge [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 11:48 AM
To: [log in to unmask]
Subject: [TN] Flattening a board during assembly
Hi Technetters,
We've got a batch of boards here that's really twisted (about 1.5 % when
measured according to IPC-TM-650) due to imbalanced design. The customers is
not willing to change the design, and we discussed with them the possibility
of using a carrier-frame for flattening these boards while they are
processed through our SMT-line.
My worry is that this results in unacceptable stress in the solder joints as
soon as the board is released from the carrier. Fortunately there's no BGA
on this board, but it does have a small QFP and some 40 mm long
SMT-connectors. It's supposed to be a high-reliability military product.
Does anyone have any data on the effects of such internal stresses ?
Also other comments are welcome.
Best regards.
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
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Date: Mon, 11 Mar 2002 12:01:12 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jim Kittel <[log in to unmask]>
Subject: Re: ENIG AND NON WETTING
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain
Brad,
Thanks for your inputs. One thing I failed to mention was the non wetting
occurrs on the thru hole pads on the wave solder side. I don't believe it
is a case of heat being pulled away into the planes because the solder wets
up the barrel of the thru hole pins. It just won't wet to the land areas.
JIm Kittel
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Monday, March 11, 2002 9:09 AM
To: [log in to unmask]
Subject: Re: [TN] ENIG AND NON WETTING
Jim,
Sounds to me like your non wetting issue is related to the connector thermal
planes. I have seen this time and time again. The culprit is always
thought
to be PWB, finish or connector, or assy process. If you have luxury of
xsection of soldered connector (destructive) it will definitively show the
effect of planes on the solder wetting. The only way to avoid this (if it
is
your problem) is redesign the I/O entry of planes to the connector by using
trace entry (verses thermal), reducing or eliminating same hit thermals on
same pin, reducing from four to two spoke thermal and or increasing OD on
thermal diameter.
As far as non wetting attributed to ENIG, we have not had a problem (never
say never), but I still recommend moving away from it (using Silver or Tin).
I differ in the upcoming IPC ENIG spec in that I prefer minimizing the
amount
of nickel to the 45-75 microinch thickness (and no high phos). This compels
the user to FIFO or even better the JIT that has been discussed previously.
Mind you, I am not knocking gold but in the case of an issue [i.e. Moonman
dilemma] it is a nagging point of contention.
Brad
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Date: Mon, 11 Mar 2002 14:02:35 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Fab Process question related to ENIG
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_9d.24647c7a.29be594b_boundary"
--part1_9d.24647c7a.29be594b_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
Hello all,
Well, as you can see I am catching up on emails today. One or two comments
on this mailing. I have been Laser MicroViaing (new term?) fail-safe
reliable PWBs for well over 5 years. And yes it was tough to get approvals
relative to "Plated Through Holes" it came down to a lot of testing. At my
previous employee we made two rules: no BGAs and no MicroVias. The day after
that we had no choice and we were in the BGA with microvia product deliver
service. Hence, yes MicroVias; like BGAs are in the military product and
will be in future.
On the through hole via and solder mask: the best tented via is the one that
isn't. Encroachment of solder mask onto pad is best (leaving the via empty).
If the need to "tent" is required (I hate that word tent) than I like the
epoxy via fill and then subsequent mask. It is more expensive but product
appropriate.
This is relative to Military and Space Product, Commercial Applications do
have more choices. Product Appropriate Design is Everything.
Boston Brad
781 858 0783
--part1_9d.24647c7a.29be594b_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hello all,<BR>
<BR>
Well, as you can see I am catching up on emails today. One or two comments on this mailing. I have been Laser MicroViaing (new term?) fail-safe reliable PWBs for well over 5 years. And yes it was tough to get approvals relative to "Plated <U>Through</U> Holes" it came down to a lot of testing. At my previous employee we made two rules: no BGAs and no MicroVias. The day after that we had no choice and we were in the BGA with microvia product deliver service. Hence, yes MicroVias; like BGAs are in the military product and will be in future. <BR>
On the through hole via and solder mask: the best tented via is the one that isn't. Encroachment of solder mask onto pad is best (leaving the via empty). If the need to "tent" is required (I hate that word tent) than I like the epoxy via fill and then subsequent mask. It is more expensive but product appropriate.<BR>
This is relative to Military and Space Product, Commercial Applications do have more choices. Product Appropriate Design is Everything.<BR>
<BR>
Boston Brad<BR>
781 858 0783</FONT></HTML>
--part1_9d.24647c7a.29be594b_boundary--
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Date: Mon, 11 Mar 2002 12:52:40 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Thomas Highland <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Thomas Highland <[log in to unmask]>
Subject: Unsubscribe
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Thomas C. Highland
Quality Assurance Manager
Innovatec Communications
<<Thomas Highland.vcf>>
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Date: Mon, 11 Mar 2002 13:07:14 -0600
Reply-To: "[log in to unmask]" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kari Rambo <[log in to unmask]>
Organization: Altron Inc
Subject: Re: employee involvement
MIME-Version: 1.0
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Suggested reading: "Zapp! : The Lightning of Empowerment" by Jeff Cox/W.
Byham. It's a quick and easy read that hits the nail on the head regarding
employee involvement and commitment.
kjr
-----Original Message-----
From: Brian Ellis [SMTP:[log in to unmask]]
Sent: Monday, March 11, 2002 10:43 AM
To: [log in to unmask]
Subject: Re: [TN] NTC this is a question regarding employee involvement
Hans
As you brought up the question about religion, even though it is not the
subject of your message there is a relationship with engagement. On the
whole, the guys I've employed or otherwise associated with, who have a
strong religious faith, are those I found generally (not absolutely!)
who had the greatest engagement to their jobs. On two occasions, I hired
Jehovah's Witnesses and, in both cases, they were really committed to
doing their job well, although neither was the most intelligent nor had
the most initiative of my employees. Notwithstanding, I was very
satisfied with both of them except for one regard. When hiring anyone
from a minority, I always warned them that I would not tolerate any
proselytising or similar activity. I also made it clear to the others I
would not tolerate any intolerance towards religious or racial
minorities. Despite this, there was often a cool distance between these
persons and the rest. On analysis, I think it was because of dietary
restrictions. The JWs would not drink coffee or tea at the morning break
and we had a Muslim who would not join in the boozing for any
celebration. I don't believe that this changed the guys' engagement to
their work but it did, I feel, change how others interacted with them on
professional matters (not very significantly, but sufficient to be
noticeable).
Just a thought...
Brian
Hinners Hans M Civ WRALC/LUGE wrote:
>
> Hi Kathy & All,
>
> Let me guess, I'm a week late and a dollar short.
>
> This is one of my favorite subjects. The Gallup Group has an on-going
> series on employee & customer engagement. The latest article, "Debunking
> the Myths About Engagement" (
> http://www.gallupjournal.com/CA/ee/20020311.asp ) is focused on religious
> organizations but the info applies to companies as well. Unfortunately,
the
> previous articles are only available to subscribers. I might have saved
a
> copy (for personal use) of a particular article - let me know off list if
> there's any interest. Gallup has linked customer & employee satisfaction
to
> overall business success - interesting stuff.
>
> My latest business read, "The Self Managing Organization" has the
following
> to say. Improving employee engagement is about creating & reinforcing a
> high commitment work culture. Businesses have a social structure that
need
> to provide employees:
> 1. Autonomy & Discretion
> 2. Opportunities to Learn
> 3. Optimal Level of Variety
> 4. Need for social support & an opportunity to exchange help & respect
> 5. Sense of meaningful contribution
> 6. Prospects for a desirable future
>
> I like to think that most people start-off wanting to excel and win. If
> someone has disengaged from work there has to be reason(s) why. I've met
> some very interesting characters over the years that have amazed me on
how
> people interpret employee engagement. I'm still surprised by the
> assumptions both management and staff make when it comes to changing
things.
>
> Hans
>
> AC-130 Gunship Motto: "You can run but you'll only die tired."
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> Hans M. Hinners
> Electronics Engineer
> Warner Robins - Air Logistics Center (WR-ALC/LUGE)
> 226 Cochran Street
> Robins AFB GA 31098-1622
>
> mailto:[log in to unmask]
>
> Com: (478) 926 - 5224
> Fax: (478) 926 - 4911
> DSN Prefix: 468
>
> -----Original Message-----
> From: [log in to unmask] [mailto:[log in to unmask]]
> Sent: Friday, March 08, 2002 12:03 AM
> To: [log in to unmask]
> Subject: Re: [TN] NTC this is a question regarding employee involvment
>
> Hmmm .... ! I wonder how many Technical Sanitation Assistants go to the
> sort of parties where job titles are a major means of pigeon-holing
> people/find out if they're worth cultivating. Besides, it quickly becomes
> apparent that such a job title is pure window dressing and the real job
> underneath is still much less glamourous.
>
> I people are gullible enough to be impressed by such nonsense, I dispair.
> If Reeds et al think they're doing anyone a favour with this
'up-titling',
> they'll find its effect very short term, and people will either revert
(or
> be reverted) to their old, simpler job titles or be lumbered with a half
> mile long title that does nothing but make the tongue tired (or tied)
> having to say it.
>
> An old expression involving silk purses and sow's ears springs to mind -
> you can't make one out of the other.
>
> Peter - just an old fashioned engineer from the days when spades were
> spades and not horticultural medium excavators.
>
> "Keel, Mike"
> <mike.keel@SD-A To: [log in to unmask]
> XIOHM.COM> cc: (bcc: DUNCAN
Peter/Asst
> Prin Engr/ST
> Sent by: Aero/ST Group)
> TechNet Subject: Re: [TN] NTC this
is
> a question
> <[log in to unmask] regarding employee involvment
> G>
>
> 03/08/02 04:38
> AM
> Please respond
> to "TechNet
> E-Mail Forum.";
> Please respond
> to "Keel, Mike"
>
> What a co-in-key-dink . . .
> the following came off the www today
> Before you laugh ( this is HEALTHY )
> And dismiss . . .
> Please read thru to the end
>
> 'Up-Titling' Keeps Workers Poor but Happy [NL]Thu Mar 7, 8:49 AM ET
> [PARA]LONDON (Reuters) - British workers are being given bigger job
titles
> rather than bigger salaries as cash-strapped companies try to keep
> employees
> happy, according to a survey published on Thursday. [PARA]
> Examples of the phenomenon dubbed "up-titling" include a receptionist
> rebranded as "Head of Verbal Telecommunications" and a window cleaner
given
> the impressive designation of "Optical Illuminator Enhancer." [PARA]"The
> research demonstrates how motivational it can be to gain a prestigious
job
> title. At parties...swapping elaborate job titles breaks the ice," said
> Paul
> Rapacioli, director of employment agency Reed's Internet service, which
> carried out the survey. [PARA]He said companies were using the fancy
titles
> as an incentive to retain staff rather than pay them more at a time of
> economic uncertainty. [PARA]Businesses seeking "Stock Replenishment
> Executives" were actually looking for shelf stackers and successful
> candidates for a post as "Technical Sanitation Assistant" would find
> themselves cleaning washrooms. [PARA]"Up-titling" seems to have won
> converts. Of the 1,700 workers Reed surveyed, around half thought a
better
> job title would make them happier even if there was no change in what
they
> actually did. [PARA]"People view a grander title as recognition of their
> contribution to the organization and feel more committed as a result,"
> Rapacioli said.
>
> This probably doesn't have any relevance
> To anyone @ tech-net
> Present company always excepted . . .
>
> Best Regards to All
>
> M Keel
>
> = = = EMPERIOR OF SPACE = = =
>
> -----Original Message-----
> From: Kathy Kuhlow [mailto:[log in to unmask]]
> Sent: Thursday, March 07, 2002 4:30 PM
> To: [log in to unmask]
> Subject: [TN] NTC this is a question regarding employee involvment
>
> << File: TEXT.htm >> If you have no opinion or want to get in a
discussion
> regarding this topic please delete this message....
>
> I publish a company newsletter each month. Each month I try to add an
> article in this paper regarding principles. Most of the principles are
> written to help inspire Leadership, commitment, etc. The goal of the
> article is to help educate fellow employees and hopefully get some of
them
> involved. I firmly feel that a involved, caring work force produces
more,
> faster, and correctly.
>
> This month's topic is Employee involvement. Do or have any of you been
> involved with any programs within this topic range? Any opinions on what
> are the better methods or results of involvement? Let me know. I hope
to
> publish the paper for the month soon and would like to explore possible
> actual programs like this.
>
> A couple of weeks a go a forum was suggested for Managers, well here I
am.
> You know one of those upper managers who enjoys being in technet to
learn
> and share if possible. I really hope you will let me know your opinion.
>
> Kathy
>
>
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Date: Mon, 11 Mar 2002 14:12:28 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Tom Parkinson - Quality System Manager <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Tom Parkinson - Quality System Manager <[log in to unmask]>
Organization: WinTronics, Inc.
Subject: Re: Packaging Material Question
X-To: "Bloomquist, Ken" <[log in to unmask]>
MIME-Version: 1.0
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Why not just send back the ESD bags? Some of our customers do that and
they get a small discount. Your right - special clam shell boxes cost
too much.
"Bloomquist, Ken" wrote:
>
> We have CMs assemble all of our circuit card assemblies. They package each
> assembly in a static shielding bag, then bubble wrap and into a box along
> with other assemblies. We receive each shipment and as soon as it hits the
> floor we throw away all that material. We've looked into divider boxes and
> clamshell boxes and sending them back and forth but there is a lot of
> expense associated with that too. We hate to keep filling up the land fills
> but haven't found a good alternative.
>
> By the way, our CMs are not in the local area. The closest one is about 300
> miles away.
>
> Any great ideas out there in TechNet land?
>
> Ken Bloomquist
> Sr. Principal Process Engineer
>
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Date: Mon, 11 Mar 2002 13:26:47 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bissonnette, Jean-Francois" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bissonnette, Jean-Francois" <[log in to unmask]>
Subject: DO-41 footprint size
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Hi all,
I need to find information on components footprints. Is there a place on
the net
where I could find information on DO-41 footprint? (and other parts) I tried
to=20
find it on the Motorola website but came up with nothing. If possible I'd
like
to know what is Motorola suggestion for the pad size of these diodes.
Jean-Fran=E7ois Bissonnette
V=E9rificateur, Contr=F4le de la Qualit=E9
=C9lectronique
Produits et Proc=E9d=E9s
Vapor Rail Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 x2021
(514) 335-4231 fax
<<Bissonnette, Jean-Francois.vcf>>=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally privileged and=
confidential information intended only for the use of the individual or en=
tity named herein. If the reader of this transmission is not the intended r=
ecipient, you are hereby notified that any dissemination, distribution, or =
copying of this transmission is strictly prohibited.
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Date: Mon, 11 Mar 2002 14:29:28 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: STEVE'S SITE
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Hello All,
Moonguy, those non solderings do look strange. I have canvassed some folks
and will let you know.
By the way those blind vias looked as bad as I've seen, please tell me they
are on a board that does not see temp changes.
Brad
Thanks the site is now on my "favs" list...
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Date: Mon, 11 Mar 2002 13:30:17 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Thermal Shock
X-To: [log in to unmask]
Mime-Version: 1.0
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Werner, to continue on the thread a bit, which is the "best" test
1) HASS type test with temp change >30C/min with vibration (20-30 GRMs) for a
period of 2-4 hours (great for mechanical stressing)
2) ESS slow temp change 5C/min but a longer test time of 72-100 hours this might
allow chemical reactions to happen.
If making PWAs with uBGA, which course of test would best benifit relilability
screening of production.
Thanks for anyones input.
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Date: Mon, 11 Mar 2002 11:41:22 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: black pad
MIME-version: 1.0
Content-type: multipart/alternative;
boundary="Boundary_(ID_safmxh/gd0r4V8GX9eecpw)"
This is a multi-part message in MIME format.
--Boundary_(ID_safmxh/gd0r4V8GX9eecpw)
Content-type: text/plain; charset=Windows-1252
Content-transfer-encoding: 7BIT
I have been following all of the recent discussions about ENIG with great interest since we use this finish on some of our designs. We have had some wetting problems but they were process related. Lucky me I have never seen the infamous "black pad". So my question (request) is "Does any body have some pic's of black pad?" If so could I have a look?
Thanks in advance,
Dan
--Boundary_(ID_safmxh/gd0r4V8GX9eecpw)
Content-type: text/html; charset=Windows-1252
Content-transfer-encoding: 7BIT
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=Content-Type content="text/html; charset=windows-1252">
<META content="MSHTML 6.00.2600.0" name=GENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=#ffffff>
<DIV><FONT size=2> I have been following all of the recent discussions
about ENIG with great interest since we use this finish on some of our designs.
We have had some wetting problems but they were process related. Lucky me I have
never seen the infamous "black pad". So my question (request) is "Does any body
have some pic's of black pad?" If so could I have a look?</FONT></DIV>
<DIV><FONT size=2>Thanks in advance,</FONT></DIV>
<DIV><FONT size=2>Dan</FONT></DIV></BODY></HTML>
--Boundary_(ID_safmxh/gd0r4V8GX9eecpw)--
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Date: Mon, 11 Mar 2002 14:47:26 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Flattening a board during assembly
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Quite a lil thread here...
Material will do what it wants... its just a case of when. If the design was
good and the board still warped I would speculate an odd thickness driving
the fabricator to build the double sided part with Cu foils and pregs. This
could introduce twist or bow relative to grain. If it is a standard double
sided build, that is a double sided copper clad laminate or C-stage then it
won't warp. The suppliers of laminate supply this material by the linear
mile or miles.
I have yet to see a warped board that wasn't attributed to the design or
possibly Operator Error, in which case they wouldn't get shipped. In the
case of "bad design" where the Customer will not revise then it is only a
matter of time before you walk away from the job. You can only relate the
facts arrived from working hard and being honest. Well, that's my warped
perspective....
Brad
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Date: Mon, 11 Mar 2002 14:53:12 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Safavi-Bayat Shahed <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Safavi-Bayat Shahed <[log in to unmask]>
Subject: Re: DO-41 footprint size
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
MIME-Version: 1.0
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Salut,
Jean-Fran=E7ois
Check here:
http://www.ic.nec.co.jp/discrete/english/diode/products/ichiran_diode.ht=
ml=20
Shahed
-----Original Message-----
From: Bissonnette, Jean-Francois [mailto:[log in to unmask]]
Sent: Monday, March 11, 2002 1:27 PM
To: [log in to unmask]
Subject: [TN] DO-41 footprint size
Hi all,
I need to find information on components footprints. Is there a place =
on
the net
where I could find information on DO-41 footprint? (and other parts) I =
tried
to=20
find it on the Motorola website but came up with nothing. If possible =
I'd
like
to know what is Motorola suggestion for the pad size of these diodes.
Jean-Fran=E7ois Bissonnette
V=E9rificateur, Contr=F4le de la Qualit=E9
=C9lectronique
Produits et Proc=E9d=E9s
Vapor Rail Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 x2021
(514) 335-4231 fax
<<Bissonnette, Jean-Francois.vcf>>=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally privileged =
and
confidential information intended only for the use of the individual or
entity named herein. If the reader of this transmission is not the =
intended
recipient, you are hereby notified that any dissemination, =
distribution, or
copying of this transmission is strictly prohibited.
------------------------------------------------------------------------=
----
-----
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in
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Technet NOMAIL
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847-509-9700
ext.5315
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----
-----
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Date: Mon, 11 Mar 2002 14:42:05 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Don Vischulis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Don Vischulis <[log in to unmask]>
Subject: Re: Flattening a board during assembly
X-To: "d. terstegge" <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
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Couldn't lurk any more.
There's one other item that is often overlooked. One should check out the
panel racking fixtures used in the Fab shop. Often the panels are racked
standing on their edges at a small angle from vertical for solder mask final
cure. More than once, I've seen panels develop a warp during higher
temperature processing due to heat and gravity. Bend the boards straight,
and they still have a memory of their previous shape.
This isn't often seen with multilayers because of the added stiffness of the
inner layer planes and the use of higher Tg materials.
Don Vischulis
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Date: Mon, 11 Mar 2002 14:47:58 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: STEVE'S SITE
X-To: [log in to unmask]
Brad Baby,
These are the worst designs I've ever had to set straight in a short time.
They go everywhere and work very not well.
Did you see my C clamp posting? If so, you'll see some really interesing
stuff as I've never seen in over 30 years of doing interesting/strange stuff.
MoonMan
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Date: Mon, 11 Mar 2002 14:50:13 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: black pad
X-To: [log in to unmask]
Dan,
Steve posted a couple of mine some time back. Don't know if he can revive
those removed, but he might. If not, I'll send you some if you are able to
receive attachments.
Please advise,
Earl
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Date: Mon, 11 Mar 2002 16:00:00 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Dave Pahlas <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dave Pahlas <[log in to unmask]>
Subject: Re: Flattening a board during assembly
MIME-Version: 1.0
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Hans, these were actually boards from PDQFabs when I used to work for ACME.
Interesting thoughts on the root cause, not really sure what was going on
except we were probably getting what we were paying for. (But the wear and
tear was free.)
-----Original Message-----
From: Hinners Hans M Civ WRALC/LUGE [mailto:[log in to unmask]]
Sent: Monday, March 11, 2002 12:00 PM
To: [log in to unmask]
Subject: Re: [TN] Flattening a board during assembly
Hi Dave,
Hey, I used to make stuff for Jabil - and your panels always came out flat,
honest. Your example is a Lamination Engineer's dream - I never would have
seen a double sided board in lamination - unless it's the UL Cert. panels.
Two guesses at your double sided problem - either the circuit design top to
bottom gave it an induced twist or the material had some flaw from the
manufacturer. Diagonal twist makes me think grain direction, No?
Normally, you laminate a nice balanced mlb with a reasonable cooldown cycle
and the panels come out flat. It really saves wear and tear on your Quality
Engineers that way.
Hans
AC-130 Gunship Motto: "You can run but you'll only die tired."
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: Dave Pahlas [mailto:[log in to unmask]]
Sent: Friday, March 08, 2002 5:14 PM
To: [log in to unmask]
Subject: Re: [TN] Flattening a board during assembly
Sounds like in a past life we were the recipients of boards "not done
properly". We had 14"x16" double sided PCBs that would twist pretty bad
during first assembly reflow making stencil gasketing at second assembly
pretty tough. We ran a sample of unpopulated boards through the reflow oven
riding flat on the mesh and the diagonal corners actually curled up. We
weren't very knowledgeable on PCB fabrication but thought maybe the internal
stresses created in the board shop's flattening process were being released
in our reflow oven. We never had this problem with the previous (more
expensive) supplier. Hmmmm. The product went EOL before resolution was
reached, but ...
Enjoy your weekend.
-----Original Message-----
From: Hinners Hans M Civ WRALC/LUGE [mailto:[log in to unmask]]
Sent: Friday, March 08, 2002 11:27 AM
To: [log in to unmask]
Subject: Re: [TN] Flattening a board during assembly
Hey Daan,
Here's a generic dewarp I've used in the past. You or preferably the Fab
house should have an oven large enough to load the panels or boards. If
done properly you won't see re-warp during the assembly process. Dewarp is
not a board friendly process and I shudder to consider the longer term
reliability issues but it gets them flat when nothing else will. It's
usually better to dewarp boards instead of panels because of stress relief
that occurs at Route. On the other hand a 2 or 4 up panel cuts your cycle
time down considerably.
1. Load warped panels into oven. (Keep stacks reasonable sized: ~500 mils
of board stock or less - 6-10 panels depending on thickness)
2. Place several Caul plates (that match or overlap panel size) ~50 pounds
of weight & Use Kraft Paper (Sulfur Free) to protect panels
3. Bake at 340+ F for 4-6 hours (Material must be at or slightly above Tg)
4. Cool slowly to room temp.
5. Manually assist (Bend & Twist) the dewarp at Final Inspect. (Great
upper body workout on those 200+ board shipments)
6. Inspect Panels on Flatness (Granite) Table. ("Tap" test the 4 corners.
If the board's corners don't touch the table you've got more flexing to do.)
Hans
AC-130 Gunship Motto: "You can run but, you'll only die tired."
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: d. terstegge [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 11:48 AM
To: [log in to unmask]
Subject: [TN] Flattening a board during assembly
Hi Technetters,
We've got a batch of boards here that's really twisted (about 1.5 % when
measured according to IPC-TM-650) due to imbalanced design. The customers is
not willing to change the design, and we discussed with them the possibility
of using a carrier-frame for flattening these boards while they are
processed through our SMT-line.
My worry is that this results in unacceptable stress in the solder joints as
soon as the board is released from the carrier. Fortunately there's no BGA
on this board, but it does have a small QFP and some 40 mm long
SMT-connectors. It's supposed to be a high-reliability military product.
Does anyone have any data on the effects of such internal stresses ?
Also other comments are welcome.
Best regards.
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
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Date: Mon, 11 Mar 2002 16:32:33 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Tom Parkinson - Quality System Manager <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Tom Parkinson - Quality System Manager <[log in to unmask]>
Organization: WinTronics, Inc.
Subject: Re: DO-41 footprint size
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
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DO-41 is THT. See the following:
http://www.ic.nec.co.jp/discrete/english/pkg/do41.html
"Bissonnette, Jean-Francois" wrote:
>
> Hi all,
>
> I need to find information on components footprints. Is there a place on
> the net
> where I could find information on DO-41 footprint? (and other parts) I tried
> to
> find it on the Motorola website but came up with nothing. If possible I'd
> like
> to know what is Motorola suggestion for the pad size of these diodes.
>
> Jean-François Bissonnette
> Vérificateur, Contrôle de la Qualité
> Électronique
> Produits et Procédés
> Vapor Rail Inc.
> 10655 Henri-Bourassa O.
> St-Laurent, Qc
> H4S 1A1
>
> (514) 335-4200 x2021
> (514) 335-4231 fax
>
> <<Bissonnette, Jean-Francois.vcf>>
>
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally privileged and confidential information intended only for the use of the individual or entity named herein. If the reader of this transmission is not the intended recipient, you are hereby notified that any dissemination, distribution, or copying of this transmission is strictly prohibited.
>
> ---------------------------------------------------------------------------------
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Date: Mon, 11 Mar 2002 16:54:53 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Thermals, plane clearances etc.
MIME-Version: 1.0
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boundary="part1_5b.244e5ca5.29be81ad_boundary"
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Content-Transfer-Encoding: quoted-printable
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hello Alex,
Good questions...
I will go as far as I can.
Starters, I am having a disconnect with figues and chapters you are citing.=20=
=20
I am working from the IPC-2221, 2222 Feb 98 and 2221 amend 1 of Jul 2000. =20
Hope this helps.
Amendment 1 of IPC-2221:
9.1.1 Variable a, add: For external layers, the requirement is the maximum=20
diameter of the finished hole. For internal layers, the drilled hole=20
diameter is used.
Annular ring, when required, is as specified on the drawing. In the case of=
=20
Class three without further callout requirement then it would be my=20
interpretation that .050 is external and .025 is internal. [Amend 1 changed=20
.05 to .050 and .03 to .025, I assume it was arounding problem.] I say this=20
because there can clearly be plane area on external areas as well as interna=
l=20
and the 9.3.1 chapter clearly states "These types connections shall be=20
relived in a manner similar to that shown in 9-4. =E2=80=A6" It goes to ref=
erence=20
the "sectional standards" that I interpret as IPC-2222. Also do note the=20
similar... The IPC-2222 does have a very nice write up on thermals and=20
clearances; with the needed clarification of finished or drilled you are wel=
l=20
on your way to plane thermal and clearance calculation bliss=E2=80=A6 includ=
ing web=20
and spokes. Terrific.
As to the .25MM for nonfunc's I don't understand the question.
B; standard manufacturing allowances and fabriction allowances are the same
I didn't understand the electrical clearance... I begin to think we ar=20
reading different specs.
The next to last question you have looks like its out of 2222 and sounds lik=
e=20
the ole 275 days (mil and IPC).
Your on the right track, I hope you can straighten me out.
Let me know.
Boston Brad
781 858 0783
--part1_5b.244e5ca5.29be81ad_boundary
Content-Type: text/html; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
Content-Language: en
<HTML><FONT FACE=3Darial,helvetica><FONT SIZE=3D2>hello Alex,<BR>
<BR>
Good questions...<BR>
<BR>
I will go as far as I can.<BR>
<BR>
Starters, I am having a disconnect with figues and chapters you are citing.&=
nbsp; I am working from the IPC-2221, 2222 Feb 98 and 2221 amend 1 of Jul 20=
00. Hope this helps.<BR>
<BR>
Amendment 1 of IPC-2221:<BR>
<BR>
9.1.1 Variable <I>a</I>, add: For external layers, the requirement is the ma=
ximum diameter of the finished hole. For internal layers, the drilled=20=
hole diameter is used.<BR>
<BR>
Annular ring, when required, is as specified on the drawing. In the ca=
se of Class three without further callout requirement then it would be my in=
terpretation that .050 is external and .025 is internal. [Amend 1 changed .0=
5 to .050 and .03 to .025, I assume it was arounding problem.] I say this be=
cause there can clearly be plane area on external areas as well as internal=20=
and the 9.3.1 chapter clearly states "These types connections shall be reliv=
ed in a manner similar to that shown in 9-4. =E2=80=A6" It goes to ref=
erence the "sectional standards" that I interpret as IPC-2222. Also do=
note the similar... The IPC-2222 does have a very nice write up on th=
ermals and clearances; with the needed clarification of finished or drilled=20=
you are well on your way to plane thermal and clearance calculation bliss=
=E2=80=A6 including web and spokes. Terrific.<BR>
<BR>
As to the .25MM for nonfunc's I don't understand the question.<BR>
B; standard manufacturing allowances and fabriction allowances are the same<=
BR>
I didn't understand the electrical clearance... I begin to think we ar readi=
ng different specs.<BR>
<BR>
The next to last question you have looks like its out of 2222 and sounds lik=
e the ole 275 days (mil and IPC).<BR>
<BR>
Your on the right track, I hope you can straighten me out.<BR>
<BR>
Let me know.<BR>
<BR>
Boston Brad<BR>
781 858 0783<BR>
<BR>
</FONT></HTML>
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Date: Mon, 11 Mar 2002 17:40:47 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: black pad
MIME-Version: 1.0
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boundary="part1_137.ac47f23.29be8c6f_boundary"
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Earl,
I looked for those pics, but I can't find them...doesn't mean I don't have
them, just don't remember where I put them.
In the meantime, here's a link to a few good files on ENIG failures including
the one on Black Pad by Nicholas Biunno of HADCO. There's some decent images
in that one....go to:
http://www.nukcg.org/download.htm
-Steve Gregory-
> Dan,
>
> Steve posted a couple of mine some time back. Don't know if he can revive
> those removed, but he might. If not, I'll send you some if you are able to
> receive attachments.
>
> Please advise,
>
> Earl
>
--part1_137.ac47f23.29be8c6f_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Earl,
<BR>
<BR>I looked for those pics, but I can't find them...doesn't mean I don't have them, just don't remember where I put them.
<BR>
<BR>In the meantime, here's a link to a few good files on ENIG failures including the one on Black Pad by Nicholas Biunno of HADCO. There's some decent images in that one....go to:
<BR>
<BR>http://www.nukcg.org/download.htm
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Dan,
<BR>
<BR>Steve posted a couple of mine some time back. Don't know if he can revive
<BR>those removed, but he might. If not, I'll send you some if you are able to
<BR>receive attachments.
<BR>
<BR>Please advise,
<BR>
<BR>Earl
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
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Date: Mon, 11 Mar 2002 18:10:26 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mark Charlton <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mark Charlton <[log in to unmask]>
Subject: Skreen Kleen
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Can any of the Technetters help me find some info on a piece of =
equipment that one of my colleagues picked-up at a recent auction? Of =
course no documentation was included. =20
The equipment in question is a stencil cleaner. It has a tag =
referencing the Austin American Technology company and E.M.C. Domestic =
as a model SK700 SKREEN KLEEN unit. I have searched the WWW for info =
about the unit but have been unsuccessful so far so I thought I'd =
utilize my best resource, TechNet!
Any assistance would be greatly appreciated.
Mark Charlton
Engineering Manager
MSI of Central Florida, Inc.
7703 Technology Drive Ste. 102
Melbourne, FL 32904
(321) 725-0626 x.24
(321) 725-0627 fax
[log in to unmask]
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Date: Mon, 11 Mar 2002 15:06:00 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Pelkey, Glenn" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Pelkey, Glenn" <[log in to unmask]>
Subject: Re: Thermal Shock
X-To: "[log in to unmask]" <[log in to unmask]>
MIME-Version: 1.0
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This message is in MIME format. Since your mail reader does not understand
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It looks like I need to defend that statement. Somewhere in my files is a
an article comparing rate of change on soldered assemblies. When a fast
rate of change was used, the assemblies survived. When a slow rate of
change was used, failures occurred. All else being equal with respect to
temperature limits and number of cycles. The explanation was at a high rate
of change, the solder joints did not have the opportunity to "relax." I'm
sure others can explain that better than me.
So, my point is, a slow rate of change would be more effective at testing
the solder joints than a high rate of change. I think we're all saying the
same thing. Heck, I learned this from you guys!
Glenn
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Monday, March 11, 2002 10:15 AM
To: [log in to unmask]
Subject: Re: [TN] Thermal Shock
Hi Jim,
In a message dated 03/11/2002 7:59:02, [log in to unmask] writes:
>Glenn (or anyone else), could you elaborate on your statement that slow
>rates of change affect solder joints more than fast rates of change.
A: No, the statement is incorrect. The rate of change in temperature is more
detrimental when high due to possible component/PCB warping. What is more
detrimental is a longer hold times typically associated with slower heating
rates and not T-shock.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 386-437-8747, Fax: 386-437-8737
E-mail: [log in to unmask], Website: www.engelmaier.com
------_=_NextPart_001_01C1C951.4F3AC4B0
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN">
<HTML>
<HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META NAME=3D"Generator" CONTENT=3D"MS Exchange Server version =
5.5.2653.12">
<TITLE>RE: [TN] Thermal Shock</TITLE>
</HEAD>
<BODY>
<BR>
<P><FONT SIZE=3D2>It looks like I need to defend that statement. =
Somewhere in my files is a an article comparing rate of change on =
soldered assemblies. When a fast rate of change was used, the =
assemblies survived. When a slow rate of change was used, =
failures occurred. All else being equal with respect to =
temperature limits and number of cycles. The explanation was at a =
high rate of change, the solder joints did not have the opportunity to =
"relax." I'm sure others can explain that better than =
me.</FONT></P>
<P><FONT SIZE=3D2>So, my point is, a slow rate of change would be more =
effective at testing the solder joints than a high rate of =
change. I think we're all saying the same thing. Heck, I =
learned this from you guys!</FONT></P>
<P><FONT SIZE=3D2>Glenn</FONT>
</P>
<P><FONT SIZE=3D2>-----Original Message-----</FONT>
<BR><FONT SIZE=3D2>From: [log in to unmask] [<A =
HREF=3D"mailto:[log in to unmask]">mailto:[log in to unmask]</A>]</FONT>=
<BR><FONT SIZE=3D2>Sent: Monday, March 11, 2002 10:15 AM</FONT>
<BR><FONT SIZE=3D2>To: [log in to unmask]</FONT>
<BR><FONT SIZE=3D2>Subject: Re: [TN] Thermal Shock</FONT>
</P>
<BR>
<P><FONT SIZE=3D2>Hi Jim,</FONT>
<BR><FONT SIZE=3D2>In a message dated 03/11/2002 7:59:02, =
[log in to unmask] writes:</FONT>
<BR><FONT SIZE=3D2>>Glenn (or anyone else), could you elaborate on =
your statement that slow</FONT>
<BR><FONT SIZE=3D2>>rates of change affect solder joints more than =
fast rates of change.</FONT>
<BR><FONT SIZE=3D2>A: No, the statement is incorrect. The rate of =
change in temperature is more</FONT>
<BR><FONT SIZE=3D2>detrimental when high due to possible component/PCB =
warping. What is more</FONT>
<BR><FONT SIZE=3D2>detrimental is a longer hold times typically =
associated with slower heating</FONT>
<BR><FONT SIZE=3D2>rates and not T-shock.</FONT>
</P>
<P><FONT SIZE=3D2>Werner Engelmaier</FONT>
<BR><FONT SIZE=3D2>Engelmaier Associates, L.C.</FONT>
<BR><FONT SIZE=3D2>Electronic Packaging, Interconnection and =
Reliability Consulting</FONT>
<BR><FONT SIZE=3D2>7 Jasmine Run</FONT>
<BR><FONT SIZE=3D2>Ormond Beach, FL 32174 USA</FONT>
<BR><FONT SIZE=3D2>Phone: 386-437-8747, Fax: 386-437-8737</FONT>
<BR><FONT SIZE=3D2>E-mail: [log in to unmask], Website: =
www.engelmaier.com</FONT>
</P>
</BODY>
</HTML>
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=========================================================================
Date: Mon, 11 Mar 2002 19:14:41 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: George Milad <[log in to unmask]>
Subject: 2nd Reminder to attend Plating Committee 4-14 at Expo-2002
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The Plating Subcommittee 4-14 will meet at Expo 2002 in Longbeach CA , on
Tuesday March 26th,2002 at 1:30 - 5:00pm.
The subcommittee is reviewing comments to a final draft IPC-4552,
"Specifications for Electroless Nickel/Immersion Gold (ENIG) Plating for
Printed Circuits Boards" and is also pursuing UL Recognition of Immersion
Silver surface finishes for printed wiring boards in conjunction with the UL
Task Group,3-11f.
The agenda will include updates on existing activities and the determination
of the next topic for "Standard Development". Presently on the list are
additional "Surface Finish" specifications, however the committee is open to
suggestions and priorities from the membership.
As part of the standards development working meetings, you can help develop
internationally recognized documents for PWB component and materials. You'll
be on the cutting edge of PWB design, manufacture and use.
The committee welcomes your contribution and your input.
George Milad
HDI Consulting
--part1_69.23762a68.29bea271_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>The Plating Subcommittee 4-14 will meet at Expo 2002 in Longbeach CA , on Tuesday March 26th,2002 at 1:30 - 5:00pm.
<BR>
<BR>The subcommittee is reviewing comments to a final draft IPC-4552, "Specifications for Electroless Nickel/Immersion Gold (ENIG) Plating for Printed Circuits Boards" and is also pursuing UL Recognition of Immersion Silver surface finishes for printed wiring boards in conjunction with the UL Task Group,3-11f.
<BR>
<BR>The agenda will include updates on existing activities and the determination of the next topic for "Standard Development". Presently on the list are additional "Surface Finish" specifications, however the committee is open to suggestions and priorities from the membership.
<BR>
<BR>As part of the standards development working meetings, you can help develop internationally recognized documents for PWB component and materials. You'll be on the cutting edge of PWB design, manufacture and use.
<BR>
<BR>The committee welcomes your contribution and your input.
<BR>
<BR>George Milad
<BR>HDI Consulting</FONT></HTML>
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Date: Tue, 12 Mar 2002 09:04:27 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: ENIG AND NON WETTING
X-To: Earl Moon <[log in to unmask]>
MIME-Version: 1.0
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Passivated Nickel? Have your boards been allowed to dry out too much at
fabrication between plating stages? Boards should still be we going from
the Nickel bath to the Gold bath to minimise oxidation of the Nickel
surface, to which you're soldering (or trying to).
Peter
Earl Moon
<[log in to unmask] To: [log in to unmask]
M.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
Sent by: Aero/ST Group)
TechNet Subject: Re: [TN] ENIG AND NON WETTING
<[log in to unmask]
ORG>
03/11/02
07:57 PM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
Earl Moon
Daan,
As always, I appreciate your input. To clarify, the boards were freshly
received from a major international supplier. I instructed our assembly
house (the same major international supplier - how about that for strategic
planning as the same boards, in volume will be, guess what, assembled by
the
same major international supplier in another location) to reflow and wave
solder the solder samples. The supplier wave soldered the side in which I
had little interest. It was the SMT side, with all the little bastard TI
CSP's that held the most interest for obvious reasons or that should have
been obvious to all as it's all I've been yacking about for two months to
you all and all prospective suppliers.
I got the wave results last week with the non wetting as I described. The
wave solder process was "normal" to the major international assembly
operation with flux type, flux application, conveyor speed, wave types,
wave
height, preheat temps, solder temp, and all the other stuff we all know and
love about wave soldering and its process management requirements.
The board showed, clearly, non wetting on some bottom side SMT pads, at
about 50% non wetted. It also showed, clarly through hole pads about 50%,
by
quantity, non wetted with some obviously adhacent.
My question, again, is what in the ENIG, over bare copper after SM
application, is possibly affecting this type solderability. It's a mystery
worth more investigation.
Again, thanks Daan and I hope I clarified.
Earl
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Date: Tue, 12 Mar 2002 10:04:40 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Pads, holes, traces and Class 3 field reliability
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Cheers, Brad! Always nice to have some voluble support, especially on the
'non-functional' pad issue. At the moment, I can't gauge if there's good,
definitive scientific backing for one view or the other (remove pads or
retain). Both sides of the argument are pursuasive for different reasons. I
therefore reckon that removal or retention of pads depends on the
conditions that obtain when having to make that decision, rather than
generally advocating removal or retention.
Z-axis stretch is the big concern, and I do want to amend our fab spec to
ensure that hole plating is 1 mil min rather than 0.7 mils, as it could
read at the moment. That would require a slightly bigger pad allowance than
we have at present, and pad size, as you know, is a contentious issue with
our design team right now. I'll battle on, though.
Peter
B2Saunders@AO
L.COM To: [log in to unmask]
Sent by: cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
TechNet Aero/ST Group)
<[log in to unmask] Subject: Re: [TN] Pads, holes, traces and
ORG> Class 3 field reliability
03/12/02
02:48 AM
Please
respond to
"TechNet
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Forum.";
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respond to
B2Saunders
Peter,
Removing inner pads and using the newly found area is certain death. I
have
a fellow FAE that does a seminar on the error of blindly removing pads to
gain trace area. Less than .001 average wall thickness on a conventional
PTH
in a Military PWB is death. Aspect ratio's of 7/1 are much much more
reliable than this pad removal scheme and allowing less than the .001 PTH
wall thickness. The PTH thickness plays with aspect ratio; to the extent
that .0007 will work for MicroVia, but the Z axis is from .002 to .005.
That
is a big difference. Finally in reference to pad deletion your better off
making the entire board tougher to fab with smaller pads than to
arbitrarily
delete and bump traces.
Boston Brad
781 858 0783
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Date: Mon, 11 Mar 2002 22:27:52 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
My Nguyen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: My Nguyen <[log in to unmask]>
Subject: PreBake PCB prior to soldering
X-To: [log in to unmask]
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In-Reply-To: <[log in to unmask]>
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Brad,
Your advise and insight are greatly appreciated!!!
We make memory module. The PCB material is FR4, 4-6
layers.
1. If we do not "prebake", what would be the
consequences?
2. Does the 80/20 rules apply to the memory PCB board
(especially the Immersion/Flash Gold)?
3. If the boardhouse prebake and then vaccum seal the
product, is it neccessary for SMT to prebake it prior
to soldering if they open then process the PCB
immediately? Our SMT room environment is 20-30C and
35-60% Humidity.
Again, your advise is greatly appreciated.
Stacy
----------------------
--- [log in to unmask] wrote:
> Stacy,
>
> There will always be pro and con discussion on
> benefits of baking bare boards
> prior to solder assembly. The "prebake" numbers you
> showed looked good. The
> above 100 degree C will get the moisture gaseous and
> the duration will drive
> it out of the substrate. The word being substrate.
> Generally, prebake
> drives moisture out of the fiberglass weave of board
> dielectric. Polyimide
> substrate is particularly prone to moisture
> absorption; to such an extent
> flex circuit suppliers usually enclose a "PREBAKE
> WARNING" with all
> deliveries [warning: prebake prior to soldering].
> This is the first I have
> heard of solder mask entrapment of moisture. It is
> usually the combined Z
> axis expansion that delivers delamination (we hate
> that word). The issue
> with solder mask may be one of "Popcorning" where
> less than optimum "tenting"
> design of vias is causation
> to micro explosions (akin to volcanic eruptions)
> that will lead to
> delamination (ugly word again) of solder mask to
> substrate. The bond of mask
> to substrate may be so great that the fiberglass
> weave is actually upset. In
> any case any board with the ill fated design
> inadequacy is destined to be
> problematic. Prebake may lessen propensity but in
> itself not eliminate it.
>
> Lastly, boards needs to be populated ASAP/RUSH after
> prebake [here come the
> cards and letters for those whom have not pressed
> delete yet] there are
> studies that show 80% of moisture is reintroduced
> within 20 minutes of bake.
> A sort of inverse 80/20 rule. I have seen all kinds
> of prebake and storage
> including nitrogen filled storage bags. The best
> thing is to have constant
> room and humidity controlled assembly area. If you
> are going to prebake do
> it prior to assembly... hmmm, both sides.
>
> Just a little insight it is a very hot topic.
>
> Boston Brad
> 781 858 0783
>
>
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Date: Mon, 11 Mar 2002 23:51:53 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Peter Lee <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Peter Lee <[log in to unmask]>
Subject: Return material in PPM
In-Reply-To: <[log in to unmask]>
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Does anyone have any idea on what average PPM on return material would
be commonly seen in the contract electronics manufacturing industry? How
would one go about setting such a target?
Rgds,
Peter
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Date: Tue, 12 Mar 2002 10:42:01 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guenter Grossmann <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guenter Grossmann <[log in to unmask]>
Subject: Antw: Re: [TN] Thermal Shock
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Jim
The question about shock testing of solder joints is somewhat complex and =
can not be reduced to a single temperature change rate. I'll try to =
explain our point of view as short as possible:
1) Deformation. The main deformation mechanism occurring in solder joint =
is creep. This means if a constant load is applied the material deforms =
continuously. There is no direct connection between load and deformation =
as in elastic or instantaneous plastic deformation. How much a material =
deforms is time dependent. Because of this reason any measurement of a =
Youngs modulus with a tensile testing machine is fruitless since any =
stress strain diagram found depends on how fast the crosshead moves. This =
means the Youngs modulus is not a material dependent constant but a =
testing dependent measure.
2) Degradation. Tin- based solder deforms in creep with two deformation =
regimes:
a) Grain Boundary Sliding. In GBS the crystals of a material move above =
each other along the grain boundaries. However, since the grain boundaries =
are not straight planes the grains move on complex three dimensional =
traces that also involve rotation. It is clear, that in cyclic deformation =
the grains will on their way back not sit in the place they where before =
the cycle started. Due to the uneven surface of the grain boundaries small =
openings occur in the material. Most of there openings are filled up by =
diffusion from the places where compression occurs to the places where =
tensile stress is present. It is important in this context that diffusion =
is time and temperature dependent. The faster the deformation and the =
lower the temperature the more openings remain only partially filled.
b) Dislocation Climb. If the stress is high enough it is possible to =
overcome the forces that hold the atoms in the crystal lattice and the =
grain itself deforms. This deformation is only possible if there are =
failures in the lattice called dislocations. If DC is activated not only =
the present dislocations move through the crystal causing one crystal =
layer to move above each other but also new dislocations are produced. If =
a dislocation reaches the grain boundary also a small opening is formed =
that might be filled by diffusion if there is enough time and temperature.
This means that each deformation regime has its own degradation behaviour.
Looking at point 2, one could say that fast cycling is more destructive =
than slow cycling. And looking at the degradation mechanisms this is =
true.=20
However, point 1 plays an important role in accelerated testing. If you =
run a test with steep temperature ramps you build up stress since the PCB =
and the component deform elastically. This stress has to be transformed =
into plastic deformation since slow cycle fatigue is strain driven. At =
high temperature this is no problem. Solder creeps so fast that above 40 =
deg.C it is virtually impossible to apply a temperature gradient that =
builds up any stress. The problem occurs at low temperature. Below -20 =
deg.C solder creeps very slow. If you apply a slow temperature change a =
lot of strain is already induced in the ramp during the time where your =
specimen is above -20 deg.C. If you apply a steep ramp you have to wait =
for hours until a considerable portion of the possible strain is =
induced.=20
As you see it is a complex game between deformation and degradation. =
However, since the amount of cyclic plastic strain a solder joint sees in =
a thermal cycle is so crucial slow cycling is more damaging since more =
strain is induced into a solder joint than in a fast cycle. On the other =
side it is quite questionable whether it makes sense to activate a =
degradation mechanism that does not occur in reality just to have a faster =
test.=20
Hmmm, I hope I made myself clear enough.
Best regards
Guenter
.
EMPA
Swiss Federal Institute for Materials Testing and Research
Centre for Reliability
Dipl. Eng. Guenter Grossmann
8600 Duebendorf
Switzerland
Phone: xx41 1 823 4279
Fax : xx41 1823 4054
mail: [log in to unmask]
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Date: Tue, 12 Mar 2002 06:26:20 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: Return material in PPM
X-To: Peter Lee <[log in to unmask]>
In-Reply-To: <000f01c1c99a$c6b0b2e0$3c30b742@cr70a>
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I think you would have better luck looking for some DPMO benchmark. Returns
data would be very muddy, if it even existed, because of variation in
complexity of assemblies, state of the assembly, and return policies. I wish
I had benchmark data for you. You might try the IPC home page, SMTA . . .
search google with EMS and DPMO.
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Peter Lee
> Sent: Tuesday, March 12, 2002 2:52 AM
> To: [log in to unmask]
> Subject: [TN] Return material in PPM
>
>
> Does anyone have any idea on what average PPM on return material would
> be commonly seen in the contract electronics manufacturing industry? How
> would one go about setting such a target?
>
>
> Rgds,
> Peter
>
>
>
> _________________________________________________________
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Date: Tue, 12 Mar 2002 11:29:52 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Keith Short <[log in to unmask]>
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From: Keith Short <[log in to unmask]>
Subject: flax organic finish
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Dear TechNet members,
I have been asked to specify a flax organic finish to a new
board design. This design is a 14-layer microvia board, with
20 or so uBGA devices.
What sort of problems or issues does this finish give. Does my
assembly house need to make any special provisions for this.
Thanks for any information or help
Keith Short
Senior Engineer
------------------------------------------------------------------------
--------------------------------
Keith Short email: [log in to unmask]
Telecom Modus Ltd. Tel: +44 1372 381811
Cleeve Road Fax : +44 1372 381804
Leatherhead Surrey KT22 7SA
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Date: Tue, 12 Mar 2002 06:37:14 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Tom Oliver <[log in to unmask]>
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From: Tom Oliver <[log in to unmask]>
Subject: Re: employee involvement
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Hello
I have had everyone in my group read ""Zapp! : The Lightning of Empowerment"
by Jeff Cox/W.Byham.
They were all quite surprised by what could be accomplished with getting the
employees involved. I keep a copy on my desk and refer to it often. What we
have started in our group has now started to grow and expand into other
areas of the org.
Thomas Oliver
QA
Eagle Comtronics
Original Message -----
From: "Kari Rambo" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Monday, March 11, 2002 2:07 PM
Subject: Re: [TN] employee involvement
> Suggested reading: "Zapp! : The Lightning of Empowerment" by Jeff Cox/W.
> Byham. It's a quick and easy read that hits the nail on the head
regarding
> employee involvement and commitment.
> kjr
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Date: Tue, 12 Mar 2002 07:34:23 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
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From: [log in to unmask]
Subject: Re: flax organic finish
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Keith,
I am perplexed, by "flax" do mean flat? (Quite a stretch for a typo, but
I've done it.) Do you mean gold or OSP? (Being of yellowish color.)
In either case there won't be a problem. Potentially some heart burn, but
that will be for your assembly folks. For example, with OSP, Silver, Tin
(and really all finishes) handling is very important. Fingerprints will
cause solder joint problems. Workmanship issues as such I assume are not
your problem. Gold finish seems to the topic lately. A non solderable
condition called "Black Pad" just is the things nightmares are made of. It
is a lose/lose condition. Personally I like Tin. I recommend Silver because
it is more accepted (many folks feel tin is four letter word).
In any case, I suggest you search the archives here. I strongly recommend a
coffee and a "do not disturb" sign on the door as there is a lot of info on
the subject.
Make certain you confer with the folks that fab and/or assemble your product.
But whatever you do, keep your fingers OFF the board... (man, I'll never do
that again).
Good luck and let us know what you decided,
Boston Brad
781 858 0783
Brad Saunders
Field Applications Engineer
www.coretec-inc.com
PCB Fabricator
--part1_35.235622e3.29bf4fcf_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Keith,<BR>
<BR>
I am perplexed, by "flax" do mean flat? (Quite a stretch for a typo, but I've done it.) Do you mean gold or OSP? (Being of yellowish color.) <BR>
In either case there won't be a problem. Potentially some heart burn, but that will be for your assembly folks. For example, with OSP, Silver, Tin (and really all finishes) handling is very important. Fingerprints will cause solder joint problems. Workmanship issues as such I assume are not your problem. Gold finish seems to the topic lately. A non solderable condition called "Black Pad" just is the things nightmares are made of. It is a lose/lose condition. Personally I like Tin. I recommend Silver because it is more accepted (many folks feel tin is four letter word). <BR>
In any case, I suggest you search the archives here. I strongly recommend a coffee and a "do not disturb" sign on the door as there is a lot of info on the subject. <BR>
Make certain you confer with the folks that fab and/or assemble your product. But whatever you do, keep your fingers OFF the board... (man, I'll never do that again).<BR>
<BR>
Good luck and let us know what you decided,<BR>
<BR>
Boston Brad<BR>
781 858 0783<BR>
<BR>
Brad Saunders <BR>
Field Applications Engineer<BR>
www.<B>coretec</B>-inc.com<BR>
PCB Fabricator</FONT></HTML>
--part1_35.235622e3.29bf4fcf_boundary--
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Date: Tue, 12 Mar 2002 13:51:17 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Zweigart, Siegmund" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Zweigart, Siegmund" <[log in to unmask]>
Subject: Bluemask - OCC/OSP
MIME-Version: 1.0
Content-Type: text/plain
Hello all
We are currently in the discussion of using a peelable soldermask (Bluemask)
in combination with an OCC /OSP finished blank.
Are there any incompabilities known?
Did anybody make an analises of residues (ionic contaminations) on the blank
after removing the soldermask?
Do you prefer to harden the soldermask by UV or by Heat?
Thank you for your help
Siggi
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Date: Tue, 12 Mar 2002 07:52:59 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: PreBake PCB prior to soldering
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Hello Gang...
Gulp, er... ah... hmmmm... Well, thank you for the big response, at this
time I would like to file a disclaimer for all information... kidding.
People will/may disagree with me on my next statement, but here goes:
1. There is no need to prebake a 4-6 FR4 board. (Actually, I'd be more
concerned with plastic parts verse the bare board, but that's another issue.)
2. The 80/20 rule relates to "it takes 80 percent of your time for 20% of
your product" meaning the majority of your success or product- the 80% takes
only 20% of your time. It is just a silly proverb we Procrastinators use to
justify how long it takes us to get things done. It is a good rule.
3. Don't depend on a board house doing this. Even if they say they will, no
one wants to do this. The logistics is a nightmare. IF someone packs this
board(s) (one per bag? two, two hundred?) what is the ah-chit factor to you
if you don't bake again? [ah-chit is a technical term meaning oops.] Well,
the advocates of baking will state moisture related failures. You can't risk
failure so you bake... My opinion is if you need to bake (and sometimes you
do) do it just prior to reflow.
Your room environment looks excellent, I would not bake.
Although I do enjoy a nice bread out of the oven...
Sorry for the bad humor, its been a fun day so far today,
Boston Brad
781 858 0783
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Date: Tue, 12 Mar 2002 08:48:49 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: NTC this is a question regarding employee involvement
MIME-Version: 1.0
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Brian opines:
>" When hiring anyone from a minority, I always warned
>them that I would not tolerate any
>proselytising or similar activity. I also made it clear to the others I
>would not tolerate any intolerance towards religious or racial
>minorities."
I'd be extremely uncomfortable with this approach. If I was
concerned about this, I'd issue this warning to ALL new employees.
Issuing it only to "minorities" would seem to be singling them
out. In order to be fair, I'd be admonishing the beer drinkers
not to be proselytizing for their extracurricular activities either.
YMMV
John
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Date: Tue, 12 Mar 2002 08:58:53 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bissonnette, Jean-Francois" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bissonnette, Jean-Francois" <[log in to unmask]>
Subject: Re: DO-41 footprint size
MIME-Version: 1.0
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Maybe I used the wrong terminology here. Thanks for the dimensions but =
that
I=20
had them already. What I need (and perhaps someone from the design =
council
could help here) is the pads dimension required to get proper solder =
joint.
What=20
we have from our designer at the moment is quite small and honestly it =
looks
like a via more than a pad. According to IPC-2221 the minimum annular =
ring
requirement is only 0.002" which I find pretty small if you want to get =
a
good
solder fillet. What is the standard annular ring for a 0.050" drilled =
hole?
-----Original Message-----
From: Tom Parkinson - Quality System Manager
[mailto:[log in to unmask]]
Sent: Monday, March 11, 2002 4:33 PM
To: [log in to unmask]
Subject: Re: [TN] DO-41 footprint size
DO-41 is THT. See the following:
http://www.ic.nec.co.jp/discrete/english/pkg/do41.html
"Bissonnette, Jean-Francois" wrote:
>
> Hi all,
>
> I need to find information on components footprints. Is there a =
place on
> the net
> where I could find information on DO-41 footprint? (and other parts) =
I
tried
> to
> find it on the Motorola website but came up with nothing. If =
possible I'd
> like
> to know what is Motorola suggestion for the pad size of these diodes.
>
> Jean-Fran=E7ois Bissonnette
> V=E9rificateur, Contr=F4le de la Qualit=E9
> =C9lectronique
> Produits et Proc=E9d=E9s
> Vapor Rail Inc.
> 10655 Henri-Bourassa O.
> St-Laurent, Qc
> H4S 1A1
>
> (514) 335-4200 x2021
> (514) 335-4231 fax
>
> <<Bissonnette, Jean-Francois.vcf>>
>
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally =
privileged
and confidential information intended only for the use of the =
individual or
entity named herein. If the reader of this transmission is not the =
intended
recipient, you are hereby notified that any dissemination, =
distribution, or
copying of this transmission is strictly prohibited.
>
>
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Date: Tue, 12 Mar 2002 09:10:49 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Kasprzak, Bill (sys) USX" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Kasprzak, Bill (sys) USX" <[log in to unmask]>
Subject: Re: employee involvement
X-To: Tom Oliver <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Tom,
Judging from the theme of your response, I take it that your group/company
has gone to self-directed work teams? If you haven't, is there a push
towards that end? The intent of my response is that I'm looking for other
companies performing electronic assembly who are using the empowered work
team concept. I'm looking to be able to share information on things that
have worked well, worked poorly and everything in between. We have been in
the teaming process for about a year now. Each team is required to do a
quarterly report to show progress on various metrics concerning cycle time,
costs (time) and quality. The teams also have a weekly structured meeting to
organize themselves to make improvements.
As a facilitator for the teaming concept, I was required to read the Zapp!
text as well. Zapp! the video was kinda silly but does demonstrate the text
concepts. May I also recommend "Who Moved My Cheese" by Spencer Johnson and
"Breakthrough Teamwork" by Dennis Romig as complimentary texts that work
well with the Zapp! text.
Bill Kasprzak
Moog Inc. Manufacturing Engineering, Electronics
> -----Original Message-----
> From: Tom Oliver [SMTP:[log in to unmask]]
> Sent: Tuesday, March 12, 2002 6:37 AM
> To: [log in to unmask]
> Subject: Re: [TN] employee involvement
>
> Hello
> I have had everyone in my group read ""Zapp! : The Lightning of
> Empowerment"
> by Jeff Cox/W.Byham.
> They were all quite surprised by what could be accomplished with getting
> the
> employees involved. I keep a copy on my desk and refer to it often. What
> we
> have started in our group has now started to grow and expand into other
> areas of the org.
>
> Thomas Oliver
> QA
> Eagle Comtronics
>
>
>
> Original Message -----
> From: "Kari Rambo" <[log in to unmask]>
> To: <[log in to unmask]>
> Sent: Monday, March 11, 2002 2:07 PM
> Subject: Re: [TN] employee involvement
>
>
> > Suggested reading: "Zapp! : The Lightning of Empowerment" by Jeff
> Cox/W.
> > Byham. It's a quick and easy read that hits the nail on the head
> regarding
> > employee involvement and commitment.
> > kjr
>
> --------------------------------------------------------------------------
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Date: Tue, 12 Mar 2002 09:34:21 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Carroll, George" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Carroll, George" <[log in to unmask]>
Subject: Re: Skreen Kleen
X-To: Mark Charlton <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Austin American Technology's address is
12201 Technology Blvd.
Austin, Texas 78727
Tel. 512/335-6400
FAX 512/335-5753
EMC
South El Monte, CA
818/575-1644
Hope this helps,
George Carroll
Process Engineer
Siemens Energy and Automation
Johnson City, TN
[log in to unmask]
-----Original Message-----
From: Mark Charlton [mailto:[log in to unmask]]
Sent: Monday, March 11, 2002 6:10 PM
To: [log in to unmask]
Subject: [TN] Skreen Kleen
Can any of the Technetters help me find some info on a piece of equipment
that one of my colleagues picked-up at a recent auction? Of course no
documentation was included.
The equipment in question is a stencil cleaner. It has a tag referencing
the Austin American Technology company and E.M.C. Domestic as a model SK700
SKREEN KLEEN unit. I have searched the WWW for info about the unit but have
been unsuccessful so far so I thought I'd utilize my best resource, TechNet!
Any assistance would be greatly appreciated.
Mark Charlton
Engineering Manager
MSI of Central Florida, Inc.
7703 Technology Drive Ste. 102
Melbourne, FL 32904
(321) 725-0626 x.24
(321) 725-0627 fax
[log in to unmask]
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Date: Tue, 12 Mar 2002 11:05:50 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Nancy Trumbull <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Nancy Trumbull <[log in to unmask]>
Subject: Antw: Re: [TN] Thermal Shock
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First I want to say thanks for all the help everyone has offered.
I have to admit that I don't know that I understand all of it but things =
have greatly improved.
Sorry this make be a dump dump question.
But right now I can not understand your statement.
"Because of this reason any measurement of a Youngs modulus with a tensile =
testing machine is fruitless since any stress strain diagram found depends =
on how fast the crosshead moves.
Reason
I don't know what a Youngs modulus is or the term crosshead . I think =
crosshead is the point of change. But I need to be sure.
Sorry if this is dump.=20
I tried looking them up, =20
I hope everyone will continue with the subject.
So everyone will know.
I have found out that the original parts places in the chamber for thermal =
shock testing were various degrees of defects. So the evaluation was not =
valid. The previous testing done with good parts have all passed. I =
think some one just make a mistake.=20
Oh and Warren if you read this=20
What is HASS.
With temp change >30C/min with vibration.
Thanks again everyone I've got to go for now my head hurts from all this =
information.
And it's time for my meeting.
Nancy T.
>>> [log in to unmask] 03/12/02 04:42AM >>>
Jim
The question about shock testing of solder joints is somewhat complex and =
can not be reduced to a single temperature change rate. I'll try to =
explain our point of view as short as possible:
1) Deformation. The main deformation mechanism occurring in solder joint =
is creep. This means if a constant load is applied the material deforms =
continuously. There is no direct connection between load and deformation =
as in elastic or instantaneous plastic deformation. How much a material =
deforms is time dependent. Because of this reason any measurement of a =
Youngs modulus with a tensile testing machine is fruitless since any =
stress strain diagram found depends on how fast the crosshead moves. This =
means the Youngs modulus is not a material dependent constant but a =
testing dependent measure.
2) Degradation. Tin- based solder deforms in creep with two deformation =
regimes:
a) Grain Boundary Sliding. In GBS the crystals of a material move above =
each other along the grain boundaries. However, since the grain boundaries =
are not straight planes the grains move on complex three dimensional =
traces that also involve rotation. It is clear, that in cyclic deformation =
the grains will on their way back not sit in the place they where before =
the cycle started. Due to the uneven surface of the grain boundaries small =
openings occur in the material. Most of there openings are filled up by =
diffusion from the places where compression occurs to the places where =
tensile stress is present. It is important in this context that diffusion =
is time and temperature dependent. The faster the deformation and the =
lower the temperature the more openings remain only partially filled.
b) Dislocation Climb. If the stress is high enough it is possible to =
overcome the forces that hold the atoms in the crystal lattice and the =
grain itself deforms. This deformation is only possible if there are =
failures in the lattice called dislocations. If DC is activated not only =
the present dislocations move through the crystal causing one crystal =
layer to move above each other but also new dislocations are produced. If =
a dislocation reaches the grain boundary also a small opening is formed =
that might be filled by diffusion if there is enough time and temperature.
This means that each deformation regime has its own degradation behaviour.
Looking at point 2, one could say that fast cycling is more destructive =
than slow cycling. And looking at the degradation mechanisms this is =
true.=20
However, point 1 plays an important role in accelerated testing. If you =
run a test with steep temperature ramps you build up stress since the PCB =
and the component deform elastically. This stress has to be transformed =
into plastic deformation since slow cycle fatigue is strain driven. At =
high temperature this is no problem. Solder creeps so fast that above 40 =
deg.C it is virtually impossible to apply a temperature gradient that =
builds up any stress. The problem occurs at low temperature. Below -20 =
deg.C solder creeps very slow. If you apply a slow temperature change a =
lot of strain is already induced in the ramp during the time where your =
specimen is above -20 deg.C. If you apply a steep ramp you have to wait =
for hours until a considerable portion of the possible strain is =
induced.=20
As you see it is a complex game between deformation and degradation. =
However, since the amount of cyclic plastic strain a solder joint sees in =
a thermal cycle is so crucial slow cycling is more damaging since more =
strain is induced into a solder joint than in a fast cycle. On the other =
side it is quite questionable whether it makes sense to activate a =
degradation mechanism that does not occur in reality just to have a faster =
test.=20
Hmmm, I hope I made myself clear enough.
Best regards
Guenter
.
EMPA
Swiss Federal Institute for Materials Testing and Research
Centre for Reliability
Dipl. Eng. Guenter Grossmann
8600 Duebendorf
Switzerland
Phone: xx41 1 823 4279
Fax : xx41 1823 4054
mail: [log in to unmask]
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Date: Tue, 12 Mar 2002 11:12:11 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Tempea, Ioan" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Tempea, Ioan" <[log in to unmask]>
Subject: Re: employee involvement
X-To: "Kasprzak, Bill (sys) USX" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
There it is, the management forum.
Lately, there are a lot of managing issues that are discussed inside Technet
and I see a lot of NTCs in the titles. So, once again, and with Jack's
blessing, who's for a separate Management Forum?
Best regards,
Ioan
> -----Original Message-----
> From: Kasprzak, Bill (sys) USX [SMTP:[log in to unmask]]
> Sent: Tuesday, March 12, 2002 9:11 AM
> To: [log in to unmask]
> Subject: Re: [TN] employee involvement
>
> Tom,
>
> Judging from the theme of your response, I take it that your group/company
> has gone to self-directed work teams? If you haven't, is there a push
> towards that end? The intent of my response is that I'm looking for other
> companies performing electronic assembly who are using the empowered work
> team concept. I'm looking to be able to share information on things that
> have worked well, worked poorly and everything in between. We have been in
> the teaming process for about a year now. Each team is required to do a
> quarterly report to show progress on various metrics concerning cycle
> time,
> costs (time) and quality. The teams also have a weekly structured meeting
> to
> organize themselves to make improvements.
>
> As a facilitator for the teaming concept, I was required to read the Zapp!
> text as well. Zapp! the video was kinda silly but does demonstrate the
> text
> concepts. May I also recommend "Who Moved My Cheese" by Spencer Johnson
> and
> "Breakthrough Teamwork" by Dennis Romig as complimentary texts that work
> well with the Zapp! text.
>
> Bill Kasprzak
> Moog Inc. Manufacturing Engineering, Electronics
>
>
> > -----Original Message-----
> > From: Tom Oliver [SMTP:[log in to unmask]]
> > Sent: Tuesday, March 12, 2002 6:37 AM
> > To: [log in to unmask]
> > Subject: Re: [TN] employee involvement
> >
> > Hello
> > I have had everyone in my group read ""Zapp! : The Lightning of
> > Empowerment"
> > by Jeff Cox/W.Byham.
> > They were all quite surprised by what could be accomplished with getting
> > the
> > employees involved. I keep a copy on my desk and refer to it often. What
> > we
> > have started in our group has now started to grow and expand into other
> > areas of the org.
> >
> > Thomas Oliver
> > QA
> > Eagle Comtronics
> >
> >
> >
> > Original Message -----
> > From: "Kari Rambo" <[log in to unmask]>
> > To: <[log in to unmask]>
> > Sent: Monday, March 11, 2002 2:07 PM
> > Subject: Re: [TN] employee involvement
> >
> >
> > > Suggested reading: "Zapp! : The Lightning of Empowerment" by Jeff
> > Cox/W.
> > > Byham. It's a quick and easy read that hits the nail on the head
> > regarding
> > > employee involvement and commitment.
> > > kjr
> >
> >
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> >
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Date: Tue, 12 Mar 2002 10:17:45 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: employee involvement
X-To: [log in to unmask]
Who isn't interested? With respect to Brian, start one. Isn't there already
a management council or some such thing?
Earl
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Date: Tue, 12 Mar 2002 11:48:22 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Roger Stoops <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Roger Stoops <[log in to unmask]>
Subject: Re: DO-41 footprint size
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Don't know if there is a "standard," but IPC-2221 has established some
minimums.
Section 9.1.1 states, "All lands and annular rings shall be =
**maximized**
wherever feasible, consistent with good design practice and electrical
clearance requirements." (Asterisks are mine) The recommended =
minimums
from IPC-2221 for a 0.050" diameter hole, assuming +/-0.003 tolerance, =
is:
Level A: 0.073" [1.85mm]
Level B: 0.067" [1.70mm]
Level C: 0.065" [1.65mm]
(External supported)
Personally, for a leaded part, I typically call for a pad diameter of
0.020"-0.030" over nominal hole diameter, minimum. Might want to check
J-STD-001C, Section 9.2.4, with Figure 9-1 to see if you are getting a =
good
fillet.
Roger M. Stoops, CID [log in to unmask]
-----Original Message-----
From: Bissonnette, Jean-Francois [mailto:[log in to unmask]]=20
Sent: Tuesday, March 12, 2002 8:59 AM
To: [log in to unmask]
Subject: Re: [TN] DO-41 footprint size
Maybe I used the wrong terminology here. Thanks for the dimensions but =
that
I=20
had them already. What I need (and perhaps someone from the design =
council
could help here) is the pads dimension required to get proper solder =
joint.
What=20
we have from our designer at the moment is quite small and honestly it =
looks
like a via more than a pad. According to IPC-2221 the minimum annular =
ring
requirement is only 0.002" which I find pretty small if you want to get =
a
good
solder fillet. What is the standard annular ring for a 0.050" drilled =
hole?
-----Original Message-----
From: Tom Parkinson - Quality System Manager
[mailto:[log in to unmask]]
Sent: Monday, March 11, 2002 4:33 PM
To: [log in to unmask]
Subject: Re: [TN] DO-41 footprint size
DO-41 is THT. See the following:
http://www.ic.nec.co.jp/discrete/english/pkg/do41.html
"Bissonnette, Jean-Francois" wrote:
>
> Hi all,
>
> I need to find information on components footprints. Is there a =
place on
> the net
> where I could find information on DO-41 footprint? (and other parts) =
I
tried
> to
> find it on the Motorola website but came up with nothing. If =
possible I'd
> like
> to know what is Motorola suggestion for the pad size of these diodes.
>
> Jean-Fran=E7ois Bissonnette
> V=E9rificateur, Contr=F4le de la Qualit=E9
> =C9lectronique
> Produits et Proc=E9d=E9s
> Vapor Rail Inc.
> 10655 Henri-Bourassa O.
> St-Laurent, Qc
> H4S 1A1
>
> (514) 335-4200 x2021
> (514) 335-4231 fax
>
> <<Bissonnette, Jean-Francois.vcf>>
>
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally =
privileged
and confidential information intended only for the use of the =
individual or
entity named herein. If the reader of this transmission is not the =
intended
recipient, you are hereby notified that any dissemination, =
distribution, or
copying of this transmission is strictly prohibited.
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Date: Tue, 12 Mar 2002 10:51:22 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: PCB DESIGNER - DESIGN ENGINEER - PROTEL
Have a friend needing a ProTel designer and/or design engineer. Anyone out
there or on the designernet?
MoonMan
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Date: Tue, 12 Mar 2002 11:19:58 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: DUMB ASS ME AND MORE DUMB ASS CSP'S WITH FALLING BALLS
Folks,
As always, you have been incredibly responsive to my needs and so many
others. Can I tax your abilities, knowledge, and experince once again or
should I take this job and shove it?
I'll ask Steve, once and more than once again, to post a couple of missing
ball photos. They look exactly, to me, like the previous CSP images with the
same device solder ball termination area, as before.
What the hell is going on here?
Really need new supplier or parts that work even if thrown over the fence.
DumbAssMoonMan
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Date: Tue, 12 Mar 2002 12:33:30 -0800
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: black pad
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: multipart/related; type="multipart/alternative";
boundary="----=_NextPart_000_005A_01C1C9C2.1E596CE0"
This is a multi-part message in MIME format.
------=_NextPart_000_005A_01C1C9C2.1E596CE0
Content-Type: multipart/alternative;
boundary="----=_NextPart_001_005B_01C1C9C2.1E596CE0"
------=_NextPart_001_005B_01C1C9C2.1E596CE0
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Steve,
Could you do us all a favor again. This dumb ass TI stuff is getting way =
beyon frustrating. The following are provided for all the experts as I'm =
certainly being reduced way below that level:
Thanks,
Earl
------=_NextPart_001_005B_01C1C9C2.1E596CE0
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4913.1100" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Steve,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Could you do us all a favor again. This =
dumb ass TI=20
stuff is getting way beyon frustrating. The following are provided for =
all the=20
experts as I'm certainly being reduced way below that =
level:</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><IMG alt=3D"" hspace=3D0 =
src=3D"cid:005701c1ca05$2c6442e0$8f00000a@moonlap1"=20
align=3Dbaseline border=3D0></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><IMG alt=3D"" hspace=3D0 =
src=3D"cid:005801c1ca05$2c6442e0$8f00000a@moonlap1"=20
align=3Dbaseline border=3D0></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><IMG alt=3D"" hspace=3D0 =
src=3D"cid:005901c1ca05$2c6442e0$8f00000a@moonlap1"=20
align=3Dbaseline border=3D0></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Thanks,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Earl</FONT></DIV>
<DIV><FONT face=3Darial,helvetica><FONT size=3D2></FONT><FONT lang=3D0 =
face=3DArial=20
color=3D#000000 size=3D3 =
FAMILY=3D"SANSSERIF"> </DIV><BR></FONT><FONT lang=3D0=20
face=3DArial color=3D#000000 size=3D2=20
FAMILY=3D"SANSSERIF"><BR></FONT></FONT></BODY></HTML>
------=_NextPart_001_005B_01C1C9C2.1E596CE0--
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Date: Tue, 12 Mar 2002 11:52:21 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: black pad
please disregard previous transmission
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Date: Tue, 12 Mar 2002 11:55:43 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: employee involvement
Mime-Version: 1.0
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This is a MIME message. If you are reading this text, you may want to
consider changing to a mail reader or gateway that understands how to
properly handle MIME multipart messages.
--=_B3EE0C28.8BEA8777
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sign me up
Kathy=20
--=_B3EE0C28.8BEA8777
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<DIV>sign me up</DIV>
<DIV> </DIV>
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Date: Tue, 12 Mar 2002 13:00:13 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McGlaughlin, Jeffrey A" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McGlaughlin, Jeffrey A" <[log in to unmask]>
Subject: 600F
MIME-version: 1.0
Content-type: text/plain; charset="iso-8859-1"
I am looking for some quick help my 600 has gone missing and I need the
reference text for sections 2.8.1 and 2.8.3 on silkscreen legend. Can any
good Samaritan lend a hand until I can get my hands on another copy?
TIA
Jeffrey A. McGlaughlin CID
Sr. Designer
Battelle Memorial Institute
Columbus Ohio
[log in to unmask]
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Date: Tue, 12 Mar 2002 10:05:35 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Brooks,Bill" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Brooks,Bill" <[log in to unmask]>
Subject: Re: PCB DESIGNER - DESIGN ENGINEER - PROTEL
X-To: Earl Moon <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
There is a Protel user group list server and also PC Design Magazine has
one. I follow both of them.
- Bill Brooks
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Tuesday, March 12, 2002 8:51 AM
To: [log in to unmask]
Subject: [TN] PCB DESIGNER - DESIGN ENGINEER - PROTEL
Have a friend needing a ProTel designer and/or design engineer. Anyone out
there or on the designernet?
MoonMan
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Date: Tue, 12 Mar 2002 13:07:58 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Thermal Shock
X-To: [log in to unmask]
MIME-Version: 1.0
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Hi Warren,
You are the victim of the sloppy language/terminology use that has recently
become really bad.
You are asking which is the "best" test for relilability screening of PWAs
with uBGA product:
>1) HASS type test with temp change >30C/min with vibration (20-30 GRMs) for a
>period of 2-4 hours (great for mechanical stressing)
>2) ESS slow temp change 5C/min but a longer test time of 72-100 hours this
>might allow chemical reactions to happen.
A: HASS is NOT a procedure suitable for screening purposes of product; it has
some value for testing the 'robustness' of design prototypes but has no place
in product testing.
ESS, by its very name 'Environmental Stress Screening' indicates its use;
there is no reason why ESS should be at slow temp change of 5C/min--in fact
many ESS procedures include T-shock above 30C/min.
There is no such thing as a generic ESS--the design of an ESS procedure
depends on its purpose
Werner Engelmaier
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Date: Tue, 12 Mar 2002 13:07:59 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Thermal Shock
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Hi Glenn,
I do not what you read or how you interpreted it, but just rate of T-change
does not have any such effect.
If you have a slow rate of T-change you simply might wind up with a longer
effective dwell time for more creep.
Werner Engelmaier
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Date: Tue, 12 Mar 2002 13:54:48 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
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Subject: Re: Antw: Re: [TN] Thermal Shock
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Hi Nancy,
Youngs Modulus is another name for Modulus of Elasticity [E], named so after
the first discoverer of the elastic behavior graphed in a stress-strain
diagram.
For non-creeping metals E is a unique constant; however, because the
creep-behavior of solder at the Ts we are using it it does not have a unique
stress-strain diagram or a constant E--they are T- and strain-rate-dependent
and you therefore have an infinite number of such diagrams/Es.
A crosshead is the moving [upper] clamp of a tensile test machine and its
rate of travel applying strain to the test specimen is referred to as
crosshead speed--it determines the strain rate.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 386-437-8747, Fax: 386-437-8737
E-mail: [log in to unmask], Website: www.engelmaier.com
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Date: Tue, 12 Mar 2002 13:06:21 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ted Tontis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ted Tontis <[log in to unmask]>
Subject: Re: PCB DESIGNER - DESIGN ENGINEER - PROTEL
X-To: Earl Moon <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
yes, you can contact me a [log in to unmask]
regards,
Ted
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Tuesday, March 12, 2002 10:51 AM
To: [log in to unmask]
Subject: [TN] PCB DESIGNER - DESIGN ENGINEER - PROTEL
Have a friend needing a ProTel designer and/or design engineer. Anyone out
there or on the designernet?
MoonMan
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Date: Tue, 12 Mar 2002 14:24:12 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Earls pics are up, and a question...
MIME-Version: 1.0
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Hey all!
The pictures of Earls missing balls are up! Go to:
http://www.stevezeva.homestead.com
...and I have a question that's off topic here. What is a good fluid to use
in your printer stencil cleaner? We have a DEK 288 and we use no clean paste.
Thanks!
-Steve Gregory-
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Content-Type: text/html; charset="US-ASCII"
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hey all!
<BR>
<BR>The pictures of Earls missing balls are up! Go to:
<BR>
<BR>http://www.stevezeva.homestead.com
<BR>
<BR>...and I have a question that's off topic here. What is a good fluid to use in your printer stencil cleaner? We have a DEK 288 and we use no clean paste.
<BR>
<BR>Thanks!
<BR>
<BR>-Steve Gregory-</FONT></HTML>
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Date: Tue, 12 Mar 2002 14:45:10 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Nancy Trumbull <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Nancy Trumbull <[log in to unmask]>
Subject: Re: Thermal Shock
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Werner,
This is Nancy. Part of my dumb ( dump) question I ask Warren in a note =
to Guenter was what is HASS.=20
Oh and thanks for ESS.
Nancy T.
>>> [log in to unmask] 03/12/02 01:07PM >>>
Hi Warren,
You are the victim of the sloppy language/terminology use that has =
recently
become really bad.
You are asking which is the "best" test for relilability screening of PWAs
with uBGA product:
>1) HASS type test with temp change >30C/min with vibration (20-30 GRMs) =
for a
>period of 2-4 hours (great for mechanical stressing)
>2) ESS slow temp change 5C/min but a longer test time of 72-100 hours =
this
>might allow chemical reactions to happen.
A: HASS is NOT a procedure suitable for screening purposes of product; it =
has
some value for testing the 'robustness' of design prototypes but has no =
place
in product testing.
ESS, by its very name 'Environmental Stress Screening' indicates its use;
there is no reason why ESS should be at slow temp change of 5C/min--in =
fact
many ESS procedures include T-shock above 30C/min.
There is no such thing as a generic ESS--the design of an ESS procedure
depends on its purpose
Werner Engelmaier
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Date: Tue, 12 Mar 2002 16:40:03 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
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This is a multi-part message in MIME format.
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We use Hydrex A Plus and like it.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of [log in to unmask]
Sent: Tuesday, March 12, 2002 2:24 PM
To: [log in to unmask]
Subject: [TN] Earls pics are up, and a question...
Hey all!
The pictures of Earls missing balls are up! Go to:
http://www.stevezeva.homestead.com
...and I have a question that's off topic here. What is a good fluid to
use in your printer stencil cleaner? We have a DEK 288 and we use no clean
paste.
Thanks!
-Steve Gregory-
------=_NextPart_000_0050_01C1C9E4.8F4AE060
Content-Type: text/html;
charset="iso-8859-1"
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META content=3D"text/html; charset=3Dwindows-1252" =
http-equiv=3DContent-Type>
<META content=3D"MSHTML 5.00.3105.105" name=3DGENERATOR></HEAD>
<BODY>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN =
class=3D700103921-12032002>We use=20
Hydrex A Plus and like it. </SPAN></FONT></DIV>
<BLOCKQUOTE=20
style=3D"BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; PADDING-LEFT: =
5px">
<DIV class=3DOutlookMessageHeader><FONT face=3D"Times New Roman"=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of</B> =
[log in to unmask]<BR><B>Sent:</B>=20
Tuesday, March 12, 2002 2:24 PM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> [TN] Earls pics are up, and a=20
question...<BR><BR></DIV></FONT><FONT face=3Darial,helvetica><FONT =
size=3D2>Hey=20
all! <BR><BR>The pictures of Earls missing balls are up! Go to:=20
<BR><BR>http://www.stevezeva.homestead.com <BR><BR>...and I have a =
question=20
that's off topic here. What is a good fluid to use in your printer =
stencil=20
cleaner? We have a DEK 288 and we use no clean paste. <BR><BR>Thanks!=20
<BR><BR>-Steve Gregory-</FONT> </FONT></BLOCKQUOTE></BODY></HTML>
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Date: Tue, 12 Mar 2002 18:35:04 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: question...
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Thanks Guy, but I meant fluid to use with the underside stencil cleaning with
the onboard system on our printer. We have been using alcohol but it just
doesn't do the job with no clean solder paste...
Thanks again!
-Steve Gregory-
> We use Hydrex A Plus and like it.
>
> >> -----Original Message-----
>> From: TechNet [mailto:[log in to unmask]]On Behalf Of [log in to unmask]
>> Sent: Tuesday, March 12, 2002 2:24 PM
>> To: [log in to unmask]
>> Subject: [TN] Earls pics are up, and a question...
>>
>>
>> Hey all!
>>
>> The pictures of Earls missing balls are up! Go to:
>>
>> http://www.stevezeva.homestead.com
>>
>> ...and I have a question that's off topic here. What is a good fluid to
>> use in your printer stencil cleaner? We have a DEK 288 and we use no clean
>> paste.
>>
>> Thanks!
>>
>> -Steve Gregory-
>
--part1_8c.1542c617.29bfeaa8_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">Thanks Guy, but I meant fluid to use with the underside stencil cleaning with the onboard system on our printer. We have been using alcohol but it just doesn't do the job with no clean solder paste...<BR>
<BR>
Thanks again!<BR>
<BR>
-Steve Gregory-<BR>
<BR>
<BR>
</FONT><FONT COLOR="#0000ff" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">We use Hydrex A Plus and like it. </FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SERIF" FACE="Times New Roman" LANG="0"><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">-----Original Message-----<BR>
<B>From:</B> TechNet [mailto:[log in to unmask]]<B>On Behalf Of</B> [log in to unmask]<BR>
<B>Sent:</B> Tuesday, March 12, 2002 2:24 PM<BR>
<B>To:</B> [log in to unmask]<BR>
<B>Subject:</B> [TN] Earls pics are up, and a question...<BR>
<BR>
<BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="arial" LANG="0">Hey all! <BR>
<BR>
The pictures of Earls missing balls are up! Go to: <BR>
<BR>
http://www.stevezeva.homestead.com <BR>
<BR>
...and I have a question that's off topic here. What is a good fluid to use in your printer stencil cleaner? We have a DEK 288 and we use no clean paste. <BR>
<BR>
Thanks! <BR>
<BR>
-Steve Gregory-</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="arial" LANG="0"> </BLOCKQUOTE><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE><BR>
<BR>
</FONT></HTML>
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Date: Tue, 12 Mar 2002 19:41:16 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Earls pics are up, and a question...
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Earl,
I would like to confirm the ball is indeed missing (did you check the
shipping container). And I suppose your answer to Steve's fluid question
will have to do with a mixologist and happy hour.
The condition is amazing especially that there is no sign that it was ever
there. If this is on more than this one part it is not a "freak" happening.
Do you feel it is seemingly another case of ENIG induced problem?
...and, sorry Steve can't help on the fluid.
BB
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Date: Wed, 13 Mar 2002 11:48:09 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: DO-41 footprint size
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=iso-8859-1
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Hi, Jean-Francois,
I think you meant "Land Pattern" for your question. If so, and you can'=
t
get recommendations from either the manufacturer or from IPC-SM-782, yo=
u
are faced with calculating it for yourself. IPC-SM-782 contains a formu=
la
for working it out, or you can download various calculators from the we=
b,
including IPC's at http://search.ipc.org/sm782/default.asp.
Minimum annular ring depends partly on requirements. MIL spec requires =
4
mils wile IPC requires 3 mils for class 3 boards. Its purpose, of cours=
e,
is to provide some anchorage for plating into holes, so you will have t=
o
decide how much strength and support you need from a pad versus spec
requirements versus space available. Annular ring is related to drillin=
g of
the holes, not so much for soldering components on to. Sorry, I'm no ex=
pert
in through-hole component pad design, but since your lead diameter is 0=
.8
mm (32 mils), I estimate you would be looking for a pad diameter of aro=
und
50 mils (1.25 mm).
It's not usual, in my limited experience in these things, to ask what i=
s
the minimum annular ring for a particular size of hole. What I calculat=
e is
the pad size required for a given finished (plated, if plated) hole
diameter. To the hole diameter, add twice the hole plating thickness, t=
hen
add the manufacturing tolerences that your fab house works to, then add=
twice the annular ring requirement as determined from MIL/IPC specs,
customer requirements, design requirements or whatever applies.
Manufacturing tolerences include things like photo tooling tolerence,
tooling registration tolerence, lamination registration tolerence, mate=
rial
shrinkage tolerence, drill bit diameter tolerence, drill positional
tolerence, etch tolerence and so on, and are usually consolidated into =
a
single root mean square value. Our fab houses like to have pad diameter=
=3D
finished hole diameter + 22 mils to guarantee our 4 mils annular ring
requirement, if that's any help.
Best of luck
Peter
=
=20
"Bissonnette, =
=20
Jean-Francois" To: [log in to unmask] =
=20
<JBissonnette@W cc: (bcc: DUNCAN Peter/A=
sst Prin Engr/ST =20
ABTEC.COM> Aero/ST Group) =
=20
Sent by: Subject: Re: [TN] DO-41 =
footprint size =20
TechNet =
=20
<[log in to unmask] =
=20
G> =
=20
=
=20
=
=20
03/12/02 09:58 =
=20
PM =
=20
Please respond =
=20
to "TechNet =
=20
E-Mail Forum."; =
=20
Please respond =
=20
to =
=20
"Bissonnette, =
=20
Jean-Francois" =
=20
=
=20
=
=20
Maybe I used the wrong terminology here. Thanks for the dimensions but=
that
I
had them already. What I need (and perhaps someone from the design cou=
ncil
could help here) is the pads dimension required to get proper solder jo=
int.
What
we have from our designer at the moment is quite small and honestly it
looks
like a via more than a pad. According to IPC-2221 the minimum annular =
ring
requirement is only 0.002" which I find pretty small if you want to get=
a
good
solder fillet. What is the standard annular ring for a 0.050" drilled
hole?
-----Original Message-----
From: Tom Parkinson - Quality System Manager
[mailto:[log in to unmask]]
Sent: Monday, March 11, 2002 4:33 PM
To: [log in to unmask]
Subject: Re: [TN] DO-41 footprint size
DO-41 is THT. See the following:
http://www.ic.nec.co.jp/discrete/english/pkg/do41.html
"Bissonnette, Jean-Francois" wrote:
>
> Hi all,
>
> I need to find information on components footprints. Is there a plac=
e on
> the net
> where I could find information on DO-41 footprint? (and other parts) =
I
tried
> to
> find it on the Motorola website but came up with nothing. If possibl=
e
I'd
> like
> to know what is Motorola suggestion for the pad size of these diodes.=
>
> Jean-Fran=E7ois Bissonnette
> V=E9rificateur, Contr=F4le de la Qualit=E9
> =C9lectronique
> Produits et Proc=E9d=E9s
> Vapor Rail Inc.
> 10655 Henri-Bourassa O.
> St-Laurent, Qc
> H4S 1A1
>
> (514) 335-4200 x2021
> (514) 335-4231 fax
>
> <<Bissonnette, Jean-Francois.vcf>>
>
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally privileg=
ed
and confidential information intended only for the use of the individua=
l or
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Date: Wed, 13 Mar 2002 11:51:18 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: NTC this is a question regarding employee involvement
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Now why would a Brewer (John) think of proselytising beer, I wonder .... ?
Sorry, John, don't you just hate it when people manke fun of other people's
names?
Peter
brewerj@SQUAR
ED.COM To: [log in to unmask]
Sent by: cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
TechNet Aero/ST Group)
<[log in to unmask] Subject: Re: [TN] NTC this is a question
ORG> regarding employee involvement
03/12/02
09:48 PM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
brewerj
Brian opines:
>" When hiring anyone from a minority, I always warned
>them that I would not tolerate any
>proselytising or similar activity. I also made it clear to the others I
>would not tolerate any intolerance towards religious or racial
>minorities."
I'd be extremely uncomfortable with this approach. If I was
concerned about this, I'd issue this warning to ALL new employees.
Issuing it only to "minorities" would seem to be singling them
out. In order to be fair, I'd be admonishing the beer drinkers
not to be proselytizing for their extracurricular activities either.
YMMV
John
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Date: Wed, 13 Mar 2002 12:11:44 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
MIME-Version: 1.0
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Hi, Earl,
Funny, your 10X pic looks like it's supposed to be like that - a missing
corner ball to denote orientation or avoid the stress build up that so
often fractures corner ball s-j's. On the other hand, your other two pics
look like a good IMC layer showing only tiny areas of alloying where solder
adhesion has taken place between the ball and the pad material.
Lousy supplier? Too many thermal excursions? Poor substrate plating? Only
suggestions, sorry. No learned or scientific disputation from me on these
things. I do generally wonder, though, how many times that interface type
is brought to reflow or near-reflow temps during component fab and when
it's mounted onto a board. It must suffer a bit.
Peter
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Date: Wed, 13 Mar 2002 08:47:07 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Tegehall Per-Erik <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Tegehall Per-Erik <[log in to unmask]>
Subject: Re: Thermal Shock
MIME-Version: 1.0
Content-Type: text/plain; charset="ISO-8859-1"
Content-Transfer-Encoding: quoted-printable
Nancy,
I disagree with Werner's statement about HASS. HASS is the acronym for
Highly Accelerated Stress Screening and is best described as a very
accelerated ESS test and thus its place is in product testing. HASS is
always preceded by a HALT test. HALT is the acronym for Highly =
Accelerated
Life Testing, which unfortunately is a misleading name since it is not =
at
all a life test. A better name is Accelerated Stress Test. HALT is a =
test
for testing the 'robustness' of design prototypes. If you want to learn =
more
about HALT and HASS, I can recommend the paper written by Neill =
Doertenbach
that you can find on the following webpage
http://www.qualmark.com/content/OurLibrary_TechnicalPapers.html
Per-Erik Tegehall
IVF
Sweden
-----Ursprungligt meddelande-----
Fr=E5n: Nancy Trumbull [mailto:[log in to unmask]]
Skickat: den 12 mars 2002 20:45
Till: [log in to unmask]
=C4mne: Re: [TN] Thermal Shock
Werner,
This is Nancy. Part of my dumb ( dump) question I ask Warren in a =
note to
Guenter was what is HASS.=20
Oh and thanks for ESS.
Nancy T.
>>> [log in to unmask] 03/12/02 01:07PM >>>
Hi Warren,
You are the victim of the sloppy language/terminology use that has =
recently
become really bad.
You are asking which is the "best" test for relilability screening of =
PWAs
with uBGA product:
>1) HASS type test with temp change >30C/min with vibration (20-30 =
GRMs) for
a
>period of 2-4 hours (great for mechanical stressing)
>2) ESS slow temp change 5C/min but a longer test time of 72-100 hours =
this
>might allow chemical reactions to happen.
A: HASS is NOT a procedure suitable for screening purposes of product; =
it
has
some value for testing the 'robustness' of design prototypes but has no
place
in product testing.
ESS, by its very name 'Environmental Stress Screening' indicates its =
use;
there is no reason why ESS should be at slow temp change of =
5C/min--in
fact
many ESS procedures include T-shock above 30C/min.
There is no such thing as a generic ESS--the design of an ESS procedure
depends on its purpose
Werner Engelmaier
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Date: Wed, 13 Mar 2002 05:45:38 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
Peter,
You've hit the nail on the head again. How many more hits
can my MoonCoffinManNail stand?
This part looks exactly like the TI parts I placed earlier and hope the
problem has gone away. Will know that Friday. This is another supplier
altogether and the missing ball site exhibits some "silvery" areas or points
where the ball was attached. The resto of the pad seems un/non/dewettable.
Makes me wonder if this supplier and TI are using the same BGA substrate and
ball attach supplier.
B2B, also please take notice. All the other photos, Steve can get rid of
anytime now, exhibit the same condition as I described but the TI parts
simply fell off the balls that had wetted to the assembly PCB.
I'm not bothering anyone else again on this forum about this crazy
situation. As our dear departed Waylon sang: I've always been crazy but it's
kept me from goin' insane. I've always lived by that and always will.
MoonCrazyMan
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Date: Wed, 13 Mar 2002 05:51:46 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: question...
X-To: [log in to unmask]
Steve,
I know what you mean about no clean and the bottom side stencil aperture
cleaner on the 286 and 288 and how they used to work well with alcohol and
rma solder paste flux types.
I tried DI and plain water as a substitue with no clean some time back. With
the bottom side vacuum running, it kinda worked but must have been time
dependent. Never ran an experiment but haven't done process engineering type
stuff on stencil printers in a while either. I do miss that. Beyond that,
most folks I know just gave up on the cleaning system.
Earl
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Date: Wed, 13 Mar 2002 07:04:36 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: question...
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_0003_01C1CA5D.564BC4E0"
This is a multi-part message in MIME format.
------=_NextPart_000_0003_01C1CA5D.564BC4E0
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Try Bioact SC 10. I liked it better than IPA. It dries a little slower and
has a different odor. But I think it works better for underwipe. It also
works great when cleaning up flux on PWAs after BGA removal.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of [log in to unmask]
Sent: Tuesday, March 12, 2002 6:35 PM
To: [log in to unmask]
Subject: Re: [TN] question...
Thanks Guy, but I meant fluid to use with the underside stencil cleaning
with the onboard system on our printer. We have been using alcohol but it
just doesn't do the job with no clean solder paste...
Thanks again!
-Steve Gregory-
We use Hydrex A Plus and like it.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of [log in to unmask]
Sent: Tuesday, March 12, 2002 2:24 PM
To: [log in to unmask]
Subject: [TN] Earls pics are up, and a question...
Hey all!
The pictures of Earls missing balls are up! Go to:
http://www.stevezeva.homestead.com
...and I have a question that's off topic here. What is a good fluid
to use in your printer stencil cleaner? We have a DEK 288 and we use no
clean paste.
Thanks!
-Steve Gregory-
------=_NextPart_000_0003_01C1CA5D.564BC4E0
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META content=3D"text/html; charset=3Dwindows-1252" =
http-equiv=3DContent-Type>
<META content=3D"MSHTML 5.00.3105.105" name=3DGENERATOR></HEAD>
<BODY>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN =
class=3D86105911-13032002>Try=20
Bioact SC 10. I liked it better than IPA. It dries a little slower and =
has a=20
different odor. But I think it works better for underwipe. It also works =
great=20
when cleaning up flux on PWAs after BGA removal. </SPAN></FONT></DIV>
<BLOCKQUOTE=20
style=3D"BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; PADDING-LEFT: =
5px">
<DIV class=3DOutlookMessageHeader><FONT face=3D"Times New Roman"=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of</B> =
[log in to unmask]<BR><B>Sent:</B>=20
Tuesday, March 12, 2002 6:35 PM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> Re: [TN]=20
question...<BR><BR></DIV></FONT><FONT face=3Darial,helvetica><FONT =
face=3DArial=20
lang=3D0 size=3D2 FAMILY=3D"SANSSERIF">Thanks Guy, but I meant fluid =
to use with the=20
underside stencil cleaning with the onboard system on our printer. We =
have=20
been using alcohol but it just doesn't do the job with no clean solder =
paste...<BR><BR>Thanks again!<BR><BR>-Steve =
Gregory-<BR><BR><BR></FONT><FONT=20
color=3D#0000ff face=3DArial lang=3D0 size=3D2 =
style=3D"BACKGROUND-COLOR: #ffffff"=20
FAMILY=3D"SANSSERIF">
<BLOCKQUOTE=20
style=3D"BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; =
MARGIN-RIGHT: 0px; PADDING-LEFT: 5px"=20
TYPE=3D"CITE">We use Hydrex A Plus and like it. </FONT><FONT =
color=3D#000000=20
face=3DArial lang=3D0 size=3D3 style=3D"BACKGROUND-COLOR: #ffffff"=20
FAMILY=3D"SANSSERIF"><BR></FONT><FONT color=3D#000000 face=3DArial =
lang=3D0 size=3D2=20
style=3D"BACKGROUND-COLOR: #ffffff" =
FAMILY=3D"SANSSERIF"><BR></FONT><FONT=20
color=3D#000000 face=3D"Times New Roman" lang=3D0 size=3D2=20
style=3D"BACKGROUND-COLOR: #ffffff" FAMILY=3D"SERIF">
<BLOCKQUOTE=20
style=3D"BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; =
MARGIN-RIGHT: 0px; PADDING-LEFT: 5px"=20
TYPE=3D"CITE">-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of</B>=20
[log in to unmask]<BR><B>Sent:</B> Tuesday, March 12, 2002 2:24=20
PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] Earls =
pics are=20
up, and a question...<BR><BR><BR></FONT><FONT color=3D#000000 =
face=3Darial=20
lang=3D0 size=3D2 style=3D"BACKGROUND-COLOR: #ffffff" =
FAMILY=3D"SANSSERIF">Hey=20
all! <BR><BR>The pictures of Earls missing balls are up! Go to:=20
<BR><BR>http://www.stevezeva.homestead.com <BR><BR>...and I have a =
question that's off topic here. What is a good fluid to use in =
your=20
printer stencil cleaner? We have a DEK 288 and we use no clean =
paste.=20
<BR><BR>Thanks! <BR><BR>-Steve Gregory-</FONT><FONT =
color=3D#000000=20
face=3Darial lang=3D0 size=3D3 style=3D"BACKGROUND-COLOR: #ffffff" =
FAMILY=3D"SANSSERIF"> </BLOCKQUOTE><BR></FONT><FONT =
color=3D#000000 face=3DArial=20
lang=3D0 size=3D2 style=3D"BACKGROUND-COLOR: #ffffff"=20
=
FAMILY=3D"SANSSERIF"></BLOCKQUOTE><BR><BR></BLOCKQUOTE></FONT></FONT></BO=
DY></HTML>
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Date: Wed, 13 Mar 2002 17:48:53 +0530
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Vinit Verma <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Vinit Verma <[log in to unmask]>
Subject: Glue Dot Size
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi All,
Has anyone ever worked with the Pump Printing Stencil for printing glue on
pre-inserted PCBs?? This stencil is developed by DEK but I'm not too sure of
how it works? Any experiences?
Also would be too kind if somebody could tell me the glue size requirement
for 0603 and 0805 components?
Thanks in advance
Regards
Vinit Verma
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Date: Wed, 13 Mar 2002 12:18:15 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Albin, David" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Albin, David" <[log in to unmask]>
Subject: FW: LDI - LDS - Users / Experiences / Comments
MIME-Version: 1.0
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> =20
>=20
> Earl,
> I think I may have to pass the full features/ benefits list
> on to one of the equipment suppliers, but my feelings are that the =
main
> ones are:
> * Improved registration (front-to-back & across a side) - mainly due
> to some cunning CCD camera alignment system. Registration will be
> particularly important when LDI soldermask comes to market, as this =
should
> mean that all your solder dams will now be nicely aligned with those =
high
> I/O SMT/ BGA/ etc packages.
> * Artwork scaling to fit fiducial marks (within reason) - compensates
> for 'movement' during lamination.
> * Removal of artwork creation stage, also removes any repeat defects
> from artwork faults.
> * Creation of image 'in software' means that jobs can be run through
> imaging in any order - saves time in changing/ alignment of standard
> phototools.
> * Improved resolution is also sometimes quoted, but not so sure
> whether this is a feature of the LDI or just that the yields on =
<100=B5m
> (4mil) lines are improved due to the other benefits I've listed.
>=20
> If you need further detail, I really will have to refer you to the
> LDI equipment guys.
>=20
> Regards,
> David Albin
> Coates Circuit Products
>=20
> -----Original Message-----
> From: Earl Moon [mailto:[log in to unmask]]
> Sent: 11 March 2002 11:13
> To: [log in to unmask]; [log in to unmask]
> Subject: Re: LDI - LDS - Users / Experiences / Comments
>=20
>=20
> David,
>=20
> Thanks for the fine input. Now, I hope all the designers in the
> printed
> circus world can realize more benefits offered by taking advantage
> of this
> capability.
>=20
> Could you elaborate on that a bit David?
>=20
> Thanks again,
>=20
> Earl
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Date: Wed, 13 Mar 2002 07:36:38 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Earl, I looked at your pictures of missing solder balls and share your
grief. This looks exactly what I've been seeing occasionally on our CBGAs
when removed from an assembly. BTW, someone on Technet had referenced a
paper regarding the produciblility and reliability issues of ceramic BGAs in
a military environment, well that was authored by yours truly. Anyway,
using BGAs at my company was a hard sell, but I did it. The components we
use aren't off-the-shelf devices, but are custom made. Every time there was
a component failure, it was attributed to an open BGA solder joint. Many
BGAs were painstakingly removed (these boards are bonded to a rather large
composite restraining core) and replaced. I think I still have sort of a
black eye for pushing the BGA technology. Occasionally our Test Engineers
were actually able to pin-point the exact solder joint of the suspected
open. Upon removal, low and behold the ball location of the open joint
looked exactly like your photos. All other ball locations had remnants of
solder. I wasn't able to do much to analyze for root cause, since, being an
OEM, the program management didn't want to spend money to research the
cause. They were happy to just replace the components. My theory?
Insufficient gold plating protecting the Ni barrier layer, causing the Ni to
oxidize resulting in a marginal solder ball attachment. Nothing to
substantiate this, just a hunch. How are you making out? Any progress?
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: [log in to unmask] [SMTP:[log in to unmask]]
Sent: Tuesday, March 12, 2002 2:24 PM
To: [log in to unmask]
Subject: [TN] Earls pics are up, and a question...
Hey all!
The pictures of Earls missing balls are up! Go to:
http://www.stevezeva.homestead.com
...and I have a question that's off topic here. What is a good fluid
to use in your printer stencil cleaner? We have a DEK 288 and we use no
clean paste.
Thanks!
-Steve Gregory-
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Date: Wed, 13 Mar 2002 06:34:44 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: FW: LDI - LDS - Users / Experiences / Comments
X-To: [log in to unmask]
David,
Thanks for taking this online. I too hope some of the suppliers talk to us
all about direct imaging benefits.
Earl
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Date: Wed, 13 Mar 2002 12:49:41 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Steve Owen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Steve Owen <[log in to unmask]>
Subject: Re: Glue Dot Size
X-To: Vinit Verma <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi Vinit,
We dispense adhesive using Fuji GL5's, dual nozzle .3mm nozzle for 0603 and
.4mm nozzle for 0805 (internal diameter). Adhesive dot size is :- 1.5X to
2.5X where X is the nozzle internal diameter. Working towards the 2.5X for
consistency.
Steve.
-----Original Message-----
From: Vinit Verma [mailto:[log in to unmask]]
Sent: 13 March 2002 12:19
To: [log in to unmask]
Subject: [TN] Glue Dot Size
Hi All,
Has anyone ever worked with the Pump Printing Stencil for printing glue on
pre-inserted PCBs?? This stencil is developed by DEK but I'm not too sure of
how it works? Any experiences?
Also would be too kind if somebody could tell me the glue size requirement
for 0603 and 0805 components?
Thanks in advance
Regards
Vinit Verma
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Date: Wed, 13 Mar 2002 08:12:45 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
I have to apologize... the paper regarding ceramic BGAs referenced in the
previous Technet post was not mine, although similar.
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Marsico, James
Sent: Wednesday, March 13, 2002 7:37 AM
To: 'TechNet E-Mail Forum.'
Subject: RE: [TN] Earls pics are up, and a question...
Earl, I looked at your pictures of missing solder balls and share
your grief. This looks exactly what I've been seeing occasionally on our
CBGAs when removed from an assembly. BTW, someone on Technet had referenced
a paper regarding the produciblility and reliability issues of ceramic BGAs
in a military environment, well that was authored by yours truly. Anyway,
using BGAs at my company was a hard sell, but I did it. The components we
use aren't off-the-shelf devices, but are custom made. Every time there was
a component failure, it was attributed to an open BGA solder joint. Many
BGAs were painstakingly removed (these boards are bonded to a rather large
composite restraining core) and replaced. I think I still have sort of a
black eye for pushing the BGA technology. Occasionally our Test Engineers
were actually able to pin-point the exact solder joint of the suspected
open. Upon removal, low and behold the ball location of the open joint
looked exactly like your photos. All other ball locations had remnants of
solder. I wasn't able to do much to analyze for root cause, since, being an
OEM, the program management didn't want to spend money to research the
cause. They were happy to just replace the components. My theory?
Insufficient gold plating protecting the Ni barrier layer, causing the Ni to
oxidize resulting in a marginal solder ball attachment. Nothing to
substantiate this, just a hunch. How are you making out? Any progress?
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: [log in to unmask] [SMTP:[log in to unmask]]
Sent: Tuesday, March 12, 2002 2:24 PM
To: [log in to unmask]
Subject: [TN] Earls pics are up, and a question...
Hey all!
The pictures of Earls missing balls are up! Go to:
http://www.stevezeva.homestead.com
...and I have a question that's off topic here. What is a
good fluid to use in your printer stencil cleaner? We have a DEK 288 and we
use no clean paste.
Thanks!
-Steve Gregory-
---------------------------------------------------------------------------------
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Date: Wed, 13 Mar 2002 08:43:29 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: BGA's
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: multipart/related; boundary="=_related 004A905F85256B7B_="
This is a multipart message in MIME format.
--=_related 004A905F85256B7B_=
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With all the discussion with BGA assembly and rework, I was wondering if
there is a reason why sockets are not
more widely used for BGA's ? This would seem to solve maybe 1/3 of the
problems. The device wouldn't be
subjected to the harsh removal and reball process and the board wouldn't
have to be reworked as much.
We're going to start using one for a 672 pin PBGA for this reason alone.
We've had a few "alleged" defective
devices and the $$ of the rework justified for at least trying the socket.
--=_alternative 004A905F85256B7B_=
Content-Type: text/html; charset="us-ascii"
<br><font size=2 face="sans-serif">With all the discussion with BGA assembly and rework, I was wondering if there is a reason why sockets are not</font>
<br><font size=2 face="sans-serif">more widely used for BGA's ? This would seem to solve maybe 1/3 of the problems. The device wouldn't be</font>
<br><font size=2 face="sans-serif">subjected to the harsh removal and reball process and the board wouldn't have to be reworked as much. </font>
<br><font size=2 face="sans-serif">We're going to start using one for a 672 pin PBGA for this reason alone. We've had a few "alleged" defective </font>
<br><font size=2 face="sans-serif">devices and the $$ of the rework justified for at least trying the socket.</font>
<br><font size=2 face="sans-serif"> </font><font size=3 face="Times New Roman"> </font>
<p><img src=cid:_1_1D4C00000158004A905F85256B7B>
--=_alternative 004A905F85256B7B_=--
--=_related 004A905F85256B7B_=--
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Date: Wed, 13 Mar 2002 07:31:01 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
Jim,
BGA's used to be my best friend, except for Arleen Weinberger and other
ladies of extreme beauty and brains. Now they are a bain, if tha's a proper
term. It's like the whole BGA world has gone to hell. Even board suppliers
are starting to suck who once had my total faith and confidence based on
constant evaluation, re-evaluation, and qualification.
At least now I have a compadre in this mess. Thanks for sharing the gief but
I'm honestly stumped but for an undying dedication to gettin this damn thing
resolved. The TI thing was bad enough but now another major supplier adds to
the MESS.
Did you give us your paper and/or its location? I'm reading all I can, OVER
AND OVER AGAIN, notwithstanding posting my brains and guts out on this site.
Hell, even Sir Werner and his cohorts can't do much. It has to be up to the
suppliers to come forth. Thought I was working concurrently with TI. Now I'm
not sure again, and haven't even begun talking with the other major supplier
with whom my last pics are associated.
Your statement about "Every time there was a component failure, it was
attributed to an open BGA solder joint" sure used to ring true but was
resolved, for a time. It seems now to be coming back.
Sorry about your, hopefully healed black eye, but should not have been the
case. However, some should suffer such a fate based on your thoughts about
how the missing ball attachment area looked compared to mine. This solder
"remnant" crap is exactly my problem and others soon to experience it. All
other surface conditions point to some process management inadequacies and
someone knows what they are and what are the failure modes/mechanisms. Just
looks like unsolderable surfaces to me and whatever happened to the IMC
layer whether too thick, too thin, or just plane way to oxidized.
My progress is limited to a very small company resource capability. The
company has spent way too much time and money doing minimal analysis. Who
the hell could afford to do more anyway. Like Sir Werner says, this crap is
just being thrown over the fence for all us ROOKIES to suck through a garden
hose. I don't do that.
I believe you're right about the nickel gold thing. What else could it be.
TI even admitted one of its suppliers was replaced to do a better job. That
hasn't been proven yet either. Maybe Friday it will when we get our first
assemblies. We'll ge to the bottom, and I do mean bottom, of this soon but
maybe not soon enough for some.
Thanks JM for some outstanding insights. Finally feels a bit, though sadly,
comforting having someone else having gone through this.
Earl
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Date: Wed, 13 Mar 2002 07:36:07 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Glue Dot Size
X-To: Vinit Verma <[log in to unmask]>
Never used it but similar to DEK solder paste dispensing system that worked
well. Even better was the new and improved DEK ProFlow. Maybe they have a
similar system now for glue but who would need it?
MoonMan
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Date: Wed, 13 Mar 2002 07:37:35 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
Where's yours?
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Date: Wed, 13 Mar 2002 07:39:03 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: BGA's
X-To: [log in to unmask]
real estate
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Date: Wed, 13 Mar 2002 08:58:31 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: BGA's
MIME-Version: 1.0
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But the sockets are the same size (maybe slightly larger) as the BGA. The
sockets I'm referring to are SMT.
The device itself is 27mm sq, the skt. we are to use is 27.53mm sq.
--=_alternative 004BF09E85256B7B_=
Content-Type: text/html; charset="us-ascii"
<br><font size=2 face="sans-serif">But the sockets are the same size (maybe slightly larger) as the BGA. The sockets I'm referring to are SMT.<br>
</font><font size=3 face="Times New Roman"> The device itself is 27mm sq, the skt. we are to use is 27.53mm sq.</font>
<p><img src=cid:_1_16A000000158004BF09E85256B7B>
--=_alternative 004BF09E85256B7B_=--
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Date: Wed, 13 Mar 2002 09:01:09 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Furrow, Robert Gordon (Bob)" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Furrow, Robert Gordon (Bob)" <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: Earl Moon <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Earl,
As others have stated, the 10X picture looks like there was never intended
to be a ball there. Maybe it is the lower mag and a trick of the lighting
that makes it look that way. Anyway, on the other pics it looks a lot like a
clean fracture right at the intermetallic layer. Is the underlying metal
nickel? Was the BGA fabricator using ENIG as a solderability coating prior
to the attachment of the balls? Could this be another case of "black pad"? I
know we have had instances where this has been the case. Very low level
identified, but who knows how many times the actual cause is overlooked. As
with the ENIG issue on PWB surfaces, some suppliers may be able to
completely eliminate the problem, others may have it at a low level, and the
unfortunate few may be plagued with this problem. Just some questions you
might want to check in to.
Thanks,
Robert Furrow
Printed Wiring Board Engineer
Supply Chain Networks
Lucent Technologies
978-960-3224 [log in to unmask]
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 8:31 AM
To: [log in to unmask]
Subject: Re: [TN] Earls pics are up, and a question...
Jim,
BGA's used to be my best friend, except for Arleen Weinberger and other
ladies of extreme beauty and brains. Now they are a bain, if tha's a proper
term. It's like the whole BGA world has gone to hell. Even board suppliers
are starting to suck who once had my total faith and confidence based on
constant evaluation, re-evaluation, and qualification.
At least now I have a compadre in this mess. Thanks for sharing the gief but
I'm honestly stumped but for an undying dedication to gettin this damn thing
resolved. The TI thing was bad enough but now another major supplier adds to
the MESS.
Did you give us your paper and/or its location? I'm reading all I can, OVER
AND OVER AGAIN, notwithstanding posting my brains and guts out on this site.
Hell, even Sir Werner and his cohorts can't do much. It has to be up to the
suppliers to come forth. Thought I was working concurrently with TI. Now I'm
not sure again, and haven't even begun talking with the other major supplier
with whom my last pics are associated.
Your statement about "Every time there was a component failure, it was
attributed to an open BGA solder joint" sure used to ring true but was
resolved, for a time. It seems now to be coming back.
Sorry about your, hopefully healed black eye, but should not have been the
case. However, some should suffer such a fate based on your thoughts about
how the missing ball attachment area looked compared to mine. This solder
"remnant" crap is exactly my problem and others soon to experience it. All
other surface conditions point to some process management inadequacies and
someone knows what they are and what are the failure modes/mechanisms. Just
looks like unsolderable surfaces to me and whatever happened to the IMC
layer whether too thick, too thin, or just plane way to oxidized.
My progress is limited to a very small company resource capability. The
company has spent way too much time and money doing minimal analysis. Who
the hell could afford to do more anyway. Like Sir Werner says, this crap is
just being thrown over the fence for all us ROOKIES to suck through a garden
hose. I don't do that.
I believe you're right about the nickel gold thing. What else could it be.
TI even admitted one of its suppliers was replaced to do a better job. That
hasn't been proven yet either. Maybe Friday it will when we get our first
assemblies. We'll ge to the bottom, and I do mean bottom, of this soon but
maybe not soon enough for some.
Thanks JM for some outstanding insights. Finally feels a bit, though sadly,
comforting having someone else having gone through this.
Earl
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Date: Wed, 13 Mar 2002 09:08:12 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
James TerVeen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: James TerVeen <[log in to unmask]>
Subject: Re: BGA's
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
In the telecommunications business (if there is any left) the interface
between tthe socket and BGA will effect the performance of the component.
That is why they require it to be soldered to the board.
michael.kuczynski@P
HILIPS.COM To: [log in to unmask]
Sent by: TechNet cc:
<[log in to unmask]> Subject: Re: [TN] BGA's
03/13/02 08:58 AM
Please respond to
"TechNet E-Mail
Forum."; Please
respond to
michael.kuczynski
But the sockets are the same size (maybe slightly larger) as the BGA. The
sockets I'm referring to are SMT.
The device itself is 27mm sq, the skt. we are to use is 27.53mm sq.
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Date: Wed, 13 Mar 2002 09:12:41 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: Earl Moon <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Unfortunately, my paper is hard copy only, published for an internal
seminar. That doesn't mean that It's proprietary. I'll see if I can scan
it in and send it to you.
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Earl Moon [SMTP:[log in to unmask]]
Sent: Wednesday, March 13, 2002 8:38 AM
To: [log in to unmask]; [log in to unmask]
Subject: Re: Earls pics are up, and a question...
Where's yours?
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Date: Wed, 13 Mar 2002 09:12:09 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Charles McMahon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Charles McMahon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: "Marsico, James" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii; format=flowed
Content-Transfer-Encoding: 7bit
Jim:
Pursuant to the discussion...
Have you been able to prove that there was insufficient gold immersion
on this board via
the first article submitted with the date code tracking from the board
supplier?
I would feel that your theory would be substantiated with this as your
empirical back-up.
Do you require all lots to be submitted with a sample
board/cross-section etc?
I have much interest in determining "smoking gun" flags for de-wetting
incidences.
This appears to be an indicator does it not?
Charlie McMahon
Marsico, James wrote:
>Earl, I looked at your pictures of missing solder balls and share your
>grief. This looks exactly what I've been seeing occasionally on our CBGAs
>when removed from an assembly. BTW, someone on Technet had referenced a
>paper regarding the produciblility and reliability issues of ceramic BGAs in
>a military environment, well that was authored by yours truly. Anyway,
>using BGAs at my company was a hard sell, but I did it. The components we
>use aren't off-the-shelf devices, but are custom made. Every time there was
>a component failure, it was attributed to an open BGA solder joint. Many
>BGAs were painstakingly removed (these boards are bonded to a rather large
>composite restraining core) and replaced. I think I still have sort of a
>black eye for pushing the BGA technology. Occasionally our Test Engineers
>were actually able to pin-point the exact solder joint of the suspected
>open. Upon removal, low and behold the ball location of the open joint
>looked exactly like your photos. All other ball locations had remnants of
>solder. I wasn't able to do much to analyze for root cause, since, being an
>OEM, the program management didn't want to spend money to research the
>cause. They were happy to just replace the components. My theory?
>Insufficient gold plating protecting the Ni barrier layer, causing the Ni to
>oxidize resulting in a marginal solder ball attachment. Nothing to
>substantiate this, just a hunch. How are you making out? Any progress?
>
>Jim Marsico
>Senior Engineer
>Production Engineering
>EDO Electronics Systems Group
>[log in to unmask] <mailto:[log in to unmask]>
>631-595-5879
>
>
> -----Original Message-----
> From: [log in to unmask] [SMTP:[log in to unmask]]
> Sent: Tuesday, March 12, 2002 2:24 PM
> To: [log in to unmask]
> Subject: [TN] Earls pics are up, and a question...
>
> Hey all!
>
> The pictures of Earls missing balls are up! Go to:
>
> http://www.stevezeva.homestead.com
>
> ...and I have a question that's off topic here. What is a good fluid
>to use in your printer stencil cleaner? We have a DEK 288 and we use no
>clean paste.
>
> Thanks!
>
> -Steve Gregory-
>
>---------------------------------------------------------------------------------
>Technet Mail List provided as a free service by IPC using LISTSERV 1.8d
>To unsubscribe, send a message to [log in to unmask] with following text in
>the BODY (NOT the subject field): SIGNOFF Technet
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>Please visit IPC web site http://www.ipc.org/html/forum.htm for additional
>information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315
>---------------------------------------------------------------------------------
>
>
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Date: Wed, 13 Mar 2002 09:20:59 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Proof of insufficient gold? Who needs proof? Kyocera's dimpled BGA package
drawings call out for a gold thickness of 25 microinches maximum! Don't
really know how much there is.
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Charles McMahon [SMTP:[log in to unmask]]
Sent: Wednesday, March 13, 2002 9:12 AM
To: TechNet E-Mail Forum.; Marsico, James
Subject: Re: [TN] Earls pics are up, and a question...
Jim:
Pursuant to the discussion...
Have you been able to prove that there was insufficient gold
immersion
on this board via
the first article submitted with the date code tracking from the
board
supplier?
I would feel that your theory would be substantiated with this as
your
empirical back-up.
Do you require all lots to be submitted with a sample
board/cross-section etc?
I have much interest in determining "smoking gun" flags for
de-wetting
incidences.
This appears to be an indicator does it not?
Charlie McMahon
Marsico, James wrote:
>Earl, I looked at your pictures of missing solder balls and share
your
>grief. This looks exactly what I've been seeing occasionally on
our CBGAs
>when removed from an assembly. BTW, someone on Technet had
referenced a
>paper regarding the produciblility and reliability issues of
ceramic BGAs in
>a military environment, well that was authored by yours truly.
Anyway,
>using BGAs at my company was a hard sell, but I did it. The
components we
>use aren't off-the-shelf devices, but are custom made. Every time
there was
>a component failure, it was attributed to an open BGA solder joint.
Many
>BGAs were painstakingly removed (these boards are bonded to a
rather large
>composite restraining core) and replaced. I think I still have
sort of a
>black eye for pushing the BGA technology. Occasionally our Test
Engineers
>were actually able to pin-point the exact solder joint of the
suspected
>open. Upon removal, low and behold the ball location of the open
joint
>looked exactly like your photos. All other ball locations had
remnants of
>solder. I wasn't able to do much to analyze for root cause, since,
being an
>OEM, the program management didn't want to spend money to research
the
>cause. They were happy to just replace the components. My theory?
>Insufficient gold plating protecting the Ni barrier layer, causing
the Ni to
>oxidize resulting in a marginal solder ball attachment. Nothing to
>substantiate this, just a hunch. How are you making out? Any
progress?
>
>Jim Marsico
>Senior Engineer
>Production Engineering
>EDO Electronics Systems Group
>[log in to unmask] <mailto:[log in to unmask]>
>631-595-5879
>
>
> -----Original Message-----
> From: [log in to unmask] [SMTP:[log in to unmask]]
> Sent: Tuesday, March 12, 2002 2:24 PM
> To: [log in to unmask]
> Subject: [TN] Earls pics are up, and a question...
>
> Hey all!
>
> The pictures of Earls missing balls are up! Go to:
>
> http://www.stevezeva.homestead.com
>
> ...and I have a question that's off topic here. What is a
good fluid
>to use in your printer stencil cleaner? We have a DEK 288 and we
use no
>clean paste.
>
> Thanks!
>
> -Steve Gregory-
>
>---------------------------------------------------------------------------
------
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1.8d
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text in
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>Please visit IPC web site http://www.ipc.org/html/forum.htm for
additional
>information, or contact Keach Sasamori at [log in to unmask] or
847-509-9700 ext.5315
>---------------------------------------------------------------------------
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>
>
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Date: Wed, 13 Mar 2002 08:25:57 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Genny Gibbard <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Genny Gibbard <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
A couple of people have commented now about the missing ball looking like it
never intended to be there in the first picture and I just have to speak up.
At first I thought it was the corner ball as well, but I looked a little
closer and about 5 rows up on the outside edge, there is clearly a pad with
no ball. I believe this is the location Earl is talking about.
Unfortunately I have no information to add to the discussion on how to deal
with this, but I wanted to make sure that the people that can interpret the
pictures get all the info out of the pictures that they can.
-----Original Message-----
From: Furrow, Robert Gordon (Bob) [mailto:[log in to unmask]]
Sent: March 13, 2002 8:01 AM
To: [log in to unmask]
Subject: Re: [TN] Earls pics are up, and a question...
Earl,
As others have stated, the 10X picture looks like there was never intended
to be a ball there. Maybe it is the lower mag and a trick of the lighting
that makes it look that way. Anyway, on the other pics it looks a lot like a
clean fracture right at the intermetallic layer. Is the underlying metal
nickel? Was the BGA fabricator using ENIG as a solderability coating prior
to the attachment of the balls? Could this be another case of "black pad"? I
know we have had instances where this has been the case. Very low level
identified, but who knows how many times the actual cause is overlooked. As
with the ENIG issue on PWB surfaces, some suppliers may be able to
completely eliminate the problem, others may have it at a low level, and the
unfortunate few may be plagued with this problem. Just some questions you
might want to check in to.
Thanks,
Robert Furrow
Printed Wiring Board Engineer
Supply Chain Networks
Lucent Technologies
978-960-3224 [log in to unmask]
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 8:31 AM
To: [log in to unmask]
Subject: Re: [TN] Earls pics are up, and a question...
Jim,
BGA's used to be my best friend, except for Arleen Weinberger and other
ladies of extreme beauty and brains. Now they are a bain, if tha's a proper
term. It's like the whole BGA world has gone to hell. Even board suppliers
are starting to suck who once had my total faith and confidence based on
constant evaluation, re-evaluation, and qualification.
At least now I have a compadre in this mess. Thanks for sharing the gief but
I'm honestly stumped but for an undying dedication to gettin this damn thing
resolved. The TI thing was bad enough but now another major supplier adds to
the MESS.
Did you give us your paper and/or its location? I'm reading all I can, OVER
AND OVER AGAIN, notwithstanding posting my brains and guts out on this site.
Hell, even Sir Werner and his cohorts can't do much. It has to be up to the
suppliers to come forth. Thought I was working concurrently with TI. Now I'm
not sure again, and haven't even begun talking with the other major supplier
with whom my last pics are associated.
Your statement about "Every time there was a component failure, it was
attributed to an open BGA solder joint" sure used to ring true but was
resolved, for a time. It seems now to be coming back.
Sorry about your, hopefully healed black eye, but should not have been the
case. However, some should suffer such a fate based on your thoughts about
how the missing ball attachment area looked compared to mine. This solder
"remnant" crap is exactly my problem and others soon to experience it. All
other surface conditions point to some process management inadequacies and
someone knows what they are and what are the failure modes/mechanisms. Just
looks like unsolderable surfaces to me and whatever happened to the IMC
layer whether too thick, too thin, or just plane way to oxidized.
My progress is limited to a very small company resource capability. The
company has spent way too much time and money doing minimal analysis. Who
the hell could afford to do more anyway. Like Sir Werner says, this crap is
just being thrown over the fence for all us ROOKIES to suck through a garden
hose. I don't do that.
I believe you're right about the nickel gold thing. What else could it be.
TI even admitted one of its suppliers was replaced to do a better job. That
hasn't been proven yet either. Maybe Friday it will when we get our first
assemblies. We'll ge to the bottom, and I do mean bottom, of this soon but
maybe not soon enough for some.
Thanks JM for some outstanding insights. Finally feels a bit, though sadly,
comforting having someone else having gone through this.
Earl
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Date: Wed, 13 Mar 2002 10:18:49 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Cleaning Baskets
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hello Technet,
I'm looking for alternative-style baskets / methods to prevent damage (rips
parts off) double-sided boards. I thinking of having our st.st. baskets
coated with plastic.
Background: I usually place the boards directly on the in-line cleaner's
conveyor (which also has a top/hold-down conveyor). I had a board that we
thought may get damaged without placing in a basket (24" x 20" x 1.75" with
1/4" mesh). However, any slight movement - either during loading/unloading
or cleaning - rips off the higher profile smt parts.
Any suggestions?
Thanks in advance for your help,
Al Kreplick
Sr. Mfg. Eng.
Teradyne, Inc.
500 Riverpark Drive
North Reading, MA 01864
Tel: 978-370-1726
Fax: 734-661-5352
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=========================================================================
Date: Wed, 13 Mar 2002 08:20:34 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Howard Watson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Howard Watson <[log in to unmask]>
Subject: Soft Beam Soldering
MIME-Version: 1.0
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This is a multipart message in MIME format.
--=_alternative 0054199487256B7B_=
Content-Type: text/plain; charset="us-ascii"
Does anyone have experience with a Panasonic Soft Beam soldering system
for through hole selective soldering? I am interested in any comments,
good or bad, that would help steer me towards/away from this machine. If
desired, please contact me off line. Thanks in advance.
Howard Watson
Manufacturing Engineer
AMETEK/Dixson
--=_alternative 0054199487256B7B_=
Content-Type: text/html; charset="us-ascii"
<br><font size=2 face="sans-serif">Does anyone have experience with a Panasonic Soft Beam soldering system for through hole selective soldering? I am interested in any comments, good or bad, that would help steer me towards/away from this machine. If desired, please contact me off line. Thanks in advance.</font>
<br>
<br><font size=2 face="sans-serif">Howard Watson<br>
Manufacturing Engineer<br>
AMETEK/Dixson</font>
--=_alternative 0054199487256B7B_=--
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Date: Wed, 13 Mar 2002 10:44:39 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: question...
MIME-Version: 1.0
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In a message dated 3/12/2002 6:43:20 PM US Eastern Standard Time,
[log in to unmask] writes:
<< I meant fluid to use with the underside stencil cleaning with
the onboard system on our printer. >>
I used SMT Stencil Cleaner from JNJ and it worked well for me. There are so
many different formulations of no-clean, you really have to test your
chemistry to know for sure.
Jon Moore
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Date: Wed, 13 Mar 2002 10:17:01 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Carl Ray <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Carl Ray <[log in to unmask]>
Subject: Solder Joint Mechanical Stress
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I have a customer who is requiring that I verify the bond strength of a
heat sink that is glued to the top of PBGA. The customer has supplied me
with a torque tool to verify the strength of the bond between the heat
sink and the BGA. I have concerns that testing the strength of the glue
bond may affect the solder joint reliability of the BGA. The tool
supplied by the customer is set at 20 in pound torque. Any ideas how I
can "change" my customer mind?
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Date: Wed, 13 Mar 2002 11:32:07 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Soft Beam Soldering
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I have used a Soft-Beam system for some limited rework as well as a medium
quantity production, in-line operation. The key factors for using this
system included temperature sensitivity for surrounding components, high
thermal mass in the solder joints that needed selective soldering, components
that could be easily fixtured after insertion so that they did not fall out
when the board is inverted for the Soft-Beam operation.
In general the Soft-Beam performed fairly well. The biggest hassle was the
calibration of the shutter cycle as the bulb aged. Since that bulb reduces
in output over time, a calibration routine is required to ensure the process
remains stable. For our process control limits, running the system 24/7,
that meant running calibration weekly on a new bulb, 2x weekly in mid bulb
life and 3-4x weekly toward the end of bulb life.
Solder joint quality looked good in both visual inspection and
cross-section. The ability to preheat each joint before applying solder
helped. Of course that also adds to cycle time.
Jon Moore
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Date: Wed, 13 Mar 2002 11:40:01 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
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From: [log in to unmask]
Subject: Re: Cleaning Baskets
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I have been down the road of parts being ripped off or at least damaged
during wash. We found the root of our problem to be a difference in the
movements of top and bottom chain belts. Sometimes one or the other would
hang up a little, then surge forward as it released. The relative difference
in motion with the board caught in the middle was doing the damage. We ended
up completely removing the top belts in all of our washes.
Jon Moore
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Date: Wed, 13 Mar 2002 11:44:46 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Carlile <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Carlile <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: Genny Gibbard <[log in to unmask]>
In-Reply-To: <A71205756C62D411B06900B0D03DC136B1C289@CONNECTOR>
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Please note that the actual pictures were of 1 of the 4 defective parts.
Each part had different balls missing. One note was that the balls were
missing from the exterior row of balls on all 4 parts.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Genny Gibbard
Sent: Wednesday, March 13, 2002 9:26 AM
To: [log in to unmask]
Subject: Re: [TN] Earls pics are up, and a question...
A couple of people have commented now about the missing ball looking like it
never intended to be there in the first picture and I just have to speak up.
At first I thought it was the corner ball as well, but I looked a little
closer and about 5 rows up on the outside edge, there is clearly a pad with
no ball. I believe this is the location Earl is talking about.
Unfortunately I have no information to add to the discussion on how to deal
with this, but I wanted to make sure that the people that can interpret the
pictures get all the info out of the pictures that they can.
-----Original Message-----
From: Furrow, Robert Gordon (Bob) [mailto:[log in to unmask]]
Sent: March 13, 2002 8:01 AM
To: [log in to unmask]
Subject: Re: [TN] Earls pics are up, and a question...
Earl,
As others have stated, the 10X picture looks like there was never intended
to be a ball there. Maybe it is the lower mag and a trick of the lighting
that makes it look that way. Anyway, on the other pics it looks a lot like a
clean fracture right at the intermetallic layer. Is the underlying metal
nickel? Was the BGA fabricator using ENIG as a solderability coating prior
to the attachment of the balls? Could this be another case of "black pad"? I
know we have had instances where this has been the case. Very low level
identified, but who knows how many times the actual cause is overlooked. As
with the ENIG issue on PWB surfaces, some suppliers may be able to
completely eliminate the problem, others may have it at a low level, and the
unfortunate few may be plagued with this problem. Just some questions you
might want to check in to.
Thanks,
Robert Furrow
Printed Wiring Board Engineer
Supply Chain Networks
Lucent Technologies
978-960-3224 [log in to unmask]
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 8:31 AM
To: [log in to unmask]
Subject: Re: [TN] Earls pics are up, and a question...
Jim,
BGA's used to be my best friend, except for Arleen Weinberger and other
ladies of extreme beauty and brains. Now they are a bain, if tha's a proper
term. It's like the whole BGA world has gone to hell. Even board suppliers
are starting to suck who once had my total faith and confidence based on
constant evaluation, re-evaluation, and qualification.
At least now I have a compadre in this mess. Thanks for sharing the gief but
I'm honestly stumped but for an undying dedication to gettin this damn thing
resolved. The TI thing was bad enough but now another major supplier adds to
the MESS.
Did you give us your paper and/or its location? I'm reading all I can, OVER
AND OVER AGAIN, notwithstanding posting my brains and guts out on this site.
Hell, even Sir Werner and his cohorts can't do much. It has to be up to the
suppliers to come forth. Thought I was working concurrently with TI. Now I'm
not sure again, and haven't even begun talking with the other major supplier
with whom my last pics are associated.
Your statement about "Every time there was a component failure, it was
attributed to an open BGA solder joint" sure used to ring true but was
resolved, for a time. It seems now to be coming back.
Sorry about your, hopefully healed black eye, but should not have been the
case. However, some should suffer such a fate based on your thoughts about
how the missing ball attachment area looked compared to mine. This solder
"remnant" crap is exactly my problem and others soon to experience it. All
other surface conditions point to some process management inadequacies and
someone knows what they are and what are the failure modes/mechanisms. Just
looks like unsolderable surfaces to me and whatever happened to the IMC
layer whether too thick, too thin, or just plane way to oxidized.
My progress is limited to a very small company resource capability. The
company has spent way too much time and money doing minimal analysis. Who
the hell could afford to do more anyway. Like Sir Werner says, this crap is
just being thrown over the fence for all us ROOKIES to suck through a garden
hose. I don't do that.
I believe you're right about the nickel gold thing. What else could it be.
TI even admitted one of its suppliers was replaced to do a better job. That
hasn't been proven yet either. Maybe Friday it will when we get our first
assemblies. We'll ge to the bottom, and I do mean bottom, of this soon but
maybe not soon enough for some.
Thanks JM for some outstanding insights. Finally feels a bit, though sadly,
comforting having someone else having gone through this.
Earl
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Date: Wed, 13 Mar 2002 10:42:52 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: Solder Joint Mechanical Stress
Mime-Version: 1.0
Content-Type: multipart/mixed; boundary="=_E7BA59BD.5D3C51A2"
This is a MIME message. If you are reading this text, you may want to
consider changing to a mail reader or gateway that understands how to
properly handle MIME multipart messages.
--=_E7BA59BD.5D3C51A2
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Couldn't you take the BGA and the heatsink loose and perform this test? If =
you could think of a manner in which to hold the BGA when trying to pull =
the heat sink off then you wouldn't have to play with a soldered BGA. =
Word of warning about the load cell of the torque tester, I had done some =
testing where we were testing the sheer strength of SMT adhesives and used =
a torque tester. We blew the load cell of the tester by over stressing =
the tester beyond the max limits. It turned out to be an expensive sheer =
test. =20
Kathy
--=_E7BA59BD.5D3C51A2
Content-Type: text/plain
Content-Disposition: attachment; filename="TEXT.htm"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=Content-Type content="text/html; charset=iso-8859-1">
<META content="MSHTML 6.00.2713.1100" name=GENERATOR></HEAD>
<BODY style="MARGIN-TOP: 2px; FONT: 10pt MS Sans Serif; MARGIN-LEFT: 2px">
<DIV>Couldn't you take the BGA and the heatsink loose and perform this test? If
you could think of a manner in which to hold the BGA when trying to pull the
heat sink off then you wouldn't have to play with a soldered BGA. Word of
warning about the load cell of the torque tester, I had done some testing where
we were testing the sheer strength of SMT adhesives and used a torque
tester. We blew the load cell of the tester by over stressing the tester
beyond the max limits. It turned out to be an expensive sheer test.
</DIV>
<DIV> </DIV>
<DIV>Kathy</DIV></BODY></HTML>
--=_E7BA59BD.5D3C51A2--
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Date: Wed, 13 Mar 2002 10:44:01 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: BGA's
X-To: [log in to unmask]
Mike,
I appologize for the too terse off hand remark. Real estate no matter now
small and, as the other fine gentleman said, electrical performance.
I must say, with all this, not one damn thing does any good if balls simply
fall off parts whether in sockets or on boards.
Earl
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Date: Wed, 13 Mar 2002 11:51:43 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Solder Joint Mechanical Stress
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I would try to establish a set of process parameters to show the customer
repeatable performance using scrap or dummy parts, then show proof of holding
those same process parameters on actual production parts. That way you
demonstrate statistical conformance to their requirement without risking
damage to production parts, which should be easy to present as a win-win
situation to an intelligent customer.
Jon Moore
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Date: Wed, 13 Mar 2002 10:52:40 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
Bob,
I appreciate you input. All I know, after seeing some and fairly extensive
analysis done on the TI parts, including TI, no objective answers were/are
forthcoming. Upon discovering a similar issue, as previously stated, with
another major supplier, I'm at a loss but for surface appearances.
I think JM and a vew others have stated applies. There are teeny weeny, to
go along with my balls, little solder fragments/slivers/spikes, or whatever,
remaining behind on some surface condition not known to man. No raton
cohones aqui but certainly there - at suppliers.
I just sent a response to Big Dan about why things sometimes fall apart in a
recessionary period:
Dan,
It's really simple and I discuss this issue with many folks. The economy is
in a dumper. When it all started going south, management in all its
incredible wisdom always fires the wrong people. They fire workers and
engineeris most closely involved in making quality product. All that's left
are the middle managers who have lost touch with manufacturing operations
but are now expected to manage and get out on the floor once again. Bad
situation not getting better.
STIRRING A REAL BIG POT WITH A TEENY WEENY SPOON. Where's my silver one Kathy?
MoonNoBigSilverSpoonMan
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Date: Wed, 13 Mar 2002 11:54:04 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Krug, Dick" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Krug, Dick" <[log in to unmask]>
Subject: Re: Glue Dot Size
X-To: Vinit Verma <[log in to unmask]>
MIME-Version: 1.0
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We dispense glue using a positive displacement pump.
Dot diameter for 0603's is nominally 20 mils.
Dot diameter for 0805's is nominally 28 mils.
Dick Krug
Sypris Electronics
-----Original Message-----
From: Vinit Verma [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 7:19 AM
To: [log in to unmask]
Subject: [TN] Glue Dot Size
Hi All,
Has anyone ever worked with the Pump Printing Stencil for printing glue on
pre-inserted PCBs?? This stencil is developed by DEK but I'm not too sure of
how it works? Any experiences?
Also would be too kind if somebody could tell me the glue size requirement
for 0603 and 0805 components?
Thanks in advance
Regards
Vinit Verma
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Date: Wed, 13 Mar 2002 10:55:49 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
There's a logical answer. Too little gold. Nickel oxidizes. Surface won't
solder.
The question is how to get a TI, or whoever, to fess up and tell us how much
of anything is on their device substrates?
MoonMan
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Date: Wed, 13 Mar 2002 10:57:23 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
exaclty
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Date: Wed, 13 Mar 2002 10:59:23 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
Thanks Genny
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Date: Wed, 13 Mar 2002 11:02:46 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: Ken Carlile <[log in to unmask]>
Thanks Ken for the clarification. I just want people to know they will be
dealing with your dumb ass instead of mine next week. Watch out folks, KC is
one tough, smart, knowledgeable, experienced dude.
MoonMan
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Date: Wed, 13 Mar 2002 09:12:00 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Crepeau, Phil" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crepeau, Phil" <[log in to unmask]>
Subject: Re: Solder Joint Mechanical Stress
X-To: [log in to unmask]
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hi,
this reminds me of a situation we were in several years ago when we were using pin grid arrays. the customer required that we microsection the first, middle, and last assemblies coming out of the wave solder machine, so that we could verify that we were getting acceptable solder fillets on both sides of the pga plated-through-holes. i suggested that our lot size should be three. this would enable us to assemble these boards forever. unfortunately, no one here thought that was a good idea.
what you could do is ship your assemblies with the bga's sheared off, but with the heat sinks still attached to the bga's. this would enable you to build these parts forever. i've got a feeling though that this wouldn't be acceptable, but it would get the attention of your customer.
phil
-----Original Message-----
From: Carl Ray [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 8:17 AM
To: [log in to unmask]
Subject: [TN] Solder Joint Mechanical Stress
I have a customer who is requiring that I verify the bond strength of a
heat sink that is glued to the top of PBGA. The customer has supplied me
with a torque tool to verify the strength of the bond between the heat
sink and the BGA. I have concerns that testing the strength of the glue
bond may affect the solder joint reliability of the BGA. The tool
supplied by the customer is set at 20 in pound torque. Any ideas how I
can "change" my customer mind?
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Date: Wed, 13 Mar 2002 12:14:15 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Charles McMahon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Charles McMahon <[log in to unmask]>
Subject: Re: Solder Joint Mechanical Stress
X-To: Carl Ray <[log in to unmask]>
MIME-Version: 1.0
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Carl:
If the customer is not adamant at testing a finished assembly, can you
suggest using a sample board as
a test platform and assembling the HEAT SINK on it for the boind
strength test?
My bet is you may have already reviewed this option but thoght it worth
mentioning.
Carl Ray wrote:
>I have a customer who is requiring that I verify the bond strength of a
>heat sink that is glued to the top of PBGA. The customer has supplied me
>with a torque tool to verify the strength of the bond between the heat
>sink and the BGA. I have concerns that testing the strength of the glue
>bond may affect the solder joint reliability of the BGA. The tool
>supplied by the customer is set at 20 in pound torque. Any ideas how I
>can "change" my customer mind?
>
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Date: Wed, 13 Mar 2002 11:18:34 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Soft Beam Soldering
X-To: Howard Watson <[log in to unmask]>
Mime-Version: 1.0
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we have look at it live and video, looks good wish we could persue it more. Have
them do some actual production with it for you before you buy. They were
prepaired to do some contract work if we wanted. Good luck!
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Date: Wed, 13 Mar 2002 11:21:21 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
Mime-Version: 1.0
Content-Type: multipart/mixed; boundary="=_D5886B84.22432EDD"
This is a MIME message. If you are reading this text, you may want to
consider changing to a mail reader or gateway that understands how to
properly handle MIME multipart messages.
--=_D5886B84.22432EDD
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: quoted-printable
Content-Disposition: inline
Moon man,=20
If I got you a silver spoon you would find something about the silver =
plating to bitch about. I have decided to go through the extra effort and =
I got you a Wendy's spork. =20
Kathy=20
--=_D5886B84.22432EDD
Content-Type: text/plain
Content-Disposition: attachment; filename="TEXT.htm"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=Content-Type content="text/html; charset=iso-8859-1">
<META content="MSHTML 6.00.2713.1100" name=GENERATOR></HEAD>
<BODY style="MARGIN-TOP: 2px; FONT: 10pt MS Sans Serif; MARGIN-LEFT: 2px">
<DIV>Moon man, </DIV>
<DIV> </DIV>
<DIV>If I got you a silver spoon you would find something about the silver
plating to bitch about. I have decided to go through the extra effort and
I got you a Wendy's spork. </DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
--=_D5886B84.22432EDD--
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Date: Wed, 13 Mar 2002 12:30:01 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
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Subject: Re: Earls pics are up, and a question...
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Moon,
I'm afraid I have to agree, only I put it a little more simply; it's the
Gold.
The root causation is the thing books are made of... and the bottom line it
could be as simple as Operator Error. Am I over simplifying or is it
becoming clear that HASL or any solder coat just won't work, the OSPs tend to
puddle in fine geometry's (like BGA lands), folks aren't real secure with Tin
(although I think its very nice), and ENIG is unpredictable. Hence, I like
Silver.
Please, someone correct me on this conjecture.
And by-the-way, Moonman this is excellent insight and I thank you for the
input. I sincerely do empathize with your plight. My folks got back to me
with the standard ENIG answers I expected; watch your phos, keep superb
records, be a process zealot, etc. We have not had a problem with ENIG
(knock on wood), but is that a ticking sound I hear?
Boston Brad
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Date: Wed, 13 Mar 2002 12:35:55 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
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Subject: Re: Solder Joint Mechanical Stress
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Have them sign a liability statement pursuant to that one component. Then,
sell them on your well founded concern and move them to verifying the process
on a sample. This sounds like the ole "this is the best conclusive test,
although it has the propensity to kill the patients." Sincerely do the test
with a BGA in hand, not at the product level.
Good luck,
Brad
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Date: Wed, 13 Mar 2002 11:41:45 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Cleaning Baskets
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Hi Al! Check this website - these folks make a nice basket(s) in a variety
of shapes:
www.artcraftwelding.com
Dave Hillman
Rockwell Collins
[log in to unmask]
[log in to unmask]@ipc.org> on 03/13/2002 09:18:49 AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to [log in to unmask]
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: [TN] Cleaning Baskets
Hello Technet,
I'm looking for alternative-style baskets / methods to prevent damage (rips
parts off) double-sided boards. I thinking of having our st.st. baskets
coated with plastic.
Background: I usually place the boards directly on the in-line cleaner's
conveyor (which also has a top/hold-down conveyor). I had a board that we
thought may get damaged without placing in a basket (24" x 20" x 1.75" with
1/4" mesh). However, any slight movement - either during loading/unloading
or cleaning - rips off the higher profile smt parts.
Any suggestions?
Thanks in advance for your help,
Al Kreplick
Sr. Mfg. Eng.
Teradyne, Inc.
500 Riverpark Drive
North Reading, MA 01864
Tel: 978-370-1726
Fax: 734-661-5352
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Date: Wed, 13 Mar 2002 10:13:34 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Michael Meltzer <[log in to unmask]>
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Date: Wed, 13 Mar 2002 13:17:38 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: Solder Joint Mechanical Stress
X-To: Carl Ray <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
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Sounds like a crazy idea to me, 20 inch-pounds sounds like a heck of a lot.
I wonder what the bond strength between the copper and the laminate would
be. The land pattern make a fairly small surface area. Even if you don't rip
the component of the lands you might rip the lands off the board.
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Carl Ray
> Sent: Wednesday, March 13, 2002 11:17 AM
> To: [log in to unmask]
> Subject: [TN] Solder Joint Mechanical Stress
>
>
> I have a customer who is requiring that I verify the bond strength of a
> heat sink that is glued to the top of PBGA. The customer has supplied me
> with a torque tool to verify the strength of the bond between the heat
> sink and the BGA. I have concerns that testing the strength of the glue
> bond may affect the solder joint reliability of the BGA. The tool
> supplied by the customer is set at 20 in pound torque. Any ideas how I
> can "change" my customer mind?
>
> ------------------------------------------------------------------
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Date: Wed, 13 Mar 2002 12:18:07 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
ritht on and boogie on bb
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Date: Wed, 13 Mar 2002 12:20:25 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: Kathy Kuhlow <[log in to unmask]>
Kathy,
I will accept nothing less from you than silver. You promised and your
remember. Wendy's is like my parts without balls.
MoonMan
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Date: Wed, 13 Mar 2002 13:29:27 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bill Raymond <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bill Raymond <[log in to unmask]>
Subject: Re: Glue Dot Size
X-To: "Krug, Dick" <[log in to unmask]>
In-Reply-To: <[log in to unmask] >
Mime-Version: 1.0
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We stencil print with 8 mil thick stainless steel stencils... 0603 = 20 mil
dia and 0805 = 28 mil dia
bill...
At 11:54 AM 03/13/2002 -0500, you wrote:
>We dispense glue using a positive displacement pump.
>Dot diameter for 0603's is nominally 20 mils.
>Dot diameter for 0805's is nominally 28 mils.
>Dick Krug
>Sypris Electronics
>
>-----Original Message-----
>From: Vinit Verma [mailto:[log in to unmask]]
>Sent: Wednesday, March 13, 2002 7:19 AM
>To: [log in to unmask]
>Subject: [TN] Glue Dot Size
>
>
>Hi All,
>
>Has anyone ever worked with the Pump Printing Stencil for printing glue on
>pre-inserted PCBs?? This stencil is developed by DEK but I'm not too sure of
>how it works? Any experiences?
>
>Also would be too kind if somebody could tell me the glue size requirement
>for 0603 and 0805 components?
>
>Thanks in advance
>
>Regards
>Vinit Verma
>
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Date: Wed, 13 Mar 2002 11:34:36 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Carl VanWormer <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Carl VanWormer <[log in to unmask]>
Subject: Soldering crimp connectors
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
We have a customer who insists that we solder our crimp connectors (after
crimping). He has had corrosion problems and is convinced that this is the
best solution. Is this a good thing? Are there any downsides we should
point out to help educate him?
Carl Van Wormer
Cipher Systems
1815 NW 169th Place, Suite 5010
Beaverton, OR 97006
Phone (503)-617-7447 Fax (503)-617-6550
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Date: Wed, 13 Mar 2002 13:53:06 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, jim <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: jim <[log in to unmask]>
Subject: Re: Cleaning Baskets
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Checkout www.gscusa.net 972-494-1911. We make a variety of baskets with all
types of custom configurations.
Chcuk Smith
----- Original Message -----
From: <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, March 13, 2002 11:41 AM
Subject: Re: [TN] Cleaning Baskets
> Hi Al! Check this website - these folks make a nice basket(s) in a variety
> of shapes:
>
> www.artcraftwelding.com
>
> Dave Hillman
> Rockwell Collins
> [log in to unmask]
>
>
>
>
> [log in to unmask]@ipc.org> on 03/13/2002 09:18:49 AM
>
> Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please
respond
> to [log in to unmask]
>
> Sent by: TechNet <[log in to unmask]>
>
>
> To: [log in to unmask]
> cc:
>
> Subject: [TN] Cleaning Baskets
>
>
> Hello Technet,
>
> I'm looking for alternative-style baskets / methods to prevent damage
(rips
> parts off) double-sided boards. I thinking of having our st.st. baskets
> coated with plastic.
>
> Background: I usually place the boards directly on the in-line cleaner's
> conveyor (which also has a top/hold-down conveyor). I had a board that
we
> thought may get damaged without placing in a basket (24" x 20" x 1.75"
with
> 1/4" mesh). However, any slight movement - either during
loading/unloading
> or cleaning - rips off the higher profile smt parts.
>
> Any suggestions?
>
> Thanks in advance for your help,
>
>
> Al Kreplick
> Sr. Mfg. Eng.
> Teradyne, Inc.
> 500 Riverpark Drive
> North Reading, MA 01864
> Tel: 978-370-1726
> Fax: 734-661-5352
>
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Date: Wed, 13 Mar 2002 13:56:10 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Romero, David [MMI/BOU]" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Romero, David [MMI/BOU]" <[log in to unmask]>
Subject: Re: Soldering crimp connectors
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Well any time you introduce additional metals to a connection you are
actually increasing your risk of galvanic corrosion. Depending on the
design of the connector in question there are probably some purely
mechanical concerns as well. The connector manufacturer will almost
certainly have recommended uses. They would probably be your best bet. It
might end up just being a mechanical tolerance or malleability issue.
Good Luck
-----Original Message-----
From: Carl VanWormer [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 12:35 PM
To: [log in to unmask]
Subject: [TN] Soldering crimp connectors
We have a customer who insists that we solder our crimp connectors (after
crimping). He has had corrosion problems and is convinced that this is the
best solution. Is this a good thing? Are there any downsides we should
point out to help educate him?
Carl Van Wormer
Cipher Systems
1815 NW 169th Place, Suite 5010
Beaverton, OR 97006
Phone (503)-617-7447 Fax (503)-617-6550
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Date: Wed, 13 Mar 2002 15:04:55 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jeff Ferry <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jeff Ferry <[log in to unmask]>
Subject: Test Method/Qual Report
X-cc: "[log in to unmask]" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Technetters,
Looking for a report titled "Performance Test Methods and Qualification
Requirements for Surface Mount Solder Attachments". Sounds like an IPC
document but can't track it down. Anyone know where I can look?
Thanks,
Jeff Ferry
CEO
Circuit Technology Center, Inc.
www.circuittechctr.com
[log in to unmask]
978-374-5000
Sign up for our Free E-mail Newsletter at:
www.circuittechctr.com/general/free_email.htm
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Date: Wed, 13 Mar 2002 15:17:24 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Phil Nutting <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Nutting <[log in to unmask]>
Subject: Re: Soldering crimp connectors
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Carl,
This ought to stir the pot!
In my thirty plus years in this business I've seen arguments both ways.
In my current life we will solder after crimping lugs which carry high =
current.
An argument could also be made for using a moisture barrier like =
"No-alox" as used in electrical wiring with aluminum conductors.
My late father-in-law used Vaseline on all the electrical connections =
for his comm-nav gear on his motorboat to prevent the salt from =
corroding the connections.
The point here is there may be a good reason for any of the combinations =
listed here or by my peers.
Just one man's opinion.
Phil Nutting
-----Original Message-----
From: Carl VanWormer [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 2:35 PM
To: [log in to unmask]
Subject: [TN] Soldering crimp connectors
We have a customer who insists that we solder our crimp connectors =
(after
crimping). He has had corrosion problems and is convinced that this is =
the
best solution. Is this a good thing? Are there any downsides we should
point out to help educate him?
Carl Van Wormer
Cipher Systems
1815 NW 169th Place, Suite 5010
Beaverton, OR 97006
Phone (503)-617-7447 Fax (503)-617-6550
-------------------------------------------------------------------------=
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in
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> E-mail Archives
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additional
information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 =
ext.5315
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--------
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Date: Wed, 13 Mar 2002 15:23:23 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
James TerVeen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: James TerVeen <[log in to unmask]>
Subject: Re: Soldering crimp connectors
X-To: Carl VanWormer <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
You know it just sounds like a great place for flux entrapment and all
kinds of nasty stuff that will happen. As far as I have ever seen if you
have crimp connectors then that is what you do. As for corrosion, it
seems like he would have more with soldered wires as well as cracking
problems. I think the best place to start is at the connector
manufacturer they should give all the reasons not to solder
Carl VanWormer
<[log in to unmask] To: [log in to unmask]
OM> cc:
Sent by: Subject: [TN] Soldering crimp connectors
TechNet
<[log in to unmask]
RG>
03/13/02 02:34
PM
Please respond
to "TechNet
E-Mail
Forum.";
Please respond
to Carl
VanWormer
We have a customer who insists that we solder our crimp connectors (after
crimping). He has had corrosion problems and is convinced that this is the
best solution. Is this a good thing? Are there any downsides we should
point out to help educate him?
Carl Van Wormer
Cipher Systems
1815 NW 169th Place, Suite 5010
Beaverton, OR 97006
Phone (503)-617-7447 Fax (503)-617-6550
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Date: Wed, 13 Mar 2002 14:22:33 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Test Method/Qual Report
X-To: Jeff Ferry <[log in to unmask]>
Jeff,
It's not my place but Sir Werner will be very displeased with you and me
concerning 9701.
Earl
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Date: Wed, 13 Mar 2002 15:34:32 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jeff Ferry <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jeff Ferry <[log in to unmask]>
Subject: Re: Test Method/Qual Report
X-To: Earl Moon <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Earl,
Oops. Should have looked a bit harder. There it is staring me in the face.
Humble apologies to Werner.
Jeff
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 3:23 PM
To: [log in to unmask]; Jeff Ferry
Subject: Re: Test Method/Qual Report
Jeff,
It's not my place but Sir Werner will be very displeased with you and me
concerning 9701.
Earl
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Date: Wed, 13 Mar 2002 15:19:41 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Gary Camac <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Gary Camac <[log in to unmask]>
Organization: Dickey-john Corp.
Subject: Vertical Storage
MIME-version: 1.0
Content-type: text/plain; charset=us-ascii
Content-transfer-encoding: 7BIT
Good afternoon everyone,
Can anyone give me the name of a company that markets used vertical storage carousels.
Thanks in advance
Gary Camac
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Date: Wed, 13 Mar 2002 15:22:24 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ted Tontis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ted Tontis <[log in to unmask]>
Subject: South East Milwaukee designers chapter's e-mail
X-To: "IPC Designers council (E-mail)" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
The Milwaukee designers chapter now has an e-mail forum. The
instruction are the same as the rest of IPC's forum's.
Example for subscribing:
TO: [log in to unmask]
SUBJECT:
MESSAGE: subscribe [log in to unmask] Joseph H. Smith
Posting to the forum:
To send a message to all the people currently subscribed to the forum, just
send mail to [log in to unmask] .
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Ted Tontis C.I.D.
Engage Networks, Inc.
1320 N. Dr. Martin Luther King Jr. Drive
River Level
Milwaukee, WI 53212
PH 414-918-4267
FX 414-273-7601
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Date: Wed, 13 Mar 2002 16:44:28 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Crain, Bob" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crain, Bob" <[log in to unmask]>
Subject: High Rel BGA Guidelines
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
We may soon be adding BGAs to our approved parts list for some programs. We
use polyamide boards and require electrical test under vibration and thermal
cycling. What are the most important factors to address to maximize our
success?
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Date: Wed, 13 Mar 2002 15:50:48 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Soldering crimp connectors
X-To: [log in to unmask]
MIME-Version: 1.0
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Well,
If you solder in addition to crimping:
1. You add cost and tick off the operators
2. If you are soldering to stranded wire, you will change the flexibility
of the connection because, for a short distance, you change flexible
stranded wire to solid wire.
3. Unless you are soldering using pure wire solder, i.e. no flux, you are
going to get flux wicking up under the wire. If it is a high solids rosin
(good ol RMA), then you might or might not have corrosion. You WILL have a
visible residue that you cannot clean. So if you normally the flux used in
hand soldering, you ain't a gonna get it out. Only dilute it and force it
farther in. If you are soldering with pure solder wire, then you probably
have a very bad solder connection anyway.
4. If you are using a low solids flux, you must still be prepared to
answer questions about green residues. The flux activators over time may
result in a greenish residue that is not exactly corrosion. Karen
Tellefsen of Alpha Metals did an excellent paper on green residues on
circuit boards. Not all are detrimental.
5. On the other hand, you do get a better electrical connection.
6. On yet another hand (a little known side effect of Mountain Dew), one
of our experienced engineers has been working with time domain
reflectometry, using it to locate faults in rigid and semi-rigid co-ax, and
he showed me some interesting graphs the other day. Blobs of solder in a
connector changed the TDR characteristics. With blob in place there was
one spectrum and with solder blob removed, you have a different spectrum.
So, if you are working with RF signals, the use of solder in addition to
crimp may alter the signal transmission characteristics.
Was this what you were looking for?
Doug Pauls
Rockwell Collins
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Date: Wed, 13 Mar 2002 16:57:13 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: Test Method/Qual Report
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Hey, Jeff, IPC-9701
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Jeff Ferry
> Sent: Wednesday, March 13, 2002 3:05 PM
> To: [log in to unmask]
> Subject: [TN] Test Method/Qual Report
>
>
> Technetters,
>
> Looking for a report titled "Performance Test Methods and Qualification
> Requirements for Surface Mount Solder Attachments". Sounds like an IPC
> document but can't track it down. Anyone know where I can look?
>
> Thanks,
>
> Jeff Ferry
> CEO
> Circuit Technology Center, Inc.
> www.circuittechctr.com
> [log in to unmask]
> 978-374-5000
>
> Sign up for our Free E-mail Newsletter at:
> www.circuittechctr.com/general/free_email.htm
>
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Date: Wed, 13 Mar 2002 16:07:25 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
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Jeff,
I think you are looking for IPC-9701.
Doug
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Date: Wed, 13 Mar 2002 14:14:31 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: Re: Soldering crimp connectors
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Carl,
It has been my experience that soldered crimp connectors will fail with
alarming regularity. This comes from working as sustaining engineer in a
tech center that delt with all field failures of medical electronics test
equipment. We proved, with actual data, that *not* soldering crimp
connectors *reduced returns*. If the customer insists on a solder connection
use a connector designed for that application i.e. exceptionally good strain
relief above the soldered connection, a "blow hole" to eliminate trapped
flux, etc.
Just my 2 cents worth,
Dan
P.S.: How much is 2 cents worth after inflation?
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Date: Wed, 13 Mar 2002 16:09:15 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: High Rel BGA Guidelines
X-To: [log in to unmask]
luck
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Date: Wed, 13 Mar 2002 14:38:22 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian McCrory <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian McCrory <[log in to unmask]>
Organization: Delsen Testing Laboratories, Inc.
Subject: Re: Test Method/Qual Report
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Jeff Ferry wrote:
> Technetters,
>
> Looking for a report titled "Performance Test Methods and Qualification
> Requirements for Surface Mount Solder Attachments". Sounds like an IPC
> document but can't track it down. Anyone know where I can look?
>
> Thanks,
>
> Jeff Ferry
> CEO
> Circuit Technology Center, Inc.
> www.circuittechctr.com
> [log in to unmask]
> 978-374-5000
>
> Sign up for our Free E-mail Newsletter at:
> www.circuittechctr.com/general/free_email.htm
Jeff,
There is an IPC-9701, "Qualification and Performance Test Methods for Surface Mount Solder Attachments"
that is listed as published/pending ANSI approval on the "Status of IPC Standardization Programs" on the
IPC website.
--
Brian McCrory
Delsen Testing Laboratories, Inc.
1024 Grand Central Ave.
Glendale, CA 91201
Phone: (818) 247-4106
FAX: (818) 247-4537
email: [log in to unmask]
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Date: Wed, 13 Mar 2002 19:52:48 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Becerra Alejandro <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Becerra Alejandro <[log in to unmask]>
Subject: Guidelines for TH components
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Hello to All,
We are interested in guidelines for though hole components,
specifically the height of the terminals (Distance that the terminals
extends away the board).
We are also interested in guidelines for lead to hole ratio.
Regards,
Alejandro Becerra
Thomson multimedia Inc.
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<P><FONT SIZE=2 FACE="Arial">Hello to All,</FONT>
</P>
<P><FONT SIZE=2 FACE="Arial">We are interested in guidelines for though hole components,</FONT>
<BR><FONT SIZE=2 FACE="Arial">specifically the height of the terminals (Distance that the terminals extends away the board).</FONT>
<BR><FONT SIZE=2 FACE="Arial">We are also interested in guidelines for lead to hole ratio.</FONT>
</P>
<BR>
<P><FONT SIZE=2 FACE="Arial">Regards,</FONT>
</P>
<P><FONT SIZE=2 FACE="Arial">Alejandro Becerra</FONT>
<BR><FONT SIZE=2 FACE="Arial">Thomson multimedia Inc.</FONT>
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Date: Wed, 13 Mar 2002 18:09:23 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: Earl Moon <[log in to unmask]>
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Earl,
Take/shear/rip/pop/jimmy/remove some of the solder balls that are still attached and compare.
Note the amount of stress/force it required to remove them!
David A. Douthit
Manager
LoCan LLC
Earl Moon wrote:
> Jim,
>
> BGA's used to be my best friend, except for Arleen Weinberger and other
> ladies of extreme beauty and brains. Now they are a bain, if tha's a proper
> term. It's like the whole BGA world has gone to hell. Even board suppliers
> are starting to suck who once had my total faith and confidence based on
> constant evaluation, re-evaluation, and qualification.
>
> At least now I have a compadre in this mess. Thanks for sharing the gief but
> I'm honestly stumped but for an undying dedication to gettin this damn thing
> resolved. The TI thing was bad enough but now another major supplier adds to
> the MESS.
>
> Did you give us your paper and/or its location? I'm reading all I can, OVER
> AND OVER AGAIN, notwithstanding posting my brains and guts out on this site.
> Hell, even Sir Werner and his cohorts can't do much. It has to be up to the
> suppliers to come forth. Thought I was working concurrently with TI. Now I'm
> not sure again, and haven't even begun talking with the other major supplier
> with whom my last pics are associated.
>
> Your statement about "Every time there was a component failure, it was
> attributed to an open BGA solder joint" sure used to ring true but was
> resolved, for a time. It seems now to be coming back.
>
> Sorry about your, hopefully healed black eye, but should not have been the
> case. However, some should suffer such a fate based on your thoughts about
> how the missing ball attachment area looked compared to mine. This solder
> "remnant" crap is exactly my problem and others soon to experience it. All
> other surface conditions point to some process management inadequacies and
> someone knows what they are and what are the failure modes/mechanisms. Just
> looks like unsolderable surfaces to me and whatever happened to the IMC
> layer whether too thick, too thin, or just plane way to oxidized.
>
> My progress is limited to a very small company resource capability. The
> company has spent way too much time and money doing minimal analysis. Who
> the hell could afford to do more anyway. Like Sir Werner says, this crap is
> just being thrown over the fence for all us ROOKIES to suck through a garden
> hose. I don't do that.
>
> I believe you're right about the nickel gold thing. What else could it be.
> TI even admitted one of its suppliers was replaced to do a better job. That
> hasn't been proven yet either. Maybe Friday it will when we get our first
> assemblies. We'll ge to the bottom, and I do mean bottom, of this soon but
> maybe not soon enough for some.
>
> Thanks JM for some outstanding insights. Finally feels a bit, though sadly,
> comforting having someone else having gone through this.
>
> Earl
>
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Date: Wed, 13 Mar 2002 19:04:25 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jack Crawford <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jack Crawford <[log in to unmask]>
Subject: Re: Test Method/Qual Report
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Pleased to assist, Jeff. It's a brand new document IPC-9701; here's some =
info about it. There's also been some discussion about it you'll probably =
find in the TechNet archives. Jack
IPC-9701
Performance Test Methods and Qualification Requirements for Surface Mount =
Solder Attachments=20
Provides specific test methods to evaluate the performance and reliability =
of surface mount solder attachments of electronic assemblies. Establishes =
levels of performance and reliability of the solder attachments of surface =
mount devices to rigid, flexible and rigid-flex circuit structures. When =
used with IPC-SM-785, it provides an understanding of the physics of SMT =
solder joint failure and an approximate means of relating performance =
tests results to the reliability of solder attachments in their use =
environments. 24 pages. Released January 2002.
HARD COPY: $40, ELECTRONIC $30 but IPC members get 50% discount on these =
prices.
>>> [log in to unmask] 03/13/02 02:04PM >>>
Technetters,
Looking for a report titled "Performance Test Methods and Qualification
Requirements for Surface Mount Solder Attachments". Sounds like an IPC
document but can't track it down. Anyone know where I can look?
Thanks,
Jeff Ferry
CEO
Circuit Technology Center, Inc.
www.circuittechctr.com
[log in to unmask]
978-374-5000
Sign up for our Free E-mail Newsletter at:
www.circuittechctr.com/general/free_email.htm
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>
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<BODY style=3D"MARGIN-TOP: 2px; FONT: 8pt MS Sans Serif; MARGIN-LEFT: =
2px">
<DIV><FONT size=3D1>Pleased to assist, Jeff. It's a brand new =
document=20
IPC-9701; here's some info about it. There's also been some =
discussion=20
about it you'll probably find in the TechNet archives. Jack</FONT></D=
IV>
<DIV><FONT size=3D1></FONT> </DIV>
<DIV>IPC-9701</DIV>
<DIV><BR>Performance Test Methods and Qualification Requirements for =
Surface=20
Mount Solder Attachments </DIV>
<DIV> </DIV>
<DIV>Provides specific test methods to evaluate the performance and =
reliability=20
of surface mount solder attachments of electronic assemblies. Establishes =
levels=20
of performance and reliability of the solder attachments of surface =
mount=20
devices to rigid, flexible and rigid-flex circuit structures. When used =
with=20
IPC-SM-785, it provides an understanding of the physics of SMT solder =
joint=20
failure and an approximate means of relating performance tests results to =
the=20
reliability of solder attachments in their use environments. 24 pages. =
Released=20
January 2002.</DIV>
<DIV><BR>HARD COPY: $40, ELECTRONIC $30 but IPC members get 50% discount =
on=20
these prices.</DIV>
<DIV> </DIV>
<DIV><BR><BR>>>> [log in to unmask] 03/13/02 02:04PM=20
>>><BR>Technetters,<BR><BR>Looking for a report titled "Performanc=
e=20
Test Methods and Qualification<BR>Requirements for Surface Mount Solder=20
Attachments". Sounds like an IPC<BR>document but can't track it down. =
Anyone=20
know where I can look?<BR><BR>Thanks,<BR><BR>Jeff Ferry<BR>CEO<BR>Circuit=
=20
Technology Center,=20
Inc.<BR>www.circuittechctr.com<BR>[log in to unmask]<BR>978-374-5000=
<BR><BR>Sign=20
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Date: Wed, 13 Mar 2002 18:25:37 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: Soldering crimp connectors
X-To: Carl VanWormer <[log in to unmask]>
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Carl,
"It depends"!!!!!!
1. High current crimped connections would become more reliable (particularly in harsh conditions).
Failures can be very catastrophic.
2. Fold over/upset crimps can become more reliable with solder (particularly in harsh conditions).
3. Soldering 3 or 4 sided compression crimps would cause more problems than they would solve.
These are general rules of thumb so be careful and evaluate the situation carefully
This is from 35+ plus years of dealing with field failures.
David A. Douthit
Manager
LoCan LLC
Carl VanWormer wrote:
> We have a customer who insists that we solder our crimp connectors (after
> crimping). He has had corrosion problems and is convinced that this is the
> best solution. Is this a good thing? Are there any downsides we should
> point out to help educate him?
>
> Carl Van Wormer
> Cipher Systems
> 1815 NW 169th Place, Suite 5010
> Beaverton, OR 97006
> Phone (503)-617-7447 Fax (503)-617-6550
>
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Date: Wed, 13 Mar 2002 18:29:04 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: High Rel BGA Guidelines
X-To: "Crain, Bob" <[log in to unmask]>
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Bob,
What's the difference between polyimide and polyamide?
David A. Douthit
Manager
LoCan LLC
"Crain, Bob" wrote:
> We may soon be adding BGAs to our approved parts list for some programs. We
> use polyamide boards and require electrical test under vibration and thermal
> cycling. What are the most important factors to address to maximize our
> success?
>
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Date: Wed, 13 Mar 2002 20:01:41 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Becerra Alejandro <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Becerra Alejandro <[log in to unmask]>
Subject: Re: Glue Dot Size (missing parts)
X-To: "Krug, Dick" <[log in to unmask]>
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We are having issues with 0603 components attached with glue (Glue printed
with Pump printing)
that are being fallen in the wave soldering equipment.
The average dot size that we are having in these components is 0.025" and
the average torque value is 1 N-cm.
What could be possible causes for this issue?
Regards,
Alejandro Becerra
Thomson multimedia Inc
-----Original Message-----
From: Krug, Dick [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 9:54 AM
To: [log in to unmask]
Subject: Re: [TN] Glue Dot Size
We dispense glue using a positive displacement pump.
Dot diameter for 0603's is nominally 20 mils.
Dot diameter for 0805's is nominally 28 mils.
Dick Krug
Sypris Electronics
-----Original Message-----
From: Vinit Verma [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 7:19 AM
To: [log in to unmask]
Subject: [TN] Glue Dot Size
Hi All,
Has anyone ever worked with the Pump Printing Stencil for printing glue on
pre-inserted PCBs?? This stencil is developed by DEK but I'm not too sure of
how it works? Any experiences?
Also would be too kind if somebody could tell me the glue size requirement
for 0603 and 0805 components?
Thanks in advance
Regards
Vinit Verma
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charset=3Diso-8859-1">
<META NAME=3D"Generator" CONTENT=3D"MS Exchange Server version =
5.5.2653.12">
<TITLE>RE: [TN] Glue Dot Size (missing parts)</TITLE>
</HEAD>
<BODY>
<BR>
<P><FONT SIZE=3D2>We are having issues with 0603 components attached =
with glue (Glue printed with Pump printing)</FONT>
<BR><FONT SIZE=3D2>that are being fallen in the wave soldering =
equipment.</FONT>
<BR><FONT SIZE=3D2>The average dot size that we are having in these =
components is 0.025" and the average torque value is 1 =
N-cm.</FONT>
<BR><FONT SIZE=3D2>What could be possible causes for this issue?</FONT>
</P>
<P><FONT SIZE=3D2>Regards,</FONT>
</P>
<P><FONT SIZE=3D2>Alejandro Becerra</FONT>
<BR><FONT SIZE=3D2>Thomson multimedia Inc</FONT>
</P>
<BR>
<BR>
<BR>
<P><FONT SIZE=3D2>-----Original Message-----</FONT>
<BR><FONT SIZE=3D2>From: Krug, Dick [<A =
HREF=3D"mailto:[log in to unmask]">mailto:[log in to unmask]</A>]</F=
ONT>
<BR><FONT SIZE=3D2>Sent: Wednesday, March 13, 2002 9:54 AM</FONT>
<BR><FONT SIZE=3D2>To: [log in to unmask]</FONT>
<BR><FONT SIZE=3D2>Subject: Re: [TN] Glue Dot Size</FONT>
</P>
<BR>
<P><FONT SIZE=3D2>We dispense glue using a positive displacement =
pump.</FONT>
<BR><FONT SIZE=3D2>Dot diameter for 0603's is nominally 20 mils.</FONT>
<BR><FONT SIZE=3D2>Dot diameter for 0805's is nominally 28 mils.</FONT>
<BR><FONT SIZE=3D2>Dick Krug</FONT>
<BR><FONT SIZE=3D2>Sypris Electronics</FONT>
</P>
<P><FONT SIZE=3D2>-----Original Message-----</FONT>
<BR><FONT SIZE=3D2>From: Vinit Verma [<A =
HREF=3D"mailto:[log in to unmask]">mailto:[log in to unmask]
XTRONICS.COM</A>]</FONT>
<BR><FONT SIZE=3D2>Sent: Wednesday, March 13, 2002 7:19 AM</FONT>
<BR><FONT SIZE=3D2>To: [log in to unmask]</FONT>
<BR><FONT SIZE=3D2>Subject: [TN] Glue Dot Size</FONT>
</P>
<BR>
<P><FONT SIZE=3D2>Hi All,</FONT>
</P>
<P><FONT SIZE=3D2>Has anyone ever worked with the Pump Printing Stencil =
for printing glue on</FONT>
<BR><FONT SIZE=3D2>pre-inserted PCBs?? This stencil is developed by DEK =
but I'm not too sure of</FONT>
<BR><FONT SIZE=3D2>how it works? Any experiences?</FONT>
</P>
<P><FONT SIZE=3D2>Also would be too kind if somebody could tell me the =
glue size requirement</FONT>
<BR><FONT SIZE=3D2>for 0603 and 0805 components?</FONT>
</P>
<P><FONT SIZE=3D2>Thanks in advance</FONT>
</P>
<P><FONT SIZE=3D2>Regards</FONT>
<BR><FONT SIZE=3D2>Vinit Verma</FONT>
</P>
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Date: Wed, 13 Mar 2002 21:05:15 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Glue Dot Size (missing parts)
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_152.a67aad0.29c15f5b_boundary"
--part1_152.a67aad0.29c15f5b_boundary
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Hi Alejandro!
Are you SURE the components are being lost in the wave? Are you SURE they
were there just prior to putting the assembly in the conveyer into the wave?
From past experience, that was an assumption that was made because the
components were there after curing in the oven at surface mount, and then
missing after they came out of wave solder. Truth of the matter was that they
were knocked off during the handling during PTH stuffing, pre-wave masking,
prior to actually waving the assembly...there usually isn't any sort of
inspection step to ensure all the bottomside SMT components are there in
between bottomside SMT inspection until after wave solder. So it is sometimes
missed that the components were knocked off from all the handling that gets
done prior to wave.
Problem is, when most production people hear the word "epoxy" (as in epoxied
SMT components on the bottomside of a board), they equate that to the two-ton
stuff that you would use to repair a chair leg with...not understanding that
the epoxy that is used for SMT components has very little strength, and don't
handle the assemblies with the care that they should...
My two-cents (with a coupon)..hehehe
-Steve Gregory-
> We are having issues with 0603 components attached with glue (Glue printed
> with Pump printing)
> that are being fallen in the wave soldering equipment.
> The average dot size that we are having in these components is 0.025" and
> the average torque value is 1 N-cm.
> What could be possible causes for this issue?
>
> Regards,
>
> Alejandro Becerra
> Thomson multimedia Inc
>
>
--part1_152.a67aad0.29c15f5b_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Alejandro!<BR>
<BR>
Are you SURE the components are being lost in the wave? Are you SURE they were there just prior to putting the assembly in the conveyer into the wave?<BR>
<BR>
From past experience, that was an assumption that was made because the components were there after curing in the oven at surface mount, and then missing after they came out of wave solder. Truth of the matter was that they were knocked off during the handling during PTH stuffing, pre-wave masking, prior to actually waving the assembly...there usually isn't any sort of inspection step to ensure all the bottomside SMT components are there in between bottomside SMT inspection until after wave solder. So it is sometimes missed that the components were knocked off from all the handling that gets done prior to wave.<BR>
<BR>
Problem is, when most production people hear the word "epoxy" (as in epoxied SMT components on the bottomside of a board), they equate that to the two-ton stuff that you would use to repair a chair leg with...not understanding that the epoxy that is used for SMT components has very little strength, and don't handle the assemblies with the care that they should...<BR>
<BR>
My two-cents (with a coupon)..hehehe<BR>
<BR>
-Steve Gregory-<BR>
<BR>
<BR>
<BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">We are having issues with 0603 components attached with glue (Glue printed with Pump printing)</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"> <BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">that are being fallen in the wave soldering equipment.</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"> <BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">The average dot size that we are having in these components is 0.025" and the average torque value is 1 N-cm.</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"> <BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">What could be possible causes for this issue?</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"> <BR>
<BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">Regards,</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"> <BR>
<BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">Alejandro Becerra</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"> <BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">Thomson multimedia Inc</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"> <BR>
<BR>
</BLOCKQUOTE><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT></HTML>
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Date: Thu, 14 Mar 2002 10:08:33 +0800
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Date: Wed, 13 Mar 2002 21:47:59 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Guidelines for TH components
MIME-Version: 1.0
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IPC-2222 IPC-2221 have very good tech data, dedicate time for though reading.
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Date: Thu, 14 Mar 2002 11:14:09 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Earls pics are up, and a question...
X-To: "Furrow, Robert Gordon (Bob)" <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
From what I've read, the problem doesn't look like black pad since the
balls were originally stuck to the device. Black pad would cause no wetting
or improper soldering. The pics show tiny areas distributed evenly across
the contact surface where complete alloying (i.e. solder jointing) has
taken place, but the largest proportion of the area is intermetallic
compound where the fracture has occurred. Strangely, most proper alloying,
usually seems to take place around the perimeter of the join, but I don't
see that here. Don't understand the phenomenon, so can't offer scientific
explanation, but I offer is as a snippet of info for your consideration.
Earl's problem looks very similar to one that our old friend Ingemar had at
Eriksson a while back. He produced a large paper on the investigation they
carried out - not 100% tidy, but very interesting reading indeed. One of
his conclusions was that the Nickel plating bath was maybe too high in
phosphor, causing weak or brittle Nickel layer. Another was Nickel
passivation, [possibly caused by the substrate drying out between plating
processes, or, as has been suggested, by too-thin a gold layer].
Given the commercial concerns of component manufacturers to offer product
at the cheapest prices, it could be that they are extending the life of
their plating baths too far in an attempt to keeps costs down. Earl, maybe
you ought to see how frequently TI and others change their baths, or
conversely, what they hold the phosphor content to. A recommendation I was
handed was that P. content shouldn't exceed about 8%, though I've heard of
10% being acceptable.
You have my heart-felt sympathy with your bains (and yes it is a proper
term, as in 'bain of your life').
Peter
"Furrow,
Robert Gordon To: [log in to unmask]
(Bob)" cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
<furrow@LUCEN Aero/ST Group)
T.COM> Subject: Re: [TN] Earls pics are up, and a
Sent by: question...
TechNet
<[log in to unmask]
ORG>
03/13/02
10:01 PM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
"Furrow,
Robert Gordon
(Bob)"
Earl,
As others have stated, the 10X picture looks like there was never intended
to be a ball there. Maybe it is the lower mag and a trick of the lighting
that makes it look that way. Anyway, on the other pics it looks a lot like
a
clean fracture right at the intermetallic layer. Is the underlying metal
nickel? Was the BGA fabricator using ENIG as a solderability coating prior
to the attachment of the balls? Could this be another case of "black pad"?
I
know we have had instances where this has been the case. Very low level
identified, but who knows how many times the actual cause is overlooked. As
with the ENIG issue on PWB surfaces, some suppliers may be able to
completely eliminate the problem, others may have it at a low level, and
the
unfortunate few may be plagued with this problem. Just some questions you
might want to check in to.
Thanks,
Robert Furrow
Printed Wiring Board Engineer
Supply Chain Networks
Lucent Technologies
978-960-3224 [log in to unmask]
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 8:31 AM
To: [log in to unmask]
Subject: Re: [TN] Earls pics are up, and a question...
Jim,
BGA's used to be my best friend, except for Arleen Weinberger and other
ladies of extreme beauty and brains. Now they are a bain, if tha's a proper
term. It's like the whole BGA world has gone to hell. Even board suppliers
are starting to suck who once had my total faith and confidence based on
constant evaluation, re-evaluation, and qualification.
At least now I have a compadre in this mess. Thanks for sharing the gief
but
I'm honestly stumped but for an undying dedication to gettin this damn
thing
resolved. The TI thing was bad enough but now another major supplier adds
to
the MESS.
Did you give us your paper and/or its location? I'm reading all I can, OVER
AND OVER AGAIN, notwithstanding posting my brains and guts out on this
site.
Hell, even Sir Werner and his cohorts can't do much. It has to be up to the
suppliers to come forth. Thought I was working concurrently with TI. Now
I'm
not sure again, and haven't even begun talking with the other major
supplier
with whom my last pics are associated.
Your statement about "Every time there was a component failure, it was
attributed to an open BGA solder joint" sure used to ring true but was
resolved, for a time. It seems now to be coming back.
Sorry about your, hopefully healed black eye, but should not have been the
case. However, some should suffer such a fate based on your thoughts about
how the missing ball attachment area looked compared to mine. This solder
"remnant" crap is exactly my problem and others soon to experience it. All
other surface conditions point to some process management inadequacies and
someone knows what they are and what are the failure modes/mechanisms. Just
looks like unsolderable surfaces to me and whatever happened to the IMC
layer whether too thick, too thin, or just plane way to oxidized.
My progress is limited to a very small company resource capability. The
company has spent way too much time and money doing minimal analysis. Who
the hell could afford to do more anyway. Like Sir Werner says, this crap is
just being thrown over the fence for all us ROOKIES to suck through a
garden
hose. I don't do that.
I believe you're right about the nickel gold thing. What else could it be.
TI even admitted one of its suppliers was replaced to do a better job. That
hasn't been proven yet either. Maybe Friday it will when we get our first
assemblies. We'll ge to the bottom, and I do mean bottom, of this soon but
maybe not soon enough for some.
Thanks JM for some outstanding insights. Finally feels a bit, though sadly,
comforting having someone else having gone through this.
Earl
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Date: Thu, 14 Mar 2002 11:42:39 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Solder Joint Mechanical Stress
X-To: Carl Ray <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Was this strength test written into the requirements when the job was taken
on? 20 in pounds is quite a torque to apply to an electronic component.
Does your customer have any first-hand experience of circus board
manufacture? - it's sounds like "no", or he'ld understand for himself why
it's a bad idea to perform a test like this. Is it intended to be 100%
inspection?
The process to stick the heatsinks to the BGA's should have been confirmed
as part of a product qualification test, as should the means and method of
testing the adhesion. Properly specified, this process can then be passed
onto CM's or whoever assembles the boards to repeat.
For process monitoring purposes, to ensure adequate adhesion is being
maintained, batch sampling can be done, but I wouldn't do it on expensive
"live" product - I would load the occasional board with appropriate dummy
components, mount the heatsink and test those. If there's a problem, stop
and review the processes.
Otherwise, what is the test going to prove? Either the heatsink comes off,
or the BGA does (especially if it's one of Earl's illigitimate TI things),
or they both stay on the board but the solder joints (ball to board or
balls to device or both) have been unnecessarily stressed, which is bound
to reduce working life by anyone's reasoning - by how much, should have
been one of the HALT test results, using a non-torqued set of pieces for
comparison.
How to change the customer's mind? Ask what qual tests were done and what
results were obtained along the lines I suggested above, and judge for
yourself if they were adequate. If not explain why you think so, and if
he's still adamant about carrying out the test on live product, get him to
sign a disclaimer removing your liability for failures now or later for any
boards on which this test has been carried out.
Can't suggest anything else, but good luck.
Peter
Carl Ray
<carlr.ray@SANMIN To: [log in to unmask]
A-SCI.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
Sent by: TechNet Aero/ST Group)
<[log in to unmask]> Subject: [TN] Solder Joint Mechanical Stress
03/14/02 12:17 AM
Please respond to
"TechNet E-Mail
Forum."; Please
respond to Carl
Ray
I have a customer who is requiring that I verify the bond strength of a
heat sink that is glued to the top of PBGA. The customer has supplied me
with a torque tool to verify the strength of the bond between the heat
sink and the BGA. I have concerns that testing the strength of the glue
bond may affect the solder joint reliability of the BGA. The tool
supplied by the customer is set at 20 in pound torque. Any ideas how I
can "change" my customer mind?
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Date: Thu, 14 Mar 2002 08:54:10 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Waleed Abdel-Hameed <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Waleed Abdel-Hameed <[log in to unmask]>
Subject: clearance
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Dear:
Any one know where can i get the mini & max clearance between
component bodies on the PCB specially for SMD.
thanks
waleed
------_=_NextPart_001_01C1CB25.0B2F1CF0
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<P><FONT COLOR=3D"#0000FF" SIZE=3D2 FACE=3D"Arial">Dear:</FONT>
<BR><FONT COLOR=3D"#0000FF" SIZE=3D2 =
FACE=3D"Arial"> Any one know =
where can i get the mini & max clearance between component =
bodies on the PCB specially for SMD.</FONT>
</P>
<P><FONT COLOR=3D"#0000FF" SIZE=3D2 FACE=3D"Arial">thanks</FONT>
<BR><FONT COLOR=3D"#0000FF" SIZE=3D2 FACE=3D"Arial">waleed</FONT>
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<BR>
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Date: Thu, 14 Mar 2002 02:08:13 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
I hear you Dave. Over the years doing BGA stuff, I developed a very
calibrated index finger and thumb. The whole thing about these devices and
their balls, has always facinated me.
Earl on, I began using my talented digits attempting to dislodge the little
bastards. I know what it takes, and for all the other balls on these crap
devices, they pass my test. They adhere very well. It's after they're
soldered when most of the problems, besides as received, occur.
Earl
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Date: Thu, 14 Mar 2002 02:10:22 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: High Rel BGA Guidelines
X-To: [log in to unmask]
What's the difference between hi rel and no rel when balls fall off devices
or devices fall off balls attached to boards?
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Date: Thu, 14 Mar 2002 09:16:36 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guenter Grossmann <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guenter Grossmann <[log in to unmask]>
Subject: Antw: [TN] Solder Joint Mechanical Stress
Mime-Version: 1.0
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Carlr
1) Make the test and show with micro sections that your solder joints =
suffer
2) Try to convince him / her that it is more sensible to perform a type =
test where you show that your process is appropriate. Maybe you could =
suggest repetitive tests on random samples out of the production.
Best regards
Guenter
.
EMPA
Swiss Federal Institute for Materials Testing and Research
Centre for Reliability
Dipl. Eng. Guenter Grossmann
8600 Duebendorf
Switzerland
Phone: xx41 1 823 4279
Fax : xx41 1823 4054
mail: [log in to unmask]
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Date: Thu, 14 Mar 2002 02:14:37 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Ask the question about Storage conditions
X-To: [log in to unmask]
To answer your question:
SGVsbG8gdG8gYWxsOg0KICAgIEkgaGF2ZSBtZWV0IHdpdGggYSBzZXJpb3VzbHkgcHJvYmxlbTog
T3VyIGZhY3Rvcnkgc
Plus, if stored under the right conditions within the wrong conditions, no
problem. This meahs you can always buy expensive chambers to store parts
within large, cheap conatiners and the problem is solved. I'll patent that idea.
Seriously, you have a problem and I do empathsize,
MoonMan
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Date: Thu, 14 Mar 2002 02:18:35 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
I only had one other bain of my life, before this, but I can't remember her
name. That was forgettable, and forgiveable. This is neither.
No disrespect, but get inside TI's, or anyone else's plating chemistry and
management, is a joke. Beyond that, we're on the same page, as usual.
Earl
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Date: Thu, 14 Mar 2002 02:25:51 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: clearance
X-To: [log in to unmask]
waleed,
It all started, basically, with MIL, now IPC 279, or is it 2221 (I get so
confused) and improving, STD-275 design guidelines. Aside from all that,
most major corporations (HP, Nortel, etc.) took the guidelines, as they
should, and converted them into design standards or rules no longer guidelines.
Nortel, as but one example, requires a minimum chip device spacing to be
.015". HP and Nortel both have devised requirements for other device spacing
according to their in house reliability testing and in concert with IPC leaders.
Earl Moon
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Date: Thu, 14 Mar 2002 10:03:07 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Zweigart, Siegmund" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Zweigart, Siegmund" <[log in to unmask]>
Subject: Solderability of BGA
MIME-Version: 1.0
Content-Type: text/plain
Hello
I am looking for some documents about solderability tests for BGA s with
eutectik balls. Can anybody help me in this subject?
We think that the BGA- Balls were touched by fingers and the solderiability
is significant reduced.
How can we analyse the component for fingerprints? We are thinking of
looking for NaCl.
Has anybody another idea?
Siggi
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Date: Thu, 14 Mar 2002 11:00:37 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Busko, Wolfgang" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Busko, Wolfgang" <[log in to unmask]>
Subject: Re: Ask the question about Storage conditions
X-To: sangliu <[log in to unmask]>
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Content-Type: text/plain;
charset="gb2312"
Well, I know your problem from live experience in your area. Been there, saw
the results and was not amused.
I share your concern.
Tell us what you are producing so we don??t buy such goods ;-)
If you have no other choice than that you may consider establishing a FIFO
system for all of your parts. Make sure all parts do not stay longer than
absolutely necessary in this environment. Make sure, once you have
determined the max. storage time for an individual part, that parts staying
there longer don??t get to your assembly. Think of "just in time delivery",
maybe you??re a big one and can do it. Get accustomed to the idea that not
all parts can be used for production.
If all that doesn??t help get as much touchup people you can get, .... but
if that will make things any better.... ?
BEST: You may seal the parts in dry bags as you do with all your MSD. Do
solderability tests before use, don??t process parts that show evidence of
bad wetting. I would call that "Control of the conditions for the indivdual
part" and that would be my first choice than.
I guess your next problem will be the conditions in your assembly.
Good luck and please do better than others over there
Wolfgang
-----Original Message-----
From: sangliu [mailto:[log in to unmask]]
Sent: Thursday, March 14, 2002 3:09 AM
To: [log in to unmask]
Subject: [TN] Ask the question about Storage conditions
Hello to all:
I have meet with a seriously problem: Our factory set up a new storage
center. But somebody do not want afford the air-conditioning for the
component and PCB materials storaging. I and someother engineers do not
think so, and afraid the solderability ,reliability and the other problems.
Because the temperature maybe 40 degree C odd ,and the humidity will be
90%RH.
Would you please give me some materials about such topics:
1:The storage conditons of your company and the company you know, such as
temperature,humidity, and so on. Also you can send me the standard document
in electronic field.
2: The storage limit time of different materials, packages types, and the
oxidate rate of the common metal: SnPb, Au, Ag, Pd,etc.
3: The main harmful when we can not afford good storaging condition,
especailly the details data /photo and report on this problem.
4: I know sometimes the packing materials such as plastic film, polyester,
polyethelene can not hold back the moisture, because they have micropore.
Do you have some papers on these packing materials for this model?
Regards!
Sunny Liu
************************************************************
Dr. Liu Sang
Process Technology Section of Development & Piloting Department
Huawei Technologies Compant, LTD.
Bantian, Longgang,
Shenzhen 518129 P.R.China
Tel: (86)-755-8780073, Fax: (86)-755-8780132
E-mail: [log in to unmask] <mailto:[log in to unmask]>
http://www.huawei.com <http://www.huawei.com>
************************************************************
------_=_NextPart_001_01C1CB3F.17583740
Content-Type: text/html;
charset="gb2312"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=gb2312">
<META content="MSHTML 5.50.4807.2300" name=GENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=#ffffff>
<DIV><SPAN class=587392909-14032002><FONT face=Arial color=#0000ff size=2>Well,
I know your problem from live experience in your area. Been there, saw the
results and was not amused.</FONT></SPAN></DIV>
<DIV><SPAN class=587392909-14032002><FONT face=Arial color=#0000ff size=2>I
share your concern.</FONT></SPAN></DIV>
<DIV><SPAN class=587392909-14032002><FONT face=Arial color=#0000ff size=2>Tell
us what you are producing so we don´t buy such goods
;-)</FONT></SPAN></DIV>
<DIV><SPAN class=587392909-14032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=587392909-14032002><FONT face=Arial color=#0000ff size=2>If
you have no other choice than that you may consider establishing a FIFO
system for all of your parts. Make sure all parts do not stay longer than
absolutely necessary in this environment. Make sure, once you have
determined the max. storage time for an individual part, that parts staying
there longer don´t get to your assembly. Think of "just in time delivery", maybe
you´re a big one and can do it. Get accustomed to the idea that not all parts
can be used for production. </FONT></SPAN></DIV>
<DIV><SPAN class=587392909-14032002><FONT face=Arial color=#0000ff size=2>If all
that doesn´t help get as much touchup people you can get, .... but if
that will make things any better.... ?</FONT></SPAN></DIV>
<DIV><SPAN class=587392909-14032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=587392909-14032002><FONT face=Arial color=#0000ff size=2>BEST:
You may seal the parts in dry bags as you do with all your MSD. Do solderability
tests before use, don´t process parts that show evidence of bad wetting. I would
call that "Control of the conditions for the indivdual part" and that would be
my first choice than.</FONT></SPAN></DIV>
<DIV><FONT face=Arial><FONT size=2><FONT color=#0000ff><SPAN
class=587392909-14032002>I guess your next problem will be the
conditions in your assembly.</SPAN></FONT></FONT></FONT></DIV>
<DIV><FONT face=Arial><FONT size=2><FONT color=#0000ff><SPAN
class=587392909-14032002></SPAN></FONT></FONT></FONT> </DIV>
<DIV><FONT face=Arial><FONT size=2><FONT color=#0000ff><SPAN
class=587392909-14032002>Good luck and please do better than others over
there</SPAN></FONT></FONT></FONT></DIV>
<DIV><FONT face=Arial><FONT size=2><FONT color=#0000ff><SPAN
class=587392909-14032002></SPAN></FONT></FONT></FONT> </DIV>
<DIV><FONT face=Arial><FONT size=2><FONT color=#0000ff><SPAN
class=587392909-14032002>Wolfgang</SPAN></FONT></FONT></FONT></DIV>
<DIV><FONT face=Arial><FONT size=2><FONT color=#0000ff><SPAN
class=587392909-14032002></SPAN></FONT></FONT></FONT> </DIV>
<DIV><SPAN class=587392909-14032002></SPAN><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> sangliu
[mailto:[log in to unmask]]<BR><B>Sent:</B> Thursday, March 14, 2002 3:09
AM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] Ask the question about
Storage conditions<BR><BR></DIV></FONT>
<BLOCKQUOTE dir=ltr
style="PADDING-LEFT: 5px; MARGIN-LEFT: 5px; BORDER-LEFT: #0000ff 2px solid; MARGIN-RIGHT: 0px">
<DIV><FONT size=2>Hello to all:</FONT></DIV>
<DIV><FONT size=3> I have meet with a seriously problem: Our
factory set up a new storage center. But somebody do not want afford the
air-conditioning for the component and PCB materials storaging. I and
someother engineers do not think so, and afraid the solderability ,reliability
and the other problems.</FONT></DIV>
<DIV>Because the temperature maybe 40 degree C odd ,and the humidity will
be 90%RH.</DIV>
<DIV> </DIV>
<DIV>Would you please give me some materials about such topics:</DIV>
<DIV>1:The storage conditons of your company and the company you know, such as
temperature,humidity, and so on. Also you can send me the standard document in
electronic field.</DIV>
<DIV> </DIV>
<DIV>2: The storage limit time of different materials, packages types, and the
oxidate rate of the common metal: SnPb, Au, Ag, Pd,etc.</DIV>
<DIV> </DIV>
<DIV>3: The main harmful when we can not afford good storaging condition,
especailly the details data /photo and report on this problem.</DIV>
<DIV> </DIV>
<DIV>4: I know sometimes the packing materials such as plastic film,
polyester, polyethelene can not hold back the moisture, because they
have micropore.</DIV>
<DIV>Do you have some papers on these packing materials for this model?</DIV>
<DIV> </DIV>
<DIV> Regards!</DIV>
<DIV> </DIV>
<DIV>Sunny Liu</DIV>
<DIV> </DIV>
<DIV>************************************************************<BR>
Dr. Liu
Sang
<BR> Process Technology Section of Development & Piloting
Department<BR> Huawei Technologies Compant, LTD.<BR> Bantian,
Longgang, <BR> Shenzhen 518129 P.R.China<BR> Tel:
(86)-755-8780073, Fax: (86)-755-8780132<BR> E-mail: <A
href="mailto:[log in to unmask]">[log in to unmask]</A><BR> <A
href="http://www.huawei.com">http://www.huawei.com</A><BR> ************************************************************<BR></DIV></BLOCKQUOTE></BODY></HTML>
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Date: Thu, 14 Mar 2002 11:42:35 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Busko, Wolfgang" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Busko, Wolfgang" <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: David Douthit <[log in to unmask]>
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Content-Type: text/plain; charset="iso-8859-1"
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> -----Original Message-----
> From: David Douthit [mailto:[log in to unmask]]
> Sent: Thursday, March 14, 2002 2:09 AM
> To: [log in to unmask]
> Subject: Re: [TN] Earls pics are up, and a question...
>=20
>=20
> Earl,
>=20
> Take/shear/rip/pop/jimmy/remove some of the solder balls that=20
> are still attached and compare.
> Note the amount of stress/force it required to remove them!
>=20
> David A. Douthit
> Manager
> LoCan LLC
>=20
>=20
>=20
Earl,=20
would be interesting what that shows.
As with ENIG I have seen one strange thing with this over years. One of =
a
couple of thousand pads on a PCB just was not covered with ENIG and
absolutely unsolderable, seemed to be bare copper but somewhat coated =
and
"out of colour". This was mostly detected at incoming inspection, =
rejected
and send back to the Boardhouse with no further examination for the =
real
cause. The effort would have been to much for just one board out of =
thousand
and we always got an immediate refund with no arguing or any =
explanation
what had caused that.
Actually seeing something in this pictures is nearly impossible for me, =
just
more background would be necessary.
But it seems, no matter what the extend of this problem really is, that =
it=B4s
obvious a part related problem the manufacturer should refund or =
explain.=20
I share your concern regarding quality at present and the outlook for =
the
future, hope we all learn a bit ... or me go cave too.
Wolfgang
=20
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Date: Thu, 14 Mar 2002 05:47:42 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
Wolfgang,
Thanks as usual for the insightful input. Cave's getting crowded but you
always welcome. Should be no need but for cheap.
Earl
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Date: Thu, 14 Mar 2002 07:23:01 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Earl, one test I've been performing is a somewhat suggestive ball shear
test, where I grab a ball with a pair of stiff tweezers and slowly rock it
back and forth until it shears off. Looking at the fracture surface, you
want to see complete solder coverage on the component. One other thing...
when looking at my balls under a microscope (no jokes, please) I can see
probe marks from the electrical tester. These marks are not located on the
top of the ball but on the side, meaning that the test probes contact the
side of the ball. (This was verified by the supplier.) Could this be
overstressing marginal solder joints? Who knows?
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Earl Moon [SMTP:[log in to unmask]]
Sent: Thursday, March 14, 2002 3:08 AM
To: [log in to unmask]
Subject: Re: [TN] Earls pics are up, and a question...
I hear you Dave. Over the years doing BGA stuff, I developed a very
calibrated index finger and thumb. The whole thing about these
devices and
their balls, has always facinated me.
Earl on, I began using my talented digits attempting to dislodge the
little
bastards. I know what it takes, and for all the other balls on these
crap
devices, they pass my test. They adhere very well. It's after
they're
soldered when most of the problems, besides as received, occur.
Earl
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Date: Thu, 14 Mar 2002 07:31:25 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Kasprzak, Bill (sys) USX" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Kasprzak, Bill (sys) USX" <[log in to unmask]>
Subject: Re: Soldering crimp connectors
X-To: Carl VanWormer <[log in to unmask]>
MIME-Version: 1.0
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Carl,
Without knowing where the corrosion problem is, I suspect it's that it
occurs just above the area where the crimps are located, this sounds like
the customer either needs to add a strain relief or a protective boot to the
connector where the crimps are. Really sounds to me like the customer has
not identified the root cause of the problem. A crimped connection when
properly applied does not require nor is it meant to be soldered, even for
some of the high current applications mentioned in some previous posts. If a
soldered connection is what is needed then buy a connector with solder cups.
I would ask the customer then, "so what is the workmanship criteria for this
connection?". There isn't any. You really need to explore why the customer
thinks this is necessary, this is not an acceptable practice
Bill Kasprzak
Moog Inc. Manufacturing Engineering, Electronics
.
> -----Original Message-----
> From: Carl VanWormer [SMTP:[log in to unmask]]
> Sent: Wednesday, March 13, 2002 2:35 PM
> To: [log in to unmask]
> Subject: [TN] Soldering crimp connectors
>
> We have a customer who insists that we solder our crimp connectors (after
> crimping). He has had corrosion problems and is convinced that this is
> the
> best solution. Is this a good thing? Are there any downsides we should
> point out to help educate him?
>
>
> Carl Van Wormer
> Cipher Systems
> 1815 NW 169th Place, Suite 5010
> Beaverton, OR 97006
> Phone (503)-617-7447 Fax (503)-617-6550
>
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Date: Thu, 14 Mar 2002 07:48:59 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Board Bow and Twist
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
I think this is a no-brainer, but here goes... We were delivered boards in
panel form from one of our suppliers. At Incoming Inspection, the panel was
rejected for excessive bow (>75% for SMT) and returned the supplier. The
supplier called me and said that even though the panel exceeded the bow
requirement, the individual boards were acceptable. When I quoted the bow
and twist requirement from IPC-6012, "Panels which contain multiple printed
boards which are assembled on the panel and later separated shall be
assessed in panel form." , he said yes, you measure the individual boards in
the panel. I need clarification.
Thanks,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
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Date: Thu, 14 Mar 2002 07:02:47 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
Jim,
I thought of the test probe on balls indentations. Steve's site has one
imange showing the probe stuff. Don't know how much stress is placed on
balls in terms of shear or whatever other stress. Never used to care. The
stuff just worked. Again, I'm just confounded by the remnants on the
device's pad surface as solder but little else.
Earl
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Date: Thu, 14 Mar 2002 07:04:32 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Board Bow and Twist
X-To: [log in to unmask]
boards only
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Date: Thu, 14 Mar 2002 08:12:27 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: Board Bow and Twist
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Well, I got two responses with two different interpretations...
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Franklin D Asbell [SMTP:[log in to unmask]]
Sent: Thursday, March 14, 2002 8:17 AM
To: TechNet E-Mail Forum.; Marsico, James
Subject: Re: [TN] Board Bow and Twist
Regarding bow/twist for arrays, prior to separation, the array is
considered
a board and subject to the bow/twist requirements of 6012.
At least this is how I interpret it, and apply it in my shop.
Regards,
Franklin D Asbell
Network Circuits, Inc.
Irving, Texas 75061
----- Original Message -----
From: "Marsico, James" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 14, 2002 6:48 AM
Subject: [TN] Board Bow and Twist
> I think this is a no-brainer, but here goes... We were delivered
boards
in
> panel form from one of our suppliers. At Incoming Inspection, the
panel
was
> rejected for excessive bow (>75% for SMT) and returned the
supplier. The
> supplier called me and said that even though the panel exceeded
the bow
> requirement, the individual boards were acceptable. When I quoted
the bow
> and twist requirement from IPC-6012, "Panels which contain
multiple
printed
> boards which are assembled on the panel and later separated shall
be
> assessed in panel form." , he said yes, you measure the individual
boards
in
> the panel. I need clarification.
> Thanks,
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
>
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Date: Thu, 14 Mar 2002 08:15:43 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Board Bow and Twist
MIME-Version: 1.0
Content-Type: text/plain; charset="US-ASCII"
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Hi Jim
If you assemble PANELS then the bow and twist is measured on the PANELS.
If you assemble INDIVIDUAL BOARDS then the bow and twist is measured on
INDIVIDUAL BOARDS.
Susan Mansilla
Robisan Lab
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Date: Thu, 14 Mar 2002 07:16:30 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Franklin D Asbell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Franklin D Asbell <[log in to unmask]>
Subject: Re: Board Bow and Twist
X-To: "Marsico, James" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Regarding bow/twist for arrays, prior to separation, the array is considered
a board and subject to the bow/twist requirements of 6012.
At least this is how I interpret it, and apply it in my shop.
Regards,
Franklin D Asbell
Network Circuits, Inc.
Irving, Texas 75061
----- Original Message -----
From: "Marsico, James" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 14, 2002 6:48 AM
Subject: [TN] Board Bow and Twist
> I think this is a no-brainer, but here goes... We were delivered boards
in
> panel form from one of our suppliers. At Incoming Inspection, the panel
was
> rejected for excessive bow (>75% for SMT) and returned the supplier. The
> supplier called me and said that even though the panel exceeded the bow
> requirement, the individual boards were acceptable. When I quoted the bow
> and twist requirement from IPC-6012, "Panels which contain multiple
printed
> boards which are assembled on the panel and later separated shall be
> assessed in panel form." , he said yes, you measure the individual boards
in
> the panel. I need clarification.
> Thanks,
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
> --------------------------------------------------------------------------
-------
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>
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Date: Thu, 14 Mar 2002 08:21:15 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Board Bow and Twist two answers
MIME-Version: 1.0
Content-Type: text/plain; charset="US-ASCII"
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Hi Jim
This is not a question where "the most votes" determines the answer.
The last sentence in para 3.4.4 states Panels which contain multiple printed
boards which are assembled on the panel and later separated SHALL be assessed
in panel form.
Susan Mansilla
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Date: Thu, 14 Mar 2002 07:23:11 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Franklin D Asbell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Franklin D Asbell <[log in to unmask]>
Subject: Unusual plated 'stuff' on copper surface
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_0026_01C1CB29.190462A0"
This is a multi-part message in MIME format.
------=_NextPart_000_0026_01C1CB29.190462A0
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
This past January we began seeing unusual 'growths' ((for lack of better =
descriptive wording)) on the surface of panels after copper II, they are =
typically observed on one end of the panels, often only a couple panels =
per tankload exhibit this.
These 'growths' look like fine strands of metal of fabric fibers, they =
are clustered together like someone poor shavings there, and plated over =
them. If any of you recall pics of those bacteria found in that Mars =
asteroid from the Antarctic, they appear similar to that (not saying we =
have bacteria growing in our baths of course). Occasionally we see this =
out towards the center of panels, I don't believe we have ever seen all =
panels in a tankload exhibit this either. This condition is observed on =
one or two loads per day (out of about 20 - 30), some days not at all.
We started seeing this in one bath (of three in house) until recently it =
appeared in another bath simultaneously.
Any help on this would be greatly appreciated as our process engineers, =
lab techs, and suppliers are baffled.
Thanks,
Franklin D Asbell
Network Circuits, Inc.
Irving, Texas 75061
------=_NextPart_000_0026_01C1CB29.190462A0
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META content=3D"text/html; charset=3Diso-8859-1" =
http-equiv=3DContent-Type>
<META content=3D"MSHTML 5.00.3315.2870" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>This past January we began seeing =
unusual 'growths'=20
((for lack of better descriptive wording)) on the surface of panels =
after copper=20
II, they are typically observed on one end of the panels, often only a =
couple=20
panels per tankload exhibit this.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>These 'growths' look like fine strands =
of metal of=20
fabric fibers, they are clustered together like someone poor shavings =
there, and=20
plated over them. If any of you recall pics of those bacteria found in =
that Mars=20
asteroid from the Antarctic, they appear similar to that (not saying we =
have=20
bacteria growing in our baths of course). Occasionally we see this out =
towards=20
the center of panels, I don't believe we have ever seen all panels in a =
tankload=20
exhibit this either. This condition is observed on one or two loads per =
day (out=20
of about 20 - 30), some days not at all.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>We started seeing this in one bath (of =
three in=20
house) until recently it appeared in another bath =
simultaneously.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Any help on this would be greatly =
appreciated as=20
our process engineers, lab techs, and suppliers are =
baffled.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Thanks,</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Franklin D Asbell</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Network Circuits, Inc.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Irving, Texas 75061</FONT></DIV>
<DIV> </DIV></BODY></HTML>
------=_NextPart_000_0026_01C1CB29.190462A0--
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Date: Thu, 14 Mar 2002 07:25:19 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Franklin D Asbell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Franklin D Asbell <[log in to unmask]>
Subject: Re: Board Bow and Twist
X-To: "Marsico, James" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
James,
An afterthought, the bow and twist requirement is there to provide ease of
board population as well as end use fit. If the board is warped prior to
assembly, this indeed would affect population thus potentially making the
boards unsuitable for end use...just something to think about, or pass along
to your supplier.
Franklin
----- Original Message -----
From: "Marsico, James" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 14, 2002 6:48 AM
Subject: [TN] Board Bow and Twist
> I think this is a no-brainer, but here goes... We were delivered boards
in
> panel form from one of our suppliers. At Incoming Inspection, the panel
was
> rejected for excessive bow (>75% for SMT) and returned the supplier. The
> supplier called me and said that even though the panel exceeded the bow
> requirement, the individual boards were acceptable. When I quoted the bow
> and twist requirement from IPC-6012, "Panels which contain multiple
printed
> boards which are assembled on the panel and later separated shall be
> assessed in panel form." , he said yes, you measure the individual boards
in
> the panel. I need clarification.
> Thanks,
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
> --------------------------------------------------------------------------
-------
> Technet Mail List provided as a free service by IPC using LISTSERV 1.8d
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> --------------------------------------------------------------------------
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>
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Date: Thu, 14 Mar 2002 08:29:11 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: Board Bow and Twist
MIME-Version: 1.0
Content-Type: text/plain
I look at it from a different perspective, reliability. If you populate
(and reflow) warped boards, what happens to the solder joints when the
boards are flattened when installed in the next higher assembly? Now that I
think about it, probably nothing, since the solder will eventually relax.
Right? But why else would there be a more stringent flatness requirement
for SMT boards than TH since most P&P systems hold SMT boards down by the
edges?
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Franklin D Asbell [SMTP:[log in to unmask]]
Sent: Thursday, March 14, 2002 8:25 AM
To: TechNet E-Mail Forum.; Marsico, James
Subject: Re: [TN] Board Bow and Twist
James,
An afterthought, the bow and twist requirement is there to provide
ease of
board population as well as end use fit. If the board is warped
prior to
assembly, this indeed would affect population thus potentially
making the
boards unsuitable for end use...just something to think about, or
pass along
to your supplier.
Franklin
----- Original Message -----
From: "Marsico, James" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 14, 2002 6:48 AM
Subject: [TN] Board Bow and Twist
> I think this is a no-brainer, but here goes... We were delivered
boards
in
> panel form from one of our suppliers. At Incoming Inspection, the
panel
was
> rejected for excessive bow (>75% for SMT) and returned the
supplier. The
> supplier called me and said that even though the panel exceeded
the bow
> requirement, the individual boards were acceptable. When I quoted
the bow
> and twist requirement from IPC-6012, "Panels which contain
multiple
printed
> boards which are assembled on the panel and later separated shall
be
> assessed in panel form." , he said yes, you measure the individual
boards
in
> the panel. I need clarification.
> Thanks,
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
>
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Date: Thu, 14 Mar 2002 15:42:03 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Grant Emandien <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Grant Emandien <[log in to unmask]>
Subject: Re: Board Bow and Twist
X-To: Earl Moon <[log in to unmask]>
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Moonman,
Please elaborate - surely one has to look at the complete panel, as this
affects SMD placement forces (due to varying heights, may even cause
components to pop off) and reflow yield (possible components
slipping/sliding)?
Regards
Grant
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Thursday, March 14, 2002 3:05 PM
To: [log in to unmask]
Subject: Re: [TN] Board Bow and Twist
boards only
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Date: Thu, 14 Mar 2002 08:49:59 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
bbarr <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: bbarr <[log in to unmask]>
Subject: Re: Board Bow and Twist
X-To: "Marsico, James" <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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Wow, Jim. This is deja vu. I had the exact same discussion here about a year
or so ago. The position I took (based on what I thought was good common
sense) echoes most of the responses you received. I am building the panel,
not individual boards, so the panel has to meet the spec. What good are
"in-spec" individual boards if the panel won't go through the process?
Bob
=======================
Robert Barr
Manufacturing Engineering
Formation, Inc.
Voice: 856-234-5020 x3035
Fax: 856-234-6679
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Marsico, James
> Sent: Thursday, March 14, 2002 7:49 AM
> To: [log in to unmask]
> Subject: [TN] Board Bow and Twist
>
>
> I think this is a no-brainer, but here goes... We were delivered
> boards in
> panel form from one of our suppliers. At Incoming Inspection,
> the panel was
> rejected for excessive bow (>75% for SMT) and returned the supplier. The
> supplier called me and said that even though the panel exceeded the bow
> requirement, the individual boards were acceptable. When I quoted the bow
> and twist requirement from IPC-6012, "Panels which contain
> multiple printed
> boards which are assembled on the panel and later separated shall be
> assessed in panel form." , he said yes, you measure the
> individual boards in
> the panel. I need clarification.
> Thanks,
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
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Date: Thu, 14 Mar 2002 09:00:43 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Charlie Pitarys <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Charlie Pitarys <[log in to unmask]>
Subject: Re: Cleaning Baskets
X-To: "[log in to unmask]" <[log in to unmask]>
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Alan, investigate the mesh size of the wire carefully. You may protect your
components with a small mesh but combine that w/the pitch of the conveyor
belt it will be like trying to clean through a screen door. I have seen some
baskets made with 1/4 inch square mesh and folks have had cleaning issues
even w/in-lines pushing 100psi. In addition if you load other really small
parts they will/may bounce around inside the basket land on top of each
other and incomplete clean and rinse may result.
If chemistry is used to wash expect an increase in dragout too.
Regards,
Charlie Pitarys
Director of Application Technologies
603.622.2900 X-115
www.kyzen.com
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 10:19 AM
To: [log in to unmask]
Subject: [TN] Cleaning Baskets
Hello Technet,
I'm looking for alternative-style baskets / methods to prevent damage (rips
parts off) double-sided boards. I thinking of having our st.st. baskets
coated with plastic.
Background: I usually place the boards directly on the in-line cleaner's
conveyor (which also has a top/hold-down conveyor). I had a board that we
thought may get damaged without placing in a basket (24" x 20" x 1.75" with
1/4" mesh). However, any slight movement - either during loading/unloading
or cleaning - rips off the higher profile smt parts.
Any suggestions?
Thanks in advance for your help,
Al Kreplick
Sr. Mfg. Eng.
Teradyne, Inc.
500 Riverpark Drive
North Reading, MA 01864
Tel: 978-370-1726
Fax: 734-661-5352
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<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META NAME=3D"Generator" CONTENT=3D"MS Exchange Server version =
5.5.2653.12">
<TITLE>RE: [TN] Cleaning Baskets</TITLE>
</HEAD>
<BODY>
<P><FONT SIZE=3D2>Alan, investigate the mesh size of the wire =
carefully. You may protect your components with a small mesh but =
combine that w/the pitch of the conveyor belt it will be like trying to =
clean through a screen door. I have seen some baskets made with 1/4 =
inch square mesh and folks have had cleaning issues even w/in-lines =
pushing 100psi. In addition if you load other really small parts they =
will/may bounce around inside the basket land on top of each other and =
incomplete clean and rinse may result. </FONT></P>
<P><FONT SIZE=3D2>If chemistry is used to wash expect an increase in =
dragout too.</FONT>
</P>
<P><FONT SIZE=3D2>Regards,</FONT>
</P>
<P><FONT SIZE=3D2>Charlie Pitarys</FONT>
<BR><FONT SIZE=3D2>Director of Application Technologies</FONT>
<BR><FONT SIZE=3D2>603.622.2900 X-115</FONT>
<BR><FONT SIZE=3D2>www.kyzen.com </FONT>
</P>
<P><FONT SIZE=3D2> </FONT>
</P>
<P><FONT SIZE=3D2> </FONT>
</P>
<BR>
<BR>
<P><FONT SIZE=3D2>-----Original Message-----</FONT>
<BR><FONT SIZE=3D2>From: [log in to unmask] [<A =
HREF=3D"mailto:[log in to unmask]">mailto:alan.kreplick@TERADYNE=
.COM</A>]</FONT>
<BR><FONT SIZE=3D2>Sent: Wednesday, March 13, 2002 10:19 AM</FONT>
<BR><FONT SIZE=3D2>To: [log in to unmask]</FONT>
<BR><FONT SIZE=3D2>Subject: [TN] Cleaning Baskets</FONT>
</P>
<BR>
<P><FONT SIZE=3D2>Hello Technet,</FONT>
</P>
<P><FONT SIZE=3D2>I'm looking for alternative-style baskets / methods =
to prevent damage (rips</FONT>
<BR><FONT SIZE=3D2>parts off) double-sided boards. I thinking of =
having our st.st. baskets</FONT>
<BR><FONT SIZE=3D2>coated with plastic.</FONT>
</P>
<P><FONT SIZE=3D2>Background: I usually place the boards directly on =
the in-line cleaner's</FONT>
<BR><FONT SIZE=3D2>conveyor (which also has a top/hold-down =
conveyor). I had a board that we</FONT>
<BR><FONT SIZE=3D2>thought may get damaged without placing in a basket =
(24" x 20" x 1.75" with</FONT>
<BR><FONT SIZE=3D2>1/4" mesh). However, any slight movement =
- either during loading/unloading</FONT>
<BR><FONT SIZE=3D2>or cleaning - rips off the higher profile smt =
parts.</FONT>
</P>
<P><FONT SIZE=3D2>Any suggestions?</FONT>
</P>
<P><FONT SIZE=3D2>Thanks in advance for your help,</FONT>
</P>
<BR>
<P><FONT SIZE=3D2>Al Kreplick</FONT>
<BR><FONT SIZE=3D2>Sr. Mfg. Eng.</FONT>
<BR><FONT SIZE=3D2>Teradyne, Inc.</FONT>
<BR><FONT SIZE=3D2>500 Riverpark Drive</FONT>
<BR><FONT SIZE=3D2>North Reading, MA 01864</FONT>
<BR><FONT SIZE=3D2>Tel: 978-370-1726</FONT>
<BR><FONT SIZE=3D2>Fax: 734-661-5352</FONT>
</P>
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Date: Thu, 14 Mar 2002 15:15:34 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Busko, Wolfgang" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Busko, Wolfgang" <[log in to unmask]>
Subject: Re: Board Bow and Twist
X-To: "Marsico, James" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Hi Jim,
assuming that you do not plan to separate them before assembly you do =
not
have a chance to determine which of your individuals will give you the =
bow
and twist that makes the whole panel warp to much.
If the whole panel is off than at least one - if not all - individual =
boards
are not within tolerance.
That=B4s what meself is thinking
Wolfgang
=20
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Date: Thu, 14 Mar 2002 08:33:23 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: High Rel BGA Guidelines
X-To: "Crain, Bob" <[log in to unmask]>
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
Flatness of board/pad finish/component. Stencil apparure design and consistent
paste volume. XRay many to validate process. Pad size/ mask design/ via design.
Good rework equipment. and yes Good Luck!
"Crain, Bob" <[log in to unmask]> on 03/13/2002 03:44:28 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond to
"Crain, Bob" <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: Warren Crow/US/I-O INC)
Subject: [TN] High Rel BGA Guidelines
We may soon be adding BGAs to our approved parts list for some programs. We
use polyamide boards and require electrical test under vibration and thermal
cycling. What are the most important factors to address to maximize our
success?
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Date: Thu, 14 Mar 2002 09:45:27 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Tempea, Ioan" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Tempea, Ioan" <[log in to unmask]>
Subject: Re: Board Bow and Twist two answers
MIME-Version: 1.0
Content-Type: text/plain
Hi Jim,
the actual test method is in IPC-TM-650 (2.4.22). This one is not very
specific in defining what actually should be measured (panel or single
board). Still, para 3 says "The test specimens shall be in the form of
either printed boards or multiple printed panels". Then the drawing and the
procedure show a rectangular element that is measured, in my opinion this
shall be the panel.
If the above mentioned rectangular element is not to be the panel, ask the
board fab to singulate each individual board, measure it for warp, just to
make sure it checks out OK and then re-assemble them in panels. But, like
somebody was saying yesterday, talking about PGAs, this could be ignored.
Regards,
Ioan
> -----Original Message-----
> From: [log in to unmask] [SMTP:[log in to unmask]]
> Sent: Thursday, March 14, 2002 8:21 AM
> To: [log in to unmask]
> Subject: Re: [TN] Board Bow and Twist two answers
>
> Hi Jim
> This is not a question where "the most votes" determines the answer.
> The last sentence in para 3.4.4 states Panels which contain multiple
> printed
> boards which are assembled on the panel and later separated SHALL be
> assessed
> in panel form.
>
> Susan Mansilla
>
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Date: Thu, 14 Mar 2002 09:40:12 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Becerra Alejandro <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Becerra Alejandro <[log in to unmask]>
Subject: Re: Glue Dot Size (missing parts)
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Steve,
We have made audits before and after the wave soldering,
and we have found that really the components are being lost in the wave
soldering.
We lost some components in prior the wave but they are very few.
Alejandro
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 7:05 PM
To: [log in to unmask]
Subject: Re: [TN] Glue Dot Size (missing parts)
Hi Alejandro!
Are you SURE the components are being lost in the wave? Are you SURE they
were there just prior to putting the assembly in the conveyer into the wave?
From past experience, that was an assumption that was made because the
components were there after curing in the oven at surface mount, and then
missing after they came out of wave solder. Truth of the matter was that
they were knocked off during the handling during PTH stuffing, pre-wave
masking, prior to actually waving the assembly...there usually isn't any
sort of inspection step to ensure all the bottomside SMT components are
there in between bottomside SMT inspection until after wave solder. So it is
sometimes missed that the components were knocked off from all the handling
that gets done prior to wave.
Problem is, when most production people hear the word "epoxy" (as in epoxied
SMT components on the bottomside of a board), they equate that to the
two-ton stuff that you would use to repair a chair leg with...not
understanding that the epoxy that is used for SMT components has very little
strength, and don't handle the assemblies with the care that they should...
My two-cents (with a coupon)..hehehe
-Steve Gregory-
We are having issues with 0603 components attached with glue (Glue printed
with Pump printing)
that are being fallen in the wave soldering equipment.
The average dot size that we are having in these components is 0.025" and
the average torque value is 1 N-cm.
What could be possible causes for this issue?
Regards,
Alejandro Becerra
Thomson multimedia Inc
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<DIV><SPAN class=792423914-14032002><FONT face=Arial color=#0000ff
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<DIV><SPAN class=792423914-14032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=792423914-14032002><FONT face=Arial color=#0000ff size=2>We
have made audits before and after the wave soldering,</FONT></SPAN></DIV>
<DIV><SPAN class=792423914-14032002><FONT face=Arial color=#0000ff size=2>and we
have found that really the components are being lost in the wave
soldering.</FONT></SPAN></DIV>
<DIV><SPAN class=792423914-14032002><FONT face=Arial color=#0000ff size=2>We
lost some components in prior the wave but they are very
few.</FONT></SPAN></DIV>
<DIV><SPAN class=792423914-14032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=792423914-14032002><FONT face=Arial color=#0000ff
size=2>Alejandro</FONT></SPAN></DIV>
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> [log in to unmask]
[mailto:[log in to unmask]]<BR><B>Sent:</B> Wednesday, March 13, 2002 7:05
PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> Re: [TN] Glue Dot Size
(missing parts)<BR><BR></FONT></DIV><FONT face=arial,helvetica><FONT size=2>Hi
Alejandro!<BR><BR>Are you SURE the components are being lost in the wave? Are
you SURE they were there just prior to putting the assembly in the conveyer into
the wave?<BR><BR>From past experience, that was an assumption that was made
because the components were there after curing in the oven at surface mount, and
then missing after they came out of wave solder. Truth of the matter was that
they were knocked off during the handling during PTH stuffing, pre-wave masking,
prior to actually waving the assembly...there usually isn't any sort of
inspection step to ensure all the bottomside SMT components are there in between
bottomside SMT inspection until after wave solder. So it is sometimes missed
that the components were knocked off from all the handling that gets done prior
to wave.<BR><BR>Problem is, when most production people hear the word "epoxy"
(as in epoxied SMT components on the bottomside of a board), they equate that to
the two-ton stuff that you would use to repair a chair leg with...not
understanding that the epoxy that is used for SMT components has very little
strength, and don't handle the assemblies with the care that they
should...<BR><BR>My two-cents (with a coupon)..hehehe<BR><BR>-Steve
Gregory-<BR><BR><BR>
<BLOCKQUOTE
style="PADDING-LEFT: 5px; MARGIN-LEFT: 5px; BORDER-LEFT: #0000ff 2px solid; MARGIN-RIGHT: 0px"
TYPE="CITE">We are having issues with 0603 components attached with glue (Glue
printed with Pump printing)</FONT><FONT lang=0
style="BACKGROUND-COLOR: #ffffff" face=Arial color=#000000 size=3
FAMILY="SANSSERIF"> <BR></FONT><FONT lang=0 style="BACKGROUND-COLOR: #ffffff"
face=Arial color=#000000 size=2 FAMILY="SANSSERIF">that are being fallen in
the wave soldering equipment.</FONT><FONT lang=0
style="BACKGROUND-COLOR: #ffffff" face=Arial color=#000000 size=3
FAMILY="SANSSERIF"> <BR></FONT><FONT lang=0 style="BACKGROUND-COLOR: #ffffff"
face=Arial color=#000000 size=2 FAMILY="SANSSERIF">The average dot size that
we are having in these components is 0.025" and the average torque value is 1
N-cm.</FONT><FONT lang=0 style="BACKGROUND-COLOR: #ffffff" face=Arial
color=#000000 size=3 FAMILY="SANSSERIF"> <BR></FONT><FONT lang=0
style="BACKGROUND-COLOR: #ffffff" face=Arial color=#000000 size=2
FAMILY="SANSSERIF">What could be possible causes for this issue?</FONT><FONT
lang=0 style="BACKGROUND-COLOR: #ffffff" face=Arial color=#000000 size=3
FAMILY="SANSSERIF"> <BR><BR></FONT><FONT lang=0
style="BACKGROUND-COLOR: #ffffff" face=Arial color=#000000 size=2
FAMILY="SANSSERIF">Regards,</FONT><FONT lang=0
style="BACKGROUND-COLOR: #ffffff" face=Arial color=#000000 size=3
FAMILY="SANSSERIF"> <BR><BR></FONT><FONT lang=0
style="BACKGROUND-COLOR: #ffffff" face=Arial color=#000000 size=2
FAMILY="SANSSERIF">Alejandro Becerra</FONT><FONT lang=0
style="BACKGROUND-COLOR: #ffffff" face=Arial color=#000000 size=3
FAMILY="SANSSERIF"> <BR></FONT><FONT lang=0 style="BACKGROUND-COLOR: #ffffff"
face=Arial color=#000000 size=2 FAMILY="SANSSERIF">Thomson multimedia
Inc</FONT><FONT lang=0 style="BACKGROUND-COLOR: #ffffff" face=Arial
color=#000000 size=3 FAMILY="SANSSERIF"> <BR><BR></BLOCKQUOTE><BR></FONT><FONT
lang=0 style="BACKGROUND-COLOR: #ffffff" face=Arial color=#000000 size=2
FAMILY="SANSSERIF"><BR></FONT></FONT></BODY></HTML>
------_=_NextPart_001_01C1CB66.25ADE2A0--
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Date: Thu, 14 Mar 2002 14:46:09 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Subject: Re: Board Bow and Twist
X-To: "Marsico, James" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hey Jim,
Susan's got it right - if you need flat panels measure panels and if you
need flat boards you measure boards. IPC-TM-650 2.4.22 works for either.
Somewhere in your procurement documentation you must have specified delivery
in panel form. Did you happen to reference IPC-A-610 anywhere?
IPC-A-610 Rev. C Section 10.6
Acceptable - Class 1,2,3
* Bow and twist does not cause damage during post solder
assembly operations or end use. Consider ''Form, Fit and
Function'' and product reliability.
Defect - Class - 1,2,3
* Bow and twist causes damage during post solder assembly
operations or end use.
Note: Bow and twist after soldering should not exceed 1.5%
for through-hole and 0.75% for surface mount printed board
applications
I've seen this before - panels fail but the final boards will pass. Our
Quality Engineers would request a waiver prior to shipping or we'd scrap
them.
Hans
AC-130 Gunship Motto: "You can run but you'll only die tired."
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: Marsico, James [mailto:[log in to unmask]]
Sent: Thursday, March 14, 2002 8:12 AM
To: [log in to unmask]
Subject: Re: [TN] Board Bow and Twist
Well, I got two responses with two different interpretations...
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Franklin D Asbell [SMTP:[log in to unmask]]
Sent: Thursday, March 14, 2002 8:17 AM
To: TechNet E-Mail Forum.; Marsico, James
Subject: Re: [TN] Board Bow and Twist
Regarding bow/twist for arrays, prior to separation, the array is
considered
a board and subject to the bow/twist requirements of 6012.
At least this is how I interpret it, and apply it in my shop.
Regards,
Franklin D Asbell
Network Circuits, Inc.
Irving, Texas 75061
----- Original Message -----
From: "Marsico, James" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 14, 2002 6:48 AM
Subject: [TN] Board Bow and Twist
> I think this is a no-brainer, but here goes... We were delivered
boards
in
> panel form from one of our suppliers. At Incoming Inspection, the
panel
was
> rejected for excessive bow (>75% for SMT) and returned the
supplier. The
> supplier called me and said that even though the panel exceeded
the bow
> requirement, the individual boards were acceptable. When I quoted
the bow
> and twist requirement from IPC-6012, "Panels which contain
multiple
printed
> boards which are assembled on the panel and later separated shall
be
> assessed in panel form." , he said yes, you measure the individual
boards
in
> the panel. I need clarification.
> Thanks,
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
>
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Date: Thu, 14 Mar 2002 15:52:39 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"d. terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: Re: Board Bow and Twist
MIME-Version: 1.0 (Generated by NET-TEL Mailguard SMTP version 4.0.0.22)
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: quoted-printable
Hi Jim,
I'd say the IPC-6012 requirement is there to make sure the boards can be =
assembled (in the panel). The requirement for the individual boards (the =
end-products) is written somewhere in the Ansi-J-STD001.
Besides, I don't think it is even possible to measure indivual boards in a =
panel with the IPC-prescribed measurement methods. To my opinion the =
supplier is definitely wrong.
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
>>> "Marsico, James" <[log in to unmask]> 03/14 1:48 pm >>>
I think this is a no-brainer, but here goes... We were delivered boards =
in
panel form from one of our suppliers. At Incoming Inspection, the panel =
was
rejected for excessive bow (>75% for SMT) and returned the supplier. The
supplier called me and said that even though the panel exceeded the bow
requirement, the individual boards were acceptable. When I quoted the bow
and twist requirement from IPC-6012, "Panels which contain multiple =
printed
boards which are assembled on the panel and later separated shall be
assessed in panel form." , he said yes, you measure the individual boards =
in
the panel. I need clarification.
Thanks,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
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Date: Thu, 14 Mar 2002 08:53:30 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Board Bow and Twist
X-To: [log in to unmask]
just shakin' the bush, or stirin' the pot, boss. 600 tells the story as 2.11
- flatness. However, there are so many large boards being designed, one must
consider only one board up on a panel. Getting pretty serious here even with
two up on an 18 by 24 panel. better watch it folks.
MoonMan
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Date: Thu, 14 Mar 2002 09:58:05 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bissonnette, Jean-Francois" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bissonnette, Jean-Francois" <[log in to unmask]>
Subject: Coating thickness
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Hi All,
Does anyone now of a technique or system to check conformal coating
thickness after it's dry on production units? We have a positector to=20
measure paint thickness on our enclosures but they're not design to
work on materials like PCB.
Jean-Fran=E7ois Bissonnette
V=E9rificateur, Contr=F4le de la Qualit=E9
=C9lectronique
Produits et Proc=E9d=E9s
Vapor Rail Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 x2021
(514) 335-4231 fax
<<Bissonnette, Jean-Francois.vcf>>=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally privileged and=
confidential information intended only for the use of the individual or en=
tity named herein. If the reader of this transmission is not the intended r=
ecipient, you are hereby notified that any dissemination, distribution, or =
copying of this transmission is strictly prohibited.
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Date: Thu, 14 Mar 2002 10:01:32 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: Board Bow and Twist
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
What if the panels are bowed beyond the .75% limit, the boards are not, I
can build them and I can use them? I know I'm answering my own question, I
should use them, right? Well, what's the purpose of the .75% requirement?
I would think that the requirement should be whatever is agreed upon between
customer and supplier. If I can live with 2%, why not (within reason).
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Franklin D Asbell [SMTP:[log in to unmask]]
Sent: Thursday, March 14, 2002 8:25 AM
To: [log in to unmask]
Subject: Re: [TN] Board Bow and Twist
James,
An afterthought, the bow and twist requirement is there to provide
ease of
board population as well as end use fit. If the board is warped
prior to
assembly, this indeed would affect population thus potentially
making the
boards unsuitable for end use...just something to think about, or
pass along
to your supplier.
Franklin
----- Original Message -----
From: "Marsico, James" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 14, 2002 6:48 AM
Subject: [TN] Board Bow and Twist
> I think this is a no-brainer, but here goes... We were delivered
boards
in
> panel form from one of our suppliers. At Incoming Inspection, the
panel
was
> rejected for excessive bow (>75% for SMT) and returned the
supplier. The
> supplier called me and said that even though the panel exceeded
the bow
> requirement, the individual boards were acceptable. When I quoted
the bow
> and twist requirement from IPC-6012, "Panels which contain
multiple
printed
> boards which are assembled on the panel and later separated shall
be
> assessed in panel form." , he said yes, you measure the individual
boards
in
> the panel. I need clarification.
> Thanks,
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
>
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Date: Thu, 14 Mar 2002 10:09:04 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Carlile <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Carlile <[log in to unmask]>
Subject: Re: Earls pics are up, and a question...
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="Windows-1252"
Content-Transfer-Encoding: 7bit
Peter:
I am trying my best to remain calm in regards to our quality issues, but I
am begining to lose my cool. I have eagerly read many responses from fellow
TechNet members with much respect and gratefullness, however it is only
fueling my fire. Your response that the manufacturers are trying to keep
there pricing down is right on target but it is killing me that they are
doing this on a thousand dollar part. They want to address cost, how about
the fact that they are killing a project which is very large dollars. Worse
yet, apparently most of us have been there and have had to perform analysis
to defend our findings as the customer. Where is customer service/support
in this industry? I was always taught that the customer was always right.
This is the way I perform my job and I expect this from those around me.
Forgive me that I have used your email to vent at, but you hit their nail on
the head with COST!!!
The manufacturer has agreed to return these parts, but I have still not
heard any possible admission of fault or even an apology for the grief it
has already given. As for the other manufacturer that we are having issues
with, the brick wall shows better support. But then again, monopolistic is
what the industry is turning into, just look at distribution!!!
Ken
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of
[log in to unmask]
Sent: Wednesday, March 13, 2002 10:14 PM
To: [log in to unmask]
Subject: Re: [TN] Earls pics are up, and a question...
>From what I've read, the problem doesn't look like black pad since the
balls were originally stuck to the device. Black pad would cause no wetting
or improper soldering. The pics show tiny areas distributed evenly across
the contact surface where complete alloying (i.e. solder jointing) has
taken place, but the largest proportion of the area is intermetallic
compound where the fracture has occurred. Strangely, most proper alloying,
usually seems to take place around the perimeter of the join, but I don't
see that here. Don't understand the phenomenon, so can't offer scientific
explanation, but I offer is as a snippet of info for your consideration.
Earl's problem looks very similar to one that our old friend Ingemar had at
Eriksson a while back. He produced a large paper on the investigation they
carried out - not 100% tidy, but very interesting reading indeed. One of
his conclusions was that the Nickel plating bath was maybe too high in
phosphor, causing weak or brittle Nickel layer. Another was Nickel
passivation, [possibly caused by the substrate drying out between plating
processes, or, as has been suggested, by too-thin a gold layer].
Given the commercial concerns of component manufacturers to offer product
at the cheapest prices, it could be that they are extending the life of
their plating baths too far in an attempt to keeps costs down. Earl, maybe
you ought to see how frequently TI and others change their baths, or
conversely, what they hold the phosphor content to. A recommendation I was
handed was that P. content shouldn't exceed about 8%, though I've heard of
10% being acceptable.
You have my heart-felt sympathy with your bains (and yes it is a proper
term, as in 'bain of your life').
Peter
"Furrow,
Robert Gordon To: [log in to unmask]
(Bob)" cc: (bcc: DUNCAN Peter/Asst
Prin Engr/ST
<furrow@LUCEN Aero/ST Group)
T.COM> Subject: Re: [TN] Earls pics
are up, and a
Sent by: question...
TechNet
<[log in to unmask]
ORG>
03/13/02
10:01 PM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
"Furrow,
Robert Gordon
(Bob)"
Earl,
As others have stated, the 10X picture looks like there was never intended
to be a ball there. Maybe it is the lower mag and a trick of the lighting
that makes it look that way. Anyway, on the other pics it looks a lot like
a
clean fracture right at the intermetallic layer. Is the underlying metal
nickel? Was the BGA fabricator using ENIG as a solderability coating prior
to the attachment of the balls? Could this be another case of "black pad"?
I
know we have had instances where this has been the case. Very low level
identified, but who knows how many times the actual cause is overlooked. As
with the ENIG issue on PWB surfaces, some suppliers may be able to
completely eliminate the problem, others may have it at a low level, and
the
unfortunate few may be plagued with this problem. Just some questions you
might want to check in to.
Thanks,
Robert Furrow
Printed Wiring Board Engineer
Supply Chain Networks
Lucent Technologies
978-960-3224 [log in to unmask]
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 8:31 AM
To: [log in to unmask]
Subject: Re: [TN] Earls pics are up, and a question...
Jim,
BGA's used to be my best friend, except for Arleen Weinberger and other
ladies of extreme beauty and brains. Now they are a bain, if tha's a proper
term. It's like the whole BGA world has gone to hell. Even board suppliers
are starting to suck who once had my total faith and confidence based on
constant evaluation, re-evaluation, and qualification.
At least now I have a compadre in this mess. Thanks for sharing the gief
but
I'm honestly stumped but for an undying dedication to gettin this damn
thing
resolved. The TI thing was bad enough but now another major supplier adds
to
the MESS.
Did you give us your paper and/or its location? I'm reading all I can, OVER
AND OVER AGAIN, notwithstanding posting my brains and guts out on this
site.
Hell, even Sir Werner and his cohorts can't do much. It has to be up to the
suppliers to come forth. Thought I was working concurrently with TI. Now
I'm
not sure again, and haven't even begun talking with the other major
supplier
with whom my last pics are associated.
Your statement about "Every time there was a component failure, it was
attributed to an open BGA solder joint" sure used to ring true but was
resolved, for a time. It seems now to be coming back.
Sorry about your, hopefully healed black eye, but should not have been the
case. However, some should suffer such a fate based on your thoughts about
how the missing ball attachment area looked compared to mine. This solder
"remnant" crap is exactly my problem and others soon to experience it. All
other surface conditions point to some process management inadequacies and
someone knows what they are and what are the failure modes/mechanisms. Just
looks like unsolderable surfaces to me and whatever happened to the IMC
layer whether too thick, too thin, or just plane way to oxidized.
My progress is limited to a very small company resource capability. The
company has spent way too much time and money doing minimal analysis. Who
the hell could afford to do more anyway. Like Sir Werner says, this crap is
just being thrown over the fence for all us ROOKIES to suck through a
garden
hose. I don't do that.
I believe you're right about the nickel gold thing. What else could it be.
TI even admitted one of its suppliers was replaced to do a better job. That
hasn't been proven yet either. Maybe Friday it will when we get our first
assemblies. We'll ge to the bottom, and I do mean bottom, of this soon but
maybe not soon enough for some.
Thanks JM for some outstanding insights. Finally feels a bit, though sadly,
comforting having someone else having gone through this.
Earl
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Date: Thu, 14 Mar 2002 08:04:32 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Board Bow and Twist
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
As an EMS and supporter of board houses I think you need to be careful here.
When scoring or routing with tabs you are removing material that may allow
the panel to bow and twist all over the place. Methodical DFM should be
practiced up front.
Rick
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Thursday, March 14, 2002 6:16 AM
To: [log in to unmask]
Subject: Re: [TN] Board Bow and Twist
Hi Jim
If you assemble PANELS then the bow and twist is measured on the PANELS.
If you assemble INDIVIDUAL BOARDS then the bow and twist is measured on
INDIVIDUAL BOARDS.
Susan Mansilla
Robisan Lab
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Date: Thu, 14 Mar 2002 09:10:47 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Dave Hillman <[log in to unmask]>
Subject: Re: High Rel BGA Guidelines
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Hi Bob! I recommend you contact Lee Whiteman at ACI/EMPF ("Lee Whiteman"
<[log in to unmask]>) to look at the EMMA program Technical Assessment
Guidelines (TAG). The TAG documents a 2 year NavyMantech program in which
ACI/Rockwell Collins/Crane/Raytheon looked at 21 types of area array
components on a variety of board laminate and surface finishes under
vibration, thermal cycling, and bias humidity testing conditions. Good
Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
"Crain, Bob" <[log in to unmask]>@ipc.org> on 03/13/2002 03:44:28 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to "Crain, Bob" <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: [TN] High Rel BGA Guidelines
We may soon be adding BGAs to our approved parts list for some programs. We
use polyamide boards and require electrical test under vibration and
thermal
cycling. What are the most important factors to address to maximize our
success?
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Date: Thu, 14 Mar 2002 10:20:28 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Carlile <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Carlile <[log in to unmask]>
Subject: Re: Board Bow and Twist
X-To: "Marsico, James" <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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Jim:
We just went thru a similar issue with our "FORMER" PCB supplier. If that
was their response, make this RMA the last correspondence with their PCB
house. You are having these boards manufactured on the panel so Bow and
Twist is still a factor. I am being driven crazy by customer service in
this industry. Thank goodness for IPC and a place to vent. Heck, if they
don't RMA these panels, just spread the word to us TechNetters so we'll know
who not to waste time with!!! But hell I bet we could all tell you the same
story.
When will the powers that be ever learn? After three RMA's out of four PO's
in December, the supplier actually had the audacity to call and ask why they
haven't seen any business lately!!! Excuse the pun but I wanted to tell
them to do the math!!!
Low Cost Suppliers = Low paid employees + POOR QUALITY
Ken
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Marsico, James
Sent: Thursday, March 14, 2002 7:49 AM
To: [log in to unmask]
Subject: [TN] Board Bow and Twist
I think this is a no-brainer, but here goes... We were delivered boards in
panel form from one of our suppliers. At Incoming Inspection, the panel was
rejected for excessive bow (>75% for SMT) and returned the supplier. The
supplier called me and said that even though the panel exceeded the bow
requirement, the individual boards were acceptable. When I quoted the bow
and twist requirement from IPC-6012, "Panels which contain multiple printed
boards which are assembled on the panel and later separated shall be
assessed in panel form." , he said yes, you measure the individual boards in
the panel. I need clarification.
Thanks,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
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Date: Thu, 14 Mar 2002 10:28:30 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Lee Whiteman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Lee Whiteman <[log in to unmask]>
Subject: Re: High Rel BGA Guidelines
X-To: "Crain, Bob" <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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Bob,
The recently completed EMMA (Electronic Miniaturization for Missile
Application) Program documented the performance of specific Leaded Surface
Mount, BGA, Flip Chip, and CSP electronic packages for vibration and thermal
reliability, on different board materials (FR4, Thermount, Polyimide) and
board finishes (OSP, ENIG).
If you (or anyone else) wishes information on the program and its results,
please contact me DIRECTLY (not through the TechNet Forum - I don't want to
offend the TechNet community).
Lee Whiteman
Senior Manufacturing Engineer
E-Mail: [log in to unmask] <mailto:[log in to unmask]>
Ph: (610) 362-1200 x208
Fax: (610) 362-1290
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Crain, Bob
> Sent: Wednesday, March 13, 2002 4:44 PM
> To: [log in to unmask]
> Subject: [TN] High Rel BGA Guidelines
>
>
> We may soon be adding BGAs to our approved parts list for some
> programs. We
> use polyamide boards and require electrical test under vibration
> and thermal
> cycling. What are the most important factors to address to maximize our
> success?
>
> ------------------------------------------------------------------
> ---------------
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Date: Thu, 14 Mar 2002 08:37:20 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Barry Gallegos <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Barry Gallegos <[log in to unmask]>
Subject: Person Search
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
G'day Tnetters.
I am looking for a gentleman by the name of
Anthony (Tony) Jepson.
any help is appreciated. this is a long shot by the way.
Barry.
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Date: Thu, 14 Mar 2002 07:38:40 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Crepeau, Phil" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crepeau, Phil" <[log in to unmask]>
Subject: Re: Board Bow and Twist two answers
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
wow. i love this response.
phil
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Thursday, March 14, 2002 5:21 AM
To: [log in to unmask]
Subject: Re: [TN] Board Bow and Twist two answers
Hi Jim
This is not a question where "the most votes" determines the answer.
The last sentence in para 3.4.4 states Panels which contain multiple printed
boards which are assembled on the panel and later separated SHALL be assessed
in panel form.
Susan Mansilla
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Date: Thu, 14 Mar 2002 17:45:44 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Coating thickness
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=iso-8859-1
Content-Transfer-Encoding: 8bit
Jean-François
Coat a lump of metal at the same time and use that to measure the
thickness.
Brian
"Bissonnette, Jean-Francois" wrote:
>
> Hi All,
>
> Does anyone now of a technique or system to check conformal coating
> thickness after it's dry on production units? We have a positector to
> measure paint thickness on our enclosures but they're not design to
> work on materials like PCB.
>
> Jean-François Bissonnette
> Vérificateur, Contrôle de la Qualité
> Électronique
> Produits et Procédés
> Vapor Rail Inc.
> 10655 Henri-Bourassa O.
> St-Laurent, Qc
> H4S 1A1
>
> (514) 335-4200 x2021
> (514) 335-4231 fax
>
> <<Bissonnette, Jean-Francois.vcf>>
>
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally privileged and confidential information intended only for the use of the individual or entity named herein. If the reader of this transmission is not the intended recipient, you are hereby notified that any dissemination, distribution, or copying of this transmission is strictly prohibited.
>
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Date: Thu, 14 Mar 2002 07:48:51 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Barmuta, Mike" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Barmuta, Mike" <[log in to unmask]>
Subject: Re: Unusual plated 'stuff' on copper surface
X-To: Franklin D Asbell <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Frank: I'm not sure what copper II is, I assume you are referring to pattern
plate electrolytic copper.
I have seen a similar occurrence of random appearing metallic fibers that
was driving me crazy because I couldn't find the source. Showed up on only a
few panels in a load but not in every load. Finally found the source, the
plating operator was using a "Scotch Brite" type pad to scrub down and clean
anode bars and exposed areas of the tank. He did not do it on every load,
only occasionally, beginning of shift, end of shift etc. As these cleaning
pads aged over time they began to break down and the metallic fibers would
go into the plating bath. When the a load of boards was placed in the bath
after this cleaning and electrified; ZAP the fibers would be attracted and
co-deposited onto the surface of the first boards in the tank.
I have also found these same pads sucked up in the filtration system and
decomposing causing similar conditions.
I don't know if that's what your fighting but it's worth looking into.
Good Luck!
Regards
Michael Barmuta
Staff Engineer
Fluke Corp.
Everett WA
425-446-6076
-----Original Message-----
From: Franklin D Asbell [mailto:[log in to unmask]]
Sent: Thursday, March 14, 2002 5:23 AM
To: [log in to unmask]
Subject: [TN] Unusual plated 'stuff' on copper surface
This past January we began seeing unusual 'growths' ((for lack of better
descriptive wording)) on the surface of panels after copper II, they are
typically observed on one end of the panels, often only a couple panels per
tankload exhibit this.
These 'growths' look like fine strands of metal of fabric fibers, they are
clustered together like someone poor shavings there, and plated over them.
If any of you recall pics of those bacteria found in that Mars asteroid from
the Antarctic, they appear similar to that (not saying we have bacteria
growing in our baths of course). Occasionally we see this out towards the
center of panels, I don't believe we have ever seen all panels in a tankload
exhibit this either. This condition is observed on one or two loads per day
(out of about 20 - 30), some days not at all.
We started seeing this in one bath (of three in house) until recently it
appeared in another bath simultaneously.
Any help on this would be greatly appreciated as our process engineers, lab
techs, and suppliers are baffled.
Thanks,
Franklin D Asbell
Network Circuits, Inc.
Irving, Texas 75061
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Date: Thu, 14 Mar 2002 07:49:51 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Crepeau, Phil" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crepeau, Phil" <[log in to unmask]>
Subject: Re: Coating thickness
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
hi,
i assume that you are talking about measuring the coating thickness on =
pwa's. if that's the case, i know of no way other than =
microsectioning the assembly. the reason is that (other than with =
parylene) it is impossible to get a uniform thickness. the problem has =
to do with surface tension. sharp points, corners and edges probably =
have no coating on them. fillets between components and the laminate =
surface have relatively high thicknesses to them. the usual way to =
control thickness (and it is essentially meaningless) is to coat a =
'witness' panel alongside the part you are coating. thickness is =
determined by measuring the thickness of the panel before and after =
coating.
phil
-----Original Message-----
From: Bissonnette, Jean-Francois [mailto:[log in to unmask]]
Sent: Thursday, March 14, 2002 6:58 AM
To: [log in to unmask]
Subject: [TN] Coating thickness
Hi All,
Does anyone now of a technique or system to check conformal coating
thickness after it's dry on production units? We have a positector to=20
measure paint thickness on our enclosures but they're not design to
work on materials like PCB.
Jean-Fran=E7ois Bissonnette
V=E9rificateur, Contr=F4le de la Qualit=E9
=C9lectronique
Produits et Proc=E9d=E9s
Vapor Rail Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 x2021
(514) 335-4231 fax
<<Bissonnette, Jean-Francois.vcf>>=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally privileged =
and confidential information intended only for the use of the =
individual or entity named herein. If the reader of this transmission =
is not the intended recipient, you are hereby notified that any =
dissemination, distribution, or copying of this transmission is =
strictly prohibited.
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847-509-9700 ext.5315
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Date: Thu, 14 Mar 2002 09:26:19 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Dave Hillman <[log in to unmask]>
Subject: Re: Unusual plated 'stuff' on copper surface
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset=iso-8859-1
Content-transfer-encoding: quoted-printable
Hi Franklin! Do you have any photos which Steve could post on his websi=
te?
Photos would be very helpful.
Dave Hillman
Rockwell Collins
[log in to unmask]
Franklin D Asbell <[log in to unmask]>@ipc.org> on 03/14/2002
07:23:11 AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please res=
pond
to Franklin D Asbell <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: [TN] Unusual plated 'stuff' on copper surface
This past January we began seeing unusual 'growths' ((for lack of bett=
er
descriptive wording)) on the surface of panels after copper II, they a=
re
typically observed on one end of the panels, often only a couple panel=
s
per tankload exhibit this.
These 'growths' look like fine strands of metal of fabric fibers, they=
are
clustered together like someone poor shavings there, and plated over t=
hem.
If any of you recall pics of those bacteria found in that Mars asteroi=
d
from the Antarctic, they appear similar to that (not saying we have
bacteria growing in our baths of course). Occasionally we see this out
towards the center of panels, I don't believe we have ever seen all pa=
nels
in a tankload exhibit this either. This condition is observed on one o=
r
two loads per day (out of about 20 - 30), some days not at all.
We started seeing this in one bath (of three in house) until recently =
it
appeared in another bath simultaneously.
Any help on this would be greatly appreciated as our process engineers=
,
lab techs, and suppliers are baffled.
Thanks,
Franklin D Asbell
Network Circuits, Inc.
Irving, Texas 75061
=
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Date: Thu, 14 Mar 2002 09:23:09 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Dave Hillman <[log in to unmask]>
Subject: Re: Solderability of BGA
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Hi Siggi! A number of folks are using the JSTD-002A Component Solderability
specification - test method S "Surface Mount Process Simulation" test. The
test methodology is to stencil a solderpaste footprint pattern onto a
nonwettable surface, place the BGA onto the footprint pattern, reflow,
clean and inspect. The BGA eutectic solderspheres and the solderpaste
should melt together to form coherent spheres - if you have a solderability
problem (e.g. contamination, oxidation) you would see wetting problems.
Good Luck.
Dave Hillman
JSTD002A Chairman
[log in to unmask]
"Zweigart, Siegmund" <[log in to unmask]>@ipc.org> on 03/14/2002
03:03:07 AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to "Zweigart, Siegmund" <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: [TN] Solderability of BGA
Hello
I am looking for some documents about solderability tests for BGA s with
eutectik balls. Can anybody help me in this subject?
We think that the BGA- Balls were touched by fingers and the solderiability
is significant reduced.
How can we analyse the component for fingerprints? We are thinking of
looking for NaCl.
Has anybody another idea?
Siggi
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Date: Thu, 14 Mar 2002 09:56:48 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: High Rel BGA Guidelines
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
What's the difference between polyimide and polyamide?
**Polyimide is a high Tg material usually trademarked as Kapton.
Polyamides are nylons and hot melt adhesives. Much lower heat resistance.
Doug Pauls
Rockwell Collins
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=========================================================================
Date: Thu, 14 Mar 2002 11:02:06 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Coating thickness
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_14c.a72c405.29c2237e_boundary"
--part1_14c.a72c405.29c2237e_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
For silicone at least we have used an ultrasonic gauge with resolution to
.0001" - only catch was thicknesses had to be greater than 2-3 mil for it to
be accurate (we were applying 8 mils). The Panametrics gauge & transducer
were calibrated to a sample of the coating.
Regards,
Mike Sewell
--part1_14c.a72c405.29c2237e_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><BODY BGCOLOR="#ffffff"><FONT style="BACKGROUND-COLOR: #ffffff" SIZE=2>For silicone at least we have used an ultrasonic gauge with resolution to .0001" - only catch was thicknesses had to be greater than 2-3 mil for it to be accurate (we were applying 8 mils). The Panametrics gauge & transducer were calibrated to a sample of the coating.<BR>
<BR>
Regards,<BR>
Mike Sewell<BR>
<BR>
</FONT></HTML>
--part1_14c.a72c405.29c2237e_boundary--
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Date: Thu, 14 Mar 2002 10:07:06 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Board Bow and Twist
X-To: [log in to unmask]
Now this is starting to get interesting. The first comment about DFM, how
about that?
Taking it a step farther, as part of my stiring the pot response way
earlier, we need to get sensible. You acceptance experts easily find the
right IPC thing and test method. Well ain't that great.
The whole point of this incredible exercise is about designing - not
accepting after the damn thing does or does not work for BGA's or whatever
needing minimal bow and twist.
You hot shot designers out there have to be thinking about what you need. If
you have a board needing .75% then design your board accordingly. As I said
before, panelization is very important in this case. You must not design a
two up panel when you know it will not be possible to meet the requirement.
Board shops know most of this but designers must get on top of it. We all
know about balanced constructions but few realize how designing a board's
size and thickness on a panel will make or break you.
If you're on the edge of being two up, and have a critical need, make sure
it's done on a one up. If you have critical requirements, keep it simple
stupid while realizing what design considerations you make will affect Ken
Carlile's boards. His designers certainly did not think about it and look
what he's bitching about now notwithstanding poor supplier selection.
MoonStraightMan
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=========================================================================
Date: Thu, 14 Mar 2002 11:22:50 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
tony steinke <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: tony steinke <[log in to unmask]>
Subject: Re: Board Bow and Twist
X-To: Earl Moon <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Amen to your statement Moonman
----- Original Message -----
From: Earl Moon <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 14, 2002 8:07 AM
Subject: Re: [TN] Board Bow and Twist
> Now this is starting to get interesting. The first comment about DFM, how
> about that?
>
> Taking it a step farther, as part of my stiring the pot response way
> earlier, we need to get sensible. You acceptance experts easily find the
> right IPC thing and test method. Well ain't that great.
>
> The whole point of this incredible exercise is about designing - not
> accepting after the damn thing does or does not work for BGA's or whatever
> needing minimal bow and twist.
>
> You hot shot designers out there have to be thinking about what you need.
If
> you have a board needing .75% then design your board accordingly. As I
said
> before, panelization is very important in this case. You must not design a
> two up panel when you know it will not be possible to meet the
requirement.
>
> Board shops know most of this but designers must get on top of it. We all
> know about balanced constructions but few realize how designing a board's
> size and thickness on a panel will make or break you.
>
> If you're on the edge of being two up, and have a critical need, make sure
> it's done on a one up. If you have critical requirements, keep it simple
> stupid while realizing what design considerations you make will affect Ken
> Carlile's boards. His designers certainly did not think about it and look
> what he's bitching about now notwithstanding poor supplier selection.
>
>
> MoonStraightMan
>
> --------------------------------------------------------------------------
-------
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> Please visit IPC web site http://www.ipc.org/html/forum.htm for additional
> information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700
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> --------------------------------------------------------------------------
-------
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=========================================================================
Date: Thu, 14 Mar 2002 09:11:53 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Pete Phillips <[log in to unmask]>
Subject: Re: Person Search
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Have you tried www.Switchoard.com
> Pete
>
> Honeywell
>
> Peter A. Phillips
> Principal Quality Engineer
> OH-58 Kiowa Warrior
> Defense Avionics Systems
> 9201 San Mateo Blvd. NE
> Mail Station NM75-C18
> Albuquerque, NM 87113-2227
> (505) 828-5078 Phone
> (505) 828-5249 Fax
> (505) 530-7147 Pager
[log in to unmask]
-----Original Message-----
From: Barry Gallegos [mailto:[log in to unmask]]
Sent: Thursday, March 14, 2002 8:37 AM
To: [log in to unmask]
Subject: [TN] Person Search
G'day Tnetters.
I am looking for a gentleman by the name of
Anthony (Tony) Jepson.
any help is appreciated. this is a long shot by the way.
Barry.
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Date: Thu, 14 Mar 2002 11:31:59 -0500
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Chris Christian <[log in to unmask]>
Subject: Re: Person Search
X-To: Barry Gallegos <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Have you tried anywho.com?
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Barry Gallegos
Sent: Thursday, March 14, 2002 10:37 AM
To: [log in to unmask]
Subject: [TN] Person Search
G'day Tnetters.
I am looking for a gentleman by the name of
Anthony (Tony) Jepson.
any help is appreciated. this is a long shot by the way.
Barry.
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Date: Thu, 14 Mar 2002 08:32:48 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Roger Stoops <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Roger Stoops <[log in to unmask]>
Subject: Re: Board Bow and Twist
X-To: "Marsico, James" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Food for thought:
IF a board supplier can make an entire board the same size as your panel,
and it meets the warp and twist spec for SMT, then why do they have
difficulty with a board that has multiple images of a smaller board?
I would hazard to think (and it IS a hazard) that the warp and twist spec
would apply to the entire board, whether 1-up or multiple ups.
Ask your board vendor, if they don't want to deliver a panelized board
within spec, how could you trust them to deliver a single board, the same
size, within spec? And don't accept an argument of "routing between the
panels relieves stress so they warp easily." What if the single large board
had multiple routes/cutouts?
Either the board design needs to be examined for balance of design, or your
vendor. Sounds like they may have lost control of their process somewhere.
Sincerely,
Roger M. Stoops, CID [log in to unmask]
-----Original Message-----
From: Marsico, James [mailto:[log in to unmask]]
Sent: Thursday, March 14, 2002 7:49 AM
To: [log in to unmask]
Subject: [TN] Board Bow and Twist
I think this is a no-brainer, but here goes... We were delivered boards in
panel form from one of our suppliers. At Incoming Inspection, the panel was
rejected for excessive bow (>75% for SMT) and returned the supplier. The
supplier called me and said that even though the panel exceeded the bow
requirement, the individual boards were acceptable. When I quoted the bow
and twist requirement from IPC-6012, "Panels which contain multiple printed
boards which are assembled on the panel and later separated shall be
assessed in panel form." , he said yes, you measure the individual boards in
the panel. I need clarification.
Thanks,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
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Date: Thu, 14 Mar 2002 08:52:23 -0800
Reply-To: Leo Roos <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Leo Roos <[log in to unmask]>
Subject: Re: Coating thickness
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
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Hi:
One of the ways development laboratories determine coating thickness is by
measuring dry coating weight. For filled soldermask, a coating weight
between ~35-40 mg/100 sq. cm translates into 2.5 microns thickness.
Unfortunately, this is only an average thickness over the entire board,
lines etc., but it is indicative to some degree of coating thickness. In the
case of unfilled organic materials, the factor is ~30 mg/100 sq. cm. These
values were obtained by measuring densities of the materials and converting
these to the above factors using actual measurements.
Leo Roos
----- Original Message -----
From: "Bissonnette, Jean-Francois" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 14, 2002 6:58 AM
Subject: [TN] Coating thickness
----------------------------------------------
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Date: Thu, 14 Mar 2002 12:02:13 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Lee Whiteman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Lee Whiteman <[log in to unmask]>
Subject: Re: High Rel BGA Guidelines
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GANG,
Like I said, give me a call DIRECTLY, offline so that I do not offend the
TechNet community.
Give me the following information (for ACI's records) and I'll get a CD-ROM
made up for you.
Name
Title
Company Name
Address (Shipping since I plan to Airborne Express it to you.)
Telephone Number
FAX Number
E-Mail
Give me a couple of days but you'll get it.
Lee Whiteman
Senior Manufacturing Engineer
E-Mail: [log in to unmask] <mailto:[log in to unmask]>
Ph: (610) 362-1200 x208
Fax: (610) 362-1290
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Dave Hillman
> Sent: Thursday, March 14, 2002 10:11 AM
> To: [log in to unmask]
> Subject: Re: [TN] High Rel BGA Guidelines
>
>
> Hi Bob! I recommend you contact Lee Whiteman at ACI/EMPF ("Lee Whiteman"
> <[log in to unmask]>) to look at the EMMA program Technical Assessment
> Guidelines (TAG). The TAG documents a 2 year NavyMantech program in which
> ACI/Rockwell Collins/Crane/Raytheon looked at 21 types of area array
> components on a variety of board laminate and surface finishes under
> vibration, thermal cycling, and bias humidity testing conditions. Good
> Luck.
>
> Dave Hillman
> Rockwell Collins
> [log in to unmask]
>
>
>
>
>
> "Crain, Bob" <[log in to unmask]>@ipc.org> on 03/13/2002 03:44:28 PM
>
> Please respond to "TechNet E-Mail Forum." <[log in to unmask]>;
> Please respond
> to "Crain, Bob" <[log in to unmask]>
>
> Sent by: TechNet <[log in to unmask]>
>
>
> To: [log in to unmask]
> cc:
>
> Subject: [TN] High Rel BGA Guidelines
>
>
> We may soon be adding BGAs to our approved parts list for some
> programs. We
> use polyamide boards and require electrical test under vibration and
> thermal
> cycling. What are the most important factors to address to maximize our
> success?
>
> ------------------------------------------------------------------
> ---------------
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Date: Thu, 14 Mar 2002 11:01:14 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Board Bow and Twist
X-To: [log in to unmask]
Right on Roger,
The big thing, even before DFM/CE, is to properly evaluate and qualify
suppliers. What's wrong with this picture? Simply, it needs a picture. Start
with the master drawing notes. Anyone remeber them, read them, reply to
them, use them, or other wise abuse them?
Hell, most suppliers worth a salt respond and critisize them as part of the
CE process. Some actually offer constructive suggestions while others just
go away or say it can't be done. Still others say sure we can do it with no
hope of even coming close to understanding or meeting requirements.
Specify away all you want. If the master drawing does not exactly say what
you demand, you won't get it. Also, you won't even know what your supplier
is going to do to your dumb ass.
My simple thesis in all this is evaluate, qualify, and use only those
suppliers qualified to do what you demand on the master drawing. Then,
accept your dumb ass away all you want but ass is the back end of everything.
MoonMan
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Date: Thu, 14 Mar 2002 17:22:37 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Atkinson, Neil" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Atkinson, Neil" <[log in to unmask]>
Subject: lead Free
MIME-Version: 1.0
Content-Type: text/plain; charset="ISO-8859-1"
One of our suppliers is 'proposing' a new lead free finish which he says
will solder perfectly well with 'normal' SnPb solder as well as Lead Free.
The finishes they are proposing are SnAg, SnBi and SnCuAg. my question is,
Does anyone have experience with using these finishes through a normal
process and are there any 'pitfalls' top look out for.
There is a lot of talk about total Pb free processes but what about the
interim - are the new finishes 'backwards compatible'!!
Thanks in anticipation of everyone's responses.
Neil
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Date: Thu, 14 Mar 2002 11:24:45 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: QUALIFIED SUPPLIERS
For anyone interested, or not,
My client followed my dumb ass suggestion to use one of my "qualified"
suppliers. My client now is frustrated. Wonder why?
One of the best little board shops sent some "good" boards back with a
required xsection slug with no photos.
As dear Susan says at Robisan, we don't send photomicrographs with good
boards. I say please do it anyway because we need to keep records, and train
our people what looks good or bad even though we are not as HIGHLY qualified
as the lab.
My client asked for a photomicrograph from our supplier. The response was:
what's a photomicrographs?
I'm going back to my cave. What the hell is going on outside will no longer
concern me as you all keep asking what's wrong with quality and suppliers
these days.
MoonNowBackInCaveMan
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Date: Thu, 14 Mar 2002 12:47:37 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: Coating thickness
MIME-Version: 1.0
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I agree with Brian. We place a 2x3" piece of aluminum plate next to =
the
assembly during coating, which gets coated at the same time. A part of =
the
plate is masked with tape so you can measure before and after cure.
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>=20
631-595-5879
-----Original Message-----
From: Brian Ellis [SMTP:[log in to unmask]]
Sent: Thursday, March 14, 2002 10:46 AM
To: [log in to unmask]
Subject: Re: [TN] Coating thickness
Jean-Fran=E7ois
Coat a lump of metal at the same time and use that to measure the
thickness.
Brian
"Bissonnette, Jean-Francois" wrote:
>
> Hi All,
>
> Does anyone now of a technique or system to check conformal
coating
> thickness after it's dry on production units? We have a
positector to
> measure paint thickness on our enclosures but they're not design
to
> work on materials like PCB.
>
> Jean-Fran=E7ois Bissonnette
> V=E9rificateur, Contr=F4le de la Qualit=E9
> =C9lectronique
> Produits et Proc=E9d=E9s
> Vapor Rail Inc.
> 10655 Henri-Bourassa O.
> St-Laurent, Qc
> H4S 1A1
>
> (514) 335-4200 x2021
> (514) 335-4231 fax
>
> <<Bissonnette, Jean-Francois.vcf>>
>
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally
privileged and confidential information intended only for the use of =
the
individual or entity named herein. If the reader of this transmission =
is not
the intended recipient, you are hereby notified that any dissemination,
distribution, or copying of this transmission is strictly prohibited.
>
>
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Date: Thu, 14 Mar 2002 17:53:42 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Subject: Re: Unusual plated 'stuff' on copper surface
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This message is in MIME format. Since your mail reader does not understand
this format, some or all of this message may not be legible.
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Hey Frank,
We're talking electrolytic and not electroless right?
Dendrites on the panel edges sound like copper burning but your folks have
to know about that. Sounds like a random, process related cause. When are
adds made? How often do you carbon treat? Do you use plating bags (where
could the fibers be coming from)?
We had a new plating operator take it upon himself to "clean" plating bars
with the old circulation filter once a week. We'd turn the agitation off
and you'd see these white fuzzies floating in the tanks but I'd never heard
of any getting plated. I've also heard of metal tools getting "lost" in the
bottom of a tank and that contributing to weird plating but it showed on
every batch.
Hans
AC-130 Gunship Motto: "You can run but you'll only die tired."
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask] <mailto:[log in to unmask]>
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: Franklin D Asbell [mailto:[log in to unmask]]
Sent: Thursday, March 14, 2002 8:23 AM
To: [log in to unmask]
Subject: [TN] Unusual plated 'stuff' on copper surface
This past January we began seeing unusual 'growths' ((for lack of better
descriptive wording)) on the surface of panels after copper II, they are
typically observed on one end of the panels, often only a couple panels per
tankload exhibit this.
These 'growths' look like fine strands of metal of fabric fibers, they are
clustered together like someone poor shavings there, and plated over them.
If any of you recall pics of those bacteria found in that Mars asteroid from
the Antarctic, they appear similar to that (not saying we have bacteria
growing in our baths of course). Occasionally we see this out towards the
center of panels, I don't believe we have ever seen all panels in a tankload
exhibit this either. This condition is observed on one or two loads per day
(out of about 20 - 30), some days not at all.
We started seeing this in one bath (of three in house) until recently it
appeared in another bath simultaneously.
Any help on this would be greatly appreciated as our process engineers, lab
techs, and suppliers are baffled.
Thanks,
Franklin D Asbell
Network Circuits, Inc.
Irving, Texas 75061
------_=_NextPart_001_01C1CB81.2DC772B0
Content-Type: text/html;
charset="iso-8859-1"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
<META content="MSHTML 6.00.2712.300" name=GENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=#ffffff>
<DIV><SPAN class=028554614-14032002><FONT color=#0000ff>Hey
Frank,</FONT></SPAN></DIV>
<DIV><SPAN class=028554614-14032002><FONT
color=#0000ff></FONT></SPAN> </DIV>
<DIV><SPAN class=028554614-14032002><FONT color=#0000ff>We're talking
electrolytic and not electroless right?</FONT></SPAN></DIV>
<DIV><SPAN class=028554614-14032002><FONT
color=#0000ff></FONT></SPAN> </DIV>
<DIV><SPAN class=028554614-14032002><FONT color=#0000ff>Dendrites on the panel
edges sound like copper burning but your folks have to know about that.
Sounds like a random, process related cause. When are adds made? How
often do you carbon treat? Do you use plating bags (where could the fibers
be coming from)? </FONT></SPAN></DIV>
<DIV><SPAN class=028554614-14032002><FONT
color=#0000ff></FONT></SPAN> </DIV>
<DIV><SPAN class=028554614-14032002><FONT color=#0000ff>We had a new plating
operator take it upon himself to "clean" plating bars with the
old circulation filter once a week. We'd turn the agitation off
and you'd see these white fuzzies floating in the tanks but I'd never heard of
any getting plated. I've also heard of metal tools getting "lost" in the
bottom of a tank and that contributing to weird plating but it showed on every
batch. </FONT></SPAN></DIV>
<DIV><SPAN class=028554614-14032002><FONT
color=#0000ff></FONT></SPAN> </DIV>
<DIV><SPAN class=028554614-14032002><FONT color=#0000ff>Hans</FONT></SPAN></DIV>
<DIV><SPAN class=028554614-14032002><FONT
color=#0000ff></FONT></SPAN> </DIV>
<DIV><SPAN class=028554614-14032002>
<P><FONT face=Verdana>AC-130 Gunship Motto: "You can run but you'll only die
tired."</FONT> <BR><FONT
face=Verdana>~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</FONT> <BR><FONT
face=Verdana>Hans M. Hinners</FONT> <BR><FONT face=Verdana>Electronics
Engineer</FONT> <BR><FONT face=Verdana>Warner Robins - Air Logistics Center
(WR-ALC/LUGE)</FONT> <BR><FONT face=Verdana>226 Cochran Street</FONT> <BR><FONT
face=Verdana>Robins AFB GA 31098-1622</FONT> </P>
<P><FONT face=Verdana><A
href="mailto:[log in to unmask]">mailto:[log in to unmask]</A></FONT>
</P>
<P><FONT face=Verdana>Com: (478) 926 - 5224</FONT> <BR><FONT
face=Verdana>Fax: (478) 926 - 4911</FONT> <BR><FONT face=Arial
size=2>DSN Prefix: 468</FONT> </P></SPAN></DIV>
<BLOCKQUOTE dir=ltr style="MARGIN-RIGHT: 0px">
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Franklin D Asbell
[mailto:[log in to unmask]]<BR><B>Sent:</B> Thursday, March 14, 2002
8:23 AM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] Unusual plated
'stuff' on copper surface<BR><BR></FONT></DIV>
<DIV><FONT face=Arial size=2>This past January we began seeing unusual
'growths' ((for lack of better descriptive wording)) on the surface of panels
after copper II, they are typically observed on one end of the panels, often
only a couple panels per tankload exhibit this.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2>These 'growths' look like fine strands of metal
of fabric fibers, they are clustered together like someone poor shavings
there, and plated over them. If any of you recall pics of those bacteria found
in that Mars asteroid from the Antarctic, they appear similar to that (not
saying we have bacteria growing in our baths of course). Occasionally we see
this out towards the center of panels, I don't believe we have ever seen all
panels in a tankload exhibit this either. This condition is observed on one or
two loads per day (out of about 20 - 30), some days not at all.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2>We started seeing this in one bath (of three in
house) until recently it appeared in another bath simultaneously.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2>Any help on this would be greatly appreciated as
our process engineers, lab techs, and suppliers are baffled.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2>Thanks,</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2>Franklin D Asbell</FONT></DIV>
<DIV><FONT face=Arial size=2>Network Circuits, Inc.</FONT></DIV>
<DIV><FONT face=Arial size=2>Irving, Texas 75061</FONT></DIV>
<DIV> </DIV></BLOCKQUOTE></BODY></HTML>
------_=_NextPart_001_01C1CB81.2DC772B0--
------=_NextPartTM-000-b490e756-3763-11d6-b56a-00508bf7d80d--
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Date: Thu, 14 Mar 2002 12:56:57 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: Board Bow and Twist
MIME-Version: 1.0
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WOW! Seem to hit on a touchy subject!
Jim Marsico
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Date: Thu, 14 Mar 2002 11:59:25 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jack Crawford <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jack Crawford <[log in to unmask]>
Subject: Bow and Twist and Stds and TMs
Mime-Version: 1.0
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This is a MIME message. If you are reading this text, you may want to
consider changing to a mail reader or gateway that understands how to
properly handle MIME multipart messages.
--=_207D8101.28492996
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: quoted-printable
Several statements in this discussion thread lend themselves to IPC =
position responses.
1. IPC-TM-650 test methods provide a standardize means to reach a =
conclusion. The test methods do not provide pass/fail criteria for the =
conclusion.
2. A standard provides the pass/fail criteria for a given use of a test =
method; e.g. 2.4.22 is referenced by the bare board acceptance documents =
IPC-6012 and IPC-A-600 and these standards provide maximum bow and twist =
allowances for SMT and through-hole bare boards.
3. The acceptance criteria from any standard is only applicable when the =
user and the supplier agree to use it (see the "Notice" on the inside =
cover of any IPC standard).
4. Most IPC standards have a precedence clause that states the procurement =
contract/documentation/drawings take precedence over the standard. Any =
documented agreement between user and supplier such as Jim Marsico's 2% =
bow and twist example effectively become the criteria the supplier has to =
work to. The term "exception statement" is sometimes applied to this =
situation.=20
Don't lose sight of your goal: (1) have parts/materials that are (2) =
usable in the defined process to (3) provide an product that (4) meets =
form/fit/function/reliability of the next assembly. The assembler/supplier =
should know what (2) is; the end user should know what (4) is. IPC-A-610 =
has a good statement in 1.3 that can be applied to most industry consensus =
standards:=20
"IPC-A-610, as an industry consensus document, cannot address all of the =
possible components and product design combinations. However, the standard =
does provide criteria for commonly used technologies. Where uncommon or =
specialized components or technologies are necessary, good judgment should =
be used while applying the criteria of this standard. However, where =
similar characteristics exist, this document may provide guidance for =
product acceptance criteria. Often, unique definition is necessary to =
consider the specialized characteristics while considering product =
performance criteria. The development should include customer involvement =
or consent and the criteria should include agreed definition of product =
acceptance.
"Whenever possible this criteria should be submitted to the IPC Technical =
Committee to be considered for inclusion in upcoming revisions of this =
standard."
Jack
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
APEX 2003 - the industry's premier trade show in Electronics
Manufacturing, March 31-April 2, 2003, Anaheim, California.
More information on website www.goapex.org
--------
Jack Crawford, IPC Director of Assembly Standards and Technology
2215 Sanders Road, Northbrook IL 60062-6135
[log in to unmask]
847-790-5393
fax 847-504-2393
--=_207D8101.28492996
Content-Type: text/html; charset=ISO-8859-1
Content-Transfer-Encoding: quoted-printable
Content-Description: HTML
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; charset=3Diso-8859-1"=
>
<META content=3D"MSHTML 5.50.4134.600" name=3DGENERATOR></HEAD>
<BODY style=3D"MARGIN-TOP: 2px; FONT: 8pt MS Sans Serif; MARGIN-LEFT: =
2px">
<DIV><FONT size=3D1></FONT>Several statements in this discussion thread =
lend=20
themselves to IPC position responses.</DIV>
<DIV> </DIV>
<DIV>1. IPC-TM-650 test methods provide a standardize means to reach a=20
conclusion. The test methods do not provide pass/fail criteria for =
the=20
conclusion.</DIV>
<DIV> </DIV>
<DIV>2. A standard provides the pass/fail criteria for a given use of a =
test=20
method; e.g. 2.4.22 is referenced by the bare board acceptance documents=20=
IPC-6012 and IPC-A-600 and these standards provide maximum bow and =
twist=20
allowances for SMT and through-hole bare boards.</DIV>
<DIV> </DIV>
<DIV>3. The acceptance criteria from any standard is only applicable when =
the=20
user and the supplier agree to use it (see the "Notice" on the inside =
cover=20
of any IPC standard).</DIV>
<DIV> </DIV>
<DIV>4. Most IPC standards have a precedence clause that states the =
procurement=20
contract/documentation/drawings take precedence over the standard. Any=20
documented agreement between user and supplier such as Jim Marsico's 2% =
bow and=20
twist example effectively become the criteria the supplier has to work to. =
The=20
term "exception statement" is sometimes applied to this situation. </D=
IV>
<DIV> </DIV>
<DIV>Don't lose sight of your goal: (1) have parts/materials that are =
(2)=20
usable in the defined process to (3) provide an product that (4) meets=20
form/fit/function/reliability of the next assembly. The assembler/supplier=
=20
should know what (2) is; the end user should know what (4) is. IPC-A-610 =
has a=20
good statement in 1.3 that can be applied to most industry consensus =
standards:=20
</DIV>
<DIV> </DIV>
<DIV>"IPC-A-610, as an industry consensus document, cannot address all of =
the=20
possible components and product design combinations. However, the standard =
does=20
provide criteria for commonly used technologies. Where uncommon or =
specialized=20
components or technologies are necessary, good judgment should be used =
while=20
applying the criteria of this standard. However, where similar characterist=
ics=20
exist, this document may provide guidance for product acceptance =
criteria.=20
Often, unique definition is necessary to consider the specialized=20
characteristics while considering product performance criteria. The =
development=20
should include customer involvement or consent and the criteria should =
include=20
agreed definition of product acceptance.</DIV>
<DIV><BR>"Whenever possible this criteria should be submitted to the =
IPC=20
Technical Committee to be considered for inclusion in upcoming revisions =
of this=20
standard."</DIV>
<DIV> </DIV>
<DIV>Jack</DIV>
<DIV> </DIV>
<DIV>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D<BR>APEX 2003 - =
the industry's=20
premier trade show in Electronics<BR>Manufacturing, March 31-April 2, =
2003,=20
Anaheim, California.<BR>More information on website <A=20
href=3D"http://www.goapex.org">www.goapex.org</A><BR>--------<BR>Jack =
Crawford,=20
IPC Director of Assembly Standards and Technology<BR>2215 Sanders Road,=20
Northbrook IL 60062-6135<BR><A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A> <BR>847-790-5393<BR>fax=
=20
847-504-2393</DIV></BODY></HTML>
--=_207D8101.28492996--
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Date: Thu, 14 Mar 2002 14:01:32 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Gregg Klawson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Gregg Klawson <[log in to unmask]>
Subject: HDI thermal stress IPC-6016
MIME-version: 1.0
Content-type: text/plain; format=flowed; charset=us-ascii
Hello Technetters,
We're having a little trouble interpreting the HDI spec, IPC-6016,
paragraph 3.6.1, "Thermal Stress Method". This paragraph tells us to test
per IPC-TM-650, method 2.6.8 condition B and "the number of cycles shall be
five (unless limited by the number of stress cycles acceptable for the core
board) or as specified on the appropriate slash sheet." Does this mean we
are to float the test coupon on the solder pot five times?? The TM doesn't
say anything about more than one dip in the solder pot? Five, 10 second
floats on 260C solder seems a bit harsh and un-realistic. What am I missing?
Best regards,
Gregg Klawson
General Dynamics C4 Systems
Taunton, Massachusetts, USA
mailto:[log in to unmask]
The views expressed are the author's and do not necessarily reflect the
official position of General Dynamics or any of its subsidiaries.
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=========================================================================
Date: Thu, 14 Mar 2002 14:22:11 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Carroll, George" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Carroll, George" <[log in to unmask]>
Subject: Re: Coating thickness
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
We use a CMI CGX-B. It's an eddy current device, I believe. The catch =
is
that you have to measure over bare copper and the unit has to be =
calibrated
on the same type of subtrate (uncoated ) as you will measure the =
coating.
Our process is conveyorized (horizontal)with a programmed robot =
sprayer.
What I've had done is to have FR-4 cut up into 1/2 X 3/4" squares and =
have
the operator place a square in an area that will be coated. After the =
drying
oven, the coating on the square is measured using the CMI. The area =
where
the test square sat is touched up. We have some designs that have =
bare
copper areas left on the panel border for measuring and we've also used
copper adhesive tape. Again, the key is to calibrate on an identical
substrate. A certified thickness of mylar is used for calibration. I
believe a beta back-scatter device would also be capable.
George Carroll
Process Engineer
Siemens Energy and Automation
Johnson City, TN
[log in to unmask]
-----Original Message-----
From: Bissonnette, Jean-Francois [mailto:[log in to unmask]]
Sent: Thursday, March 14, 2002 9:58 AM
To: [log in to unmask]
Subject: [TN] Coating thickness
Hi All,
Does anyone now of a technique or system to check conformal coating
thickness after it's dry on production units? We have a positector to=20
measure paint thickness on our enclosures but they're not design to
work on materials like PCB.
Jean-Fran=E7ois Bissonnette
V=E9rificateur, Contr=F4le de la Qualit=E9
=C9lectronique
Produits et Proc=E9d=E9s
Vapor Rail Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 x2021
(514) 335-4231 fax
<<Bissonnette, Jean-Francois.vcf>>=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally privileged =
and
confidential information intended only for the use of the individual or
entity named herein. If the reader of this transmission is not the =
intended
recipient, you are hereby notified that any dissemination, =
distribution, or
copying of this transmission is strictly prohibited.
------------------------------------------------------------------------=
----
-----
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in
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[log in to unmask]: SET
Technet NOMAIL
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847-509-9700
ext.5315
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----
-----
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Date: Thu, 14 Mar 2002 14:42:47 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: lead Free
X-To: "Atkinson, Neil" <[log in to unmask]>
In-Reply-To: <717AC798D8CBD211B6B70004AC4C5685726DBA@SERVER01>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
The three alloys you mention are three of the "top dogs" in the hunt for a
lead-free alloy.
They are not drop in. Check out the IPC Leadfree discussion group.
http://jefry.ipc.org/archives/leadfree.html
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Atkinson, Neil
> Sent: Thursday, March 14, 2002 12:23 PM
> To: [log in to unmask]
> Subject: [TN] lead Free
>
>
> One of our suppliers is 'proposing' a new lead free finish which he says
> will solder perfectly well with 'normal' SnPb solder as well as Lead Free.
>
> The finishes they are proposing are SnAg, SnBi and SnCuAg. my
> question is,
> Does anyone have experience with using these finishes through a normal
> process and are there any 'pitfalls' top look out for.
>
> There is a lot of talk about total Pb free processes but what about the
> interim - are the new finishes 'backwards compatible'!!
>
> Thanks in anticipation of everyone's responses.
>
> Neil
>
>
>
>
>
>
>
>
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Date: Thu, 14 Mar 2002 12:42:12 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bloomquist, Ken" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bloomquist, Ken" <[log in to unmask]>
Subject: Re: Coating thickness
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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This works great and it's the process we mainly use to verify coating
thickness but one word of caution. When we have a new operator we =
stress the
importance of proper coating thickness. Because of this emphasis I have
observed the operator paying more attention to coating the coupon than =
the
circuit boards. To help prevent this we place the coupon on a little =
stand
in the middle of the pallet of boards they are spraying. By the way we =
use
glass coupons instead of metal.
KennyB
-----Original Message-----
From: Marsico, James [mailto:[log in to unmask]]=20
Sent: Thursday, March 14, 2002 9:48 AM
To: [log in to unmask]
Subject: Re: [TN] Coating thickness
I agree with Brian. We place a 2x3" piece of aluminum plate next to =
the
assembly during coating, which gets coated at the same time. A part of =
the
plate is masked with tape so you can measure before and after cure.
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>=20
631-595-5879
-----Original Message-----
From: Brian Ellis [SMTP:[log in to unmask]]
Sent: Thursday, March 14, 2002 10:46 AM
To: [log in to unmask]
Subject: Re: [TN] Coating thickness
Jean-Fran=E7ois
Coat a lump of metal at the same time and use that to measure =
the
thickness.
Brian
"Bissonnette, Jean-Francois" wrote:
>
> Hi All,
>
> Does anyone now of a technique or system to check conformal
coating
> thickness after it's dry on production units? We have a
positector to
> measure paint thickness on our enclosures but they're not =
design
to
> work on materials like PCB.
>
> Jean-Fran=E7ois Bissonnette
> V=E9rificateur, Contr=F4le de la Qualit=E9
> =C9lectronique
> Produits et Proc=E9d=E9s
> Vapor Rail Inc.
> 10655 Henri-Bourassa O.
> St-Laurent, Qc
> H4S 1A1
>
> (514) 335-4200 x2021
> (514) 335-4231 fax
>
> <<Bissonnette, Jean-Francois.vcf>>
>
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally
privileged and confidential information intended only for the use of =
the
individual or entity named herein. If the reader of this transmission =
is not
the intended recipient, you are hereby notified that any dissemination,
distribution, or copying of this transmission is strictly prohibited.
>
>
------------------------------------------------------------------------=
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-----
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LISTSERV
1.8d
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> the BODY (NOT the subject field): SIGNOFF Technet
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&
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for
additional
> information, or contact Keach Sasamori at [log in to unmask] or
847-509-9700 ext.5315
>
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-----
=09
------------------------------------------------------------------------=
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=09
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Date: Thu, 14 Mar 2002 10:15:36 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bloomquist, Ken" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bloomquist, Ken" <[log in to unmask]>
Subject: Re: Coating thickness
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Another method for measuring thickness is to do a wet gage test at the time
of coating. As mentioned before this is only good for the flat surfaces and
gives you no indication of peaks and valleys.
We do witness coupons on hand sprayed and Parylene assemblies and wet gage
testing for select area coated assemblies .
KennyB
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=========================================================================
Date: Thu, 14 Mar 2002 17:00:29 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: HELP! EMERGENCY! Need an Emerald Part!!!
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_17a.51642f4.29c2777d_boundary"
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Hi ya'll!
I know this is going to be an extreme longshot, but I'm in desperate need of
a Assemblion Emerald 54mm front light camera mirror (part number
5322-380-10285).
Ours got cracked somehow (still haven't found out how, probably never
will...). Called Assemblion and was given a 1-week lead time...peachy huh?
I know that there probably won't be anyone that keeps these as spares
(they're $470 each), but if there is, you will be compensated appropriately
if we can buy it from you and replace it with the one that we'll get in a
week....(I told you this was going to be a longshot!)
-Steve "why me?" Gregory-
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi ya'll!
<BR>
<BR>I know this is going to be an extreme longshot, but I'm in desperate need of a Assemblion Emerald 54mm front light camera mirror (part number 5322-380-10285).
<BR>
<BR>Ours got cracked somehow (still haven't found out how, probably never will...). Called Assemblion and was given a 1-week lead time...peachy huh?
<BR>
<BR>I know that there probably won't be anyone that keeps these as spares (they're $470 each), but if there is, you will be compensated appropriately if we can buy it from you and replace it with the one that we'll get in a week....(I told you this was going to be a longshot!)
<BR>
<BR>-Steve "why me?" Gregory- </FONT></HTML>
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Date: Thu, 14 Mar 2002 17:03:10 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bissonnette, Jean-Francois" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bissonnette, Jean-Francois" <[log in to unmask]>
Subject: Re: Coating thickness
MIME-Version: 1.0
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We thought of that and it seems one very logical thing to do. The only
problem is that=20
the boards are coated at our supplier's plant. And you know how QA persons
are...
how can we prove that the aluminum part was coated at the same time then the
batch
etc...
We have to monitor our supplier and got solid evidences.
Thank you all! If any other idea has not been through yet don't hesitate...
I'm all ears...
or all EYES!
JF
-----Original Message-----
From: Marsico, James [mailto:[log in to unmask]]
Sent: Thursday, March 14, 2002 12:48 PM
To: [log in to unmask]
Subject: Re: [TN] Coating thickness
I agree with Brian. We place a 2x3" piece of aluminum plate next to the
assembly during coating, which gets coated at the same time. A part of the
plate is masked with tape so you can measure before and after cure.
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>=20
631-595-5879
-----Original Message-----
From: Brian Ellis [SMTP:[log in to unmask]]
Sent: Thursday, March 14, 2002 10:46 AM
To: [log in to unmask]
Subject: Re: [TN] Coating thickness
Jean-Fran=E7ois
Coat a lump of metal at the same time and use that to measure the
thickness.
Brian
"Bissonnette, Jean-Francois" wrote:
>
> Hi All,
>
> Does anyone now of a technique or system to check conformal
coating
> thickness after it's dry on production units? We have a
positector to
> measure paint thickness on our enclosures but they're not design
to
> work on materials like PCB.
>
> Jean-Fran=E7ois Bissonnette
> V=E9rificateur, Contr=F4le de la Qualit=E9
> =C9lectronique
> Produits et Proc=E9d=E9s
> Vapor Rail Inc.
> 10655 Henri-Bourassa O.
> St-Laurent, Qc
> H4S 1A1
>
> (514) 335-4200 x2021
> (514) 335-4231 fax
>
> <<Bissonnette, Jean-Francois.vcf>>
>
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally
privileged and confidential information intended only for the use of the
individual or entity named herein. If the reader of this transmission is not
the intended recipient, you are hereby notified that any dissemination,
distribution, or copying of this transmission is strictly prohibited.
>
>
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Date: Thu, 14 Mar 2002 15:20:54 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: High Rel BGA Guidelines
X-To: "Crain, Bob" <[log in to unmask]>
MIME-Version: 1.0
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One important thing is to know how your BGA is constructed, this can be
found usually on the suppliers web. Unlike most other parts BGA's from
different suppliers could be constructed different and this can affect your
processing or result in differences in reliability.
----- Original Message -----
Wrom: OYIYZUNNYCGPKYLEJGDGVCJVTLBXFGGMEPYOQ
To: <[log in to unmask]>
Sent: Wednesday, March 13, 2002 2:44 PM
Subject: [TN] High Rel BGA Guidelines
> We may soon be adding BGAs to our approved parts list for some programs.
We
> use polyamide boards and require electrical test under vibration and
thermal
> cycling. What are the most important factors to address to maximize our
> success?
>
> --------------------------------------------------------------------------
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Date: Thu, 14 Mar 2002 17:14:42 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Rick Fudalewski <[log in to unmask]>
Subject: Re: Unusual plated 'stuff' on copper surface
MIME-Version: 1.0
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Franklin
understand that 99% of the time - anything seen after electroplating has
already been metalized previously. my suggestion would be to look at what is
happening in your metalization process.
speaking of bacteria - last year while working in California - a client of
mine told me that his copper bath plated a whiskered deposit. knowing this is
very difficult to do - unless something has already been metalized - i
started going through his electroless line - sure enough - they forgot to
biotreat their DI lines - and actual fungus got carried over throughout the
system - and kept on sticking to the corners of the panels (sharp edges where
the panels are sheered) - once out of the catalyst tank - you had to look
very closely - but the algae was floating at the bottom end of the panels.
Sure enough - once it got into the copper plating line - it looked like
whiskers forming at the end of the board.
might want to check out your process - for other than that - i have no idea.
one other factor could be a high degree of induced stress - but that would be
throughout the whole board.
regards
Rich Fudalewski
FCT
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Content-Type: text/html; charset="US-ASCII"
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Franklin
<BR>
<BR>understand that 99% of the time - anything seen after electroplating has already been metalized previously. my suggestion would be to look at what is happening in your metalization process.
<BR>
<BR>speaking of bacteria - last year while working in California - a client of mine told me that his copper bath plated a whiskered deposit. knowing this is very difficult to do - unless something has already been metalized - i started going through his electroless line - sure enough - they forgot to biotreat their DI lines - and actual fungus got carried over throughout the system - and kept on sticking to the corners of the panels (sharp edges where the panels are sheered) - once out of the catalyst tank - you had to look very closely - but the algae was floating at the bottom end of the panels.
<BR>
<BR>Sure enough - once it got into the copper plating line - it looked like whiskers forming at the end of the board.
<BR>
<BR>might want to check out your process - for other than that - i have no idea. one other factor could be a high degree of induced stress - but that would be throughout the whole board.
<BR>
<BR>regards
<BR>
<BR>Rich Fudalewski
<BR>
<BR>FCT</FONT></HTML>
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Date: Thu, 14 Mar 2002 15:43:37 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: High Rel BGA Guidelines
X-To: David Douthit <[log in to unmask]>
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Polyimide is a complete resin/curing agent system and is a C stage resin
meaning it is full cured. Polyamides are a curing agents for epoxies. They
are described on page 61 as preponderantly amines according to the book
Epoxy Resin by Irving Skeist (1958)
Wrom: YUCDDJBLVLMHAALPTCXLYRWTQTIPWIGYO
To: <[log in to unmask]>
Sent: Wednesday, March 13, 2002 6:29 PM
Subject: Re: [TN] High Rel BGA Guidelines
> Bob,
>
> What's the difference between polyimide and polyamide?
>
> David A. Douthit
> Manager
> LoCan LLC
>
> "Crain, Bob" wrote:
>
> > We may soon be adding BGAs to our approved parts list for some programs.
We
> > use polyamide boards and require electrical test under vibration and
thermal
> > cycling. What are the most important factors to address to maximize our
> > success?
> >
>
> --------------------------------------------------------------------------
-------
> > Technet Mail List provided as a free service by IPC using LISTSERV 1.8d
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in
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> > Please visit IPC web site http://www.ipc.org/html/forum.htm for
additional
> > information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700
ext.5315
>
> --------------------------------------------------------------------------
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>
> --------------------------------------------------------------------------
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>
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Date: Thu, 14 Mar 2002 22:57:16 -0000
Reply-To: Dougal Stewart <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dougal Stewart <[log in to unmask]>
Subject: Re: lead Free
X-To: "Atkinson, Neil" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Are you referring to a board supplier or component supplier ?- all board
suppliers can provide lead free finishes today - Immersion tin, Enig,
immersion silver and OSP -that will solder with ordinary tin lead solder
alloy and with the lead free solders
Dougal Stewart
email: [log in to unmask]
phone: +44 1896 822204
mob: +44 7984 629667
----- Original Message -----
From: "Atkinson, Neil" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 14, 2002 5:22 PM
Subject: [TN] lead Free
> One of our suppliers is 'proposing' a new lead free finish which he says
> will solder perfectly well with 'normal' SnPb solder as well as Lead Free.
>
> The finishes they are proposing are SnAg, SnBi and SnCuAg. my question
is,
> Does anyone have experience with using these finishes through a normal
> process and are there any 'pitfalls' top look out for.
>
> There is a lot of talk about total Pb free processes but what about the
> interim - are the new finishes 'backwards compatible'!!
>
> Thanks in anticipation of everyone's responses.
>
> Neil
>
>
>
>
>
>
> ________________________________________________________________________
> This e-mail has been scanned for all viruses by Star Internet. The
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> ________________________________________________________________________
>
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Date: Thu, 14 Mar 2002 18:32:13 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Malewicz Wesley <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Malewicz Wesley <[log in to unmask]>
Subject: Prepreg
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
What are the Pro and Con's of using a single sheet of prepreg vers using two
sheets of prepreg? In our fabrication specification we specify that we
require that two sheets of prepreg are to be used. For as long as I can
remember we have always had this requirement and I would like to have a
better understanding as to why we might need to continue.
Thanking you in advance for your response.
Wes
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Date: Thu, 14 Mar 2002 18:58:49 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Machine part availability...
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This is a vent sort of, and a question...
Is it just me, or do others find that when they call the parts department of
a automation company to order a replacement part for one of their machines,
always find that there's lead time involved?
When approached for you to buy their equipment it is always stated that you
will be technically supported 24/7, and that spares are always a fed-ex
overnight away. But when it comes down to reality, that's more often than not
the exception, rather than the rule...
I'm not singling out Assemblion, but I experience this situation across the
board with all our machines...the situation seems to have gotten worse over
the past couple of years...
Am I the only one experiencing this?
-Steve Gregory-
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Date: Fri, 15 Mar 2002 08:03:17 +0800
Reply-To: jinhong <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: jinhong <[log in to unmask]>
Subject: Re: PCB DESIGNER - DESIGN ENGINEER - PROTEL
X-To: Earl Moon <[log in to unmask]>
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LS0tLQ0KPiANCg==
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Date: Thu, 14 Mar 2002 19:14:56 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Prepreg
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Wes
In the "olden days" there was a problem with Z axis shorting, or "punch
through" between layers in a multilayer board
In order to prevent this, the mil spec required 2 layers of prepreg. .
This became a standard call out in the U S because of the mil spec
Agruable whether it was ever really needed, but that is the history.
Do you need it now? Depends on your board, but you should be open to dropping
the requirement if you don't need it, or the added cost
Good Luck
Jerry Sallo
Sallo Consulting Services
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Date: Thu, 14 Mar 2002 16:53:57 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Michael Meltzer <[log in to unmask]>
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Date: Thu, 14 Mar 2002 20:01:38 -0600
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: pratap singh <[log in to unmask]>
Organization: RAMP Inc.
Subject: Re: Prepreg
X-To: Malewicz Wesley <[log in to unmask]>
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Wes,
Two sheets of prepreg provide better control agains -epoxy starvation,
voids.
One sheet may have higher probability of developing meatl to metal
shorts due to - voids, epoxy starvation, and possible migration paths
along glass fibres. This probability is reduced when two sheets are used.
These observations were based on actual production experience at one of
the large board manufacturer.
--
_________________________
pratap singh
tel/fax: 512-255-6820
email: [log in to unmask]
WEB: www.rampinc.com
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Date: Thu, 14 Mar 2002 20:08:11 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Machine part availability...
X-To: [log in to unmask]
Steve,
Seems to be another sign of the times.
Earl
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Date: Thu, 14 Mar 2002 21:30:53 -0500
Reply-To: Ed Valentine <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ed Valentine <[log in to unmask]>
Organization: Electronics Manufacturing Solutions
Subject: Re: Machine part availability...
X-To: [log in to unmask]
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Steve -
Unfortunately, you are not alone. A current client of mine is having to wait
weeks just to get feeders for a system that is less than 3 years old.
Ed Valentine
Electronics Manufacturing Solutions
8612 Mourning Dove Road, Raleigh, NC 27615
Phone: (919) 270-5145, Fax: (919) 847-9971
Email: [log in to unmask]
Website: http://www.ems-consulting.com
----- Original Message -----
From: <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 14, 2002 6:58 PM
Subject: [TN] Machine part availability...
> This is a vent sort of, and a question...
>
> Is it just me, or do others find that when they call the parts department
of
> a automation company to order a replacement part for one of their
machines,
> always find that there's lead time involved?
>
> When approached for you to buy their equipment it is always stated that
you
> will be technically supported 24/7, and that spares are always a fed-ex
> overnight away. But when it comes down to reality, that's more often than
not
> the exception, rather than the rule...
>
> I'm not singling out Assemblion, but I experience this situation across
the
> board with all our machines...the situation seems to have gotten worse
over
> the past couple of years...
>
> Am I the only one experiencing this?
>
> -Steve Gregory-
>
> --------------------------------------------------------------------------
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Date: Thu, 14 Mar 2002 21:53:38 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Machine part availability...
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_16c.a4ee396.29c2bc32_boundary"
--part1_16c.a4ee396.29c2bc32_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
INCREDIBLE! Feeders to me from my humble perspective, would be something that
you would want to have on hand for your customers.
If you're a CEM, and want to be able to cut down on change-over times, you
can have just as much invested in feeders for prior set-ups, as you have
invested into the base machines.
Customer support from assembly automation companies has declined terribly in
my opinion. Any new investments in capital equipment from our company will
have a very heightened focus in customer support and equipment spares. We're
growing too, we do mostly DOD stuff and have recieved a very substantial
contract awarded recently to manufacture checked baggage x-ray inspection
equipment for airports...in other words we're busy....having a line down
waiting a week for a mirror isn't good.
-Steve Gregory-
> Steve -
>
> Unfortunately, you are not alone. A current client of mine is having to
> wait
> weeks just to get feeders for a system that is less than 3 years old.
>
> Ed Valentine
> Electronics Manufacturing Solutions
> 8612 Mourning Dove Road, Raleigh, NC 27615
> Phone: (919) 270-5145, Fax: (919) 847-9971
> Email: [log in to unmask]
> Website: http://www.ems-consulting.com
>
--part1_16c.a4ee396.29c2bc32_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>INCREDIBLE! Feeders to me from my humble perspective, would be something that you would want to have on hand for your customers. <BR>
<BR>
If you're a CEM, and want to be able to cut down on change-over times, you can have just as much invested in feeders for prior set-ups, as you have invested into the base machines.<BR>
<BR>
Customer support from assembly automation companies has declined terribly in my opinion. Any new investments in capital equipment from our company will have a very heightened focus in customer support and equipment spares. We're growing too, we do mostly DOD stuff and have recieved a very substantial contract awarded recently to manufacture checked baggage x-ray inspection equipment for airports...in other words we're busy....having a line down waiting a week for a mirror isn't good.<BR>
<BR>
-Steve Gregory-<BR>
<BR>
<BR>
<BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Steve -<BR>
<BR>
Unfortunately, you are not alone. A current client of mine is having to wait<BR>
weeks just to get feeders for a system that is less than 3 years old.<BR>
<BR>
Ed Valentine<BR>
Electronics Manufacturing Solutions<BR>
8612 Mourning Dove Road, Raleigh, NC 27615<BR>
Phone: (919) 270-5145, Fax: (919) 847-9971<BR>
Email: [log in to unmask]<BR>
Website: http://www.ems-consulting.com<BR>
</BLOCKQUOTE><BR>
<BR>
</FONT></HTML>
--part1_16c.a4ee396.29c2bc32_boundary--
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Date: Thu, 14 Mar 2002 22:26:05 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Machine part availability...
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_146.b14d2a6.29c2c3cd_boundary"
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> Steve,
>
> Seems to be another sign of the times.
>
> Earl
>
Okay, it's another sign of the times. But heed this, all you lurkers out
there from companies that sell assembly automation; be prepared to provide
evidence of reliable customer support, provide evidence that the user can
order a part and receive it within a reasonable amount of time (within
48-hours).
Otherwise, don't even try to sell our company (or me) anything...
It's really not too much to ask if you're a customer oriented company, now is
it?
-Steve Gregory-
--part1_146.b14d2a6.29c2c3cd_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2><BR>
<BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Steve,<BR>
<BR>
Seems to be another sign of the times.<BR>
<BR>
Earl<BR>
</BLOCKQUOTE><BR>
<BR>
Okay, it's another sign of the times. But heed this, all you lurkers out there from companies that sell assembly automation; be prepared to provide evidence of reliable customer support, provide evidence that the user can order a part and receive it within a reasonable amount of time (within 48-hours). <BR>
<BR>
Otherwise, don't even try to sell our company (or me) anything...<BR>
<BR>
It's really not too much to ask if you're a customer oriented company, now is it?<BR>
<BR>
-Steve Gregory-<BR>
</FONT></HTML>
--part1_146.b14d2a6.29c2c3cd_boundary--
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Date: Thu, 14 Mar 2002 22:00:14 -0600
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Seth Goodman <[log in to unmask]>
Subject: Re: Soldering crimp connectors
X-To: Carl VanWormer <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
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A crimp is an engineered connection, just like a solder joint. A properly
made crimp connection is gas-tight and is not improved by soldering. The
part about properly made bears repeated again and again, else it may not be
gas-tight or the materials may be overstressed. This means that the wire
must be of the appropriate cross-sectional area, material and stranding for
the particular terminal. The wire insulation, if the terminal has an
insulation crimp section, must have a diameter in the acceptable range and
be of a compatible material. Especially important, the crimp die must be
specifically designed for the crimp terminal and wire combination. The
crimper/applicator/die combination must also operate to acceptable
tolerances as determined by the manufacturer. After use, adjustments are
sometimes needed and parts eventually need replacement.
Just as in soldering, if your process is appropriate and you control it, the
results are very, very repeatable. In fact, this is far easier to control
than soldering, as there are fewer variables and regular preventive
maintenance takes care of most problems. If you use a reasonable amount of
connectors from a particular manufacturer, they are often willing to come in
a couple of times a year to check over your tooling.
As others have mentioned, soldering stranded wire creates a stress
concentration point where the wire will usually break later. Wire
insulation is melted during soldering, which loosens up the insulation crimp
and changes the mechanical properties of the insulation. Flux entrapment is
another issue I hadn't thought of and Doug's explanation was educational as
to how this can bite you. For my money, a good mechanical crimp is more
trouble-free than crimping plus soldering.
Regards,
Seth Goodman
Goodman Associates, LLC
tel 608.833.9933
fax 608.833.9966
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Carl VanWormer
Sent: Wednesday, March 13, 2002 1:35 PM
To: [log in to unmask]
Subject: [TN] Soldering crimp connectors
We have a customer who insists that we solder our crimp connectors (after
crimping). He has had corrosion problems and is convinced that this is the
best solution. Is this a good thing? Are there any downsides we should
point out to help educate him?
Carl Van Wormer
Cipher Systems
1815 NW 169th Place, Suite 5010
Beaverton, OR 97006
Phone (503)-617-7447 Fax (503)-617-6550
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Date: Thu, 14 Mar 2002 20:08:52 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Richard Hamilton <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Richard Hamilton <[log in to unmask]>
Subject: Re: Machine part availability...
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Hey Steve,
Although I have been out of the scene since last May, I can say that based
on my experience with 2 automatic machine companies, one solder machine
company and one conveyor company I have not experienced what you are
talking about. There have been some instances where we have seen that but
generally it has been with an older machine/part or other understandable
anomaly. Hell I have even had to order a micro processor board used for a
machine and it was 'in stock'.
Granted I do not have a large across the board experience with a lot of
companies but I believe our selection process asked questions beyond 'How
well do you service your customer?' and I think that was helpful in
selecting manufacturers that we were not familiar with.
My guess is your in the middle of a 'situation' that you did not have the
opportunity to help create. I sympathize with and for you!
Good luck. And if you want the mfgr names let me know off list.
Richard Hamilton
At 06:58 PM 3/14/02 -0500, you wrote:
>This is a vent sort of, and a question...
>
>Is it just me, or do others find that when they call the parts department of
>a automation company to order a replacement part for one of their machines,
>always find that there's lead time involved?
>
>When approached for you to buy their equipment it is always stated that you
>will be technically supported 24/7, and that spares are always a fed-ex
>overnight away. But when it comes down to reality, that's more often than not
>the exception, rather than the rule...
>
>I'm not singling out Assemblion, but I experience this situation across the
>board with all our machines...the situation seems to have gotten worse over
>the past couple of years...
>
>Am I the only one experiencing this?
>
>-Steve Gregory-
>
>---------------------------------------------------------------------------
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Date: Fri, 15 Mar 2002 01:01:29 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mark Orlowski/PEMSTAR Inc <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mark Orlowski/PEMSTAR Inc <[log in to unmask]>
Subject: Mark Orlowski/PEMSTAR Inc is out of the office.
MIME-Version: 1.0
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I will be out of the office starting 03/15/2002 and will not return until
03/21/2002.
I will respond to your message when I return.
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Date: Fri, 15 Mar 2002 07:33:13 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Atkinson, Neil" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Atkinson, Neil" <[log in to unmask]>
Subject: Re: lead Free
MIME-Version: 1.0
Content-Type: text/plain; charset="ISO-8859-1"
I'm afraid it's a component supplier - boards are so much easier - you tend
to have more choice!
Neil
-----Original Message-----
From: Dougal Stewart [mailto:[log in to unmask]]
Sent: 14 March 2002 22:57
Subject: Re: lead Free
Are you referring to a board supplier or component supplier ?- all board
suppliers can provide lead free finishes today - Immersion tin, Enig,
immersion silver and OSP -that will solder with ordinary tin lead solder
alloy and with the lead free solders
Dougal Stewart
email: [log in to unmask]
phone: +44 1896 822204
mob: +44 7984 629667
----- Original Message -----
From: "Atkinson, Neil" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 14, 2002 5:22 PM
Subject: [TN] lead Free
> One of our suppliers is 'proposing' a new lead free finish which he says
> will solder perfectly well with 'normal' SnPb solder as well as Lead Free.
>
> The finishes they are proposing are SnAg, SnBi and SnCuAg. my question
is,
> Does anyone have experience with using these finishes through a normal
> process and are there any 'pitfalls' top look out for.
>
> There is a lot of talk about total Pb free processes but what about the
> interim - are the new finishes 'backwards compatible'!!
>
> Thanks in anticipation of everyone's responses.
>
> Neil
>
>
>
>
>
>
> ________________________________________________________________________
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Date: Fri, 15 Mar 2002 02:51:08 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rod Smith <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rod Smith <[log in to unmask]>
Subject: Rod Smith/Endicott/IBM is out of the office.
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
I will be out of the office starting March 15, 2002 and will not return
until March 18, 2002.
I will respond to your message when I return.
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Date: Fri, 15 Mar 2002 04:28:54 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Machine part availability...
X-To: [log in to unmask]
atta boy. nice vent
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Date: Fri, 15 Mar 2002 04:39:35 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Prepreg
X-To: [log in to unmask]
Again, but I love this stuff, you don't need two ply constructions except
when you need them. You get very well balanced structures, from a resin to
glass ratio point of view, with single ply preg and core material except
when using 7628 types/styles. You never use this facing copper as it only
has about 43% resin content and you may very well find starvation using it.
I feel like I've written this before. Anyway, 2113 and 2116 glass styles
offer the best of both laminate integrity (plenty of resin) and dimensional
stability (plenty of glass). No problem using two plies of these types in
whatever requirement. Two plies of 106 or 1080 isn't appropriate, if
avoidable, because it's two resin rich and makes everything slip and slide
in the press and that's a mess.
As for the shorting issues, that's been resolved even by the
military/aerospace folks for years. How many, I can't even remember. If
you've seen this condition, as voiding and shorting etc., get a photo for us
all to see. If proof exists, it has to be a billion to one shot and
certainly would point to possible process control problems of an other than
preg issue.
MoonMan
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Date: Fri, 15 Mar 2002 11:56:53 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jan Thuesen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jan Thuesen <[log in to unmask]>
Subject: SV: [TN] Prepreg
X-To: Malewicz Wesley <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
We have had good results with only 1 sheet of prepreg. Be cautious the
lamination press, tooling and all have to be in better shape as you loose
much of the tendency to level out unevenness. You will se this as voids in
the material amo.
Use prepregs with high resin content.
Good luck !
Jan
-----Oprindelig meddelelse-----
Fra: Malewicz Wesley [mailto:[log in to unmask]]
Sendt: 15. marts 2002 00:32
Til: [log in to unmask]
Emne: [TN] Prepreg
What are the Pro and Con's of using a single sheet of prepreg vers using two
sheets of prepreg? In our fabrication specification we specify that we
require that two sheets of prepreg are to be used. For as long as I can
remember we have always had this requirement and I would like to have a
better understanding as to why we might need to continue.
Thanking you in advance for your response.
Wes
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Date: Fri, 15 Mar 2002 11:26:19 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Olivia Mc Dermott <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Olivia Mc Dermott <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/html
<html><div style='background-color:'><DIV></DIV>
<DIV></DIV>I would like to take this opportunity to wish all fellow technetters a happy & peaceful St Patricks day for Sunday and have a nice day off Monday (if applicable). <IMG height=12 src="http://graphics.hotmail.com/emwink.gif" width=12><BR><BR><BR>Olivia Mc Dermott
<DIV></DIV></div><br clear=all><hr>MSN Photos is the easiest way to share and print your photos: <a href='http://g.msn.com/1HM305301/14'>Click Here</a><br></html>
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Date: Fri, 15 Mar 2002 05:38:41 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: SV: [TN] Prepreg
X-To: [log in to unmask]
It's the same old story
a fight for love and glory.
Ah, it takes me back to Casablanca, or was that BF Montana where my social
club was to have been built, but for the fire making that impossible,
repreat with lamination press and dungeon. No, not me!
Yes, the press plattens must be ASSured flat and parallel without nicks and
dings. Use lead strips to determine and check out the heater elements.
Why do we go through this so often. Hell, now I'm talking to myself. I know,
I should be kinder, and usually am, but my recent bout with HIGHLY QUALIFIED
SUPPLIERS makes me crazy = but that keeps me from going insane, right?
I guess, I'm really talking to all the super designers out there, again,
about supplier qualification. It just has to get done better and I didn't do
a good job this time. I especially didn't evaluate my client as being even
capable of understanding the process or need. These folks just wanted
results in the shortest possible time and the lowest damn cost.
I'm done,
MoonMan
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Date: Fri, 15 Mar 2002 07:51:35 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
bbarr <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: bbarr <[log in to unmask]>
Subject: Re: HELP! EMERGENCY! Need an Emerald Part!!!
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_000C_01C1CBF6.3AFDF600"
This is a multi-part message in MIME format.
------=_NextPart_000_000C_01C1CBF6.3AFDF600
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
In all the years I have been in this business, I have not found replacement
parts to be a problem with the companies I deal with. Is this an ongoing
problem with you, or is this an isolated incident? One suggestion, have you
contacted your local Assemblion rep? He or she may be able to canvas their
customers and find the part you need. I have found that most of the
equipment reps for the machines I have are very willing to help with
problems such as these. It's a real "atta boy" for them and figures
prominently in future purchases.
Bob
=======================
Robert Barr
Manufacturing Engineering
Formation, Inc.
Voice: 856-234-5020 x3035
Fax: 856-234-6679
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of [log in to unmask]
Sent: Thursday, March 14, 2002 5:00 PM
To: [log in to unmask]
Subject: [TN] HELP! EMERGENCY! Need an Emerald Part!!!
Hi ya'll!
I know this is going to be an extreme longshot, but I'm in desperate need
of a Assemblion Emerald 54mm front light camera mirror (part number
5322-380-10285).
Ours got cracked somehow (still haven't found out how, probably never
will...). Called Assemblion and was given a 1-week lead time...peachy huh?
I know that there probably won't be anyone that keeps these as spares
(they're $470 each), but if there is, you will be compensated appropriately
if we can buy it from you and replace it with the one that we'll get in a
week....(I told you this was going to be a longshot!)
-Steve "why me?" Gregory-
------=_NextPart_000_000C_01C1CBF6.3AFDF600
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4913.1100" name=3DGENERATOR></HEAD>
<BODY>
<DIV><SPAN class=3D020114612-15032002><FONT face=3DArial size=3D2>In all =
the years I=20
have been in this business, I have not found replacement parts to be a =
problem=20
with the companies I deal with. Is this an ongoing problem with you, or =
is this=20
an isolated incident? One suggestion, have you contacted your local =
Assemblion=20
rep? He or she may be able to canvas their customers and find the part =
you need.=20
I have found that most of the equipment reps for the machines I have are =
very=20
willing to help with problems such as these. It's a real "atta boy" for =
them and=20
figures prominently in future purchases.</FONT></SPAN></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<P><FONT =
size=3D2>Bob<BR><BR>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D<BR>Robert=20
Barr<BR>Manufacturing Engineering<BR>Formation, Inc.<BR>Voice: =
856-234-5020=20
x3035<BR>Fax: 856-234-6679 </FONT></P>
<BLOCKQUOTE=20
style=3D"PADDING-LEFT: 5px; MARGIN-LEFT: 5px; BORDER-LEFT: #000000 2px =
solid">
<DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of =
</B>[log in to unmask]<BR><B>Sent:</B>=20
Thursday, March 14, 2002 5:00 PM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> [TN] HELP! EMERGENCY! Need an =
Emerald=20
Part!!!<BR><BR></FONT></DIV><FONT face=3Darial,helvetica><FONT =
size=3D2>Hi ya'll!=20
<BR><BR>I know this is going to be an extreme longshot, but I'm in =
desperate=20
need of a Assemblion Emerald 54mm front light camera mirror (part =
number=20
5322-380-10285). <BR><BR>Ours got cracked somehow (still haven't found =
out=20
how, probably never will...). Called Assemblion and was given a 1-week =
lead=20
time...peachy huh? <BR><BR>I know that there probably won't be anyone =
that=20
keeps these as spares (they're $470 each), but if there is, you will =
be=20
compensated appropriately if we can buy it from you and replace it =
with the=20
one that we'll get in a week....(I told you this was going to be a =
longshot!)=20
<BR><BR>-Steve "why me?" Gregory- =
</FONT></FONT></BLOCKQUOTE></BODY></HTML>
------=_NextPart_000_000C_01C1CBF6.3AFDF600--
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=========================================================================
Date: Fri, 15 Mar 2002 06:57:08 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Gary McCauley <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Gary McCauley <[log in to unmask]>
Subject: Re: Unusual plated 'stuff' on copper surface
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Franklin,
I have seen two things cause this. One is a relatively low level of carrier
in the plating bath.
The other is from years ago when we found fungi growing in our additive.
For whatever reason,
it was conductive enough to plate with the copper. Instead of rod shaped
however, it was
spiral like a miniature bed spring embedded in the coppper.
Gary McCauley
PC Boards, Inc.
Chanute, Ks
This past January we began seeing unusual 'growths' ((for lack of better
descriptive wording)) on the surface of panels after copper II, they are
typically observed on one end of the panels, often only a couple panels per
tankload exhibit this.
These 'growths' look like fine strands of metal of fabric fibers, they are
clustered together like someone poor shavings there, and plated over them.
If any of you recall pics of those bacteria found in that Mars asteroid from
the Antarctic, they appear similar to that (not saying we have bacteria
growing in our baths of course). Occasionally we see this out towards the
center of panels, I don't believe we have ever seen all panels in a tankload
exhibit this either. This condition is observed on one or two loads per day
(out of about 20 - 30), some days not at all.
We started seeing this in one bath (of three in house) until recently it
appeared in another bath simultaneously.
Any help on this would be greatly appreciated as our process engineers, lab
techs, and suppliers are baffled.
Thanks,
Franklin D Asbell
Network Circuits, Inc.
Irving, Texas 75061
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Date: Fri, 15 Mar 2002 08:37:10 -0500
Reply-To: "[log in to unmask]" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Lou Hart <[log in to unmask]>
Organization: Compunetix, Inc.
Subject: Re: Coating thickness
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
JF, Technetters, we're in the process of setting up a new machine (selected
with the help of TechNet input). First step is to develop a mathematical
model for coating thickness as a function of machine parameters. After
than we plan on using microscope slides, as suggested by one of the
operators, for process control monitoring. The thickness gage will be a
micrometer. We're going to develop a relationship between wet and dry film
thickness, but the wet film gage we have only resolves to 25 microns. In
the development of the model, we're also looking to find machine settings
that will minimize thickness variation across the board. Contact me on- or
off-line in a couple of weeks if you want to know how we're coming along.
May have results early next week.
Regarding the question of whether the aluminum plates were coated at the
same time as your material, I would ask, if your company has doubts that
the samples are authentic, why are you doing business with that supplier?
Lou Hart
-----Original Message-----
From: Bissonnette, Jean-Francois [SMTP:[log in to unmask]]
Sent: Thursday, March 14, 2002 5:03 PM
To: [log in to unmask]
Subject: Re: [TN] Coating thickness
We thought of that and it seems one very logical thing to do. The only
problem is that
the boards are coated at our supplier's plant. And you know how QA persons
are...
how can we prove that the aluminum part was coated at the same time then
the
batch
etc...
We have to monitor our supplier and got solid evidences.
Thank you all! If any other idea has not been through yet don't
hesitate...
I'm all ears...
or all EYES!
JF
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Date: Fri, 15 Mar 2002 08:28:03 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Mauro, Dan" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Mauro, Dan" <[log in to unmask]>
Subject: Impedance calculator
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Does any one know a good tool to model impedance calculations.
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<DIV><FONT face=Arial size=2><SPAN class=603202713-15032002>Does any one know a
good tool to model impedance calculations.</SPAN></FONT></DIV>
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Date: Fri, 15 Mar 2002 08:01:22 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Luis Gallegos <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Luis Gallegos <[log in to unmask]>
Subject: Re: Glue Dot Size (missing parts)
X-To: Becerra Alejandro <[log in to unmask]>
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Content-Type: text/plain
Hi Alejandro
is there any trace of adhesive (epoxy) left on the board? What kind of epoxy
you have in your process? Is there one specific part number? I had
experience with specific parts having some type
of film, and cause adhesion problems.
Luis A Gallegos
Automation Senior Technician
SANMINA-SCI
Pleasant Prairie WI
262 947-7700
e-mail: [log in to unmask]
> -----Original Message-----
> From: Becerra Alejandro [SMTP:[log in to unmask]]
> Sent: Wednesday, March 13, 2002 7:02 PM
> To: [log in to unmask]
> Subject: Re: [TN] Glue Dot Size (missing parts)
>
>
> We are having issues with 0603 components attached with glue (Glue printed
> with Pump printing)
> that are being fallen in the wave soldering equipment.
> The average dot size that we are having in these components is 0.025" and
> the average torque value is 1 N-cm.
> What could be possible causes for this issue?
>
> Regards,
>
> Alejandro Becerra
> Thomson multimedia Inc
>
>
>
>
> -----Original Message-----
> From: Krug, Dick [ <mailto:[log in to unmask]>]
> Sent: Wednesday, March 13, 2002 9:54 AM
> To: [log in to unmask]
> Subject: Re: [TN] Glue Dot Size
>
>
> We dispense glue using a positive displacement pump.
> Dot diameter for 0603's is nominally 20 mils.
> Dot diameter for 0805's is nominally 28 mils.
> Dick Krug
> Sypris Electronics
>
> -----Original Message-----
> From: Vinit Verma [ <mailto:[log in to unmask]>]
> Sent: Wednesday, March 13, 2002 7:19 AM
> To: [log in to unmask]
> Subject: [TN] Glue Dot Size
>
>
> Hi All,
>
> Has anyone ever worked with the Pump Printing Stencil for printing glue on
>
> pre-inserted PCBs?? This stencil is developed by DEK but I'm not too sure
> of
> how it works? Any experiences?
>
> Also would be too kind if somebody could tell me the glue size requirement
>
> for 0603 and 0805 components?
>
> Thanks in advance
>
> Regards
> Vinit Verma
>
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Date: Fri, 15 Mar 2002 09:02:43 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Impedance calculator
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In a message dated 3/15/02 7:45:20 AM Central Standard Time, [log in to unmask]
writes:
> Does any one know a good tool to model impedance calculations.
>
Hi Dan!
Here's a few:
http://www.emclab.umr.edu/pcbtlc/
http://www.logiccell.com/~jean/LVDS/
http://www.icd.com.au/board.html
http://pr.erau.edu/~newmana/imped.html
http://www.ifwtech.com/g3sek/netcalc/netcalc.htm
http://www.ideaconsulting.com/strip.htm
-Steve Gregory-
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>In a message dated 3/15/02 7:45:20 AM Central Standard Time, [log in to unmask] writes:
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Does any one know a good tool to model impedance calculations.
<BR></BLOCKQUOTE>
<BR>Hi Dan!
<BR>
<BR>Here's a few:
<BR>
<BR>http://www.emclab.umr.edu/pcbtlc/
<BR>http://www.logiccell.com/~jean/LVDS/
<BR>http://www.icd.com.au/board.html
<BR>http://pr.erau.edu/~newmana/imped.html
<BR>http://www.ifwtech.com/g3sek/netcalc/netcalc.htm
<BR>http://www.ideaconsulting.com/strip.htm
<BR>
<BR>-Steve Gregory-</FONT></HTML>
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Date: Fri, 15 Mar 2002 08:09:28 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Carlile <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Carlile <[log in to unmask]>
Subject: Re: Machine part availability...
I would let the supplier know that you were either lied to at time of
purchase and/or their equipment is so poor they can not keep enough
replacement parts on hand. Once again, customer service/support in our
industry sucks!
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Date: Fri, 15 Mar 2002 09:07:04 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McMullen, Kerry" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McMullen, Kerry" <[log in to unmask]>
Subject: Re: Impedance calculator
X-To: "Mauro, Dan" <[log in to unmask]>
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Try Polar Instruments. ( www.polarinstruments.com
<http://www.polarinstruments.com> )
Works pretty well in determining impedance. Best used in conjunction with a
FAE from the fab house you plan to use. Actual numbers from the fab house
are usually off (+/-) a couple of ohms, but still a good tool to get the
baseline stackup cottect.
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: Friday, March 15, 2002 8:28 AM
To: [log in to unmask]
Subject: [TN] Impedance calculator
Does any one know a good tool to model impedance calculations.
------_=_NextPart_001_01C1CC2A.AF995980
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charset="iso-8859-1"
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<DIV><SPAN class=378581014-15032002><FONT face=Arial color=#0000ff size=2>Try
Polar Instruments. (<A
href="http://www.polarinstruments.com">www.polarinstruments.com</A>)</FONT></SPAN></DIV>
<DIV><SPAN class=378581014-15032002><FONT face=Arial color=#0000ff size=2>Works
pretty well in determining impedance. Best used in conjunction with a FAE
from the fab house you plan to use. Actual numbers from the fab house are
usually off (+/-) a couple of ohms, but still a good tool to get the baseline
stackup cottect.</FONT></SPAN></DIV>
<BLOCKQUOTE dir=ltr style="MARGIN-RIGHT: 0px">
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Mauro, Dan
[mailto:[log in to unmask]]<BR><B>Sent:</B> Friday, March 15, 2002 8:28
AM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] Impedance
calculator<BR><BR></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN class=603202713-15032002>Does any one know
a good tool to model impedance calculations.</SPAN></FONT></DIV>
<P><FONT face=Arial size=2><SPAN
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Date: Fri, 15 Mar 2002 15:30:05 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jan Thuesen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jan Thuesen <[log in to unmask]>
Subject: SV: [TN] Unusual plated 'stuff' on copper surface
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Franklin,
we have seen something like this.
For some time we were believing it was a problem in the copperplating and
increased filtration amo.
Eventually we found out that it had origin in sudden precipitation of
palladium-colloids in our direct plating process. These particles were
square or rectangular with rounded edges.
Changes in cleaning procedures and also filtration helped on this one.
With best regards
--
Jan Thuesen, Process Engineer
Chemitalic A/S
Egebjergvej 128
DK-8700 Horsens
76 28 70 00 Fax: 76 28 70 95
http://www.chemitalic.dk/
-----Oprindelig meddelelse-----
Fra: Gary McCauley [mailto:[log in to unmask]]
Sendt: 15. marts 2002 13:57
Til: [log in to unmask]
Emne: Re: [TN] Unusual plated 'stuff' on copper surface
Franklin,
I have seen two things cause this. One is a relatively low level of carrier
in the plating bath.
The other is from years ago when we found fungi growing in our additive.
For whatever reason,
it was conductive enough to plate with the copper. Instead of rod shaped
however, it was
spiral like a miniature bed spring embedded in the coppper.
Gary McCauley
PC Boards, Inc.
Chanute, Ks
This past January we began seeing unusual 'growths' ((for lack of better
descriptive wording)) on the surface of panels after copper II, they are
typically observed on one end of the panels, often only a couple panels per
tankload exhibit this.
These 'growths' look like fine strands of metal of fabric fibers, they are
clustered together like someone poor shavings there, and plated over them.
If any of you recall pics of those bacteria found in that Mars asteroid from
the Antarctic, they appear similar to that (not saying we have bacteria
growing in our baths of course). Occasionally we see this out towards the
center of panels, I don't believe we have ever seen all panels in a tankload
exhibit this either. This condition is observed on one or two loads per day
(out of about 20 - 30), some days not at all.
We started seeing this in one bath (of three in house) until recently it
appeared in another bath simultaneously.
Any help on this would be greatly appreciated as our process engineers, lab
techs, and suppliers are baffled.
Thanks,
Franklin D Asbell
Network Circuits, Inc.
Irving, Texas 75061
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Date: Fri, 15 Mar 2002 07:01:20 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Carl VanWormer <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Carl VanWormer <[log in to unmask]>
Subject: Re: Impedance calculator
X-To: "Mauro, Dan" <[log in to unmask]>
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If you want calculators for impedance of traces on PC boards, check out
http://www.ultracad.com.
Otherwise, what is it that you want?
Carl Van Wormer
Cipher Systems
1815 NW 169th Place, Suite 5010
Beaverton, OR 97006
Phone (503)-617-7447 Fax (503)-617-6550
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: Friday, March 15, 2002 5:28 AM
To: [log in to unmask]
Subject: [TN] Impedance calculator
Does any one know a good tool to model impedance calculations.
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<p class=3DMsoNormal><span class=3DEmailStyle16><font size=3D2 =
color=3Dnavy face=3DArial><span
style=3D'font-size:10.0pt;mso-bidi-font-size:12.0pt;font-family:Arial'>I=
f you
want calculators for impedance of traces on PC boards, check out =
http://www.ultracad.com.<o:p></o:p></span></font></span></p>
<p class=3DMsoNormal><span class=3DEmailStyle16><font size=3D2 =
color=3Dnavy face=3DArial><span
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color=3Dnavy face=3DArial><span
style=3D'font-size:10.0pt;mso-bidi-font-size:12.0pt;font-family:Arial'>O=
therwise,
what is it that you want?<o:p></o:p></span></font></span></p>
<p class=3DMsoNormal><span class=3DEmailStyle16><font size=3D2 =
color=3Dnavy face=3DArial><span
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<p class=3DMsoAutoSig><font size=3D3 color=3Dnavy face=3D"Times New =
Roman"><span
style=3D'font-size:12.0pt;color:navy'>Carl Van =
Wormer</span></font><font
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/p>
<p class=3DMsoAutoSig><font size=3D3 color=3Dnavy face=3D"Times New =
Roman"><span
style=3D'font-size:12.0pt;color:navy'>Cipher Systems</span></font><font
color=3Dnavy><span =
style=3D'color:navy;mso-color-alt:windowtext'><o:p></o:p></span></font><=
/p>
<p class=3DMsoAutoSig><font size=3D3 color=3Dnavy face=3D"Times New =
Roman"><span
style=3D'font-size:12.0pt;color:navy'>1815 NW 169th Place, Suite =
5010</span></font><font
color=3Dnavy><span =
style=3D'color:navy;mso-color-alt:windowtext'><o:p></o:p></span></font><=
/p>
<p class=3DMsoAutoSig><font size=3D3 color=3Dnavy face=3D"Times New =
Roman"><span
style=3D'font-size:12.0pt;color:navy'>Beaverton, OR<span =
style=3D"mso-spacerun:
yes"> </span>97006</span></font><font color=3Dnavy><span =
style=3D'color:navy;
mso-color-alt:windowtext'><o:p></o:p></span></font></p>
<p class=3DMsoAutoSig><font size=3D3 color=3Dnavy face=3D"Times New =
Roman"><span
style=3D'font-size:12.0pt;color:navy'>Phone (503)-617-7447<span
style=3D"mso-spacerun: yes"> </span>Fax =
(503)-617-6550</span></font><font
color=3Dnavy><span =
style=3D'color:navy;mso-color-alt:windowtext'><o:p></o:p></span></font><=
/p>
<p class=3DMsoNormal><!--[if supportFields]><span =
class=3DEmailStyle16><font=20
size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:10.0pt;mso-bidi-font-size:
12.0pt;font-family:Arial'><span =
style=3D'mso-element:field-end'></span></span></font></span><![endif]-->=
<span
class=3DEmailStyle16><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;mso-bidi-font-size:12.0pt;font-family:Arial'><![if =
!supportEmptyParas]> <![endif]><o:p></o:p></span></font></span></p>=
<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
color=3Dblack
face=3DTahoma><span =
style=3D'font-size:10.0pt;font-family:Tahoma;color:black'>-----Original
Message-----<br>
<b><span style=3D'font-weight:bold'>From:</span></b> Mauro, Dan
[mailto:[log in to unmask]]<br>
<b><span style=3D'font-weight:bold'>Sent:</span></b> Friday, March 15, =
2002 5:28
AM<br>
<b><span style=3D'font-weight:bold'>To:</span></b> [log in to unmask]<br>
<b><span style=3D'font-weight:bold'>Subject:</span></b> [TN] Impedance =
calculator</span></font></p>
<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'><![if =
!supportEmptyParas]> <![endif]><o:p></o:p></span></font></p>
<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
color=3Dblack
face=3DArial><span =
style=3D'font-size:10.0pt;font-family:Arial;color:black'>Does
any one know a good tool to model impedance =
calculations.</span></font><font
color=3Dblack><span =
style=3D'color:black;mso-color-alt:windowtext'><o:p></o:p></span></font>=
</p>
<p style=3D'margin-left:.5in'><font size=3D2 color=3Dblack =
face=3DArial><span
style=3D'font-size:10.0pt;font-family:Arial;color:black'> </span></=
font><font
color=3Dblack><span =
style=3D'color:black;mso-color-alt:windowtext'><o:p></o:p></span></font>=
</p>
</div>
</body>
</html>
------_=_NextPart_001_01C1CC32.441CBE10--
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Date: Fri, 15 Mar 2002 10:04:03 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rick <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rick <[log in to unmask]>
Subject: Re: Impedance calculator
X-To: "Mauro, Dan" <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7BIT
Try Polar's CITS25 Differential Controlled Impedance Calculator.
Rick Babyak
Process Engineer
Proto Circuit Inc.
7 Ascot Parkway
Cuyahoga Falls, OH 44223
330-572-3400
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Date: Fri, 15 Mar 2002 11:08:01 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Maddox, Allen T" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Maddox, Allen T" <[log in to unmask]>
Subject: Re: Impedance calculator
X-To: "Mauro, Dan" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
I'm having a tough time getting into it this morning, but, maybe you'll have
better luck. Give this a try:
http://www.hadco.com/impedanc.htm <http://www.hadco.com/impedanc.htm>
Allen Maddox
Senior PCB Designer
GAI-Tronics
PO Box 1060
Reading, PA 19607-1060
Voice: 610-796-5854
FAX: 610-777-1870
www.gai-tronics.com
[log in to unmask]
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: Friday, March 15, 2002 8:28 AM
To: [log in to unmask]
Subject: [TN] Impedance calculator
Does any one know a good tool to model impedance calculations.
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Date: Fri, 15 Mar 2002 08:59:02 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Brooks,Bill" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Brooks,Bill" <[log in to unmask]>
Subject: Re: Impedance calculator
X-To: "Maddox, Allen T" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hadco was bought by Sanmina -
http://www.sanmina.com/pro_serv/prod_config/java/imped_calc.html
Try this link :)
Bill Brooks
PCB Design Engineer , C.I.D.
TITAN SYSTEMS CORPORATION
DATRON WORLD COMMUNICATIONS DIVISION
3030 Enterprise Court
Vista, CA 92083
Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510
mailto:[log in to unmask]
IPC Designers Council, San Diego Chapter
<http://www.ipc.org/SanDiego/>
<http://home.fda.net/bbrooks/pca/pca.htm
http://dc.ipc.org/
-----Original Message-----
From: Maddox, Allen T [mailto:[log in to unmask]]
Sent: Friday, March 15, 2002 8:08 AM
To: [log in to unmask]
Subject: Re: [TN] Impedance calculator
I'm having a tough time getting into it this morning, but, maybe you'll have
better luck. Give this a try:
http://www.hadco.com/impedanc.htm <http://www.hadco.com/impedanc.htm>
Allen Maddox
Senior PCB Designer
GAI-Tronics
PO Box 1060
Reading, PA 19607-1060
Voice: 610-796-5854
FAX: 610-777-1870
www.gai-tronics.com
[log in to unmask]
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: Friday, March 15, 2002 8:28 AM
To: [log in to unmask]
Subject: [TN] Impedance calculator
Does any one know a good tool to model impedance calculations.
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Date: Fri, 15 Mar 2002 13:30:38 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, tech <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: tech <[log in to unmask]>
Subject: IPC-602A
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Can anyone tell me what IPC-602A refers to. Has it been superceeded and
what would Clas 3 be under this standard. I think it's to do with cross
sections. Thanks in advance
Paul Greene
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Date: Fri, 15 Mar 2002 13:39:15 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Update...HELP! Need an Emerald Part!
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_90.22c434f2.29c399d3_boundary"
--part1_90.22c434f2.29c399d3_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
I would like to give a quick update on my Emerald camera mirror situation...
Assembleon has come through with shining colors! I received a phone call this
morning that a mirror had been located and was in Alpharetta, and could be on
the next airplane flying into Tulsa, or Fed-ex'd overnight for a Saturday
delivery, which ever I preferred...
Now THAT'S the kind of customer service that I like!!
-Steve Gregory-
--part1_90.22c434f2.29c399d3_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>I would like to give a quick update on my Emerald camera mirror situation...
<BR>
<BR>Assembleon has come through with shining colors! I received a phone call this morning that a mirror had been located and was in Alpharetta, and could be on the next airplane flying into Tulsa, or Fed-ex'd overnight for a Saturday delivery, which ever I preferred...
<BR>
<BR>Now THAT'S the kind of customer service that I like!!
<BR>
<BR>-Steve Gregory-</FONT></HTML>
--part1_90.22c434f2.29c399d3_boundary--
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Date: Fri, 15 Mar 2002 13:55:44 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Torres, Roberto" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Torres, Roberto" <[log in to unmask]>
Subject: Re: Impedance calculator
X-To: "Maddox, Allen T" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Allen;
I believe that Hadco is no more, they are part of Sammina now
I think. I have tried Sammina's web page could not find the old
Hadco links.
Regards
Bob Torres
-----Original Message-----
From: Maddox, Allen T [mailto:[log in to unmask]]
Sent: Friday, March 15, 2002 8:08 AM
To: [log in to unmask]
Subject: Re: [TN] Impedance calculator
I'm having a tough time getting into it this morning, but, maybe you'll have
better luck. Give this a try:
http://www.hadco.com/impedanc.htm <http://www.hadco.com/impedanc.htm>
Allen Maddox
Senior PCB Designer
GAI-Tronics
PO Box 1060
Reading, PA 19607-1060
Voice: 610-796-5854
FAX: 610-777-1870
www.gai-tronics.com
[log in to unmask]
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: Friday, March 15, 2002 8:28 AM
To: [log in to unmask]
Subject: [TN] Impedance calculator
Does any one know a good tool to model impedance calculations.
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Date: Fri, 15 Mar 2002 14:16:37 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
James TerVeen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: James TerVeen <[log in to unmask]>
Subject: Re: Update...HELP! Need an Emerald Part!
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
How do you like that. In the morning you are ripping them a new one and in
the afternoon they are your best buddy. Maybe they saw your posting this
morning and you mentioned them by name and they new they need to jump
through a few hoops and there you are the best budy again. They never
change you just happen to get to the right person that could help you at
that moment.
Just venting
[log in to unmask]
COM To: [log in to unmask]
Sent by: cc:
TechNet Subject: Re: [TN] Update...HELP! Need an
<[log in to unmask] Emerald Part!
RG>
03/15/02 01:39
PM
Please respond
to "TechNet
E-Mail
Forum.";
Please respond
to SteveZeva
I would like to give a quick update on my Emerald camera mirror
situation...
Assembleon has come through with shining colors! I received a phone call
this morning that a mirror had been located and was in Alpharetta, and
could be on the next airplane flying into Tulsa, or Fed-ex'd overnight for
a Saturday delivery, which ever I preferred...
Now THAT'S the kind of customer service that I like!!
-Steve Gregory-
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=========================================================================
Date: Fri, 15 Mar 2002 13:15:50 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: ANOTHER UPDATE CONCERNING MOONMAN'S BGA'S
All the little DSP BGA's soldered fine. 4 of 5 boards even work with the
world's worst design ever.
The story is not over, but it's off to a good start. My thanks to
Sanmina/Hadco tech fab center East and the fine people there. Also, my hat's
off to Sanmina's tech assembly center in Austin. Both busted ass and came
through, against all odds. Thank you too Jason Gregory.
I'm outa here finally and going gambling and gamboling in Nevada. Then it's
off to do automotive stuff.
MoonFreeMan
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=========================================================================
Date: Fri, 15 Mar 2002 14:28:43 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, tech <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: tech <[log in to unmask]>
Subject: IPC-602A
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Sorry,
What I'm looking for is IPC- 60 2A. Its apparently NOT a
6012 typo.
Sorry for the error
Regards
Paul Greene
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Date: Fri, 15 Mar 2002 13:43:27 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: ANOTHER UPDATE CONCERNING MOONMAN'S BGA'S
I'm sorry. I forgot to thank all the little people out there on technet land
for this achievement. Without you, it would have gotten done anyway but
would not have been as much fun. Isn't life great as I say this while
graciously and ever so humbly accept your undying gratitude and all that crap?
Also, thank you all for putting up with my way too many postings. I must say
it was fun but WHERE'S MY SILVER SPOON?
EeeeeeeHaaaw
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Date: Fri, 15 Mar 2002 14:00:21 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Machine part availability...
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Then again, what you might be seeing is a reflection of JIT or LEAN
manufacturing. In both those systems, inventory is a BAD BAD thing and
must be eliminated. If the accountants are running the show, this may be
why the supplier doesn't have parts on hand. Of course, they could just
suck at customer service......
Doug Pauls
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Date: Fri, 15 Mar 2002 13:07:58 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Help!
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Need a board shop that is capable of building on Rogers RT 5870 .031 teflon
with 1 oz cu. on one side and .125 aluminum on the other. Please call me.
Thanks,
Rick Howieson
Delta Group Electronics, Inc.
505.883.7674
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Date: Fri, 15 Mar 2002 14:41:52 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: ANOTHER UPDATE CONCERNING MOONMAN'S BGA'S
X-To: Earl Moon <[log in to unmask]>
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Earl.
You might find this short report interesting:
> DOC=DOT/FAA/AR-01/41 DDATE=01-AUG-2001 DD=CTD
>
> Title: REVIEW OF PENDING GUIDANCE AND INDUSTRY
> FINDINGS ON COMMERCIAL OFF-THE-SHELF (COTS) ELECTRONICS IN AIRBORNE SYSTEMSAbstract: March 11,
> 2002 THE INTENT OF THIS REPORT IS TO PROVIDE FINDINGS ABOUT THE STATE OF THE INDUSTRY RELATIVE
> TO THE DESIGN OBJECTIVES IDENTIFIED IN GUIDANCE DOCUMENT DO-254 WITH FOCUS ON THE IMPLICATIONS
> FOR THE USE OF COMMERCIAL OFF-THE-SHELF (COTS) ELECTRONIC HARDWARE COMPONENTS IN SAFETY
> CRITICAL AIRBORNE SYSTEMS. THE USE OF COMPLEX ELECTRONIC HARDWARE COMPONENTS IN AIRBORNE
> SYSTEMS POSES A CHALLENGE TO THE MEETING OF SAFETY REQUIREMENTS BECAUSE, FOR COMPLEX
> COMPONENTS, COMPLETE VERIFICATION IS, AT BEST, VERY DIFFICULT AND, AT WORST, NOT ACHIEVABLE. IN
> ORDER TO ADDRESS THE POTENTIAL LACK OF COMPLETE VERIFICATION, IT IS RECOMMENDED THAT THE HARDWARE
> DESIGN LIFE CYCLE PROCESSES SHOULD INCLUDE DESIGN ASSURANCES TO MITIGATE THE POSSIBILITY THAT
> DESIGN ERRORS MAY BE INTRODUCED INTO THE HARDWARE COMPONENT AND CAUSE ANOMALOUS BEHAVIOR. NEW
> TECHNOLOGIES, BEING DEVELOPED IN THE COMMERCIAL SECTOR, COULD PROVIDE ENHANCED SAFETY IN
> AIRBORNE SYSTEMS IF THE TECHNOLOGIES COULD BE INCORPORATED AT AN AFFORDABLE COST. HOWEVER, THE
> USE OF COTS COMPONENTS IN AIRBORNE SYSTEMS RAISES A NUMBER
> OF ISSUES WITH RESPECT TO MEETING AIRBORNE SYSTEM SAFETY REQUIREMENTS AND DO-254 OBJECTIVES.
> COMMERCIAL MARKET TRENDS ARE RAPIDLY DIVERGING FROM THE NEEDS OF SAFETY CRITICALAIRBORNE SYSTEMS.
> ISSUES WITH RESPECT TO COTS USAGE MAY BECOME BARRIERS IN CERTAIN CASES, IF NECESSARY ASSURANCES
> CANNOT BE ACHIEVED IN A COST EFFECTIVE MANNER. THE ASSURANCES REQUIRED
> FOR HIGH CRITICALITY APPLICATIONS SUCH AS LEVELS A AND B WILL PROBABLY NOT BE ATTAINABLE FOR COTS
> COMPONENTS WITHOUT MITIGATION BY OTHER MEANS.
>
> David A. Douthit
> Manager
> LoCan LLC
Earl Moon wrote:
> All the little DSP BGA's soldered fine. 4 of 5 boards even work with the
> world's worst design ever.
>
> The story is not over, but it's off to a good start. My thanks to
> Sanmina/Hadco tech fab center East and the fine people there. Also, my hat's
> off to Sanmina's tech assembly center in Austin. Both busted ass and came
> through, against all odds. Thank you too Jason Gregory.
>
> I'm outa here finally and going gambling and gamboling in Nevada. Then it's
> off to do automotive stuff.
>
> MoonFreeMan
>
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Earl.
<p>You might find this short report interesting:
<br>
<blockquote TYPE=CITE><font size=-1>DOC=DOT/FAA/AR-01/41 DDATE=01-AUG-2001
DD=CTD</font>
<p><font size=-1>Title: REVIEW OF PENDING GUIDANCE
AND INDUSTRY</font>
<br><font size=-1>FINDINGS ON COMMERCIAL OFF-THE-SHELF (COTS)
ELECTRONICS IN AIRBORNE SYSTEMS</font><font size=-1>Abstract:
March 11, 2002</font> <font size=-1>THE INTENT OF
THIS REPORT IS TO PROVIDE FINDINGS ABOUT THE STATE OF THE INDUSTRY
RELATIVE TO THE DESIGN OBJECTIVES IDENTIFIED
IN GUIDANCE DOCUMENT DO-254 WITH FOCUS ON THE IMPLICATIONS FOR THE
USE OF COMMERCIAL OFF-THE-SHELF (COTS) ELECTRONIC
HARDWARE COMPONENTS IN SAFETY CRITICAL AIRBORNE SYSTEMS.
THE USE OF COMPLEX ELECTRONIC HARDWARE COMPONENTS
IN AIRBORNE SYSTEMS POSES A CHALLENGE TO THE MEETING OF SAFETY REQUIREMENTS
BECAUSE, FOR COMPLEX</font>
<br><font size=-1>COMPONENTS, COMPLETE VERIFICATION IS, AT BEST, VERY DIFFICULT
AND, AT WORST, NOT ACHIEVABLE. IN ORDER
TO ADDRESS THE POTENTIAL LACK OF COMPLETE VERIFICATION, IT
IS RECOMMENDED THAT THE HARDWARE DESIGN LIFE CYCLE PROCESSES
SHOULD INCLUDE DESIGN ASSURANCES TO MITIGATE THE POSSIBILITY THAT DESIGN
ERRORS MAY BE INTRODUCED INTO THE HARDWARE
COMPONENT AND CAUSE ANOMALOUS BEHAVIOR. NEW TECHNOLOGIES,
BEING DEVELOPED IN THE COMMERCIAL SECTOR, COULD
PROVIDE ENHANCED SAFETY IN AIRBORNE SYSTEMS
IF THE TECHNOLOGIES COULD BE INCORPORATED AT AN AFFORDABLE COST.
HOWEVER, THE USE OF COTS COMPONENTS IN AIRBORNE SYSTEMS
RAISES A NUMBER</font>
<br><font size=-1>OF ISSUES WITH RESPECT TO MEETING AIRBORNE
SYSTEM SAFETY REQUIREMENTS AND DO-254 OBJECTIVES. COMMERCIAL MARKET
TRENDS ARE RAPIDLY DIVERGING FROM THE NEEDS OF SAFETY CRITICAL</font><font size=-1>AIRBORNE
SYSTEMS. ISSUES WITH RESPECT TO COTS USAGE MAY BECOME BARRIERS IN
CERTAIN CASES, IF NECESSARY ASSURANCES CANNOT BE ACHIEVED IN A COST EFFECTIVE
MANNER. THE ASSURANCES REQUIRED</font>
<br><font size=-1>FOR HIGH CRITICALITY APPLICATIONS SUCH AS LEVELS
A AND B WILL PROBABLY NOT BE ATTAINABLE FOR COTS COMPONENTS
WITHOUT MITIGATION BY OTHER MEANS.</font><font size=-1></font>
<p>David A. Douthit
<br>Manager
<br>LoCan LLC</blockquote>
<br>
<p>Earl Moon wrote:
<blockquote TYPE=CITE>All the little DSP BGA's soldered fine. 4 of 5 boards
even work with the
<br>world's worst design ever.
<p>The story is not over, but it's off to a good start. My thanks to
<br>Sanmina/Hadco tech fab center East and the fine people there. Also,
my hat's
<br>off to Sanmina's tech assembly center in Austin. Both busted ass and
came
<br>through, against all odds. Thank you too Jason Gregory.
<p>I'm outa here finally and going gambling and gamboling in Nevada. Then
it's
<br>off to do automotive stuff.
<p>MoonFreeMan
<p>---------------------------------------------------------------------------------
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Date: Fri, 15 Mar 2002 15:32:47 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Machine part availability...
X-To: [log in to unmask]
Damn Doug,
That's sage thinking. How'd you come up with that. I sure as hell couldn't.
Just when I thought lean was a good thing, you ring my bell. Bean counters
forever and Sanmina is closing their Austin facility just because there's no
business out there. Hail Greenspan.
MoonMan
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Date: Fri, 15 Mar 2002 13:53:51 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Mcmaster, Michael" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Mcmaster, Michael" <[log in to unmask]>
Subject: Re: Board Bow and Twist
X-To: "Marsico, James" <[log in to unmask]>
MIME-Version: 1.0
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Jim
If you can use the boards with more warpage, then you should, by all means
increase the spec. There's no benefit to making your supplier throw boards
that are functional. The opposite is also true. If you need tighter
requirements, then specify them also. I've had a couple of instances where
I ran into some parts that needed an absolute maximum warpage value rather
than a %. If the warpage exceed a certain amount it interfered with the
cameras on the pick and place equipment. There were multiple parts impacted
by this and each had different dimensions, so the warp as a % was variable
on each part. Some parts ended up with warp specs over 1% while others were
less than 0.5%. The parts we had the biggest problem with were multi-image
arrays with long dimensions and unbalanced, mixed dielectrics. We ended up
working with the customer to re-panelize these so they could accept a higher
warp %.
I agree with the "consensus" that warpage should be evaluated in the panel.
One thing I'm curious is how your fabricator determined that the single
images met the spec. How did they measure it and how did they come up with
a different % value for the image vs the panel? Most of the warped boards
I've seen have a pretty consistent curvature to them and expressed as a %,
the value stays consistent.
> ----------
> From: Marsico, James[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;Marsico, James
> Sent: Thursday, March 14, 2002 7:01 AM
> To: [log in to unmask]
> Subject: Re: [TN] Board Bow and Twist
>
> What if the panels are bowed beyond the .75% limit, the boards are not, I
> can build them and I can use them? I know I'm answering my own question,
> I
> should use them, right? Well, what's the purpose of the .75% requirement?
> I would think that the requirement should be whatever is agreed upon
> between
> customer and supplier. If I can live with 2%, why not (within reason).
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
>
> -----Original Message-----
> From: Franklin D Asbell [SMTP:[log in to unmask]]
> Sent: Thursday, March 14, 2002 8:25 AM
> To: [log in to unmask]ORG
> Subject: Re: [TN] Board Bow and Twist
>
> James,
>
> An afterthought, the bow and twist requirement is there to provide
> ease of
> board population as well as end use fit. If the board is warped
> prior to
> assembly, this indeed would affect population thus potentially
> making the
> boards unsuitable for end use...just something to think about, or
> pass along
> to your supplier.
>
> Franklin
>
> ----- Original Message -----
> From: "Marsico, James" <[log in to unmask]>
> To: <[log in to unmask]>
> Sent: Thursday, March 14, 2002 6:48 AM
> Subject: [TN] Board Bow and Twist
>
>
> > I think this is a no-brainer, but here goes... We were
> delivered
> boards
> in
> > panel form from one of our suppliers. At Incoming Inspection,
> the
> panel
> was
> > rejected for excessive bow (>75% for SMT) and returned the
> supplier. The
> > supplier called me and said that even though the panel exceeded
> the bow
> > requirement, the individual boards were acceptable. When I
> quoted
> the bow
> > and twist requirement from IPC-6012, "Panels which contain
> multiple
> printed
> > boards which are assembled on the panel and later separated
> shall
> be
> > assessed in panel form." , he said yes, you measure the
> individual
> boards
> in
> > the panel. I need clarification.
> > Thanks,
> > Jim Marsico
> > Senior Engineer
> > Production Engineering
> > EDO Electronics Systems Group
> > [log in to unmask] <mailto:[log in to unmask]>
> > 631-595-5879
> >
> >
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Date: Fri, 15 Mar 2002 15:52:17 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: ANOTHER UPDATE CONCERNING MOONMAN'S BGA'S
X-To: [log in to unmask]
Thanks Dave,
This whole COTS thing is in big trouble. That's simply evidenced by my
struggle with really otf the shelf parts. How the hell can mil/aero folks
even think of making it work? Don't want to be in the next war, or whatever
it is called.
I know JK knows this as well,
Earl
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Date: Fri, 15 Mar 2002 14:32:46 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Franklin D Asbell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Franklin D Asbell <[log in to unmask]>
Subject: Solid Stainless ~vs~ Copper Core Stainless panel plating racks
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Need some info, currently we use solid stainless steel plating racks, =
been using them since I've been with the company. Recently it was =
suggested that we need to switch to copper core plating racks. These are =
the same configuration as our current racks, but with a core of solid =
copper.=20
At a plating shop I was with years ago my experience with copper =
rack/contacts was not a smooth one, the extraordinary way copper =
corroded made for much additional "pain in the butt" situations.
The racks, from what I understand will be completely encased in =
stainless, except where they contact the panel, and the plating bus bar, =
they will also be enclosed in the pvc coating (other some other exotic =
plastic protective covering) as additional protection. Our current racks =
also have this coating, as stated, the difference being one has a copper =
core.
Has anyone made this transition in the past? Recently? And what were =
your experiences or results, both good and bad...thanks
Franklin
------=_NextPart_000_000C_01C1CC2E.46A365C0
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META content=3D"text/html; charset=3Diso-8859-1" =
http-equiv=3DContent-Type>
<META content=3D"MSHTML 5.00.3315.2870" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Need some info, currently we use solid =
stainless=20
steel plating racks, been using them since I've been with the company. =
Recently=20
it was suggested that we need to switch to copper core plating racks. =
These are=20
the same configuration as our current racks, but with a core of solid =
copper.=20
</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>At a plating shop I was with years ago =
my=20
experience with copper rack/contacts was not a smooth one, the =
extraordinary way=20
copper corroded made for much additional "pain in the butt"=20
situations.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>The racks, from what I understand will =
be=20
completely encased in stainless, except where they contact the panel, =
and the=20
plating bus bar, they will also be enclosed in the pvc coating (other =
some other=20
exotic plastic protective covering) as additional protection. Our =
current racks=20
also have this coating, as stated, the difference being one has a copper =
core.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Has anyone made this transition in the =
past?=20
Recently? And what were your experiences or results, both good and=20
bad...thanks</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Franklin</FONT></DIV></BODY></HTML>
------=_NextPart_000_000C_01C1CC2E.46A365C0--
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Date: Fri, 15 Mar 2002 21:06:56 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Earl A. Pruitt" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Earl A. Pruitt" <[log in to unmask]>
Subject: Contaminated solder
I am an electronics tech servicing 10+ year old amateur radio gear. The
trouble I am having is with a single sided through-hole board. Areas of
the board are covered with wax. Over time the boards malfunction as the
wax works its way into the solder. Hand resoldering is a nightmare as the
wax continues to wick towards the connection. Heating the board and
draining the wax away does not help as some wax residue is left. Also,
components become damaged from the air gun. The boards are also covered
in contact cement that has become corrosive and conductive. Currently we
are using Methaline Chloride to soften the glue and then pick it away.
Questions are as follows: 1) How can the wax be completely removed? 2) How
can the glue be removed without using such a toxic substance as paint
stripper? 3) Is there an economical device that can be purchased to reflow
these old boards without hand resoldering hundreds of cold/contaminated
connections? Any help would be greatly appreciated!
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Date: Sat, 16 Mar 2002 16:25:30 +1100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
peter tremewen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: peter tremewen <[log in to unmask]>
Subject: Re: Contaminated solder
X-To: "Earl A. Pruitt" <[log in to unmask]>
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Content-Type: text/plain; charset="iso-8859-1"
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Hi,
Kerosene will remove the wax, It will desolve it, I have been
cleaning remote control units of wax in this way for some time. We then
flush this off with IPA. Seems to work well. However be very careful that it
wont damage any components on your PBAs befrore you get too carried away, It
doesnt seem to affect chip componenst such as resistor and caps, Or for that
matter transistors in SOT 23 paks. I have no idea how it might affect
anything else though. Are you sure it's the wax causing trouble?? I've not
had quite as much experiance (about five years on and off) but I've not seen
this happen on any of the remote boards I've fixed. Indeed the solderwave
machine at work uses a wax covering to inhibit dross and we have had no
problems with that contaminating the solder. My sugesting is that the
contact cement may be wholly to blame. I have been soldering through wax for
some time now and not had any recuring joint troubles. Driver transistors
are the most comman form of falure in the Remote control cars I service, and
they face a variety of hostile contaminants. Unfuatunatly the only way I can
think of to reliably resolder these conection would be to use a solder wave
machine, NOT a cheap option really though.
----- Original Message -----
From: Earl A. Pruitt <[log in to unmask]>
> I am an electronics tech servicing 10+ year old amateur radio gear. The
> trouble I am having is with a single sided through-hole board. Areas of
> the board are covered with wax. Over time the boards malfunction as the
> wax works its way into the solder. Hand resoldering is a nightmare as the
> wax continues to wick towards the connection. Heating the board and
> draining the wax away does not help as some wax residue is left. Also,
> components become damaged from the air gun. The boards are also covered
> in contact cement that has become corrosive and conductive. Currently we
> are using Methaline Chloride to soften the glue and then pick it away.
> Questions are as follows: 1) How can the wax be completely removed? 2) How
> can the glue be removed without using such a toxic substance as paint
> stripper? 3) Is there an economical device that can be purchased to reflow
> these old boards without hand resoldering hundreds of cold/contaminated
> connections? Any help would be greatly appreciated
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Date: Sat, 16 Mar 2002 00:39:45 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rob Legg <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rob Legg <[log in to unmask]>
Subject: Re: Contaminated solder
X-To: "Earl A. Pruitt" <[log in to unmask]>
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Paraffin-based wax is soluble in petrol, lighter fluid and the like. It
could dissolve a number of other types of necessary sealants used in very
old (>40years) circuits, though, so you have to use your judgment on
application method.
If it's some other kind of wax, you'll need to identify it.
I wouldn't expect paraffin to affect your hardware as seriously as you
describe. Perhaps there's another contaminant, absorbed by the materials you
are attempting to remove.
RL
----- Original Message -----
From: "Earl A. Pruitt" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Friday, March 15, 2002 10:06 PM
Subject: [TN] Contaminated solder
> I am an electronics tech servicing 10+ year old amateur radio gear. The
> trouble I am having is with a single sided through-hole board. Areas of
> the board are covered with wax. Over time the boards malfunction as the
> wax works its way into the solder. Hand resoldering is a nightmare as the
> wax continues to wick towards the connection. Heating the board and
> draining the wax away does not help as some wax residue is left. Also,
> components become damaged from the air gun. The boards are also covered
> in contact cement that has become corrosive and conductive. Currently we
> are using Methaline Chloride to soften the glue and then pick it away.
> Questions are as follows: 1) How can the wax be completely removed? 2) How
> can the glue be removed without using such a toxic substance as paint
> stripper? 3) Is there an economical device that can be purchased to reflow
> these old boards without hand resoldering hundreds of cold/contaminated
> connections? Any help would be greatly appreciated!
>
> --------------------------------------------------------------------------
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>
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Date: Fri, 15 Mar 2002 16:20:23 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Geoff Layhe <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Geoff Layhe <[log in to unmask]>
Subject: Re: Impedance calculator
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Try www.polarinstruments.com <http://www.polarinstruments.com> .
There is also some good information and formulae at
www.ultracad.com/articles.htm <http://www.ultracad.com/articles.htm>
Geoff Layhe
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: 15 March 2002 13:28
To: [log in to unmask]
Subject: [TN] Impedance calculator
Does any one know a good tool to model impedance calculations.
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charset="iso-8859-1"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
<META content="MSHTML 5.50.4134.600" name=GENERATOR></HEAD>
<BODY>
<DIV><FONT face=Arial color=#0000ff size=2><SPAN class=710390916-15032002>Try <A
href="http://www.polarinstruments.com">www.polarinstruments.com</A>.
</SPAN></FONT></DIV>
<DIV><FONT face=Arial color=#0000ff size=2><SPAN class=710390916-15032002>There
is also some good information and formulae at <A
href="http://www.ultracad.com/articles.htm">www.ultracad.com/articles.htm</A></SPAN></FONT></DIV>
<DIV><FONT face=Arial color=#0000ff size=2><SPAN
class=710390916-15032002></SPAN></FONT> </DIV>
<DIV><FONT face=Arial color=#0000ff size=2><SPAN class=710390916-15032002>Geoff
Layhe</SPAN></FONT></DIV>
<BLOCKQUOTE dir=ltr style="MARGIN-RIGHT: 0px">
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Mauro, Dan
[mailto:[log in to unmask]]<BR><B>Sent:</B> 15 March 2002 13:28<BR><B>To:</B>
[log in to unmask]<BR><B>Subject:</B> [TN] Impedance
calculator<BR><BR></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN class=603202713-15032002>Does any one know
a good tool to model impedance calculations.</SPAN></FONT></DIV>
<P><FONT face=Arial size=2><SPAN
class=603202713-15032002></SPAN></FONT> </P></BLOCKQUOTE></BODY></HTML>
<BR>
<BR>
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<P><B><FONT SIZE=2 FACE="Arial">organisation to whom it is addressed. If the message is received by anyone</FONT></B></P>
<P><B><FONT SIZE=2 FACE="Arial">other than the addressee please return the message to the sender by replying</FONT></B></P>
<P><B><FONT SIZE=2 FACE="Arial">to it and then delete the message from your computer.</FONT></B></P>
<BR>
<BR>
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Date: Fri, 15 Mar 2002 14:13:49 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Geoff Layhe <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Geoff Layhe <[log in to unmask]>
Subject: Re: Prepreg
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Agree with everything you say ....except there are now high resin content
(48%)7628 pre-pregs which means that you can use it facing copper layers.
2116 is definitely the best pre-preg, the glass weave is nice and even and
the resin content is about 55%. It's better for inner layer registration
than 2125.
Geoff Layhe
www.lamar-uk.co.uk
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: 15 March 2002 10:40
To: [log in to unmask]
Subject: Re: [TN] Prepreg
Again, but I love this stuff, you don't need two ply constructions except
when you need them. You get very well balanced structures, from a resin to
glass ratio point of view, with single ply preg and core material except
when using 7628 types/styles. You never use this facing copper as it only
has about 43% resin content and you may very well find starvation using it.
I feel like I've written this before. Anyway, 2113 and 2116 glass styles
offer the best of both laminate integrity (plenty of resin) and dimensional
stability (plenty of glass). No problem using two plies of these types in
whatever requirement. Two plies of 106 or 1080 isn't appropriate, if
avoidable, because it's two resin rich and makes everything slip and slide
in the press and that's a mess.
As for the shorting issues, that's been resolved even by the
military/aerospace folks for years. How many, I can't even remember. If
you've seen this condition, as voiding and shorting etc., get a photo for us
all to see. If proof exists, it has to be a billion to one shot and
certainly would point to possible process control problems of an other than
preg issue.
MoonMan
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Date: Sat, 16 Mar 2002 07:25:29 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Prepreg
X-To: [log in to unmask]
Geoff,
Very glad about the concurrence. You know your stuff.
The 7628 subject still is a sore point with me though. Even at a higher
resin content, it just doesn't come close to our favorite 2116 and 2113. The
weave is just too tight to support really good impregnation so reliance must
be made too much on the silane treatment for "wetting" (x linking). I also
really like to get over the 50% resin to glass ratio hump.
That higher resin content 2116 sounds great. I'll check into it next time I
need to work with designers and MLB's. Now, I'm just going to enjoy some
crude car stuff.
Thanks again for the info,
Earl
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Date: Sun, 17 Mar 2002 14:30:02 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bev Christian <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bev Christian <[log in to unmask]>
Subject: Re: Contaminated solder
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Earl,
1) There is no way that a good paraffin wax "works it way" into a solid
solder joint.
2) Are you sure that liquid high boiling hydrocarbons from a cheap wax (not
properly separated in the first place in the refinery) have left the wax and
slithered their way into mechanical switches and other moving parts on the
circuit boards instead?
3) If you really are finding hydrocarbons in cracked joints, then they
cracked first and then the migration happened.
4) You will note I used a lot of adjectives - good chemist "weasel words".
All bets are off if you have some weird, corrosive "goo".
5) Peter's suggestion and component warning were correct. I would add the
usual safety cautions regarding proper ventilation and static spark
generation.
6) I think you mean methylene chloride (CH2Cl2). You use that and are
worried about paint thinner? Methylene chloride is a suspected carcinogen
and has a low boiling point (104F, 40C if I did my math correctly for those
of us who are not in the hegemony of the US, Liberia and Yemen who have not
gone metric :) ). Of course "paint thinner" is pretty generic and it can
range from a mixture of hydrocarbons to mixtures that contain acetates and
toluene to those that contain some rather nasty ketones that I don't want
going up my nostrils (and into my liver)!
7) It sure sounds like the contact cement is more likely your villain,
especially since you can see its effects.
8) Anybody out there got a good suggestion for Earl with regards to
softening/dissolving (possible?) the contact cement?
9) I would worry about the effect of methylene chloride on some of the
plastics used for components.
10) You can buy some neat little batch reflow ovens from Tomken Industries.
http://www.tomkenindustries.com/reflow.htm They market a Techno HA-02 and
06. I am sure there are others.
Hope this helps.
regards,
Bev Christian
Research in Motion
-----Original Message-----
From: Earl A. Pruitt [mailto:[log in to unmask]]
Sent: March 15, 2002 10:07 PM
To: [log in to unmask]
Subject: [TN] Contaminated solder
I am an electronics tech servicing 10+ year old amateur radio gear. The
trouble I am having is with a single sided through-hole board. Areas of
the board are covered with wax. Over time the boards malfunction as the
wax works its way into the solder. Hand resoldering is a nightmare as the
wax continues to wick towards the connection. Heating the board and
draining the wax away does not help as some wax residue is left. Also,
components become damaged from the air gun. The boards are also covered
in contact cement that has become corrosive and conductive. Currently we
are using Methaline Chloride to soften the glue and then pick it away.
Questions are as follows: 1) How can the wax be completely removed? 2) How
can the glue be removed without using such a toxic substance as paint
stripper? 3) Is there an economical device that can be purchased to reflow
these old boards without hand resoldering hundreds of cold/contaminated
connections? Any help would be greatly appreciated!
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Date: Mon, 18 Mar 2002 10:04:04 +1200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Michael Bell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Michael Bell <[log in to unmask]>
Subject: Heat Dissapation through Vias
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Hi all,
I have stumbled across a problem with heat dissapation on an RF type PCA.
Our customer has designed the PCB with 0.3mm via's underneath various
components, (power transistors), and now this is causing a thermal
dissapation problem. The part manufacturer had the following suggestions...
"Manufacturing suggestions,
To properly use the parts in a manufacturing environment, it is recommended
that an additional reflow process is used to ensure solder has filled the
thermal vias beneath the part.
The steps are as follows:
1. Apply solder paste to area containing thermal vias.
2. Reflow the board and the solder paste will wick through the via holes.
3. Cover the backside of the board beneath the power amplifier with Kapton
tape and reflow the part to the board. The solder will remain in the via
holes and the power amplifier will be properly connected to the
thermal/ground pad below it."
Is anyone performing such a process??? What implications and problems does
anyone have with trying to gasket the stencil over these filled via's???
What other issues are there?
Cheers
Mike
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Date: Mon, 18 Mar 2002 14:17:32 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
sangliu <[log in to unmask]>
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From: sangliu <[log in to unmask]>
Subject: Mini soldering Nozzle maintenance
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Date: Mon, 18 Mar 2002 06:47:28 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dieselberg, Ron" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dieselberg, Ron" <[log in to unmask]>
Subject: Re: Soldering crimp connectors
X-To: Carl VanWormer <[log in to unmask]>
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Carl, we had this happen to us before, more as a self inflicted QC problem.
QC insisted that we solder all of the crimped pins on a connector harness.
When the harnesses were assembled and installed in the equipment we had
about a 50% failure rate (broken connections). After much discussion and
interfacing with the pin manufacturer we convinced QC that you solder
"solder cup pins" and you crimp "crimp pins", but you never do both in any
case. We wound up remaking all of the harnesses and as I recall we had less
than .2% failure in the hundreds of harnesses that we built after that
using only crimps.
Good luck, Carl.
Ron Dieselberg
Trainer/Auditor
CMC ELECTRONICS
CINCINNATI
[log in to unmask]
-----Original Message-----
From: Carl VanWormer [mailto:[log in to unmask]]
Sent: Wednesday, March 13, 2002 14:35 PM
To: [log in to unmask]
Subject: [TN] Soldering crimp connectors
We have a customer who insists that we solder our crimp
connectors (after
crimping). He has had corrosion problems and is convinced
that this is the
best solution. Is this a good thing? Are there any
downsides we should
point out to help educate him?
Carl Van Wormer
Cipher Systems
1815 NW 169th Place, Suite 5010
Beaverton, OR 97006
Phone (503)-617-7447 Fax (503)-617-6550
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<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META NAME=3D"Generator" CONTENT=3D"MS Exchange Server version =
5.5.2652.35">
<TITLE>RE: [TN] Soldering crimp connectors</TITLE>
</HEAD>
<BODY>
<P><FONT SIZE=3D2 FACE=3D"Arial">Carl, we had this happen to us before, =
more as a self inflicted QC problem. QC insisted that we solder all of =
the crimped pins on a connector harness. When the harnesses were =
assembled and installed in the equipment we had about a 50% failure =
rate (broken connections). After much discussion and interfacing with =
the pin manufacturer we convinced QC that you solder "solder cup pins" =
and you crimp "crimp pins", but you never do both in any case. We =
wound up remaking all of the harnesses and as I recall we had less than =
.2% failure in the hundreds of harnesses that we built after =
that using only crimps.</FONT></P>
<P><FONT SIZE=3D2 FACE=3D"Arial">Good luck, Carl.</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Courier New">Ron Dieselberg</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">Trainer/Auditor</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">CMC ELECTRONICS</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">CINCINNATI</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">[log in to unmask]</FONT>
</P>
<UL><UL>
<P><A NAME=3D"_MailData"><FONT SIZE=3D2 FACE=3D"Arial">-----Original =
Message-----</FONT></A>
<BR><B><FONT SIZE=3D2 FACE=3D"Arial">From: Carl VanWormer =
[<A =
HREF=3D"mailto:[log in to unmask]">mailto:[log in to unmask]</A>]</FONT></B>
<BR><B><FONT SIZE=3D2 FACE=3D"Arial">Sent: </FONT></B> <FONT =
SIZE=3D2 FACE=3D"Arial">Wednesday, March 13, 2002 14:35 PM</FONT>
<BR><B><FONT SIZE=3D2 =
FACE=3D"Arial">To: </FONT></B> <FONT SIZE=3D2 =
FACE=3D"Arial">[log in to unmask]</FONT>
<BR><B><FONT SIZE=3D2 =
FACE=3D"Arial">Subject: </FONT>=
</B> <FONT SIZE=3D2 FACE=3D"Arial">[TN] Soldering crimp =
connectors</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">We have a customer who insists that we =
solder our crimp connectors (after</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">crimping). He has had corrosion =
problems and is convinced that this is the</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">best solution. Is this a good =
thing? Are there any downsides we should</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">point out to help educate him?</FONT>
</P>
<BR>
<P><FONT SIZE=3D2 FACE=3D"Arial">Carl Van Wormer</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">Cipher Systems</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">1815 NW 169th Place, Suite =
5010</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">Beaverton, OR 97006</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">Phone =
(503)-617-7447 Fax (503)-617-6550</FONT>
</P>
<P><FONT SIZE=3D2 =
FACE=3D"Arial">---------------------------------------------------------=
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Date: Mon, 18 Mar 2002 07:11:02 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Takach, Lou J" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Takach, Lou J" <[log in to unmask]>
Subject: Non-Standard material
MIME-version: 1.0
Content-type: text/plain; charset="iso-8859-1"
Good Morning Technetters...
I need your input / advice. Our manufacturing facility has recently (within
a year or so...) switched to a new PCB fabricator. I'm now starting to get
complaints from manufacturing that our fabricator is having trouble
obtaining the 'non-standard' material that we are specifying. First of all,
I don't believe that I'm specifying non-standard material, this is where I
need your input. Most of our boards are multi-layer, usually 4 to 6 layers
and we use FR4. We typically specify 2-oz copper on the internal power and
ground layers and sometimes 1-oz copper for the outer signal layers. Is this
non-standard? The fabricator says that they typically don't stock 1 over 2
copper. Maybe I'm missing something but I thought that the stackup could be
made of individual copper sheets of various copper weights as long as the
layer sequence was balanced.
All comments welcome...
Lou
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Date: Mon, 18 Mar 2002 08:15:57 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: IPC-602A
X-To: tech <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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I think you still have a typo.
There is an IPC-AC-62A part of a series of cleaning handbooks. 62A is the
Aqueous Post Solder Cleaning Handbook.
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of tech
> Sent: Friday, March 15, 2002 2:29 PM
> To: [log in to unmask]
> Subject: [TN] IPC-602A
>
>
> Sorry,
> What I'm looking for is IPC- 60 2A. Its apparently NOT a
> 6012 typo.
> Sorry for the error
> Regards
> Paul Greene
>
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> ------------------------------------------------------------------
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>
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Date: Mon, 18 Mar 2002 08:41:19 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: Prepreg
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Is there any documentation available which lists all prepregs and their
properties? I have a hard time understanding what 2113, 2116, 2125, etc,
are. This info will also help me spec out our new board designs.
Thanks,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Geoff Layhe [SMTP:[log in to unmask]]
Sent: Friday, March 15, 2002 9:14 AM
To: [log in to unmask]
Subject: Re: [TN] Prepreg
Agree with everything you say ....except there are now high resin
content
(48%)7628 pre-pregs which means that you can use it facing copper
layers.
2116 is definitely the best pre-preg, the glass weave is nice and
even and
the resin content is about 55%. It's better for inner layer
registration
than 2125.
Geoff Layhe
www.lamar-uk.co.uk
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: 15 March 2002 10:40
To: [log in to unmask]
Subject: Re: [TN] Prepreg
Again, but I love this stuff, you don't need two ply constructions
except
when you need them. You get very well balanced structures, from a
resin to
glass ratio point of view, with single ply preg and core material
except
when using 7628 types/styles. You never use this facing copper as it
only
has about 43% resin content and you may very well find starvation
using it.
I feel like I've written this before. Anyway, 2113 and 2116 glass
styles
offer the best of both laminate integrity (plenty of resin) and
dimensional
stability (plenty of glass). No problem using two plies of these
types in
whatever requirement. Two plies of 106 or 1080 isn't appropriate, if
avoidable, because it's two resin rich and makes everything slip and
slide
in the press and that's a mess.
As for the shorting issues, that's been resolved even by the
military/aerospace folks for years. How many, I can't even remember.
If
you've seen this condition, as voiding and shorting etc., get a
photo for us
all to see. If proof exists, it has to be a billion to one shot and
certainly would point to possible process control problems of an
other than
preg issue.
MoonMan
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Date: Mon, 18 Mar 2002 07:53:09 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Prepreg
X-To: [log in to unmask]
Go to laminate suppliers as polyclad, Nelco, etc. Each has its list of glass
styles and resin contents, etc.
Please note, the need for homogenious materials. You can ask what that means
but examples are 2113, 2116, 1080.
As examples, 2113 is about 4 mils thick with a resin content of about 58$.
2116 is about 5 mils thick with a resin congent of about 53%. 1080 is about
2.5 mils thick with a resin content from 65 to 70$. Also include 106 as a
homogeneous glass style (60 yarn bundles per inch, made up of 7-9 micron
glass fibers, in the warp direction - and I'll explain why this is important
when asked)
I'll give you MY chart of materials, resin contents, if you wish, and usage
requirements that have served me well over many years.
Earl
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Date: Mon, 18 Mar 2002 08:59:20 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Franck, George" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Franck, George" <[log in to unmask]>
Subject: Surge voltages and conductor spacings
MIME-Version: 1.0
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Technet:
I am looking for information on how to convert electrical surge voltages
into minimum spacing requirements. I would like to use the "Electrical
conductor Spacing" charts in the IPC design documents, but I am pretty sure
they do not apply to surge voltages.
We are looking at withstanding lightning induced voltages on our inputs. If
we make an assumption that the electronics upstream from my device will only
pass surges of voltages less that 1500 V, what spacing should I use. For
surges greater that 1500V, we are going to assume the upstream electronics
will 'Blow up", grounding the surge, or (hopefully) not sending it down to
our device at any rate. How would it change if the surge voltage changes to
2000 V, 1000V, 500V?
Sounds like a college home work question in an upper level Electrical
Engineering class. Too bad I graduated with a Chemical Engineers degree.
George Franck
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Date: Mon, 18 Mar 2002 07:57:38 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Non-Standard material
X-To: [log in to unmask]
"Standard" usually is whatever material a board supplier stocks. All
material suppliers provide whatever you specify but the cost for other than
"standard" keeps this material "rare."
Most everyone specifies .5 oz. material throughout the MLB structure. If you
need other than "standard" be sure you inform and receive availability
information from your supplier. You can get anything you want for a price.
And on it goes.
MoonMan
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Date: Mon, 18 Mar 2002 09:21:03 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ted Tontis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ted Tontis <[log in to unmask]>
Subject: Contamination
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We have a number of PWB's that show signs of contamination,
management wants to find out if there is a way to clean the boards. I have
told them once the corrosion starts there is no way to clean the assemblies
and make them dependable enough to cover our warranty. Some of the boards
show slight contamination and some more aggressive, but these have been in a
controlled environment for some time. I feel If we where to send them out in
a industrial environment the corrosion would rapidly increases. These boards
are FR-4 and not conformal coated. Am I correct on this?
Thank you,
Ted Tontis C.I.D.
Engage Networks, Inc.
1320 N. Dr. Martin Luther King Jr. Drive
River Level
Milwaukee, WI 53212
PH 414-918-4267
FX 414-273-7601
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Date: Mon, 18 Mar 2002 10:30:27 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Contamination
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Are these bare boards OR are they assemblies?
Susan Mansilla
Robisan Lab
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Date: Mon, 18 Mar 2002 09:34:31 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: Contamination
Mime-Version: 1.0
Content-Type: multipart/mixed; boundary="=_C39E6408.2B4A27D8"
This is a MIME message. If you are reading this text, you may want to
consider changing to a mail reader or gateway that understands how to
properly handle MIME multipart messages.
--=_C39E6408.2B4A27D8
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Where is the contamination coming from? Is there a specific component =
that is the issue or a process? What type of contamination are you asking =
about? =20
Kathy=20
--=_C39E6408.2B4A27D8
Content-Type: text/plain
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
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<META content="MSHTML 6.00.2713.1100" name=GENERATOR></HEAD>
<BODY style="MARGIN-TOP: 2px; FONT: 10pt MS Sans Serif; MARGIN-LEFT: 2px">
<DIV>Where is the contamination coming from? Is there a specific component
that is the issue or a process? What type of contamination are you asking
about? </DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
--=_C39E6408.2B4A27D8--
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Date: Mon, 18 Mar 2002 10:41:54 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Contamination
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Are these assemblies or bare board?
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Date: Mon, 18 Mar 2002 10:39:31 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Linda Langley <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Linda Langley <[log in to unmask]>
Subject: FW: Military standards
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Any information out there?
> -----Original Message-----
> From: Sherry Trudell
> Sent: Monday, March 18, 2002 10:15 AM
> To: AUH Jabil
> Subject: Military standards
>
> I was wondering if anyone has any military specifications? Specifically,
> I am looking for the MIL-STD-100, MIL0STD-130, and MIL-STD-454. Let me
> know if you can help.
>
> Thanks,
> Sherry Trudell
> Jabil Circuit
> Design Services
> 3800 Giddings Road
> Auburn Hills, MI 48326
> (248)292-6534
> 82 284 6534 (Jabil Voice Network)
> (248)292-6907 FAX
>
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Date: Mon, 18 Mar 2002 10:44:58 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Non-Standard material
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Moon nice insight,
Your supplier should have this ready for you. You may have a good board
house but a poor match to your needs. We have all kinds of wild and crazy
materials, but for the FR4 family these are some panel stock numbers. Keep
in mind core thickness varies, and these numbers are very rough;
Cu Min Max
h/h 2400 5000
h/1 800 1300
1/1 3450 7000
1/2 100 200
2/2 500 1000
As you can see .5 (h) is king today, but 1/2 is always in stock. Morale of
the story... add this as an item when doing supplier surveys.
The hardest working (and most clever) in any PCB shop is the Purchasing
person. All these materials have a shelf life, cost a bundle (pun intended)
and have limited storage space as controlled environment is recommended. If
not careful your lams can pile up.
Boston Brad
Coretec FAE
781 858 0783
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Date: Mon, 18 Mar 2002 10:50:20 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Prepreg
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Jim,
The place to start is IPC-2221 (quite a listing), the IPC-4101 always keeps
me on the edge of my seat, but the real good detail stuff comes from your
board supplier (reduces the 2221 list) and it's material supplier (resin
content). I like a couple of them, give me a "heads up" offline and I will
share that with you, if you like.
Brad
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Date: Mon, 18 Mar 2002 10:58:46 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Surge voltages and conductor spacings
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George,
The old MIL-STD-275 has or had a nice section on high voltage that seems not
to have made it into the IPC specification. It talks specifically about
corona effects and the "snap" voltages. Although, I may be mixing my
specs... MIL-***-2000 REV - had some nice data, as does or did the
MIL-P-28809. The '275 does talk in terms of High Voltage. If you don't have
those spec's give me a yell and I will break the glass bookshelf. The one
marked "In case of Emergency, Break Glass."
Good luck,
Boston Brad
781 858 0783
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Date: Mon, 18 Mar 2002 08:02:45 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: Re: Machine part availability...
X-To: [log in to unmask]
MIME-version: 1.0
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Morning Steve,
I am out of the office on Fridays so just got your mail. I have been going
around with one of our vendors, similar story. When we bought the equipment
0201 placement was guaranteed, come time to places an order for pick up
tools and no part number in their system. The company has been acquired, no
familiar faces any where to be seen. Especially those who made the promises.
I think there are probably a couple of things happening here. One relates
to what Earl was talking about last week, RIF gone bad. The other is
probably relates to vendors reducing inventory, they probably have to sign
all requisitions in blood, the result of reduced operating capitol.
I think my spleen feels lighter now,
Dan
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Date: Mon, 18 Mar 2002 10:12:10 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Franklin D Asbell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Franklin D Asbell <[log in to unmask]>
Subject: Re: FW: Military standards
X-To: Linda Langley <[log in to unmask]>
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Try this link to the DSCC site::: http://www.dscc.dla.mil/Library/index.html
----- Original Message -----
From: "Linda Langley" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Monday, March 18, 2002 9:39 AM
Subject: [TN] FW: Military standards
> Any information out there?
>
> > -----Original Message-----
> > From: Sherry Trudell
> > Sent: Monday, March 18, 2002 10:15 AM
> > To: AUH Jabil
> > Subject: Military standards
> >
> > I was wondering if anyone has any military specifications?
Specifically,
> > I am looking for the MIL-STD-100, MIL0STD-130, and MIL-STD-454. Let me
> > know if you can help.
> >
> > Thanks,
> > Sherry Trudell
> > Jabil Circuit
> > Design Services
> > 3800 Giddings Road
> > Auburn Hills, MI 48326
> > (248)292-6534
> > 82 284 6534 (Jabil Voice Network)
> > (248)292-6907 FAX
> >
>
> --------------------------------------------------------------------------
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> --------------------------------------------------------------------------
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Date: Mon, 18 Mar 2002 09:05:25 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Foil Lamination
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
The call-out on our fab drawings states to use copper clad epoxy laminate
FR4 base material. Our supplier in the past has purchased and certified
material to IPC-4101. We have now found out they have incorporated foil
lamination into their process. What type of requirements should we impose or
verify?
Thanks for your help!
Rick Howieson
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Date: Mon, 18 Mar 2002 16:15:46 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mark Ross <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mark Ross <[log in to unmask]>
Subject: Books/articles on thermal profiling
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Can anyone recommend a book or technical articles on thermal profiling of
assemblies in reflow ovens? There seems to be a difference of opinion on
the correct way to do it. I have heard:
"Use high temperature solder and solder the thermocouple to the part (great
if it isn't a 0402 or worse an 0201!)"
"Don't use high temperature solder, it will alter the thermal mass of the
device. Use a high temperature epoxy that is thermally conductive and glue
the probe to the device".
"Don't use epoxy, it changes the thermal mass of the device, use a
temperature thin metal tape that has a strong high temperature adhesive".
Also when it comes to keeping the parts on the board, I was all for a board
being conformal coated to keep the parts from moving, scraping back of the
coating where I needed to take my readings and then run the board through.
I have been told that conformal alters the thermal mass of the product.
And on and on....
Last time I asked for suggestions on soldering books, I was pointed to one
By Jennie Hwang and that worked out great so I am hoping there are some
books or articles and maybe even an IPC spec on how to do this so that I can
ensure we are profiling the boards correctly. Thanks for all input.
_________________________________________________________________
MSN Photos is the easiest way to share and print your photos:
http://photos.msn.com/support/worldwide.aspx
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Date: Mon, 18 Mar 2002 11:28:39 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: FW: Military standards
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_166.a87c278.29c76fb7_boundary"
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Hi Linda!
Couldn't find anything under MIL-STD-100 or MIL-STD-130, can you give a
description of what those standards are?
The only thing I found close to MIL-STD-454 was MIL-HDBK-454. Go to:
http://www.dscc.dla.mil/Downloads/MilSpec/Docs/MIL-HDBK-454/hb454.pdf
sounds like that's what Sherry might have been looking for...it's a hefty
download, 181-pages!
-Steve Gregory-
> Any information out there?
>
> > -----Original Message-----
> > From: Sherry Trudell
> > Sent: Monday, March 18, 2002 10:15 AM
> > To: AUH Jabil
> > Subject: Military standards
> >
> > I was wondering if anyone has any military specifications? Specifically,
> > I am looking for the MIL-STD-100, MIL0STD-130, and MIL-STD-454. Let me
> > know if you can help.
> >
> > Thanks,
> > Sherry Trudell
> > Jabil Circuit
> > Design Services
> > 3800 Giddings Road
> > Auburn Hills, MI 48326
> > (248)292-6534
> > 82 284 6534 (Jabil Voice Network)
> > (248)292-6907 FAX
>
--part1_166.a87c278.29c76fb7_boundary
Content-Type: text/html; charset="US-ASCII"
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Linda!
<BR>
<BR>Couldn't find anything under MIL-STD-100 or MIL-STD-130, can you give a description of what those standards are?
<BR>
<BR>The only thing I found close to MIL-STD-454 was MIL-HDBK-454. Go to:
<BR>
<BR>http://www.dscc.dla.mil/Downloads/MilSpec/Docs/MIL-HDBK-454/hb454.pdf
<BR>
<BR>sounds like that's what Sherry might have been looking for...it's a hefty download, 181-pages!
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Any information out there?
<BR>
<BR>> -----Original Message-----
<BR>> From: Sherry Trudell
<BR>> Sent: Monday, March 18, 2002 10:15 AM
<BR>> To: AUH Jabil
<BR>> Subject: Military standards
<BR>>
<BR>> I was wondering if anyone has any military specifications? Specifically,
<BR>> I am looking for the MIL-STD-100, MIL0STD-130, and MIL-STD-454. Let me
<BR>> know if you can help.
<BR>>
<BR>> Thanks,
<BR>> Sherry Trudell
<BR>> Jabil Circuit
<BR>> Design Services
<BR>> 3800 Giddings Road
<BR>> Auburn Hills, MI 48326
<BR>> (248)292-6534
<BR>> 82 284 6534 (Jabil Voice Network)
<BR>> (248)292-6907 FAX
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
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Date: Mon, 18 Mar 2002 11:50:17 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Phil Nutting <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Nutting <[log in to unmask]>
Subject: Re: Surge voltages and conductor spacings
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At Rev E, MIL-SDT-275 has been replaced by IPC-2221.
Phil
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Monday, March 18, 2002 10:59 AM
To: [log in to unmask]
Subject: Re: [TN] Surge voltages and conductor spacings
George,
The old MIL-STD-275 has or had a nice section on high voltage that seems =
not
to have made it into the IPC specification. It talks specifically about
corona effects and the "snap" voltages. Although, I may be mixing my
specs... MIL-***-2000 REV - had some nice data, as does or did the
MIL-P-28809. The '275 does talk in terms of High Voltage. If you don't =
have
those spec's give me a yell and I will break the glass bookshelf. The =
one
marked "In case of Emergency, Break Glass."
Good luck,
Boston Brad
781 858 0783
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Date: Mon, 18 Mar 2002 11:50:09 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Prepreg
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Hello Wes,
Like BGA's and MicroVias you won't use single sheet until you must. I would
continue note verbiage requiring 2 sheets until there is a compelling reason
to go to one. Single sheet usage isn't bad, it quite good as a matter of
fact, but first the comfort range of "thin" needs to realized, then the one
ply. And Wes we met sometime ago at the Boston Chapter of IPC (the former
Lockheed guy), I was in my Presidential attire (mostly dodging tomatoes, tuff
crowd in Boston). In any case I believe you have heritage product using one
ply. Contact outside the forum, email or phone, and we can compare notes.
The old "Military" required one ply, and in its day very deservingly. It was
also related to the old argument of "Foil" verses "Cap" construction.
Requiring one ply also compensated for copper tooth and the ole "Wabash" rule
of thumb squish factor for when people like me were behind the controls.
Cheers,
Boston Brad Saunders
781 858 0783
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Date: Mon, 18 Mar 2002 10:48:00 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Foil Lamination
X-To: [log in to unmask]
If foil maninating, a supplier might use 1 over 1 and etch off the outer
side. Then, the supplier would place a single ply of some resin rich
material (106 or 1080) in each MLB/book top and bottom then place the foil
on top and bottom then laminate.
There's more but someone will fill in the blanks. X sections tell the story,
Earl
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Date: Mon, 18 Mar 2002 12:08:11 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Impedance calculator
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Good Luck,
The impedance numbers are easy. Its meeting the tolerancing that is
challenging.
Personally I am a Polar Bear. I also do sanity checks with 2-4 other
calculators, including home made ones from spread sheet software.
"Standard" thickness is always a curve ball, as is additive copper (external
and buried sub external layers), diff pair spacing to each other and distance
to ref plane is wicked important, adjacent "look thru" plane clearance, and
more "stuff" like correct terminals for verification, dedicated coupons, etc.
If new to impedance I would read "Electronic Packaging of High Speed
Circuitry" by Konsowski and Helland (McGraw Hill '97). It does a very nice
job with diffs, cabling and lengths.
Remember the output of any calculator reflects the quality of the input. And
one last biggy for impedance; sameness is good.
Boston Brad
781 858 0783
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Date: Mon, 18 Mar 2002 09:03:44 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ed Popielarski <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ed Popielarski <[log in to unmask]>
Subject: Re: Contaminated solder
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_002D_01C1CE5B.CE85B720"
This is a multi-part message in MIME format.
------=_NextPart_000_002D_01C1CE5B.CE85B720
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charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Earl,
What you could be seeing IMHO is the result of an ancient technique for =
wave soldering called wax stabilizing. Essentially, the through-hole =
components were run through a wax wave to hold them in place during =
in-line lead trimming prior to entering the solder wave. Many times a =
joint was contaminated and not the most reliable thing on the planet, =
but "it passed test... ship it!" was the common mentality, and now you =
see why we don't do that anymore. I don't think a reflow would resolve =
the issue at hand, since we would still have contaminated surfaces.
Just my "dos centavos" from an old guy that remembers stuff.
Regards,
Ed Popielarski
QTA Machine
10 Mc Laren, Ste D
Irvine, Ca. 92618
Phone:949-581-6601
Fax: 949-581-2448
Cel: 949-337-2578
WWW.QTA.NET
------=_NextPart_000_002D_01C1CE5B.CE85B720
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4807.2300" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Earl,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>What you could be seeing IMHO is the =
result of an=20
ancient technique for wave soldering called wax stabilizing. =
Essentially, the=20
through-hole components were run through a wax wave to hold them in =
place during=20
in-line lead trimming prior to entering the solder wave. Many times a =
joint was=20
contaminated and not the most reliable thing on the planet, but "it =
passed=20
test... ship it!" was the common mentality, and now you see why we don't =
do that=20
anymore. I don't think a reflow would resolve the issue at hand, since =
we would=20
still have contaminated surfaces.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Just my "dos centavos" from an old guy =
that=20
remembers stuff.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Regards,</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Ed Popielarski<BR>QTA Machine<BR>10 Mc =
Laren, Ste=20
D<BR>Irvine, Ca. 92618</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Phone:949-581-6601<BR>Fax: =
949-581-2448<BR>Cel:=20
949-337-2578</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2><A=20
href=3D"http://www.QTA.NET">WWW.QTA.NET</A></FONT></DIV></BODY></HTML>
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Date: Mon, 18 Mar 2002 12:28:39 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Lee Whiteman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Lee Whiteman <[log in to unmask]>
Subject: Re: FW: Military standards
X-To: Linda Langley <[log in to unmask]>
In-Reply-To: <EEB096C80FFBB4419D26DDF24F2E65FD255D63@auhmsgn10b>
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Linda,
You can get them from this website: http://astimage.daps.dla.mil/online/new/
You will have to register with them before getting a password.
Good Luck.
Lee Whiteman
Senior Manufacturing Engineer
E-Mail: [log in to unmask] <mailto:[log in to unmask]>
Ph: (610) 362-1200 x208
Fax: (610) 362-1290
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Linda Langley
> Sent: Monday, March 18, 2002 10:40 AM
> To: [log in to unmask]
> Subject: [TN] FW: Military standards
>
>
> Any information out there?
>
> > -----Original Message-----
> > From: Sherry Trudell
> > Sent: Monday, March 18, 2002 10:15 AM
> > To: AUH Jabil
> > Subject: Military standards
> >
> > I was wondering if anyone has any military specifications?
> Specifically,
> > I am looking for the MIL-STD-100, MIL0STD-130, and MIL-STD-454. Let me
> > know if you can help.
> >
> > Thanks,
> > Sherry Trudell
> > Jabil Circuit
> > Design Services
> > 3800 Giddings Road
> > Auburn Hills, MI 48326
> > (248)292-6534
> > 82 284 6534 (Jabil Voice Network)
> > (248)292-6907 FAX
> >
>
> ------------------------------------------------------------------
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Date: Mon, 18 Mar 2002 12:25:07 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Contamination
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Ted,
Are sure it isn't just a tarnishing of lands that have a non solder or ENIG
finish? That appearance can get pretty bad looking, but is just appearance.
Even that can be improved if need be.
Boston Brad
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Date: Mon, 18 Mar 2002 17:09:52 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Geoff Layhe <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Geoff Layhe <[log in to unmask]>
Subject: Re: Prepreg
X-To: "Marsico, James" <[log in to unmask]>
MIME-Version: 1.0
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Jim,
I've put together a small handbook about multilayer bonding which contains
some info on pre-pregs such as thickness, resin content, glass weave etc.
You can request a copy from www.lamar-uk.co.uk.
-----Original Message-----
From: Marsico, James [mailto:[log in to unmask]]
Sent: 18 March 2002 13:41
To: [log in to unmask]
Subject: Re: [TN] Prepreg
Is there any documentation available which lists all prepregs and their
properties? I have a hard time understanding what 2113, 2116, 2125, etc,
are. This info will also help me spec out our new board designs.
Thanks,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Geoff Layhe [SMTP:[log in to unmask]]
Sent: Friday, March 15, 2002 9:14 AM
To: [log in to unmask]
Subject: Re: [TN] Prepreg
Agree with everything you say ....except there are now high resin
content
(48%)7628 pre-pregs which means that you can use it facing copper
layers.
2116 is definitely the best pre-preg, the glass weave is nice and
even and
the resin content is about 55%. It's better for inner layer
registration
than 2125.
Geoff Layhe
www.lamar-uk.co.uk
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: 15 March 2002 10:40
To: [log in to unmask]
Subject: Re: [TN] Prepreg
Again, but I love this stuff, you don't need two ply constructions
except
when you need them. You get very well balanced structures, from a
resin to
glass ratio point of view, with single ply preg and core material
except
when using 7628 types/styles. You never use this facing copper as it
only
has about 43% resin content and you may very well find starvation
using it.
I feel like I've written this before. Anyway, 2113 and 2116 glass
styles
offer the best of both laminate integrity (plenty of resin) and
dimensional
stability (plenty of glass). No problem using two plies of these
types in
whatever requirement. Two plies of 106 or 1080 isn't appropriate, if
avoidable, because it's two resin rich and makes everything slip and
slide
in the press and that's a mess.
As for the shorting issues, that's been resolved even by the
military/aerospace folks for years. How many, I can't even remember.
If
you've seen this condition, as voiding and shorting etc., get a
photo for us
all to see. If proof exists, it has to be a billion to one shot and
certainly would point to possible process control problems of an
other than
preg issue.
MoonMan
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Date: Mon, 18 Mar 2002 11:25:18 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Prepreg
X-To: [log in to unmask]
BB,
I just want to be sure we are concurrent. The "old" mil specs required TWO
plies of preg per dielectirc thickness - not ONE.
MoonMan
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Date: Mon, 18 Mar 2002 17:38:00 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Phil Kinner <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Kinner <[log in to unmask]>
Subject: Re: Books/articles on thermal profiling
X-To: Mark Ross <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
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Mark,
The National Physical Laboratory here in the UK did a studio project on
just this very topic. I believe you can download their recommendations
at www.npl.co.uk/ei
Phil Kinner
Chief Chemist
Concoat Ltd
2C Albany Park, Frimley Road,
Camberley, Surrey, GU16 7PH
Tel: +44 (0) 1276 691100
Fax: +44 (0) 1276 691227
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Mark Ross
Sent: 18 March 2002 16:16
To: [log in to unmask]
Subject: [TN] Books/articles on thermal profiling
Can anyone recommend a book or technical articles on thermal profiling
of
assemblies in reflow ovens? There seems to be a difference of opinion
on
the correct way to do it. I have heard:
"Use high temperature solder and solder the thermocouple to the part
(great
if it isn't a 0402 or worse an 0201!)"
"Don't use high temperature solder, it will alter the thermal mass of
the
device. Use a high temperature epoxy that is thermally conductive and
glue
the probe to the device".
"Don't use epoxy, it changes the thermal mass of the device, use a
temperature thin metal tape that has a strong high temperature
adhesive".
Also when it comes to keeping the parts on the board, I was all for a
board
being conformal coated to keep the parts from moving, scraping back of
the
coating where I needed to take my readings and then run the board
through.
I have been told that conformal alters the thermal mass of the product.
And on and on....
Last time I asked for suggestions on soldering books, I was pointed to
one
By Jennie Hwang and that worked out great so I am hoping there are some
books or articles and maybe even an IPC spec on how to do this so that I
can
ensure we are profiling the boards correctly. Thanks for all input.
_________________________________________________________________
MSN Photos is the easiest way to share and print your photos:
http://photos.msn.com/support/worldwide.aspx
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Date: Mon, 18 Mar 2002 11:44:49 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ted Tontis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ted Tontis <[log in to unmask]>
Subject: Re: Contamination
X-To: Kathy Kuhlow <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Kathy,
The contamination is coming from the solder process. Most feel that
it came from the HASL process and was left behind, following its way to the
assembly process. There are large amounts of chloride and bromide left on
the boards.
The kicker is what we are finding out is that it is just not one
product. It looks as though it's affected all the products that this co. has
manufactured for us. Some of the products are still on the shelf in a
warehouse, in there original packaging from the assembly house. I have been
able to look over a few of these assembly's and they look to have trace
amounts of contamination in different locations.
Regards,
Ted
<snip>
>Where is the contamination coming
>from? Is there a specific component
>that is the issue or a process? What
>type of contamination are you asking
>about?
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Date: Mon, 18 Mar 2002 12:00:30 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
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From: [log in to unmask]
Subject: Re: Books/articles on thermal profiling
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Mark,
I suggest you point your browser over to ECD's web site (www.ecd.com).
Since they sell instruments to do thermal profiling, they have lots of
information on thermocouple attachment.
Doug Pauls
Rockwell Collins
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Date: Mon, 18 Mar 2002 13:05:37 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Linda Langley <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Linda Langley <[log in to unmask]>
Subject: Re: Care of Metcal tips
X-To: Phil Nutting <[log in to unmask]>
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Phil,
We use RMA solder strictly for tinning Metcal Tips, it has worked well
prolonging tip life. A .125 dia. helps so our operators do not mistake it
for anything else.
Linda
-----Original Message-----
From: Phil Nutting [mailto:[log in to unmask]]
Sent: Friday, March 08, 2002 8:03 AM
To: [log in to unmask]
Subject: Re: [TN] Care of Metcal tips
Based upon hour comments Steve, it sounds like this would be true for most
soldering tips regardless of manufacturer. I'll have to pay closer
attention to tip life here.
Phil Nutting
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Thursday, March 07, 2002 6:06 PM
To: [log in to unmask]
Subject: Re: [TN] Care of Metcal tips
Hi Lou!
No Clean flux is actually the worse flux to use when you're talking tip
life. Go to:
http://www.metcal.com/tips/1.3.2.htm
There's so little solids (it's mostly alcohol) that it flashes off the tip
and doesn't protect the tip the same way a RMA does from oxidation. I think
you'll find that you will go through more tips soldering with no clean
fluxes than you do with any other flux type.
-Steve Gregory-
TechNetters, I've noted with interest the discussion of Metcal and other
soldering irons over the past few days. A question has come up here about
care of Metcal tips. We've gone to some lengths to eliminate RMA flux from
the plant. However, Metcal recommends tinning tips with RMA-flux wire
solder. We would like to use no-clean flux to tin tips. How risky would
such a practice be? Any comments would be greatly appreciated. I called
Metcal for advice and found the people I talked with to be very pleasant
and eager to help. But no data were available, and, frankly, the people
sounded very youthful. Lou Hart
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Date: Mon, 18 Mar 2002 13:10:26 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Contamination
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Typical questions/observations are
1) do you specify a cleanliness level on the boards prior to assembly
2) do you specify a cleanliness level after assembly
3) for "corrosion" to take place - moisture must be present - perfectly
clean boards will exhibit corrosion if they come in contact with water.
Would need to have all the above info prior to pointing fingers. Perhaps
some photos to Steve's website might also help.
Susan Mansilla
Technical Director
Robisan Lab
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Date: Mon, 18 Mar 2002 13:12:07 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: FW: Military standards
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Hello Linda,
I speak fluent MIL-Spec. Relative to PWB procurement 55110, 31032, and the
beloved IPC-6012/3. Assembly is the J/STD-001. The MIL/DOD-STD-100 is
obsolete as is almost everything else. 130 is marking, 454 workmanship, etc.
Fine tune or tweak your question because we can go on and on... or least I
can. And that can be pretty gosh darn boring to some, although not for me.
Boston Brad
781 858 0783
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Date: Mon, 18 Mar 2002 13:18:17 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Foil Lamination
MIME-Version: 1.0
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Howie,
Tell them the usual; cheaper, better, faster!!!!
Foil configuration is mainstream on the globe. I would sleep easy.
BB
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Date: Mon, 18 Mar 2002 12:14:59 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: 883 TEST METHODS FOR RGA
Folks,
Now that we're in a MIL mood, could someone quickly give me the MIL-STD-883E
test method for RGA or residual gas analysis. I couldn't load the book on my
very limited laptop. The method number will do fine.
MoonMan
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Date: Mon, 18 Mar 2002 12:29:57 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Franklin D Asbell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Franklin D Asbell <[log in to unmask]>
Subject: Re: FW: Military standards
X-To: [log in to unmask]
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(((laughing...))) Thats fuuuuuuuny... But I suppose we need to designate
some people in those 'positions'...Keep up the good work...
Franklin
----- Original Message -----
From: <[log in to unmask]>
To: <[log in to unmask]>
Sent: Monday, March 18, 2002 12:12 PM
Subject: Re: [TN] FW: Military standards
> Hello Linda,
>
> I speak fluent MIL-Spec. Relative to PWB procurement 55110, 31032, and
the
> beloved IPC-6012/3. Assembly is the J/STD-001. The MIL/DOD-STD-100 is
> obsolete as is almost everything else. 130 is marking, 454 workmanship,
etc.
>
> Fine tune or tweak your question because we can go on and on... or least I
> can. And that can be pretty gosh darn boring to some, although not for
me.
>
> Boston Brad
> 781 858 0783
>
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>
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Date: Mon, 18 Mar 2002 13:28:23 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
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Subject: Re: Surge voltages and conductor spacings
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Yup,
Any information arrived through obsolete specifications is for education of
self. I am not implying it is to be called out, it can't be. It doesn't
mean the information is not quality, relevant material. Such as the MIL-130
marking spec; excellent marking info as is the 100 spec (Rev C, D and E)
especially regarding reidentifying verses revision. Again excellent
material. Just because something is retired doesn't make it non useful.
Like the MIL-HDBK-454, well OK maybe not the 454.
Not to mention the entertainment value in reading the ole spec's... I
remember the first issue of 275D like it was yesterday....
BB
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Date: Mon, 18 Mar 2002 11:39:45 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Foil Lamination
X-To: [log in to unmask]
MIME-Version: 1.0
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Well B2, since I'm not getting it cheaper, nor faster how can I verify
better. Careful...only breathing is mainstream and that of course can be
questioned!
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Monday, March 18, 2002 11:18 AM
To: [log in to unmask]
Subject: Re: [TN] Foil Lamination
Howie,
Tell them the usual; cheaper, better, faster!!!!
Foil configuration is mainstream on the globe. I would sleep easy.
BB
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Date: Mon, 18 Mar 2002 18:51:18 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Subject: Re: Non-Standard material
MIME-Version: 1.0
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Hi Lou,
Times when we've talked about standard and non-standard laminates it had to
do with overall sheet size and tooling. My old shop was 1" oversized on
cores when the industry standard is 1/2" oversize. What's your panel/board
size?
Hans
AC-130 Gunship Motto: "You can run but you'll only die tired."
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: Takach, Lou J [mailto:[log in to unmask]]
Sent: Monday, March 18, 2002 7:11 AM
To: [log in to unmask]
Subject: [TN] Non-Standard material
Good Morning Technetters...
I need your input / advice. Our manufacturing facility has recently (within
a year or so...) switched to a new PCB fabricator. I'm now starting to get
complaints from manufacturing that our fabricator is having trouble
obtaining the 'non-standard' material that we are specifying. First of all,
I don't believe that I'm specifying non-standard material, this is where I
need your input. Most of our boards are multi-layer, usually 4 to 6 layers
and we use FR4. We typically specify 2-oz copper on the internal power and
ground layers and sometimes 1-oz copper for the outer signal layers. Is this
non-standard? The fabricator says that they typically don't stock 1 over 2
copper. Maybe I'm missing something but I thought that the stackup could be
made of individual copper sheets of various copper weights as long as the
layer sequence was balanced.
All comments welcome...
Lou
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Date: Mon, 18 Mar 2002 13:00:14 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mel Parrish <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mel Parrish <[log in to unmask]>
Subject: Re: FW: Military standards
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Linda,
The documents are available from ASSIST or I have a copy. Just let me know.
MIL-STD-100 is Standard Drawing Practices
MIL-STD-130 is Identification and Marking of Govt Property
Best regards,
Mel
Mel Parrish
Soldering Technology International
102 Tribble Drive
Madison, AL 35758
256 705 5530
256 705 5538 Fax
[log in to unmask]
www.solderingtech.com
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Linda Langley
Sent: Monday, March 18, 2002 7:40 AM
To: [log in to unmask]
Subject: [TN] FW: Military standards
Any information out there?
> -----Original Message-----
> From: Sherry Trudell
> Sent: Monday, March 18, 2002 10:15 AM
> To: AUH Jabil
> Subject: Military standards
>
> I was wondering if anyone has any military specifications? Specifically,
> I am looking for the MIL-STD-100, MIL0STD-130, and MIL-STD-454. Let me
> know if you can help.
>
> Thanks,
> Sherry Trudell
> Jabil Circuit
> Design Services
> 3800 Giddings Road
> Auburn Hills, MI 48326
> (248)292-6534
> 82 284 6534 (Jabil Voice Network)
> (248)292-6907 FAX
>
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Date: Mon, 18 Mar 2002 11:08:31 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Roger Stoops <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Roger Stoops <[log in to unmask]>
Subject: Re: Foil Lamination
X-To: "[log in to unmask]" <[log in to unmask]>
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In anticipation of this, our drawings call for laminate or prepreg to be
FR-4. Some boards we leave it to the discretion of the fabricator as far as
construction. You could add "per IPC-4101" and copper foil per the
appropriate IPC doc just to make sure.
Not surprising, since many multilayer boards are done w/foil lam to reduce
$$$. Just be sure to use a general specification to cover yourself and
communicate to your supplier what you want to end product to be made of or
spec'ed to.
Roger M. Stoops, CID [log in to unmask]
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Monday, March 18, 2002 11:05 AM
To: [log in to unmask]
Subject: [TN] Foil Lamination
The call-out on our fab drawings states to use copper clad epoxy laminate
FR4 base material. Our supplier in the past has purchased and certified
material to IPC-4101. We have now found out they have incorporated foil
lamination into their process. What type of requirements should we impose or
verify?
Thanks for your help!
Rick Howieson
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Date: Mon, 18 Mar 2002 13:13:17 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Richard Carruth <[log in to unmask]>
Subject: Re: FW: Military standards
X-To: Linda Langley <[log in to unmask]>
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Here is what I found. Mil-Std-100G has been cancelled (see attachment for
replacement specs) but Mil-Std-130K is still active. A good site to get
membership is www.ihserc.com their you can find many specifications for
Industry, DOD, Military, and Commercial. See attached for the ones you were
looking for.
(See attached file: mil-std-100G.pdf)(See attached file: mil-std-130K.pdf)
Regards,
Richard Carruth
Quality Engineer
LaBarge Inc.
Ph# 918-459-2346
Linda Langley <[log in to unmask]> on 03/18/2002 09:39:31 AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond to
Linda Langley <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: Richard Carruth/LABARGE)
Subject: [TN] FW: Military standards
Any information out there?
> -----Original Message-----
> From: Sherry Trudell
> Sent: Monday, March 18, 2002 10:15 AM
> To: AUH Jabil
> Subject: Military standards
>
> I was wondering if anyone has any military specifications? Specifically,
> I am looking for the MIL-STD-100, MIL0STD-130, and MIL-STD-454. Let me
> know if you can help.
>
> Thanks,
> Sherry Trudell
> Jabil Circuit
> Design Services
> 3800 Giddings Road
> Auburn Hills, MI 48326
> (248)292-6534
> 82 284 6534 (Jabil Voice Network)
> (248)292-6907 FAX
>
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Date: Mon, 18 Mar 2002 11:27:39 -0800
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Hans Shin <[log in to unmask]>
Subject: Re: 883 TEST METHODS FOR RGA
X-To: Earl Moon <[log in to unmask]>
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Earl,
I believe it's Method 1018.3.
Hans Shin
Pacific Testing Laboratories, Inc.
www.pacifictesting.com
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Earl Moon
Sent: Monday, March 18, 2002 10:15 AM
To: [log in to unmask]
Subject: [TN] 883 TEST METHODS FOR RGA
Folks,
Now that we're in a MIL mood, could someone quickly give me the MIL-STD-883E
test method for RGA or residual gas analysis. I couldn't load the book on my
very limited laptop. The method number will do fine.
MoonMan
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Date: Mon, 18 Mar 2002 13:40:00 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ted Tontis <[log in to unmask]>
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From: Ted Tontis <[log in to unmask]>
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Brad,
Forgot to mention the green growth all over the fine pitch parts.
One of the products was tested by our customer, and we know what is on them.
The other products are questionable until I can have them professional
tested.
Ted
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Date: Mon, 18 Mar 2002 11:58:03 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: Re: 883 TEST METHODS FOR RGA
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Earl
1018.2 is internal water/vapor content. I don't recall a specific test for
RGA.
Dan
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Date: Mon, 18 Mar 2002 19:57:27 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Subject: Re: Foil Lamination
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Hi Rick,
When they transition your board from cap lam. to foil lam. the shop should
do a First Article Inspection (FAI) to validate the process. The FAI should
include cross sections to confirm that the dielectric spacing is hitting
spec between layers and overall. More generally, I'd want to make sure they
have an established process to deal with wrinkles and when that defect
scraps a board. Foil wrinkles show up in low pressure areas such as the
route lines on multi-board panel. If the resin spots start killing them let
me know - I know how to fix that. Boston Brad's got it right sleep soundly
cuz foil lam. is A-okay. Besides late nights are the pride & joy of every
Lamination Engineer (LOL/JK).
Hans
AC-130 Gunship Motto: "You can run, but you'll only die tired."
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Monday, March 18, 2002 11:05 AM
To: [log in to unmask]
Subject: [TN] Foil Lamination
The call-out on our fab drawings states to use copper clad epoxy laminate
FR4 base material. Our supplier in the past has purchased and certified
material to IPC-4101. We have now found out they have incorporated foil
lamination into their process. What type of requirements should we impose or
verify?
Thanks for your help!
Rick Howieson
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Date: Mon, 18 Mar 2002 11:57:37 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Mcmaster, Michael" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Mcmaster, Michael" <[log in to unmask]>
Subject: Re: Non-Standard material
X-To: "Takach, Lou J" <[log in to unmask]>
MIME-Version: 1.0
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One thing you should definitely verify is that the "non-standard" issue is
related solely to inventory issues. There are some shops that don't run
unbalanced copper weights. It's not that it's rocket science but they just
haven't invested the effort to doing so. If this is the case and they don't
really have process for doing this, you're looking at a completely different
issue. If you've got a shop that is doing this for the first time, I'd ask
for some data verifying that they are doing it correctly.
From an inventory perspective, this combination of copper clad should be
readily available. It's not used as commonly as some of the other clad
combinations which can complicate availability. Let's face it, there are so
many different materials available in so many thicknesses, that no shop can
afford to keep inventory of every possible combination of clad materials.
But if you use only a few different cores with this combination of clad
weights, you should be able to work with the fabricator to stock adequate
levels for your needs. It sounds there's a disconnect between what you and
your fabricator consider "standard". Perhaps your Purchasing department can
help you get calibrated.
> ----------
> From: Takach, Lou J[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;Takach, Lou J
> Sent: Monday, March 18, 2002 4:11 AM
> To: [log in to unmask]
> Subject: [TN] Non-Standard material
>
> Good Morning Technetters...
>
> I need your input / advice. Our manufacturing facility has recently
> (within
> a year or so...) switched to a new PCB fabricator. I'm now starting to get
> complaints from manufacturing that our fabricator is having trouble
> obtaining the 'non-standard' material that we are specifying. First of
> all,
> I don't believe that I'm specifying non-standard material, this is where I
> need your input. Most of our boards are multi-layer, usually 4 to 6 layers
> and we use FR4. We typically specify 2-oz copper on the internal power and
> ground layers and sometimes 1-oz copper for the outer signal layers. Is
> this
> non-standard? The fabricator says that they typically don't stock 1 over 2
> copper. Maybe I'm missing something but I thought that the stackup could
> be
> made of individual copper sheets of various copper weights as long as the
> layer sequence was balanced.
>
> All comments welcome...
>
> Lou
>
> --------------------------------------------------------------------------
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>
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Date: Mon, 18 Mar 2002 15:03:37 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
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Subject: Re: 883 TEST METHODS FOR RGA
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The method is 1018 - Internal Water Vapor Content. They don't use the RGA
term. Silly, huh? I recommend looking at these guys for RGA .
http://www.pernicka.com/ <http://www.pernicka.com/>
from my pal Bruce in component land....
BB
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Date: Mon, 18 Mar 2002 13:59:43 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: 883 TEST METHODS FOR RGA
X-To: [log in to unmask]
Thanks Dan,
Out of 700 plus pages, that's the only test method I couldn't remember or am
I lying?
Enjoy,
Earl
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Date: Mon, 18 Mar 2002 13:16:49 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: Contamination
X-To: Ted Tontis <[log in to unmask]>
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Ted,
You have several process problems. The biggest is exposure to moisture.
At Relative Humidities > 50% you are going to see negative effects to your products over time.
You are correct in assuming that once "corrosion" has occurred the product reliability has been
compromised.
You must gain control of your processes. In order to do this you need testing methods as part of the
manufacturing process. If management does hot want to spend the money UPDATE YOUR RESUME!!
David A. Douthit
Manager
LoCan LLC
Ted Tontis wrote:
> Brad,
>
> Forgot to mention the green growth all over the fine pitch parts.
> One of the products was tested by our customer, and we know what is on them.
> The other products are questionable until I can have them professional
> tested.
>
> Ted
>
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<html>
Ted,
<p>You have several process problems. The biggest is exposure to moisture.
<br>At Relative Humidities <u>></u> 50% you are going to see negative effects
to your products over time.
<p>You are correct in assuming that once "corrosion" has occurred the product
reliability has been compromised.
<br>You must gain control of your processes. In order to do this you need
testing methods as part of the
<br>manufacturing process. If management does hot want to spend the money
UPDATE YOUR RESUME!!
<p>David A. Douthit
<br>Manager
<br>LoCan LLC
<p>Ted Tontis wrote:
<blockquote TYPE=CITE>Brad,
<p> Forgot to mention the green
growth all over the fine pitch parts.
<br>One of the products was tested by our customer, and we know what is
on them.
<br>The other products are questionable until I can have them professional
<br>tested.
<p>Ted
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Date: Mon, 18 Mar 2002 13:42:38 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Non-Standard material
X-To: "Takach, Lou J" <[log in to unmask]>
MIME-Version: 1.0
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It depends on what stack up is used. 1 over 2 probably is not stocked. A 4
layer made with a center core of 2 ounce both sides and foil or cap layers
is not a nonstandard layup. Many computer cards used to be made that way
and spot faced off to see alignment targets inside for drill registration.
Something in a six layer where you do not put the heavier foil on either
side of a layer makes it get interesting and might cause heart burn.
----- Original Message -----
Wrom: OYIYZUNNYCGPKYLEJGDGVCJVTLBXFGGMEPYOQ
To: <[log in to unmask]>
Sent: Monday, March 18, 2002 5:11 AM
Subject: [TN] Non-Standard material
> Good Morning Technetters...
>
> I need your input / advice. Our manufacturing facility has recently
(within
> a year or so...) switched to a new PCB fabricator. I'm now starting to get
> complaints from manufacturing that our fabricator is having trouble
> obtaining the 'non-standard' material that we are specifying. First of
all,
> I don't believe that I'm specifying non-standard material, this is where I
> need your input. Most of our boards are multi-layer, usually 4 to 6 layers
> and we use FR4. We typically specify 2-oz copper on the internal power and
> ground layers and sometimes 1-oz copper for the outer signal layers. Is
this
> non-standard? The fabricator says that they typically don't stock 1 over 2
> copper. Maybe I'm missing something but I thought that the stackup could
be
> made of individual copper sheets of various copper weights as long as the
> layer sequence was balanced.
>
> All comments welcome...
>
> Lou
>
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Date: Mon, 18 Mar 2002 14:42:34 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: 883 TEST METHODS FOR RGA
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Wellllllllllll, not knowing exactly what you are looking for, here would be
my guess. There is no method specifically called residual gas analysis.
Method 1018.2 Internal water vapor content
Doug Pauls
Rockwell Collins
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Date: Mon, 18 Mar 2002 16:00:35 -0800
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: 883 TEST METHODS FOR RGA
X-To: [log in to unmask]
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BB,
Thanks for the method and the site.
MM
----- Original Message -----
From: <[log in to unmask]>
To: <[log in to unmask]>
Sent: Monday, March 18, 2002 12:03 PM
Subject: Re: [TN] 883 TEST METHODS FOR RGA
> The method is 1018 - Internal Water Vapor Content. They don't use the RGA
> term. Silly, huh? I recommend looking at these guys for RGA .
>
> http://www.pernicka.com/ <http://www.pernicka.com/>
>
>
> from my pal Bruce in component land....
>
> BB
>
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Date: Mon, 18 Mar 2002 12:58:39 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian McCrory <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian McCrory <[log in to unmask]>
Organization: Delsen Testing Laboratories, Inc.
Subject: Re: Books/articles on thermal profiling
X-To: Mark Ross <[log in to unmask]>
MIME-Version: 1.0
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Mark Ross wrote:
> Can anyone recommend a book or technical articles on thermal profiling of
> assemblies in reflow ovens? There seems to be a difference of opinion on
> the correct way to do it.
> Mark,
You might also take a look at IPC-7530, "Guidelines for Temperature Profiling for Mass Soldering
Processes (Reflow and Wave)". I'm sure you can get it through the IPC bookstore.
--
Brian McCrory
Delsen Testing Laboratories, Inc.
1024 Grand Central Ave.
Glendale, CA 91201
Phone: (818) 247-4106
FAX: (818) 247-4537
email: [log in to unmask]
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Date: Mon, 18 Mar 2002 15:04:08 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Non-Standard material
X-To: [log in to unmask]
Just have to say as much as SMT is great, this MLB and material stuff is the
greatest as no SMT would be possible without its understanding at the design
through manufacturing levels. This little session has brought forth some of
the best answers ever concerning PCB material and MLB technology.
Damn fine stuff and keep it up. The forum has missed PCB/MLB stuff for too long,
MoonMan
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Date: Mon, 18 Mar 2002 16:13:00 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Non-Standard material
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_18e.5060b4f.29c7b25c_boundary"
--part1_18e.5060b4f.29c7b25c_boundary
Content-Type: text/plain; charset="US-ASCII"
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To my heavy friends...
One person's "odd" build is another's "POC" (Piece Of Cake). It is not "non
standard" build, it is a segment of the industry. We (Coretec) service the
"Industrial Controls" market quite often with Thermal Management and Current
Carrying Capacity substrates. I do seminars on it all day long and have a
team of "Heavy Copper Guys". On a daily basis we do from 1/4 ounce
(MicroVia) to 6 ounce (Wicked Heavy) and all UL approved. Now, shame on you
if your ordering 1 over 2 without any need.
I'm not on a selling jag here, you need to align with suppliers that do what
you want in a standard business setting. Don't complain about the pizza at
the steak house.
Believe me I LOVE half ounce. I wish the whole world bought half over half;
its easy to make. That doesn't make the other weights "non standard" it is
much more challenging to make. Someone help down from this soap box.
Thank you, (your humble service guy)
Boston Brad
781 858 0783
--part1_18e.5060b4f.29c7b25c_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>To my heavy friends...<BR>
<BR>
One person's "odd" build is another's "POC" (Piece Of Cake). It is not "non standard" build, it is a segment of the industry. We (</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=1 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><I>Coretec</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></I>) service the "Industrial Controls" market quite often with Thermal Management and Current Carrying Capacity substrates. I do seminars on it all day long and have a team of "Heavy Copper Guys". On a daily basis we do from 1/4 ounce (MicroVia) to 6 ounce (Wicked Heavy) and all UL approved. Now, shame on you if your ordering 1 over 2 without any need.<BR>
I'm not on a selling jag here, you need to align with suppliers that do what you want in a standard business setting. Don't complain about the pizza at the steak house.<BR>
<BR>
Believe me I LOVE half ounce. I wish the whole world bought half over half; its easy to make. That doesn't make the other weights "non standard" it is much more challenging to make. Someone help down from this soap box.<BR>
<BR>
Thank you, (your humble service guy)<BR>
<BR>
Boston Brad<BR>
781 858 0783</FONT></HTML>
--part1_18e.5060b4f.29c7b25c_boundary--
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Date: Mon, 18 Mar 2002 16:05:02 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Non-Standard material
X-To: [log in to unmask]
BB
Humble my moonyou butt good stuff. Damn good sales pitches as well. Does
that bring you down?
MM
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Date: Mon, 18 Mar 2002 16:08:22 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Contamination
MIME-Version: 1.0
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The question has been asked of whether you can remove corrosion and still
have a reliable assembly. The answer is, yes you can, provided you put
enough effort into it. We make stuff that has to last 20-30 years in the
field, and we are not that much different from many military depots in that
respect. We also service our own equipment, and warrantee it after
repairs. I know the Naval depots have done it for years.
You must do the following:
1. Satisfy yourself first that the visual effect is indeed corrosion.
2. Remove the contaminant that caused the corrosion in the first place.
3. Remove the corrosion itself by some oblation or abrasive method, down
to the base metal.
4. Verify that the previous step did not reduce the circuit trace/path
below minimums.
5. Repassivate the surfaces involved.
6. Clean the area and verify cleanliness.
7. Seal the area (e.g. new conformal coat).
8. Until such a process is well understood, put the unit through extended
burn in testing to verify proper function.
For throw away electronics, this may be much more hassle than it is worth.
But, for legacy systems that are not manufactured anymore, it is a viable
path.
As with most manufacturing, you can do it, provided you know what you are
doing and have the data to back you up.
Doug Pauls
Rockwell Collins
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Date: Mon, 18 Mar 2002 16:36:10 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Particulate Matter - No Clean
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hello Technetters,
Need everyone's input on this issue.
Have a customer who is unhappy with "Brush" (Bristle or similar) fibers on
board. They are specifically mentioning section 7.2 and figure 7-4. Picture
shows many instances of particulate matter. We are seeing 1 or 2 brush
fibers (non-conductive). What is the issue or feelings of the experts out
there on this being a defect? The board is OK except for the brush fibers.
The customer does not have a standard saying fibers are not allowed, just
citing the above mentioned paragraph and verse.
Thanks in advance for your input,
Carl Barnes
Production Process Analyst
480-968-6790
extension: 4236
Page At: 602-201-1435
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Date: Tue, 19 Mar 2002 08:08:24 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Board Bow and Twist
X-To: "Marsico, James" <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Late input here. Look at your boards as being incremental elements of the
entire panel. The bow and twist on one board is proably very small, which,
if you were processing individual boards, would not matter. The actual
positional displacement of component locations would be tiny. However, on a
large panel where the displacement has been compounded many times, the
displacement (b/t) becomes significant. Hence the reason why panelled
boards shall be considered as panels and not as individual boards.
Peter
"Marsico, James"
<James.Marsico@D To: [log in to unmask]
P.AIL.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
Sent by: TechNet Aero/ST Group)
<[log in to unmask] Subject: Re: [TN] Board Bow and Twist
>
03/14/02 09:29
PM
Please respond
to "TechNet
E-Mail Forum.";
Please respond
to "Marsico,
James"
I look at it from a different perspective, reliability. If you populate
(and reflow) warped boards, what happens to the solder joints when the
boards are flattened when installed in the next higher assembly? Now that
I
think about it, probably nothing, since the solder will eventually relax.
Right? But why else would there be a more stringent flatness requirement
for SMT boards than TH since most P&P systems hold SMT boards down by the
edges?
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Franklin D Asbell [SMTP:[log in to unmask]]
Sent: Thursday, March 14, 2002 8:25 AM
To: TechNet E-Mail Forum.; Marsico, James
Subject: Re: [TN] Board Bow and Twist
James,
An afterthought, the bow and twist requirement is there to provide
ease of
board population as well as end use fit. If the board is warped
prior to
assembly, this indeed would affect population thus potentially
making the
boards unsuitable for end use...just something to think about, or
pass along
to your supplier.
Franklin
----- Original Message -----
From: "Marsico, James" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 14, 2002 6:48 AM
Subject: [TN] Board Bow and Twist
> I think this is a no-brainer, but here goes... We were delivered
boards
in
> panel form from one of our suppliers. At Incoming Inspection,
the
panel
was
> rejected for excessive bow (>75% for SMT) and returned the
supplier. The
> supplier called me and said that even though the panel exceeded
the bow
> requirement, the individual boards were acceptable. When I
quoted
the bow
> and twist requirement from IPC-6012, "Panels which contain
multiple
printed
> boards which are assembled on the panel and later separated shall
be
> assessed in panel form." , he said yes, you measure the
individual
boards
in
> the panel. I need clarification.
> Thanks,
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
>
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Date: Tue, 19 Mar 2002 09:55:01 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Non-Standard material
X-To: "Takach, Lou J" <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hi, Lou,
The 10 & 12 layer boards I currently work with are FR4/26 Tg 170 stuff and
we specify 2 oz copper plane layers and 1 oz signal layers. Although we
also illustrate the stack-up as copper-core-copper prepreg
copper-core-copper, I believe our fab shop laminates copper foil to achieve
the end result.
Having said that, just because your fab shop doesn't stock it doesn't
necessarily make it non-standard material. Did your previous fab shop
comment on having the same problem, or did they have stock, or did they do
foil lamination?
Peter
"Takach, Lou
J" To: [log in to unmask]
<ljtakach@SWI cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
TCH.COM> Aero/ST Group)
Sent by: Subject: [TN] Non-Standard material
TechNet
<[log in to unmask]
ORG>
03/18/02
08:11 PM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
"Takach, Lou
J"
Good Morning Technetters...
I need your input / advice. Our manufacturing facility has recently (within
a year or so...) switched to a new PCB fabricator. I'm now starting to get
complaints from manufacturing that our fabricator is having trouble
obtaining the 'non-standard' material that we are specifying. First of
all,
I don't believe that I'm specifying non-standard material, this is where I
need your input. Most of our boards are multi-layer, usually 4 to 6 layers
and we use FR4. We typically specify 2-oz copper on the internal power and
ground layers and sometimes 1-oz copper for the outer signal layers. Is
this
non-standard? The fabricator says that they typically don't stock 1 over 2
copper. Maybe I'm missing something but I thought that the stackup could be
made of individual copper sheets of various copper weights as long as the
layer sequence was balanced.
All comments welcome...
Lou
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Date: Tue, 19 Mar 2002 10:25:53 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Contamination
X-To: Ted Tontis <[log in to unmask]>
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Ted
I agree with St. Doug but ther may be some other steps you will find
useful. Corrosion products are usually a mixture of soluble salts, like
copper chloride, and insoluble ones, like carbonates, oxides and
hydroxides, as well as a gunge of the original contamination. The first
thing I would do is to immerse the products in a 2 - 3% solution of
hydrochloric acid at, say, 40deg C. This will dissolve away the soluble
and much of the insoluble corrosion products (a little brushing with a
nylon-bristles brush will aid the process). I would then suggest a
proprietary neutraliser (of the type used as a rinse-aid after soldering
with water-soluble fluxes) containing the disodium salt of EDTA. This
will help to chelate any remaining metal salts, especially the
relatively insoluble lead ones. Finally, I would give them a saponifier
wash, to make sure that all of the original flux residues are removed,
followed by a damned good rinse cycle, ending with DI water.
At this stage, you can be reasonably sure no corrosion-causing chemistry
remains on the assembly and it will be possible to evaluate the damage
and whether the assembly is usable/repairable/throw-awayable. Be
particularly cautious where there are noble metals: gold-plated kovar
leads, for example, are notorious for promoting stress corrosion on
bends and I've seen cases where the kovar has been completely eaten away
and the component is held on by the gold plating!
Oh, BTW, your solder joints will appear matt after this treatment, but
this does not matter: they will be perfectly OK from the chemical,
metallurgical and mechanical points of view. It is purely a cosmetic
dulling.
Just as an additional precaution, in view of their history, I think I'd
be inclined to give these assemblies a spray of an acrylic conformal
coating, but this won't be strictly necessary if they meet the testing
that Doug advocates.
Brian
Ted Tontis wrote:
>
> We have a number of PWB's that show signs of contamination,
> management wants to find out if there is a way to clean the boards. I have
> told them once the corrosion starts there is no way to clean the assemblies
> and make them dependable enough to cover our warranty. Some of the boards
> show slight contamination and some more aggressive, but these have been in a
> controlled environment for some time. I feel If we where to send them out in
> a industrial environment the corrosion would rapidly increases. These boards
> are FR-4 and not conformal coated. Am I correct on this?
>
> Thank you,
>
> Ted Tontis C.I.D.
> Engage Networks, Inc.
> 1320 N. Dr. Martin Luther King Jr. Drive
> River Level
> Milwaukee, WI 53212
> PH 414-918-4267
> FX 414-273-7601
>
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Date: Tue, 19 Mar 2002 10:55:25 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Particulate Matter - No Clean
X-To: [log in to unmask]
MIME-Version: 1.0
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Carl,
For me, these fibres are strictly verboten! If they are a natural fibre,
they are almost certainly hygroscopic. If they are synthetic, they may
be, as well, but they may also harbour electrostatic charges. Either
way, you don't have a clue what is on them, in the way of contamination.
Brian
[log in to unmask] wrote:
>
> Hello Technetters,
>
> Need everyone's input on this issue.
>
> Have a customer who is unhappy with "Brush" (Bristle or similar) fibers on
> board. They are specifically mentioning section 7.2 and figure 7-4. Picture
> shows many instances of particulate matter. We are seeing 1 or 2 brush
> fibers (non-conductive). What is the issue or feelings of the experts out
> there on this being a defect? The board is OK except for the brush fibers.
> The customer does not have a standard saying fibers are not allowed, just
> citing the above mentioned paragraph and verse.
>
> Thanks in advance for your input,
>
> Carl Barnes
> Production Process Analyst
> 480-968-6790
> extension: 4236
> Page At: 602-201-1435
>
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Date: Tue, 19 Mar 2002 11:35:34 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Grant Emandien <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Grant Emandien <[log in to unmask]>
Subject: Soldermask color
MIME-Version: 1.0
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Hi,
We have received PCBs with solder mask exhibiting color variarion i.e. light
and darker hues on the same PCB. The color differences are more prevalent
around vias but also evident on other areas. The light hue has a more matt
finish while the darker hue exhibits a sheen, almost an oily appearance but
is not easily removed.
Any comments on what it may be and possible effects (for conformal coating)?
TIA
Grant
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Date: Tue, 19 Mar 2002 11:27:21 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Albin, David" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Albin, David" <[log in to unmask]>
Subject: Re: Soldermask color
X-To: Grant Emandien <[log in to unmask]>
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Grant,
Unfortunately, without seeing the board or pictures of the problem I
can only give some general comments:
a) Differences in colour may be down to thickness variations in
the soldermask coating. Areas around vias or edges of high plated =
tracks may
appear lighter than the bulk.
b) Lightening of soldermask may also be due to moisture
absorption, sometimes seen after HASL or any other hot, wet =
post-processing
(ENIG for example). You may find that baking the board at 140=B0C - =
150=B0C
(284=B0F - 302=B0F) for ~20 min will remove this effect.
As you also comment on a different finish (matte for light areas, =
glossy for
dark) I suspect your problem might be more related to (a) above, =
because you
are also seeing 'artwork marking' from the UV exposure process. You =
might
see this if you have a thicker ink deposit that has not been fully =
dried
prior to exposure.
I can't comment on possible effects on conformal coat, although I would
suspect that if the colour differences are due to moisture absorption =
you'll
want to get that out before considering overcoating.
Cheers,
David Albin
Coates Circuit Products
-----Original Message-----
From: Grant Emandien [mailto:[log in to unmask]]
Sent: 19 March 2002 09:36
To: [log in to unmask]
Subject: [TN] Soldermask color
Hi,
We have received PCBs with solder mask exhibiting color variarion i.e. =
light
and darker hues on the same PCB. The color differences are more =
prevalent
around vias but also evident on other areas. The light hue has a more =
matt
finish while the darker hue exhibits a sheen, almost an oily appearance =
but
is not easily removed.
Any comments on what it may be and possible effects (for conformal =
coating)?
TIA
Grant
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property of the sender. The information is intended only for the use of =
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notified
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thereto, is strictly prohibited. Should you have received this email in
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(Pty) Ltd or the sender of this email be liable to any party for any =
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indirect, special or other consequential damages for any use of this =
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or on any other hyper linked website, including, without limitation, =
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your
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Date: Tue, 19 Mar 2002 06:25:09 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dieselberg, Ron" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dieselberg, Ron" <[log in to unmask]>
Subject: Re: 883 TEST METHODS FOR RGA
X-To: Earl Moon <[log in to unmask]>
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Mostly Methane. Look under pork and beans!
Ron Dieselberg
Trainer/Auditor
CMC ELECTRONICS
CINCINNATI
[log in to unmask]
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Monday, March 18, 2002 13:15 PM
To: [log in to unmask]
Subject: [TN] 883 TEST METHODS FOR RGA
Folks,
Now that we're in a MIL mood, could someone quickly give me
the MIL-STD-883E
test method for RGA or residual gas analysis. I couldn't
load the book on my
very limited laptop. The method number will do fine.
MoonMan
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<BODY>
<P><FONT SIZE=3D2 FACE=3D"Arial">Mostly Methane. Look under pork and =
beans!</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Courier New">Ron Dieselberg</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">Trainer/Auditor</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">CMC ELECTRONICS</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">CINCINNATI</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">[log in to unmask]</FONT>
</P>
<UL><UL>
<P><A NAME=3D"_MailData"><FONT SIZE=3D2 FACE=3D"Arial">-----Original =
Message-----</FONT></A>
<BR><B><FONT SIZE=3D2 FACE=3D"Arial">From: Earl Moon [<A =
HREF=3D"mailto:[log in to unmask]">mailto:[log in to unmask]</A>]</FONT></=
B>
<BR><B><FONT SIZE=3D2 FACE=3D"Arial">Sent: </FONT></B> <FONT =
SIZE=3D2 FACE=3D"Arial">Monday, March 18, 2002 13:15 PM</FONT>
<BR><B><FONT SIZE=3D2 =
FACE=3D"Arial">To: </FONT></B> <FONT SIZE=3D2 =
FACE=3D"Arial">[log in to unmask]</FONT>
<BR><B><FONT SIZE=3D2 =
FACE=3D"Arial">Subject: </FONT>=
</B> <FONT SIZE=3D2 FACE=3D"Arial">[TN] 883 TEST METHODS FOR RGA</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">Folks,</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">Now that we're in a MIL mood, could =
someone quickly give me the MIL-STD-883E</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">test method for RGA or residual gas =
analysis. I couldn't load the book on my</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">very limited laptop. The method =
number will do fine.</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">MoonMan</FONT>
</P>
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FACE=3D"Arial">---------------------------------------------------------=
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Date: Tue, 19 Mar 2002 06:28:31 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dieselberg, Ron" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dieselberg, Ron" <[log in to unmask]>
Subject: Re: Surge voltages and conductor spacings
X-To: "[log in to unmask]" <[log in to unmask]>
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BB, it was yesterday!
Ron Dieselberg
Trainer/Auditor
CMC ELECTRONICS
CINCINNATI
[log in to unmask]
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Monday, March 18, 2002 13:28 PM
To: [log in to unmask]
Subject: Re: [TN] Surge voltages and conductor
spacings
Yup,
Any information arrived through obsolete specifications is
for education of
self. I am not implying it is to be called out, it can't
be. It doesn't
mean the information is not quality, relevant material.
Such as the MIL-130
marking spec; excellent marking info as is the 100 spec (Rev
C, D and E)
especially regarding reidentifying verses revision. Again
excellent
material. Just because something is retired doesn't make it
non useful.
Like the MIL-HDBK-454, well OK maybe not the 454.
Not to mention the entertainment value in reading the ole
spec's... I
remember the first issue of 275D like it was yesterday....
BB
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<BODY>
<P><FONT SIZE=3D2 FACE=3D"Arial">BB, it</FONT><U> <FONT SIZE=3D2 =
FACE=3D"Arial">was</FONT></U><FONT SIZE=3D2 FACE=3D"Arial"> =
yesterday!</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Courier New">Ron Dieselberg</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">Trainer/Auditor</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">CMC ELECTRONICS</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">CINCINNATI</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">[log in to unmask]</FONT>
</P>
<UL><UL>
<P><A NAME=3D"_MailData"><FONT SIZE=3D2 FACE=3D"Arial">-----Original =
Message-----</FONT></A>
<BR><B><FONT SIZE=3D2 FACE=3D"Arial">From: =
[log in to unmask] [<A =
HREF=3D"mailto:[log in to unmask]">mailto:[log in to unmask]</A>]</FONT>=
</B>
<BR><B><FONT SIZE=3D2 FACE=3D"Arial">Sent: </FONT></B> <FONT =
SIZE=3D2 FACE=3D"Arial">Monday, March 18, 2002 13:28 PM</FONT>
<BR><B><FONT SIZE=3D2 =
FACE=3D"Arial">To: </FONT></B> <FONT SIZE=3D2 =
FACE=3D"Arial">[log in to unmask]</FONT>
<BR><B><FONT SIZE=3D2 =
FACE=3D"Arial">Subject: </FONT>=
</B> <FONT SIZE=3D2 FACE=3D"Arial">Re: [TN] Surge voltages and =
conductor spacings</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">Yup,</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">Any information arrived through =
obsolete specifications is for education of</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">self. I am not implying it is =
to be called out, it can't be. It doesn't</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">mean the information is not quality, =
relevant material. Such as the MIL-130</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">marking spec; excellent marking info =
as is the 100 spec (Rev C, D and E)</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">especially regarding reidentifying =
verses revision. Again excellent</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">material. Just because =
something is retired doesn't make it non useful.</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">Like the MIL-HDBK-454, well OK maybe =
not the 454.</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">Not to mention the entertainment =
value in reading the ole spec's... I</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">remember the first issue of 275D like =
it was yesterday....</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">BB</FONT>
</P>
<P><FONT SIZE=3D2 =
FACE=3D"Arial">---------------------------------------------------------=
------------------------</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">Technet Mail List provided as a free =
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Date: Tue, 19 Mar 2002 07:56:03 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Heat Dissapation through Vias
MIME-Version: 1.0
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Mike,
Assuming .062 thick, the spreadsheet calculations on thermal vias .012
[0.3mm] to farside plane using 1 ounce clad plated .002 with .001 holes; with
and without solder don't show much difference. Same configuration using
conductive hole fill CB100 render same result. Unless your taking the heat
somewhere (aluminum plate, copper plate, planes) you have nowhere to conduct
it to.
There are several PWB substrate solutions. Barrel plate vias with standard
plate gives a max thick wall without copper plugging, conductive fill and
plate the surface flat, Dielectric solutions such as Thermagon (10X thermal
improvement over FR4 and the like). But, you still need to conduct the heat
to chassis.
As to the suggested assembly procedure, it may work but not on all cases. In
the RF configurations I am familiar with there is a plane farside that
interfaces with hardware and that flatness is important. The reflow
procedure will render uneven surfaces built up with solder.
An added temp excursion always makes me wince.
Added assembly time, adding an entire reflow operation, seems to the straw
that breaks the camels back (more of a 2 x 4 sized straw).
I suggest you have a sit down with your thermal guy, buy him a coffee... but
make sure it's hot. Feel free to contact me, we have a full time Thermal
Engineer on board that just loves this stuff. Hope this rambling gives you
some insight.
Boston Brad
781 8585 0783
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Date: Tue, 19 Mar 2002 07:15:04 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Contamination
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Brian Ellis, obviously delirious, states:
I agree with St. Doug but .......
**Saint Doug?! Methinks Brian is downwind of the Cyprus hemp
incinerator.............. Otherwise a good reply.
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Date: Tue, 19 Mar 2002 07:18:09 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Soldermask color
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Grant,
I agree with David Albin's post. I have also seen color variations on a
board when I have done ion chromatography testing on bare boards. If only
part of the board is immersed in the extract solution (isopropanol/water,
80C, 60 minutes) that part gets lighter in color and more of a matte
appearance than the part not immersed. It only happens on some kinds of
mask, and then often intermittantly. You may consider it a fabricator
process indicator. I can't answer the conformal coat adhesion question.
Doug Pauls
Rockwell Collins
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Date: Tue, 19 Mar 2002 06:39:52 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Dewey Whittaker <[log in to unmask]>
Subject: Re: Contamination
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain
You went from an Icon to a Saint in less than a year.There must be something
to this Mountain Dew after all.Other than that,well put both of you.We have
the same market as you and must be very aware of the ramifications of any
rework performed.
Dewey
> -----Original Message-----
> From: [log in to unmask] [SMTP:[log in to unmask]]
> Sent: Tuesday, March 19, 2002 6:15 AM
> To: [log in to unmask]
> Subject: Re: [TN] Contamination
>
> Brian Ellis, obviously delirious, states:
>
> I agree with St. Doug but .......
>
> **Saint Doug?! Methinks Brian is downwind of the Cyprus hemp
> incinerator.............. Otherwise a good reply.
>
> --------------------------------------------------------------------------
> -------
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> --------------------------------------------------------------------------
> -------
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Date: Tue, 19 Mar 2002 15:06:00 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: W/S temporary mask!
MIME-version: 1.0
Content-Type: text/plain; charset=ISO-8859-1; name="BDY.RTF"
Content-Transfer-Encoding: quoted-printable
Could with a quick spot of help hear chaps!
Having never used water soluble temporary mask I need some input.
I have a problem with some LCC's that have been converted to 'J' leaded
and require tinning.. Unfortunately with them being 'J' leaded the
sides are castellated/plated and the solder wicks up the body of the
component negating the benefits of 'J' leaded compliance.
I have tried several methods of pre-tinning having the luxury of a GPD
robotic tinning m/c with the benefits of nitrogen but no matter how I
try, flux, no flux, N2 the result is the same these suckers wick up
like=3D
there's no tomorrow!
What I have in mind is turning the rascals upside down and dipping them
into a w/s temporary mask that will just cover the minimum required
then=3D
I can tin them & wash them off (they are hermetically sealed). What I
don't is the viscosity of the stuff and whether if too thick with it
being water soluble it could be diluted to a consistency that would
allow coverage between the leads.
Any info would be just great.
CIA,
Iain.
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Date: Tue, 19 Mar 2002 10:08:20 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Collins <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Collins <[log in to unmask]>
Subject: Re: Contamination (no tech content)
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
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Doug Pauls as an icon? Click on the mountain dew image to get help with =
contamination problems? Now that's the kind of desktop help I need... not =
that stupid paper clip!
(OK, before I get 20 emails advising me of the pre-xerox / Apple / Windoze =
definition of icon, I will agree with Doug as an icon as defined in =
pre-computer times)
regards
Graham Collins
Process Engineer,=20
Northrop Grumman
Atlantic Facility of Litton Systems Canada
(902) 873-2000 ext 6215
>>> [log in to unmask] 03/19/02 09:39AM >>>
You went from an Icon to a Saint in less than a year.There must be =
something
to this Mountain Dew after all.Other than that,well put both of you.We =
have
the same market as you and must be very aware of the ramifications of any
rework performed.
Dewey
> -----Original Message-----
> From: [log in to unmask] [SMTP:[log in to unmask]]=20
> Sent: Tuesday, March 19, 2002 6:15 AM
> To: [log in to unmask]
> Subject: Re: [TN] Contamination
>
> Brian Ellis, obviously delirious, states:
>
> I agree with St. Doug but .......
>
> **Saint Doug?! Methinks Brian is downwind of the Cyprus hemp
> incinerator.............. Otherwise a good reply.
>
> -------------------------------------------------------------------------=
-
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Date: Tue, 19 Mar 2002 15:07:36 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Cleaning hiccup!
MIME-version: 1.0
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Teckies, need a little help hear!
I have recently experienced a problem whilst cleaning double sided FR4
dual technology multi-layer boards that had been wave soldered.
The boards (4 off) were put into a fully automatic batch cleaner end of
day shift which uses a Brominated solvent 'ENSOLV ionic' .and removed
the following morning first thing.
The cleaning m/c is a vapour degrease system which has a refrigerated
coil at the top of the bath, this provides a free board zone above the
vapour which forms part of the cycle (draining). =3D20
The cycle time is usually 30 minutes.
The problem is that the boards appear to show weave / pre-preg
separation across all of the boards leaving the weave visible but not
through to the top layer. Around thru' hole terminations the board has
clearly delaminated.
I performed 100% inspection on another one of the wave soldered batch
which appeared fine. I repeated the cleaning exercise and the post
cleaning result was the same. =3D20
Two things to note, firstly, when the board was removed after the
second=3D
cleaning operation the m/c had malfunctioned as the cooling coil had
not=3D
worked so the free board zone was hot with vapour. What I cannot
guarantee is that this did not happen during the first cleaning
operation (4 off), I can't say I noticed the boards being hot but I
suppose the m/c could possibly have malfunctioned part of the time.
Secondly, these boards have been cleaned previously in the m/c but
during a shift and removed after the cycle.
Has anyone experienced this type of occurrence?
CIA,
Iain.
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Date: Tue, 19 Mar 2002 12:07:30 -0000
Reply-To: Dougal Stewart <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dougal Stewart <[log in to unmask]>
Subject: Re: Soldermask color
X-To: Grant Emandien <[log in to unmask]>
MIME-Version: 1.0
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This may be as simple an explanation as the area of sheen being created by
the polyester silver halide or diazo film surface during the vacuum pull at
exposure, during the bare board fab process. Where there are high spots
caused by pads and tracks, the polyester is held off contact adjacent to the
feature, and the gloss will be apparent where the film comes back into
intimate contact. Normally, you would see this exaggerated more on one side
than the other as the normal exposure process uses glass on one side of the
frame and mylar for the other.
Different hues may be an optical effect caused by the above, or by different
thicknesses of the ink, again being thicker off the tracks and pads due to
slump.
How will it affect conformal coat ? - until you have an understanding of
what you have got, you will not be able to understand what effect you will
have.....
Dougal Stewart
email: [log in to unmask]
phone: +44 1896 822204
mob: +44 7984 629667
----- Original Message -----
From: "Grant Emandien" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Tuesday, March 19, 2002 9:35 AM
Subject: [TN] Soldermask color
> Hi,
>
> We have received PCBs with solder mask exhibiting color variarion i.e.
light
> and darker hues on the same PCB. The color differences are more prevalent
> around vias but also evident on other areas. The light hue has a more matt
> finish while the darker hue exhibits a sheen, almost an oily appearance
but
> is not easily removed.
>
> Any comments on what it may be and possible effects (for conformal
coating)?
>
> TIA
> Grant
>
>
>
>
> **********************************************************************
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Date: Tue, 19 Mar 2002 07:48:33 -0800
Reply-To: Greg Jones <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Greg Jones <[log in to unmask]>
Subject: Re: Books/articles on thermal profiling
X-To: Mark Ross <[log in to unmask]>
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Mark:
You can find several articles and conference papers on thermal profiling at
KIC's site:
www.kicthermal.com
The bottom line on thermocouple attachment is what ever works. AL tape is
the simplest method, and is reliable and repeatable, but does not provide a
good method of attachment in some applications, for ex: BGAs, which require
drilling a hole through the bottom of a sacrificial board and using epoxy to
attach the TC. High temperature solder is the standard method, but must be
done cleanly so as not to alter the thermal mass of the component the TC is
being soldered to. There is a paper on our site that goes in depth on this
issue and provides a complete DOE comparing methods of TC attachment.
The IPC guide is also a valuable reference source that contains information
contributed by a cross section of soldering experts, equipment
manufacturers, and materials suppliers.
Greg Jones
KIC
----- Original Message -----
From: "Mark Ross" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Monday, March 18, 2002 8:15 AM
Subject: [TN] Books/articles on thermal profiling
> Can anyone recommend a book or technical articles on thermal profiling of
> assemblies in reflow ovens? There seems to be a difference of opinion on
> the correct way to do it. I have heard:
>
> "Use high temperature solder and solder the thermocouple to the part
(great
> if it isn't a 0402 or worse an 0201!)"
>
> "Don't use high temperature solder, it will alter the thermal mass of the
> device. Use a high temperature epoxy that is thermally conductive and
glue
> the probe to the device".
>
> "Don't use epoxy, it changes the thermal mass of the device, use a
> temperature thin metal tape that has a strong high temperature adhesive".
>
>
> Also when it comes to keeping the parts on the board, I was all for a
board
> being conformal coated to keep the parts from moving, scraping back of the
> coating where I needed to take my readings and then run the board through.
> I have been told that conformal alters the thermal mass of the product.
>
> And on and on....
>
> Last time I asked for suggestions on soldering books, I was pointed to one
> By Jennie Hwang and that worked out great so I am hoping there are some
> books or articles and maybe even an IPC spec on how to do this so that I
can
> ensure we are profiling the boards correctly. Thanks for all input.
>
>
>
> _________________________________________________________________
> MSN Photos is the easiest way to share and print your photos:
> http://photos.msn.com/support/worldwide.aspx
>
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Date: Tue, 19 Mar 2002 10:47:36 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Soldermask color
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Grant,
Without actually seeing the boards I cannot be 100 percent.... but
Passing this around the table it is thought it could be incomplete mask cure
from incomplete volatile excursion or incomplete cross polymerization. These
can be cleared up with a double pass through a UV tunnel at correct intensity
and belt speed. Relative to conformal coating, I have assembled and coated
parts of this description without any problems; adhesion, outgas, or
otherwise. This would be the nice scenario.
A worse case condition is the boards were not completely dried after cleaning
prior to soldermask. The result being entrapments being forced out the vias.
The final bake (or boiling in this case) is especially hard on tented,
plugged or flooded vias will exhibit the "hues" or halo's, worsening to
actual blistering. In this condition it is the call of the board shop QA
prior to shipping.
One "cure" test is cotton swab with iso-al; green denotes cure issue.
The adhesion test: 3/4" wide tape pull at 90 deg with force.
One last thing, with the decreasing thickness of solder mask there can be an
absence or decrease of actual pigment on top of lands (traces, vias, etc).
If your discoloration includes flat areas this is probably not the case.
Boston Brad
781 858 0783
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Date: Tue, 19 Mar 2002 16:17:48 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Cathy Killen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Cathy Killen <[log in to unmask]>
Subject: Finishes on Metal Chassis
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Does anyone know where I could get a standard/specification on the finishes
of metal chassis?
Cathy Killen
Training Instructor
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Date: Tue, 19 Mar 2002 11:09:15 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Contamination (no tech content)
X-To: [log in to unmask]
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Doug Pauls as an icon? Click on the mountain dew image to get help with
contamination problems? Now that's the kind of desktop help I need... not
that stupid paper clip!
**Stop, stop. There are enough people here at Rockwell who "click" on
Hillman and I as it is. No need to install us on the desktops (what a
nightmare!)
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Date: Tue, 19 Mar 2002 11:29:09 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: BGA Solder Ball Shear
MIME-Version: 1.0
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Are there any standards or rules to apply to shear strength of BGA
solderballs. What is considered good or bad, etc.?
Thank You,
Dennis Fall
Process Engineering Supervisor
Thin Film Technology Corporation
North Mankato, MN 56003-1702
Email: [log in to unmask]
Phone: 507-625-8445
Fax: 507-386-9269
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Date: Tue, 19 Mar 2002 12:41:41 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Bar-code / printing
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Hi all, got a manufacturing question...
I am looking for soft-ware that can handle the following situation:
Operator scans product and places into box. - Label automatically / manually
prints with product bar-code and product description. Operator places label
on small box.
Operator places box and other boxes of different contents into larger box. -
A final label automatically / manually prints with bar-codes and / or list
of contents of all boxes inside.
The customer & product information would be sourced from a Dbase like
Oracle.
Anyone have close to this type of system at their facility?
Peter Crain
Manufacturing Engineering Technologist
Substation Automation Solutions
General Electric Canada Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7 CANADA
Tel: 403.214.4560 Dialcomm: 8.498.4560, Fax: 403.214.4776
Website: www.gepower.com/geharrisenergy/
NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.
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Date: Tue, 19 Mar 2002 10:59:51 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Paul Hanson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Paul Hanson <[log in to unmask]>
Organization: Surface Mount Technology
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SIGNOFF TECHNET
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Date: Tue, 19 Mar 2002 10:06:17 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Vanderhoof, Brad" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Vanderhoof, Brad" <[log in to unmask]>
Subject: Re: Bar-code / printing
X-To: "[log in to unmask]" <[log in to unmask]>
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Yes,
My facility has designed a system to perform similar tasks.
This is not an unreasonable project for an in-house IT group or a software
integration vendor.
Specify your requirements VERY carefully and test everyone's understanding
up front or you may end up with an amazing system that does fantastic
things; just never quite exactly what you want the way you want it.
Good luck,
Brad Vanderhoof
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Tuesday, March 19, 2002 9:42 AM
To: [log in to unmask]
Subject: [TN] Bar-code / printing
Hi all, got a manufacturing question...
I am looking for soft-ware that can handle the following situation:
Operator scans product and places into box. - Label automatically / manually
prints with product bar-code and product description. Operator places label
on small box.
Operator places box and other boxes of different contents into larger box. -
A final label automatically / manually prints with bar-codes and / or list
of contents of all boxes inside.
The customer & product information would be sourced from a Dbase like
Oracle.
Anyone have close to this type of system at their facility?
Peter Crain
Manufacturing Engineering Technologist
Substation Automation Solutions
General Electric Canada Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7 CANADA
Tel: 403.214.4560 Dialcomm: 8.498.4560, Fax: 403.214.4776
Website: www.gepower.com/geharrisenergy/
NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.
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Date: Tue, 19 Mar 2002 10:32:46 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: YASQ (yet another standards question)
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Good morning TechNet,
Could anybody explain the Bellcore/Telecordia standards in relation to hardware? I have searched the web several times and never found much info on this topic.
Dan
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<DIV><FONT face=Arial size=2>Good morning TechNet,</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>Could anybody explain the Bellcore/Telecordia
standards in relation to hardware? I have searched the web several times
and never found much info on this topic.</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>Dan</FONT></DIV></BODY></HTML>
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Date: Tue, 19 Mar 2002 13:45:10 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: BGA Solder Ball Shear
MIME-Version: 1.0
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My rule of thumb is ... shear a ball off (using tweezers and a rocking
motion), if solder remains on the component, it's good, if some solder
remains and some base metal is present, it's marginal, if no solder remains,
it's NG. Not very scientific, but it's a start.
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: [log in to unmask] [SMTP:[log in to unmask]]
Sent: Tuesday, March 19, 2002 12:29 PM
To: [log in to unmask]
Subject: [TN] BGA Solder Ball Shear
Are there any standards or rules to apply to shear strength of BGA
solderballs. What is considered good or bad, etc.?
Thank You,
Dennis Fall
Process Engineering Supervisor
Thin Film Technology Corporation
North Mankato, MN 56003-1702
Email: [log in to unmask]
Phone: 507-625-8445
Fax: 507-386-9269
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Date: Tue, 19 Mar 2002 14:07:14 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Lee Whiteman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Lee Whiteman <[log in to unmask]>
Subject: Re: Solderability of BGA
X-To: "Zweigart, Siegmund" <[log in to unmask]>
In-Reply-To: <795D6BC907F3D511B450000629554AE60CA5E9@RFC1918-Host>
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Siggi,
I know that TI generated a BGA Solderability Test method, based on the
technique described in EIA/JESD22-B102C, Solderability Test Method. They
used a reflow soldering oven to perform the test and a blank ceramic card.
You can get a description of the test method from TI's website.
I tried it with a SMT rework station, using a glass slide. I found that you
could achieve the same type of results with the rework station as with the
reflow oven and ceramic card.
Give me a call off line some time. Hope this helps.
Good Luck.
Lee Whiteman
Senior Manufacturing Engineer
E-Mail: [log in to unmask] <mailto:[log in to unmask]>
Ph: (610) 362-1200 x208
Fax: (610) 362-1290
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Zweigart, Siegmund
> Sent: Thursday, March 14, 2002 4:03 AM
> To: [log in to unmask]
> Subject: [TN] Solderability of BGA
>
>
> Hello
>
> I am looking for some documents about solderability tests for BGA s with
> eutectik balls. Can anybody help me in this subject?
> We think that the BGA- Balls were touched by fingers and the
> solderiability
> is significant reduced.
> How can we analyse the component for fingerprints? We are thinking of
> looking for NaCl.
> Has anybody another idea?
>
> Siggi
>
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Date: Tue, 19 Mar 2002 14:23:56 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Liviu Jurjica <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Liviu Jurjica <[log in to unmask]>
Subject: Re: Bar-code / printing
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
Peter, hi
I used to work (some 2 years back), with Loftware's LLMWin. Go to:
http://www.loftware.com/product.htm
Printers: Intermec and Zebra.
Can give you more detailes if needed.
Kind Regards
==============================
Liviu Jurjica
(416) 604-2894
[log in to unmask]
http://www.topengineering.com
==============================
-----Original Message-----
From: [log in to unmask]
To: [log in to unmask]
Date: Tue, 19 Mar 2002 12:41:41 -0500
Subject: [TN] Bar-code / printing
> Hi all, got a manufacturing question...
>
> I am looking for soft-ware that can handle the following situation:
>
> Operator scans product and places into box. - Label automatically /
> manually
> prints with product bar-code and product description. Operator places
> label
> on small box.
>
> Operator places box and other boxes of different contents into larger
> box. -
> A final label automatically / manually prints with bar-codes and / or
> list
> of contents of all boxes inside.
>
> The customer & product information would be sourced from a Dbase like
> Oracle.
>
> Anyone have close to this type of system at their facility?
>
>
> Peter Crain
> Manufacturing Engineering Technologist
>
> Substation Automation Solutions
> General Electric Canada Inc.
> 2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7 CANADA
> Tel: 403.214.4560 Dialcomm: 8.498.4560, Fax: 403.214.4776
> Website: www.gepower.com/geharrisenergy/
>
> NOTICE: The information contained in this e-mail is privileged,
> confidential
> and intended solely for the use of the addressee named above. If the
> reader
> of this e-mail is not the intended recipient, you are hereby notified
> that
> any dissemination, distribution or copying of this e-mail is strictly
> prohibited. If you have received this e-mail in error, please notify me
> immediately by telephone (collect) at (1) 403.214.4400 and destroy this
> e-mail as well as any copy. Thank you.
>
> -----------------------------------------------------------------------
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Date: Tue, 19 Mar 2002 13:48:01 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Franklin D Asbell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Franklin D Asbell <[log in to unmask]>
Subject: Re: YASQ (yet another standards question)
X-To: "Dan R. Johnson" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_0026_01C1CF4C.AFFC82B0"
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charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Dan,
I realize this does not answer your question; however, some would say =
Bellcore/Telcordia standards do not relate to anything ((( chuckling as =
it has been a very long day )))
Franklin
----- Original Message -----=20
From: Dan R. Johnson=20
To: [log in to unmask]
Sent: Tuesday, March 19, 2002 12:32 PM
Subject: [TN] YASQ (yet another standards question)
Good morning TechNet,
=20
Could anybody explain the Bellcore/Telecordia standards in relation to =
hardware? I have searched the web several times and never found much =
info on this topic.
=20
Dan
------=_NextPart_000_0026_01C1CF4C.AFFC82B0
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META content=3D"text/html; charset=3Diso-8859-1" =
http-equiv=3DContent-Type>
<META content=3D"MSHTML 5.00.3315.2870" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Dan,</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>I realize this does not answer your =
question;=20
however, some would say Bellcore/Telcordia standards do not relate to =
anything=20
((( chuckling as it has been a very long day )))</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Franklin</FONT></DIV>
<DIV> </DIV>
<BLOCKQUOTE=20
style=3D"BORDER-LEFT: #000000 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: =
0px; PADDING-LEFT: 5px; PADDING-RIGHT: 0px">
<DIV style=3D"FONT: 10pt arial">----- Original Message ----- </DIV>
<DIV=20
style=3D"BACKGROUND: #e4e4e4; FONT: 10pt arial; font-color: =
black"><B>From:</B>=20
<A href=3D"mailto:[log in to unmask]" [log in to unmask]>Dan R. =
Johnson</A>=20
</DIV>
<DIV style=3D"FONT: 10pt arial"><B>To:</B> <A =
href=3D"mailto:[log in to unmask]"=20
[log in to unmask]>[log in to unmask]</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>Sent:</B> Tuesday, March 19, 2002 =
12:32=20
PM</DIV>
<DIV style=3D"FONT: 10pt arial"><B>Subject:</B> [TN] YASQ (yet another =
standards=20
question)</DIV>
<DIV><BR></DIV>
<DIV><FONT face=3DArial size=3D2>Good morning TechNet,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Could anybody explain the =
Bellcore/Telecordia=20
standards in relation to hardware? I have searched the web =
several times=20
and never found much info on this topic.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial =
size=3D2>Dan</FONT></DIV></BLOCKQUOTE></BODY></HTML>
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Date: Tue, 19 Mar 2002 12:48:38 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Misner, Bruce" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Misner, Bruce" <[log in to unmask]>
Subject: Conformal Coating BGA's
My question of the day: Is anyone conformal coating (not parylene) plastic
BGA's on FR-4 in Hi-Rel applications (aircraft; -20 to +71C ambient
operating temperature requirement) without benefit of an underfil? If yes,
has entrapped air been a major issue? Anyone care to comment on this
approach?
Regards,
Bruce Misner
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Date: Tue, 19 Mar 2002 13:50:23 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: ESD Smocks
Mime-Version: 1.0
Content-Type: multipart/mixed; boundary="=_DC817A89.65046990"
This is a MIME message. If you are reading this text, you may want to
consider changing to a mail reader or gateway that understands how to
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My company has considered changing to an ESD smock that the operator can =
take home. Supposedly the smock can be washed regularly w/o bleach and =
also dried with fabric softeners. The smock is good for 50-100 washes. =
Something sounds wrong here. Is anyone else out there using smocks like =
this, likes/dislikes, etc.?
TIA
Kathy =20
--=_DC817A89.65046990
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Content-Disposition: attachment; filename="TEXT.htm"
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<META content="MSHTML 6.00.2713.1100" name=GENERATOR></HEAD>
<BODY style="MARGIN-TOP: 2px; FONT: 10pt MS Sans Serif; MARGIN-LEFT: 2px">
<DIV>My company has considered changing to an ESD smock that the operator
can take home. Supposedly the smock can be washed regularly w/o bleach and
also dried with fabric softeners. The smock is good for 50-100
washes. Something sounds wrong here. Is anyone else out there using
smocks like this, likes/dislikes, etc.?</DIV>
<DIV> </DIV>
<DIV>TIA</DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
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Date: Tue, 19 Mar 2002 15:04:41 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bev Christian <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bev Christian <[log in to unmask]>
Subject: Cross-sectioning question
MIME-Version: 1.0
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TechNetters,
I have a two fine fellows who work for me who come from different
backgrounds. With regards to cross-sectioning solder joints, one is used to
providing his customers with a metallurgical description of the metal in the
joint. He says it is important to describe the number and size of tin and
lead dendrites, grain size, lamellar or otherwise general structure, etc.
The other says this is not necessary. Both of course agree on fillet size,
shape, cracks, voids, presence/absence/thickness of intermetallic.
Now I agree that grain size is not going to give you much, since solid room
temperature solder is close enough to its melting point that the grain size
will change within a few months anyways. But what about the rest?
regards,
Bev Christian
Research in Motion
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Date: Tue, 19 Mar 2002 14:40:44 -0500
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Leo Lambert <[log in to unmask]>
Subject: Looking for Comments and Thoughts
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Hello techneters:
An interesting question came up this week in one of our training classes and
I thought that perhaps we could get some input from you folks relative to
the statement in Section 8.1 of IPC-7711, paragraph 5, which states
"Caution: Do not use mechanical strippers on wire smaller than AWG-20, as
the strippers may stretch the wire." Being on the committee, I did not catch
this earlier but after reviewing some tensile strengths of various wire
sizes I doubt this is a valid statement to be used in this document. The
tensile strength of 20AWG wire is 34.24 lbf or 15.53 kbf, as determined from
the information derived from www.mogami.com/e/cad/wire-gauge.html
I doubt that we could exert enough force during the insulation stripping
operation to stretch the wire to the point where it would impact its
electrical carrying capabilities.
If you have the time, also check out paragraph (a) and (b) where the
implication or statement reads with the intent that all wires be stripped
with thermal strippers, unless they... "cannot be thermally stripped", then
mechanical strippers be used. Your inputs on the use of thermal strippers
would be appreciated, indicating whether or not they are used extensively or
rarely within your facility or industry based upon your background. We don't
see many uses of thermal strippers except for stripping Teflon insulation,
all others use some form of mechanical strippers.
Any thoughts on any of this would be welcome.
Thanks for your time and anxiously awaiting your input and comments.
Regards,
Leo Lambert
EPTAC Corp.
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Date: Tue, 19 Mar 2002 15:31:55 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Finishes on Metal Chassis
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Hello Cathy,
Pretty open question....
Chemfilm ASTM B 449 Class 1 (least conductive), 2 and 3 (most conductive)
Personally if you want to be conductive I like class 2 (for ESD, grounding,
etc) the class 3 offers no environmental protection at all. (I learned that
the hard way.)
Anodize ASTM B 580 Very nice finish, looks wicked high tech. State color,
not requested very often but you can design a cheap cover, deburr and anodize
red with a black front bezel. Nothing looks better.
Passivate ASTM A 380 Can used on sheet metal but I always use or order
washers and that type of hardware with it.
Then there's painting... I find a nice pin stripe works wonders...
For more info search local phone listings under finish and sheet metal and or
sheet steel or enclosures.
Good luck,
Boston Brad
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Date: Wed, 20 Mar 2002 06:53:46 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Cleaning hiccup!
X-To: [log in to unmask]
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Iain
Ensolv is based on n-propyl bromide which is a very strong solvent (much
stronger than CFC-113). Some laminates, depending on their state of
cure, could well be attacked. I'm not quite clear about your cycle: were
the boards in the freeboard zone overnight? If so, anything could
happen, especially if the refrigeration is up the pole. My guess is that
even a 30 min cycle is risky.
BTW, if your freeboard isn't working, you are risking undue workplace
emissions. This solvent is quite toxic (most manufacturers recommend
operator exposure levels in the 5 to 25 ppm range. As a ref, the OELs
for carbon tet are from 3 - 10 ppm, depending on the country.). It is
also ozone-depleting.
Brian
[log in to unmask] wrote:
>
> Teckies, need a little help hear!
>
> I have recently experienced a problem whilst cleaning double sided FR4
> dual technology multi-layer boards that had been wave soldered.
> The boards (4 off) were put into a fully automatic batch cleaner end of
> day shift which uses a Brominated solvent 'ENSOLV ionic' .and removed
> the following morning first thing.
> The cleaning m/c is a vapour degrease system which has a refrigerated
> coil at the top of the bath, this provides a free board zone above the
> vapour which forms part of the cycle (draining). =20
> The cycle time is usually 30 minutes.
>
> The problem is that the boards appear to show weave / pre-preg
> separation across all of the boards leaving the weave visible but not
> through to the top layer. Around thru' hole terminations the board has
> clearly delaminated.
>
> I performed 100% inspection on another one of the wave soldered batch
> which appeared fine. I repeated the cleaning exercise and the post
> cleaning result was the same. =20
>
> Two things to note, firstly, when the board was removed after the
> second=
>
> cleaning operation the m/c had malfunctioned as the cooling coil had
> not=
>
> worked so the free board zone was hot with vapour. What I cannot
> guarantee is that this did not happen during the first cleaning
> operation (4 off), I can't say I noticed the boards being hot but I
> suppose the m/c could possibly have malfunctioned part of the time.
> Secondly, these boards have been cleaned previously in the m/c but
> during a shift and removed after the cycle.
>
> Has anyone experienced this type of occurrence?
>
> CIA,
> Iain.
>
> ********************************************************************
> This email and any attachments are confidential to the intended
> recipient and may also be privileged. If you are not the intended
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> You should not copy it or use it for any purpose nor disclose or
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Date: Wed, 20 Mar 2002 08:58:54 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guenter Grossmann <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guenter Grossmann <[log in to unmask]>
Subject: Antw: [TN] Cross-sectioning question
Mime-Version: 1.0
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Bev
- Grain size is a bit difficult to characterize since we don't all agree =
what the grain size is anyway (or at least I don't agree with many =
others). As much as I saw so far grain size depends on the production =
parameters and on the temperature, strain, time history a solder joint has =
seen after soldering.
- Tin and lead dendrites. Quite the same as above. The presence of =
dendrites tells part of the story of the production process but who cares?
- Structure. Same again.
- Regarding the voids I have always problems. They can be an indicator =
that something in the soldering process ( parameters , materials) changes =
if their size and amount change over time. But it is quite difficult for =
me to look at a solder joint and say this is too much voids. Especially if =
the customer asks me why.
Since the structure ( grain size, dendrites secondary segregation etc.) =
are determined by the solidification process you will find various =
structures in solder joints on the same PCB because of the different =
thermal mass of the components. But, as you said, the structure will =
become similar in the joints after a few thermal cycles or due to =
diffusion.=20
So I believe that it is most important to show that a metallurgical bond =
took place ( intermetallics), that the requirements of the amount of =
solder have been met, that the connector caps of some critical components =
( AgPd ) haven't dissolved completely and that no cracks are in the joint =
(after soldering).
Best regards
Guenter
.
EMPA
Swiss Federal Institute for Materials Testing and Research
Centre for Reliability
Dipl. Eng. Guenter Grossmann
8600 Duebendorf
Switzerland
Phone: xx41 1 823 4279
Fax : xx41 1823 4054
mail: [log in to unmask]
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Date: Wed, 20 Mar 2002 10:44:41 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"d. terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: Component taping specifications
MIME-Version: 1.0 (Generated by NET-TEL Mailguard SMTP version 4.0.0.22)
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Hi Technet,
We've had some problems here with badly taped components, i.e. pockets too =
deep or too large, but when dealing with these complaints from the factory =
floor I found out that we didn't have any specification.=20
Now I've finally got my copy of ANSI/EIA-481-A but it dates from 1986 !=20
I know there are also EIA-481-1 and a -2 and a -3 version. Can somebody =
explain which of these specs I should have (and in what revisions) so that =
all standard pick&placeable parts are covered ?=20
Thanks in advance.
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
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Date: Wed, 20 Mar 2002 07:17:59 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dieselberg, Ron" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dieselberg, Ron" <[log in to unmask]>
Subject: Re: ESD Smocks
X-To: Kathy Kuhlow <[log in to unmask]>
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Kathy, we send ours out to professional cleaning companies. They also
perform testing on the smocks to assure that they still meet the resistivity
requirement before they are returned. (MIL-HDBK-263 Para. 3.17) greater than
10 to 5th but less than 10 to 12th ohms per square.
Ron Dieselberg
Trainer/Auditor
CMC ELECTRONICS
CINCINNATI
[log in to unmask]
-----Original Message-----
From: Kathy Kuhlow [mailto:[log in to unmask]]
Sent: Tuesday, March 19, 2002 14:50 PM
To: [log in to unmask]
Subject: [TN] ESD Smocks
<< File: TEXT.htm >> My company has considered changing to
an ESD smock that the operator can take home. Supposedly the smock can be
washed regularly w/o bleach and also dried with fabric softeners. The smock
is good for 50-100 washes. Something sounds wrong here. Is anyone else out
there using smocks like this, likes/dislikes, etc.?
TIA
Kathy
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<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META NAME=3D"Generator" CONTENT=3D"MS Exchange Server version =
5.5.2652.35">
<TITLE>RE: [TN] ESD Smocks</TITLE>
</HEAD>
<BODY>
<P><FONT SIZE=3D2 FACE=3D"Arial">Kathy, we send ours out to =
professional cleaning companies. They also perform testing on the =
smocks to assure that they still meet the resistivity requirement =
before they are returned. (MIL-HDBK-263 Para. 3.17) greater than 10 to =
5</FONT><SUP><FONT SIZE=3D2 FACE=3D"Arial">th</FONT></SUP><FONT =
SIZE=3D2 FACE=3D"Arial"> but less than 10 to 12</FONT><SUP><FONT =
SIZE=3D2 FACE=3D"Arial">th</FONT></SUP><FONT SIZE=3D2 FACE=3D"Arial"> =
ohms per square.</FONT></P>
<P><FONT SIZE=3D2 FACE=3D"Courier New">Ron Dieselberg</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">Trainer/Auditor</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">CMC ELECTRONICS</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">CINCINNATI</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">[log in to unmask]</FONT>
</P>
<UL><UL>
<P><A NAME=3D"_MailData"><FONT SIZE=3D2 FACE=3D"Arial">-----Original =
Message-----</FONT></A>
<BR><B><FONT SIZE=3D2 FACE=3D"Arial">From: Kathy Kuhlow [<A =
HREF=3D"mailto:[log in to unmask]">mailto:[log in to unmask]</A>]</FONT></=
B>
<BR><B><FONT SIZE=3D2 FACE=3D"Arial">Sent: </FONT></B> <FONT =
SIZE=3D2 FACE=3D"Arial">Tuesday, March 19, 2002 14:50 PM</FONT>
<BR><B><FONT SIZE=3D2 =
FACE=3D"Arial">To: </FONT></B> <FONT SIZE=3D2 =
FACE=3D"Arial">[log in to unmask]</FONT>
<BR><B><FONT SIZE=3D2 =
FACE=3D"Arial">Subject: </FONT>=
</B> <FONT SIZE=3D2 FACE=3D"Arial">[TN] ESD Smocks</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial"> << File: TEXT.htm =
>></FONT> <FONT SIZE=3D2 FACE=3D"Arial">My company has considered =
changing to an ESD smock that the operator can take home. =
Supposedly the smock can be washed regularly w/o bleach and also dried =
with fabric softeners. The smock is good for 50-100 washes. =
Something sounds wrong here. Is anyone else out there using =
smocks like this, likes/dislikes, etc.?</FONT></P>
<P><FONT SIZE=3D2 FACE=3D"Arial">TIA</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">Kathy </FONT>=20
</P>
</UL></UL>
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Date: Wed, 20 Mar 2002 07:53:01 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
tony steinke <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: tony steinke <[log in to unmask]>
Subject: laminate tolerance
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Good morning techies,
Have a problem with laminate supplier(won't mention name at this point)
who claims they can only hold +\-.0015 tolerance on .005 1\1 core.
I feel this is absolutely absurd but was wondering if someone could=20
save me some valuable time researching the IPC specifications
for overall laminate tolerance. (we build to class 3)
Thanks for any info.
Tony Steinke
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<BODY bgColor=3D#fff8e0>
<DIV><FONT face=3DArial size=3D2>Good morning techies,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Have a problem with laminate =
supplier(won't mention=20
name at this point)</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>who claims they can only hold +\-.0015 =
tolerance on=20
.005 1\1 core.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>I feel this is absolutely absurd but =
was wondering=20
if someone could </FONT></DIV>
<DIV><FONT face=3DArial size=3D2>save me some valuable time researching =
the IPC=20
specifications</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>for overall laminate tolerance. (we =
build to class=20
3)</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Thanks for any info.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Tony Steinke</FONT></DIV></BODY></HTML>
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Date: Wed, 20 Mar 2002 07:23:02 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: laminate tolerance
X-To: [log in to unmask]
You know the basic rule as + or - 10% of overall MLB or individual
dielectric thickness, but it must be understood, with thin core materials,
it gets a little more difficult for some. The resin content is very high as
two plies of 1080, equaling .005" thick, and it does squeeze out. However,
the tolerance should't be higher than the rather generous 10%.
MoonMan
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Date: Wed, 20 Mar 2002 09:03:46 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Lee Whiteman <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Lee Whiteman <[log in to unmask]>
Subject: Re: ESD Smocks
X-To: Kathy Kuhlow <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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Kathy,
I would be very skeptical about using these types of ESD smocks. The ones
that I'm familiar with would never survive washing at home.
I've seen companies have their employees wear ESD smocks and shoes outside
of their facility, wash their ESD apparel at home, and wonder why they have
an ESD problem. I'm with Ron Dieselberg. Keep your ESD material controlled
within your facility. That's really the only way you can control the quality
of the ESD smocks.
Hope this helps. Good Luck.
Lee Whiteman
Senior Manufacturing Engineer
E-Mail: [log in to unmask] <mailto:[log in to unmask]>
Ph: (610) 362-1200 x208
Fax: (610) 362-1290
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Kathy Kuhlow
> Sent: Tuesday, March 19, 2002 2:50 PM
> To: [log in to unmask]
> Subject: [TN] ESD Smocks
>
>
> My company has considered changing to an ESD smock that the
> operator can take home. Supposedly the smock can be washed
> regularly w/o bleach and also dried with fabric softeners. The
> smock is good for 50-100 washes. Something sounds wrong here.
> Is anyone else out there using smocks like this, likes/dislikes, etc.?
>
> TIA
>
> Kathy
>
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Date: Wed, 20 Mar 2002 07:54:47 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Simms, Michael" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Simms, Michael" <[log in to unmask]>
Subject: Re: Contamination
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Hi T'netters,
I'm curious regarding the documentation which
accompanies re-worked assemblies. Naturally,
after all the effort involved in recovering
corroded assemblies, the client (or end user)
is informed of the special processing which
was provided on those assemblies.
Can someone direct me to the appropriate
IPC guidelines for the documentation and
disclosure that accompanies this type of re-work?
Regards,
Mike Simms
Trace Laboratories - Central
(ph.) 847-934-5300
(fax) 847-934-4600
1150 West Euclid Avenue
Palatine, IL 60067
www.tracelabs.com
Notice: This message is confidential and intended for the private use
of the addressee only.
-----Original Message-----
From: Brian Ellis [mailto:[log in to unmask]]
Sent: Tuesday, March 19, 2002 2:26 AM
Subject: Re: Contamination
Ted
I agree with St. Doug but ther may be some other steps you will find
useful. Corrosion products are usually a mixture of soluble salts, like
copper chloride, and insoluble ones, like carbonates, oxides and
hydroxides, as well as a gunge of the original contamination. The first
thing I would do is to immerse the products in a 2 - 3% solution of
hydrochloric acid at, say, 40deg C. This will dissolve away the soluble
and much of the insoluble corrosion products (a little brushing with a
nylon-bristles brush will aid the process). I would then suggest a
proprietary neutraliser (of the type used as a rinse-aid after soldering
with water-soluble fluxes) containing the disodium salt of EDTA. This
will help to chelate any remaining metal salts, especially the
relatively insoluble lead ones. Finally, I would give them a saponifier
wash, to make sure that all of the original flux residues are removed,
followed by a damned good rinse cycle, ending with DI water.
At this stage, you can be reasonably sure no corrosion-causing chemistry
remains on the assembly and it will be possible to evaluate the damage
and whether the assembly is usable/repairable/throw-awayable. Be
particularly cautious where there are noble metals: gold-plated kovar
leads, for example, are notorious for promoting stress corrosion on
bends and I've seen cases where the kovar has been completely eaten away
and the component is held on by the gold plating!
Oh, BTW, your solder joints will appear matt after this treatment, but
this does not matter: they will be perfectly OK from the chemical,
metallurgical and mechanical points of view. It is purely a cosmetic
dulling.
Just as an additional precaution, in view of their history, I think I'd
be inclined to give these assemblies a spray of an acrylic conformal
coating, but this won't be strictly necessary if they meet the testing
that Doug advocates.
Brian
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Date: Wed, 20 Mar 2002 09:07:29 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Mauro, Dan" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Mauro, Dan" <[log in to unmask]>
Subject: Quick turn fab shop
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Hi all
Can anyone out there suggest or give recommendations on a good quality quick
turn fab shop.
Greatly appreciate any suggestions.
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<DIV><FONT face=Arial size=2><SPAN class=254530514-20032002>Hi
all</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN
class=254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN class=254530514-20032002>Can anyone out there
suggest or give recommendations on a good quality quick turn fab shop.
</SPAN></FONT></DIV>
<P><FONT face=Arial size=2><SPAN class=254530514-20032002>Greatly appreciate any
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Date: Wed, 20 Mar 2002 08:15:14 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Dave Hillman <[log in to unmask]>
Subject: Re: Conformal Coating BGA's
X-To: [log in to unmask]
MIME-Version: 1.0
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Hi Bruce! We are routinely putting acrylic conformal coating over plastic
BGA components without using underfill for avionics use environments. We
did a fair amount of testing looking both at paraylene and acrylic prior
implementation. This work was published at the IPC APEX 2000 Conference in
Long Beach (the paper title was "An Investigation of the Effects of Printed
Wiring Board Surface Finish and Conformal Coating for Ball Grid Array
Assembly"). Can you expand on your concern of "entrapped air"? We have not
seen any issues for that topic after 2 years of production experience.
Dave Hillman
Rockwell Collins
[log in to unmask]
"Misner, Bruce" <[log in to unmask]>@ipc.org> on 03/19/2002 01:48:38 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to "Misner, Bruce" <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: [TN] Conformal Coating BGA's
My question of the day: Is anyone conformal coating (not parylene) plastic
BGA's on FR-4 in Hi-Rel applications (aircraft; -20 to +71C ambient
operating temperature requirement) without benefit of an underfil? If yes,
has entrapped air been a major issue? Anyone care to comment on this
approach?
Regards,
Bruce Misner
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Date: Wed, 20 Mar 2002 08:24:51 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Dave Hillman <[log in to unmask]>
Subject: Re: Cross-sectioning question
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Hi Bev! To quote Sir Doug "Mt Dew" Pauls "it depends on the project"! As a
matter of routine we always report the details of wetting characteristics,
solder joint geometry, and any "unusual" microstructure. The "unusual"
microstructure details would include excessive voids, plating defects,
large dendrite structures, nontypical intermetallic phases/layers, and
solder joint cracks. We only measure and report on detailed microstructural
characteristics if the project could potentially cause changes in the
microstructure - such projects like oven profiles of unusual printed wiring
assemblies, the implementation of new solder alloys, the use of new surface
finishes (either on the component or boards), or multiple/excessive reflow
excursions. Good Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
Bev Christian <[log in to unmask]>@ipc.org> on 03/19/2002 02:04:41 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Bev Christian <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: [TN] Cross-sectioning question
TechNetters,
I have a two fine fellows who work for me who come from different
backgrounds. With regards to cross-sectioning solder joints, one is used
to
providing his customers with a metallurgical description of the metal in
the
joint. He says it is important to describe the number and size of tin and
lead dendrites, grain size, lamellar or otherwise general structure, etc.
The other says this is not necessary. Both of course agree on fillet size,
shape, cracks, voids, presence/absence/thickness of intermetallic.
Now I agree that grain size is not going to give you much, since solid room
temperature solder is close enough to its melting point that the grain size
will change within a few months anyways. But what about the rest?
regards,
Bev Christian
Research in Motion
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Date: Wed, 20 Mar 2002 09:36:14 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Sauer, Steven T." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Sauer, Steven T." <[log in to unmask]>
Subject: Re: Component taping specifications
X-To: "d. terstegge" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi Daan,
EIA-481-1 rev A & EIA-481-2 rev A are the latest documents. EIA-481-3 was
superceded by revision A to 481-2. The -2 document now contains req's for
16mm, 24mm, 32mm, 44mm and 56 mm and the -1 still has req's for 8mm and
12mm.
If you go to www.eia.org, you can be directed to Global Engineering
Documents for ordering any of these documents.
Hope this helps.
Steve Sauer
Mfg Engineer
Northrop Grumman, Xetron
-----Original Message-----
From: d. terstegge
I know there are also EIA-481-1 and a -2 and a -3 version. Can somebody
explain which of these specs I should have (and in what revisions) so that
all standard pick&placeable parts are covered ?
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Date: Wed, 20 Mar 2002 09:48:09 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Phil Nutting <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Nutting <[log in to unmask]>
Subject: Re: ESD Smocks
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I saved the threads from May and June of 2000 regarding ESD smocks for =
my own reference. Just reviewed them and there are arguments pro and =
con for wearing and washing.
From the Electrostatic Discharge Association's web page =
http://www.esda.org/
This standard is listed for ESD garments.
ANSI ESD STM2.1-1997: Resistance Test Method for Electrostatic Discharge =
Protective Garments
This Standard Test Method provides test methods for measuring the =
electrical resistance of garments used to control electrostatic =
discharge. It covers procedures for measuring sleeve-to-sleeve and =
point-to-point resistance.
Hope this is of some use. I have not selected a side of the fence to =
sit on.
Phil Nutting
-----Original Message-----
From: Lee Whiteman [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 9:04 AM
To: [log in to unmask]
Subject: Re: [TN] ESD Smocks
Kathy,
I would be very skeptical about using these types of ESD smocks. The =
ones
that I'm familiar with would never survive washing at home.
I've seen companies have their employees wear ESD smocks and shoes =
outside
of their facility, wash their ESD apparel at home, and wonder why they =
have
an ESD problem. I'm with Ron Dieselberg. Keep your ESD material =
controlled
within your facility. That's really the only way you can control the =
quality
of the ESD smocks.
Hope this helps. Good Luck.
Lee Whiteman
Senior Manufacturing Engineer
E-Mail: [log in to unmask] <mailto:[log in to unmask]>
Ph: (610) 362-1200 x208
Fax: (610) 362-1290
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Kathy Kuhlow
> Sent: Tuesday, March 19, 2002 2:50 PM
> To: [log in to unmask]
> Subject: [TN] ESD Smocks
>
>
> My company has considered changing to an ESD smock that the
> operator can take home. Supposedly the smock can be washed
> regularly w/o bleach and also dried with fabric softeners. The
> smock is good for 50-100 washes. Something sounds wrong here.
> Is anyone else out there using smocks like this, likes/dislikes, etc.?
>
> TIA
>
> Kathy
>
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Date: Wed, 20 Mar 2002 09:49:40 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Phil Nutting <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Nutting <[log in to unmask]>
Subject: Re: Quick turn fab shop
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----_=_NextPart_001_01C1D01E.76E60C4E"
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You had to put good quality with quick fab. Isn't that an oxymoron?
=20
Just kidding,
=20
Phil
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 9:07 AM
To: [log in to unmask]
Subject: [TN] Quick turn fab shop
Hi all
=20
=20
Can anyone out there suggest or give recommendations on a good quality =
quick turn fab shop.=20
Greatly appreciate any suggestions.
------_=_NextPart_001_01C1D01E.76E60C4E
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 6.00.2712.300" name=3DGENERATOR></HEAD>
<BODY>
<DIV><SPAN class=3D929344814-20032002><FONT face=3DArial color=3D#0000ff =
size=3D2>You=20
had to put good quality with quick fab. Isn't that an=20
oxymoron?</FONT></SPAN></DIV>
<DIV><SPAN class=3D929344814-20032002><FONT face=3DArial color=3D#0000ff =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D929344814-20032002><FONT face=3DArial color=3D#0000ff =
size=3D2>Just=20
kidding,</FONT></SPAN></DIV>
<DIV><SPAN class=3D929344814-20032002><FONT face=3DArial color=3D#0000ff =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D929344814-20032002><FONT face=3DArial color=3D#0000ff =
size=3D2>Phil</FONT></SPAN></DIV>
<BLOCKQUOTE dir=3Dltr style=3D"MARGIN-RIGHT: 0px">
<DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> Mauro, Dan=20
[mailto:[log in to unmask]]<BR><B>Sent:</B> Wednesday, March 20, 2002 =
9:07=20
AM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] Quick turn =
fab=20
shop<BR><BR></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D254530514-20032002>Hi=20
all</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D254530514-20032002>Can =
anyone out=20
there suggest or give recommendations on a good quality quick turn fab =
shop.=20
</SPAN></FONT></DIV>
<P><FONT face=3DArial size=3D2><SPAN =
class=3D254530514-20032002>Greatly appreciate=20
any suggestions.</SPAN></FONT></P></BLOCKQUOTE></BODY></HTML>
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Date: Wed, 20 Mar 2002 15:04:07 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Geoff Layhe <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Geoff Layhe <[log in to unmask]>
Subject: Re: laminate tolerance
X-To: tony steinke <[log in to unmask]>
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IPC 4101 0.127mm (0.005")
thickness tolerance:-
Class A +/- 0.038mm (0.0015")
Class B +/- 0.025mm (0.001")
Class C +/- 0.018mm (0.0007")
Class D -0.018/+0.030mm
Class C is usually inspected out rather than manufactured in.
Geoff Layhe
www.lamar-uk.co.uk <http://www.lamar-uk.co.uk>
-----Original Message-----
From: tony steinke [mailto:[log in to unmask]]
Sent: 20 March 2002 15:53
To: [log in to unmask]
Subject: [TN] laminate tolerance
Good morning techies,
Have a problem with laminate supplier(won't mention name at this point)
who claims they can only hold +\-.0015 tolerance on .005 1\1 core.
I feel this is absolutely absurd but was wondering if someone could
save me some valuable time researching the IPC specifications
for overall laminate tolerance. (we build to class 3)
Thanks for any info.
Tony Steinke
Private & Confidential:
This e-mail message is confidential and is intended solely for the person or
organisation to whom it is addressed. If the message is received by anyone
other than the addressee please return the message to the sender by replying
to it and then delete the message from your computer.
------_=_NextPart_001_01C1D020.7BA227C0
Content-Type: text/html;
charset="iso-8859-1"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
<META content="MSHTML 5.50.4134.600" name=GENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=#fff8e0>
<DIV><SPAN class=470374914-20032002><FONT face=Arial color=#0000ff size=2>IPC
4101 0.127mm (0.005") </FONT></SPAN></DIV>
<DIV><SPAN class=470374914-20032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=470374914-20032002><FONT face=Arial color=#0000ff
size=2> thickness tolerance:-</FONT></SPAN></DIV>
<DIV><SPAN class=470374914-20032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=470374914-20032002><FONT face=Arial color=#0000ff size=2>Class
A +/- 0.038mm (0.0015")</FONT></SPAN></DIV>
<DIV><SPAN class=470374914-20032002><FONT face=Arial color=#0000ff size=2>Class
B +/- 0.025mm (0.001")</FONT></SPAN></DIV>
<DIV><SPAN class=470374914-20032002><FONT face=Arial color=#0000ff size=2>Class
C +/- 0.018mm (0.0007")</FONT></SPAN></DIV><FONT face=Tahoma>
<DIV><SPAN class=470374914-20032002></SPAN><FONT face=Arial><FONT
color=#0000ff><FONT size=2>C<SPAN class=470374914-20032002>lass D
-0.018/+0.030mm</SPAN></FONT></FONT></FONT></DIV>
<DIV><FONT face=Arial><FONT color=#0000ff><FONT size=2><SPAN
class=470374914-20032002></SPAN></FONT></FONT></FONT> </DIV>
<DIV><FONT face=Arial><FONT color=#0000ff><FONT size=2><SPAN
class=470374914-20032002>Class C is usually inspected out rather than
manufactured in.</SPAN></FONT></FONT></FONT></DIV>
<DIV><BR><FONT size=2><SPAN class=470374914-20032002><FONT face=Arial
color=#0000ff>Geoff Layhe</FONT></SPAN></FONT></DIV>
<DIV><FONT face=Arial color=#0000ff size=2><SPAN class=470374914-20032002><A
href="http://www.lamar-uk.co.uk">www.lamar-uk.co.uk</A></SPAN></FONT></DIV>
<DIV><FONT size=2><SPAN class=470374914-20032002></SPAN></FONT> </DIV>
<DIV><FONT size=2><SPAN class=470374914-20032002></SPAN></FONT> </DIV>
<DIV><FONT size=2><SPAN class=470374914-20032002></SPAN></FONT> </DIV>
<DIV><FONT size=2><SPAN class=470374914-20032002></SPAN></FONT> </DIV>
<DIV><FONT size=2><SPAN class=470374914-20032002></SPAN></FONT> </DIV>
<DIV><FONT size=2><SPAN class=470374914-20032002> </SPAN>-----Original
Message-----<BR><B>From:</B> tony steinke
[mailto:[log in to unmask]]<BR><B>Sent:</B> 20 March 2002
15:53<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] laminate
tolerance<BR><BR></DIV></FONT></FONT>
<BLOCKQUOTE dir=ltr style="MARGIN-RIGHT: 0px">
<DIV><FONT face=Arial size=2>Good morning techies,</FONT></DIV>
<DIV><FONT face=Arial size=2>Have a problem with laminate supplier(won't
mention name at this point)</FONT></DIV>
<DIV><FONT face=Arial size=2>who claims they can only hold +\-.0015 tolerance
on .005 1\1 core.</FONT></DIV>
<DIV><FONT face=Arial size=2>I feel this is absolutely absurd but was
wondering if someone could </FONT></DIV>
<DIV><FONT face=Arial size=2>save me some valuable time researching the IPC
specifications</FONT></DIV>
<DIV><FONT face=Arial size=2>for overall laminate tolerance. (we build to
class 3)</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>Thanks for any info.</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>Tony
Steinke</FONT></DIV></BLOCKQUOTE></BODY></HTML>
<BR>
<BR>
<P><B><FONT SIZE=2 FACE="Arial">Private & Confidential:</FONT></B></P>
<P><B><FONT SIZE=2 FACE="Arial">This e-mail message is confidential and is intended solely for the person or</FONT></B></P>
<P><B><FONT SIZE=2 FACE="Arial">organisation to whom it is addressed. If the message is received by anyone</FONT></B></P>
<P><B><FONT SIZE=2 FACE="Arial">other than the addressee please return the message to the sender by replying</FONT></B></P>
<P><B><FONT SIZE=2 FACE="Arial">to it and then delete the message from your computer.</FONT></B></P>
<BR>
<BR>
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Date: Wed, 20 Mar 2002 10:11:14 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Quick turn fab shop
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I have one in my general area that is very good, in my opinion.
Diversified Systems
Indianapolis, IN
(317) 299-9547
Jon Moore
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Date: Wed, 20 Mar 2002 10:23:35 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: Contamination
X-To: "Simms, Michael" <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
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The process of reclaiming function of a corroded assembly as described would
be classified as repair. Repair methods are described in IPC-7721. I doubt
that the procedure outlined by Doug is in the document.
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Simms, Michael
> Sent: Wednesday, March 20, 2002 8:55 AM
> To: [log in to unmask]
> Subject: Re: [TN] Contamination
>
>
> Hi T'netters,
> I'm curious regarding the documentation which
> accompanies re-worked assemblies. Naturally,
> after all the effort involved in recovering
> corroded assemblies, the client (or end user)
> is informed of the special processing which
> was provided on those assemblies.
> Can someone direct me to the appropriate
> IPC guidelines for the documentation and
> disclosure that accompanies this type of re-work?
> Regards,
> Mike Simms
> Trace Laboratories - Central
> (ph.) 847-934-5300
> (fax) 847-934-4600
> 1150 West Euclid Avenue
> Palatine, IL 60067
> www.tracelabs.com
>
> Notice: This message is confidential and intended for the private use
> of the addressee only.
>
>
> -----Original Message-----
> From: Brian Ellis [mailto:[log in to unmask]]
> Sent: Tuesday, March 19, 2002 2:26 AM
> Subject: Re: Contamination
>
>
> Ted
>
> I agree with St. Doug but ther may be some other steps you will find
> useful. Corrosion products are usually a mixture of soluble salts, like
> copper chloride, and insoluble ones, like carbonates, oxides and
> hydroxides, as well as a gunge of the original contamination. The first
> thing I would do is to immerse the products in a 2 - 3% solution of
> hydrochloric acid at, say, 40deg C. This will dissolve away the soluble
> and much of the insoluble corrosion products (a little brushing with a
> nylon-bristles brush will aid the process). I would then suggest a
> proprietary neutraliser (of the type used as a rinse-aid after soldering
> with water-soluble fluxes) containing the disodium salt of EDTA. This
> will help to chelate any remaining metal salts, especially the
> relatively insoluble lead ones. Finally, I would give them a saponifier
> wash, to make sure that all of the original flux residues are removed,
> followed by a damned good rinse cycle, ending with DI water.
>
> At this stage, you can be reasonably sure no corrosion-causing chemistry
> remains on the assembly and it will be possible to evaluate the damage
> and whether the assembly is usable/repairable/throw-awayable. Be
> particularly cautious where there are noble metals: gold-plated kovar
> leads, for example, are notorious for promoting stress corrosion on
> bends and I've seen cases where the kovar has been completely eaten away
> and the component is held on by the gold plating!
>
> Oh, BTW, your solder joints will appear matt after this treatment, but
> this does not matter: they will be perfectly OK from the chemical,
> metallurgical and mechanical points of view. It is purely a cosmetic
> dulling.
>
> Just as an additional precaution, in view of their history, I think I'd
> be inclined to give these assemblies a spray of an acrylic conformal
> coating, but this won't be strictly necessary if they meet the testing
> that Doug advocates.
>
> Brian
>
> ------------------------------------------------------------------
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> ---------------
>
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Date: Wed, 20 Mar 2002 11:19:48 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
bonilla_d <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: bonilla_d <[log in to unmask]>
Subject: Re: Quick turn fab shop
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
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thanks
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of [log in to unmask]
Sent: Wednesday, March 20, 2002 11:11 AM
To: [log in to unmask]
Subject: Re: [TN] Quick turn fab shop
I have one in my general area that is very good, in my opinion.
Diversified Systems
Indianapolis, IN
(317) 299-9547
Jon Moore
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Date: Wed, 20 Mar 2002 10:32:26 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Fish <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Fish <[log in to unmask]>
Subject: Re: ESD Smocks
X-To: Kathy Kuhlow <[log in to unmask]>
MIME-Version: 1.0
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We've not seen the specific coats that you speak of. You're correct that
something 'smells fishy', if you'll pardon the expression, about them.
It would be nice to lower inventory. We have three coats per person ... one
to wear, one in transit to the laundry, and one returning from the laundry.
We find that testing between panels and arms of ESD smocks is oppressive.
So, we plan to replace them with cotton lab coats. While it gets us away
from the testing issue, we still have to pay the laundry bill.
Dave Fish
----- Original Message -----
From: "Kathy Kuhlow" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Tuesday, March 19, 2002 11:50 AM
Subject: [TN] ESD Smocks
My company has considered changing to an ESD smock that the operator can
take home. Supposedly the smock can be washed regularly w/o bleach and also
dried with fabric softeners. The smock is good for 50-100 washes.
Something sounds wrong here. Is anyone else out there using smocks like
this, likes/dislikes, etc.?
TIA
Kathy
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Date: Wed, 20 Mar 2002 10:45:43 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rick <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rick <[log in to unmask]>
Subject: Re: laminate tolerance
X-To: tony steinke <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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You can get the laminate certified to class A, B, C or D. For 5
core, class A is +/- 1.5 mils. We typically order class C which is
+/- 0.7 for 5 core. We find though that most of the laminate falls
within class C regardless of what class you order.
Rick Babyak
Process Engineer
Proto Circuit Inc.
7 Ascot Parkway
Cuyahoga Falls, OH 44223
330-572-3400
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Date: Wed, 20 Mar 2002 09:50:10 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: Quick turn fab shop
Mime-Version: 1.0
Content-Type: multipart/mixed; boundary="=_B1EC18D2.BDDCB149"
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Diversified is a good house. Another to try that has been very good for =
us is:=20
Coretec, Inc.
2020 Ellesmere Road=20
Scarbough, Ontario=20
Canada M1H2Z8
www.coretec-inc.com
--=_B1EC18D2.BDDCB149
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<BODY style="MARGIN-TOP: 2px; FONT: 10pt MS Sans Serif; MARGIN-LEFT: 2px">
<DIV>Diversified is a good house. Another to try that has been very good
for us is: </DIV>
<DIV> </DIV>
<DIV>Coretec, Inc.</DIV>
<DIV>2020 Ellesmere Road </DIV>
<DIV>Scarbough, Ontario </DIV>
<DIV>Canada M1H2Z8</DIV>
<DIV><A href="http://www.coretec-inc.com">www.coretec-inc.com</A></DIV>
<DIV> </DIV>
<DIV> </DIV></BODY></HTML>
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Date: Wed, 20 Mar 2002 15:19:25 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Frank Davies <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Frank Davies <[log in to unmask]>
Subject: Re: laminate tolerance
X-To: tony steinke <[log in to unmask]>
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-----Original Message-----
From: tony steinke <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Wednesday, March 20, 2002 2:40 PM
Subject: [TN] laminate tolerance
Tony=20
Our vendor uses .0005 for tolerance range, and can get better if =
requested he says. The +\- .0015 does seem a little bit =
strange.=20
Maybe look at another vendor.=20
Good luck
Frank
=20
=20
Good morning techies,
Have a problem with laminate supplier(won't mention name at this =
point)
who claims they can only hold +\-.0015 tolerance on .005 1\1 core.
I feel this is absolutely absurd but was wondering if someone could=20
save me some valuable time researching the IPC specifications
for overall laminate tolerance. (we build to class 3)
=20
Thanks for any info.
=20
Tony Steinke
------=_NextPart_000_000D_01C1D022.9EA39270
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charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD W3 HTML//EN">
<HTML>
<HEAD>
<META content=3Dtext/html;charset=3Diso-8859-1 =
http-equiv=3DContent-Type><!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 =
Transitional//EN">
<META content=3D'"MSHTML 4.72.3110.7"' name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#fff8e0>
<DIV> </DIV>
<BLOCKQUOTE=20
style=3D"BORDER-LEFT: #000000 solid 2px; MARGIN-LEFT: 5px; PADDING-LEFT: =
5px">
<DIV><FONT face=3DArial size=3D2><B>-----Original =
Message-----</B><BR><B>From:=20
</B>tony steinke <<A=20
=
href=3D"mailto:[log in to unmask]">[log in to unmask]</A>>=
<BR><B>To:=20
</B><A href=3D"mailto:[log in to unmask]">[log in to unmask]</A> <<A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A>><BR><B>Date:=20
</B>Wednesday, March 20, 2002 2:40 PM<BR><B>Subject: </B>[TN] =
laminate=20
tolerance</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Tony </FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Our vendor uses .0005 for tolerance =
range, and=20
can get better if requested he=20
=
says. &n=
bsp; =20
The +\- .0015 does seem a little bit strange. </FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Maybe look at another vendor. =
</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Good luck</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Frank<BR><BR></DIV></FONT>
<DIV><FONT face=3DArial size=3D2>Good morning techies,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Have a problem with laminate =
supplier(won't=20
mention name at this point)</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>who claims they can only hold =
+\-.0015=20
tolerance on .005 1\1 core.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>I feel this is absolutely absurd =
but was=20
wondering if someone could </FONT></DIV>
<DIV><FONT face=3DArial size=3D2>save me some valuable time =
researching the IPC=20
specifications</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>for overall laminate tolerance. (we =
build to=20
class 3)</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Thanks for any info.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Tony=20
Steinke</FONT></DIV></BLOCKQUOTE></BODY></HTML>
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Date: Wed, 20 Mar 2002 10:19:46 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: ESD Smocks
Mime-Version: 1.0
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http://www.desco.com/pdf/tb-2055.pdf
This is the exact smock we are considering. =20
Kathy=20
--=_DE8377A4.85E48971
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<DIV><A
href="http://www.desco.com/pdf/tb-2055.pdf">http://www.desco.com/pdf/tb-2055.pdf</A></DIV>
<DIV> </DIV>
<DIV>This is the exact smock we are considering. </DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
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Date: Wed, 20 Mar 2002 10:36:34 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Franklin D Asbell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Franklin D Asbell <[log in to unmask]>
Subject: Re: Quick turn fab shop
X-To: "Mauro, Dan" <[log in to unmask]>
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Dan,
I heard there is this fantastic shop near Dallas, Texas. Called Network =
Circuits, Inc. They've been known to successfully turn up to 24 layers =
in 24 hours, or less. I highly recommend them.
Regards,
Franklin D Asbell
Quality Assurance Manager
Network Circuits, Inc.
Irving, Texas
http://www.networkcircuits.com
----- Original Message -----=20
From: Mauro, Dan=20
To: [log in to unmask]
Sent: Wednesday, March 20, 2002 8:07 AM
Subject: [TN] Quick turn fab shop
Hi all
=20
=20
Can anyone out there suggest or give recommendations on a good quality =
quick turn fab shop.=20
Greatly appreciate any suggestions.
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<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Dan,</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>I heard there is this fantastic shop =
near Dallas,=20
Texas. Called Network Circuits, Inc. They've been known to successfully =
turn up=20
to 24 layers in 24 hours, or less. I highly recommend them.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Regards,</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Franklin D Asbell</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Quality Assurance Manager</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Network Circuits, Inc.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Irving, Texas</FONT></DIV>
<DIV><FONT face=3DArial size=3D2><A=20
href=3D"http://www.networkcircuits.com">http://www.networkcircuits.com</A=
></FONT></DIV>
<DIV> </DIV>
<BLOCKQUOTE=20
style=3D"BORDER-LEFT: #000000 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: =
0px; PADDING-LEFT: 5px; PADDING-RIGHT: 0px">
<DIV style=3D"FONT: 10pt arial">----- Original Message ----- </DIV>
<DIV=20
style=3D"BACKGROUND: #e4e4e4; FONT: 10pt arial; font-color: =
black"><B>From:</B>=20
<A href=3D"mailto:[log in to unmask]" [log in to unmask]>Mauro, =
Dan</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>To:</B> <A =
href=3D"mailto:[log in to unmask]"=20
[log in to unmask]>[log in to unmask]</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>Sent:</B> Wednesday, March 20, 2002 =
8:07=20
AM</DIV>
<DIV style=3D"FONT: 10pt arial"><B>Subject:</B> [TN] Quick turn fab =
shop</DIV>
<DIV><BR></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D254530514-20032002>Hi=20
all</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D254530514-20032002>Can =
anyone out=20
there suggest or give recommendations on a good quality quick turn fab =
shop.=20
</SPAN></FONT></DIV>
<P><FONT face=3DArial size=3D2><SPAN =
class=3D254530514-20032002>Greatly appreciate=20
any suggestions.</SPAN></FONT></P></BLOCKQUOTE></BODY></HTML>
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Date: Wed, 20 Mar 2002 11:34:07 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Lupita Roberts <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Lupita Roberts <[log in to unmask]>
Subject: FW: shelve life of pwb's
MIME-Version: 1.0
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I am wondering if anyone can help me with the shelve life of raw
PWB's. I was experiencing solderability issues and oxidation issues
with some boards. I was told by several suppliers that White Tin only
has a shelve life of 6 months and they were not warrantied beyond that
point. I have been unsuccessful in trying to find data in regards to
this issue.
Suzanne Foulkes
QC Supervisor
Inservco Inc.
LaGrange, Ohio 44050
[log in to unmask]
[log in to unmask]
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Date: Wed, 20 Mar 2002 16:50:48 -0000
Reply-To: Dougal Stewart <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dougal Stewart <[log in to unmask]>
Subject: Re: laminate tolerance
X-To: tony steinke <[log in to unmask]>
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Actually, I think you need to approach the issue in a different way - =
Everyone is obsessed with nice easy numbers, and it causes you problems. =
why ask for 5 mil core - there is no prepreg that will give this =
thickness as a 'natural' thickness. What you get is a sow's ear trying =
to meet your requirement, so either a resin rich 2116 which will always =
be less than 5 mil or a resin starved 2 ply 1080 which will give greater =
than 5 mil. Why not ask your laminate supplier to provide data on the =
'natural' thickness distribution of laminate made with 'natural' resin =
content prepregs. I found this to be a much better approach when I =
started looking at improving impedance control a few years back, and the =
6 sigma distribution for natural thicknesses will be better than they =
have quoted for your IPC class. OK so you might end up asking for 117um =
or 132um laminate but at least you will have something with a better =
tolerance. Break the mould ! (you might require 125um tracks instead of =
5mil to improve your tolerances on track width.......)
Dougal Stewart
email: [log in to unmask]
phone: +44 1896 822204
mob: +44 7984 629667
----- Original Message -----=20
From: tony steinke=20
To: [log in to unmask]
Sent: Wednesday, March 20, 2002 3:53 PM
Subject: [TN] laminate tolerance
Good morning techies,
Have a problem with laminate supplier(won't mention name at this =
point)
who claims they can only hold +\-.0015 tolerance on .005 1\1 core.
I feel this is absolutely absurd but was wondering if someone could=20
save me some valuable time researching the IPC specifications
for overall laminate tolerance. (we build to class 3)
Thanks for any info.
Tony Steinke
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<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#fff8e0>
<DIV><FONT face=3DArial>Actually, I think you need to approach the issue =
in a=20
different way - Everyone is obsessed with nice easy numbers, and it =
causes you=20
problems. why ask for 5 mil core - there is no prepreg that will give =
this=20
thickness as a 'natural' thickness. What you get is a sow's ear trying =
to meet=20
your requirement, so either a resin rich 2116 which will always be less =
than 5=20
mil or a resin starved 2 ply 1080 which will give greater than 5 mil. =
Why not=20
ask your laminate supplier to provide data on the 'natural' thickness=20
distribution of laminate made with 'natural' resin content prepregs. I =
found=20
this to be a much better approach when I started looking at improving =
impedance=20
control a few years back, and the 6 sigma distribution for natural =
thicknesses=20
will be better than they have quoted for your IPC class. OK so you might =
end up=20
asking for 117um or 132um laminate but at least you will have =
something=20
with a better tolerance. Break the mould ! (you might require 125um =
tracks=20
instead of 5mil to improve your tolerances on track =
width.......)</FONT></DIV>
<DIV> </DIV>
<DIV>Dougal Stewart</DIV>
<DIV> </DIV>
<DIV>email: <A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]
om</A><BR>phone:=20
+44 1896 822204<BR>mob: +44 7984 629667</DIV>
<BLOCKQUOTE dir=3Dltr=20
style=3D"PADDING-RIGHT: 0px; PADDING-LEFT: 5px; MARGIN-LEFT: 5px; =
BORDER-LEFT: #000000 2px solid; MARGIN-RIGHT: 0px">
<DIV style=3D"FONT: 10pt arial">----- Original Message ----- </DIV>
<DIV=20
style=3D"BACKGROUND: #e4e4e4; FONT: 10pt arial; font-color: =
black"><B>From:</B>=20
<A [log in to unmask] =
href=3D"mailto:[log in to unmask]">tony=20
steinke</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>To:</B> <A [log in to unmask]
href=3D"mailto:[log in to unmask]">[log in to unmask]</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>Sent:</B> Wednesday, March 20, 2002 =
3:53=20
PM</DIV>
<DIV style=3D"FONT: 10pt arial"><B>Subject:</B> [TN] laminate =
tolerance</DIV>
<DIV><BR></DIV>
<DIV><FONT face=3DArial size=3D2>Good morning techies,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Have a problem with laminate =
supplier(won't=20
mention name at this point)</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>who claims they can only hold =
+\-.0015 tolerance=20
on .005 1\1 core.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>I feel this is absolutely absurd but =
was=20
wondering if someone could </FONT></DIV>
<DIV><FONT face=3DArial size=3D2>save me some valuable time =
researching the IPC=20
specifications</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>for overall laminate tolerance. (we =
build to=20
class 3)</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Thanks for any info.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Tony=20
Steinke</FONT></DIV></BLOCKQUOTE></BODY></HTML>
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Date: Wed, 20 Mar 2002 12:45:43 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
tony steinke <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: tony steinke <[log in to unmask]>
Subject: Re: FW: shelve life of pwb's
MIME-Version: 1.0
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Lupita,
Listen to your suppliers! My previous company had immersion tin
as a final surface finish, which I was directly involved and after
several months of trying to determine your same question I would
say that 6 months is tops especially if you take into consideration
if the board you are assembling is multiple pass through wave
solder. All of this testing/evaluation was performed using SERA
(sequential electromigration reduction analysis) and at the time
evaluating the three biggest players Dexter, Omikron, and
McGean Rohco.
Tony Steinke
----- Original Message -----
From: Lupita Roberts <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, March 20, 2002 8:34 AM
Subject: [TN] FW: shelve life of pwb's
> I am wondering if anyone can help me with the shelve life of raw
> PWB's. I was experiencing solderability issues and oxidation issues
> with some boards. I was told by several suppliers that White Tin only
> has a shelve life of 6 months and they were not warrantied beyond that
> point. I have been unsuccessful in trying to find data in regards to
> this issue.
>
> Suzanne Foulkes
> QC Supervisor
> Inservco Inc.
> LaGrange, Ohio 44050
>
> [log in to unmask]
> [log in to unmask]
>
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Date: Wed, 20 Mar 2002 09:53:16 -0800
Reply-To: Leo Roos <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Leo Roos <[log in to unmask]>
Subject: Re: FW: shelve life of pwb's
X-To: Lupita Roberts <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Hi:
Although the data is not widely available, white tin does oxidize. It is
very dependent on temperature and humidity so storage is always an issue. If
the boards are stored at ambient conditions it is very likely that oxidation
has occurred and the tin has become resistant to soldering. SnO is pretty
resistant to reactivation although it should be possible. You might ask the
particular manufacturer of the white tin if they have any suggestion for
their particular product.
----- Original Message -----
From: "Lupita Roberts" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, March 20, 2002 8:34 AM
Subject: [TN] FW: shelve life of pwb's
> I am wondering if anyone can help me with the shelve life of raw
> PWB's. I was experiencing solderability issues and oxidation issues
> with some boards. I was told by several suppliers that White Tin only
> has a shelve life of 6 months and they were not warrantied beyond that
> point. I have been unsuccessful in trying to find data in regards to
> this issue.
>
> Suzanne Foulkes
> QC Supervisor
> Inservco Inc.
> LaGrange, Ohio 44050
>
> [log in to unmask]
> [log in to unmask]
>
> --------------------------------------------------------------------------
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Date: Wed, 20 Mar 2002 09:56:53 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bloomquist, Ken" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bloomquist, Ken" <[log in to unmask]>
Subject: Re: ESD Smocks
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
I think Phil is on the right track. Get a couple of these coats and start
washing and testing. The only thing you don't have control over is the type
of washing your employees will do at home, i.e. temperature, amount of
detergent, type of detergent, drying temperature, fabric softeners, etc. I
guess you could have each person take your test coats home and wash them,
test them and pass them on to the next. There are a lot of variables though.
Ken Bloomquist
Sr. Principal Process Engineer
GENERAL DYNAMICS
9845 Willows Rd. NE.
Redmond, WA 98052-2540
425-556-4554
[log in to unmask]
www.gd-ots.com
-----Original Message-----
From: Phil Nutting [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 6:48 AM
To: [log in to unmask]
Subject: Re: [TN] ESD Smocks
I saved the threads from May and June of 2000 regarding ESD smocks for my
own reference. Just reviewed them and there are arguments pro and con for
wearing and washing.
From the Electrostatic Discharge Association's web page http://www.esda.org/
This standard is listed for ESD garments.
ANSI ESD STM2.1-1997: Resistance Test Method for Electrostatic Discharge
Protective Garments
This Standard Test Method provides test methods for measuring the electrical
resistance of garments used to control electrostatic discharge. It covers
procedures for measuring sleeve-to-sleeve and point-to-point resistance.
Hope this is of some use. I have not selected a side of the fence to sit
on.
Phil Nutting
-----Original Message-----
From: Lee Whiteman [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 9:04 AM
To: [log in to unmask]
Subject: Re: [TN] ESD Smocks
Kathy,
I would be very skeptical about using these types of ESD smocks. The ones
that I'm familiar with would never survive washing at home.
I've seen companies have their employees wear ESD smocks and shoes outside
of their facility, wash their ESD apparel at home, and wonder why they have
an ESD problem. I'm with Ron Dieselberg. Keep your ESD material controlled
within your facility. That's really the only way you can control the quality
of the ESD smocks.
Hope this helps. Good Luck.
Lee Whiteman
Senior Manufacturing Engineer
E-Mail: [log in to unmask] <mailto:[log in to unmask]>
Ph: (610) 362-1200 x208
Fax: (610) 362-1290
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Kathy Kuhlow
> Sent: Tuesday, March 19, 2002 2:50 PM
> To: [log in to unmask]
> Subject: [TN] ESD Smocks
>
>
> My company has considered changing to an ESD smock that the
> operator can take home. Supposedly the smock can be washed
> regularly w/o bleach and also dried with fabric softeners. The
> smock is good for 50-100 washes. Something sounds wrong here.
> Is anyone else out there using smocks like this, likes/dislikes, etc.?
>
> TIA
>
> Kathy
>
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Date: Wed, 20 Mar 2002 11:10:29 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: FW: shelve life of pwb's
X-To: Lupita Roberts <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii; x-mac-type="54455854";
x-mac-creator="4D4F5353"
Content-Transfer-Encoding: 7bit
Suzanne,
I think we will need some more info on the "shipping and storage" processes you use.
This will influence the "shelf life" more then the product itself.
Other questions are:
1. How long do you want to store them?
2. Are they being "repackaged"?
3. What are the shop environmental conditions when they reach the floor?
4. Do the flux and soldering methods match the product build process, materials, and design?
and so on just for starters.
David A. Douthit
Manager
LoCan LLC
Lupita Roberts wrote:
> I am wondering if anyone can help me with the shelve life of raw
> PWB's. I was experiencing solderability issues and oxidation issues
> with some boards. I was told by several suppliers that White Tin only
> has a shelve life of 6 months and they were not warrantied beyond that
> point. I have been unsuccessful in trying to find data in regards to
> this issue.
>
> Suzanne Foulkes
> QC Supervisor
> Inservco Inc.
> LaGrange, Ohio 44050
>
> [log in to unmask]
> [log in to unmask]
>
> ---------------------------------------------------------------------------------
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> ---------------------------------------------------------------------------------
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Date: Wed, 20 Mar 2002 10:16:59 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: Re: Contamination
X-To: Guy Ramsey <[log in to unmask]>
MIME-version: 1.0
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Guy,
Why would this be a repair as opposed to rework?
Dan
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Date: Wed, 20 Mar 2002 10:40:26 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Smith, Russell (US LA)" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Smith, Russell (US LA)" <[log in to unmask]>
Subject: Re: Soldermask color
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Grant :
I concur with the other comments that to truly identify the cause is =
extremely speculative without seeing the boards.
However, Stewart most likely hit the mark with the description of the =
film contact. This is often referred to as "ferrotyping". When in the =
mask is soft, ( usually the result of insufficient tack drying ) under =
vacuum the artwork causes the mask surface to flow slightly , leaving =
the texture of the film in place of the gloss imparted by the material, =
and drying.=20
Sometimes one can see similar results if there is Oxygen inhibition in =
the exposure step, this is usually seen as surface attack during develop =
, and results in a lower gloss surface with tell-tale marks and patterns =
from the developer itself.=20
Without knowing the combination of mask and conformal coat it is =
difficult to judge the effects , however in most cases it shouldn't be =
an issue.=20
What you might want to do is go back to your supplier and ask when the =
last time they profiled their soldermask ovens! That should give 'them =
something to think about.
Russell Smith=09
-----Original Message-----
From: Dougal Stewart [mailto:[log in to unmask]]
Sent: Tue, March 19, 2002 4:08 AM
To: [log in to unmask]
Subject: Re: [TN] Soldermask color
This may be as simple an explanation as the area of sheen being created =
by
the polyester silver halide or diazo film surface during the vacuum pull =
at
exposure, during the bare board fab process. Where there are high spots
caused by pads and tracks, the polyester is held off contact adjacent to =
the
feature, and the gloss will be apparent where the film comes back into
intimate contact. Normally, you would see this exaggerated more on one =
side
than the other as the normal exposure process uses glass on one side of =
the
frame and mylar for the other.
Different hues may be an optical effect caused by the above, or by =
different
thicknesses of the ink, again being thicker off the tracks and pads due =
to
slump.
How will it affect conformal coat ? - until you have an understanding of
what you have got, you will not be able to understand what effect you =
will
have.....
Dougal Stewart
email: [log in to unmask]
phone: +44 1896 822204
mob: +44 7984 629667
----- Original Message -----
From: "Grant Emandien" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Tuesday, March 19, 2002 9:35 AM
Subject: [TN] Soldermask color
> Hi,
>
> We have received PCBs with solder mask exhibiting color variarion i.e.
light
> and darker hues on the same PCB. The color differences are more =
prevalent
> around vias but also evident on other areas. The light hue has a more =
matt
> finish while the darker hue exhibits a sheen, almost an oily =
appearance
but
> is not easily removed.
>
> Any comments on what it may be and possible effects (for conformal
coating)?
>
> TIA
> Grant
>
>
>
>
> **********************************************************************
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Date: Wed, 20 Mar 2002 10:55:22 -0800
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jim Axton <[log in to unmask]>
Subject: Re: Quick turn fab shop
X-To: "Mauro, Dan" <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/alternative;
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Dan,
We can help you...
Jim Axton
Corporate Director of Test, DDI
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Mauro, Dan
Sent: Wednesday, March 20, 2002 6:07 AM
To: [log in to unmask]
Subject: [TN] Quick turn fab shop
Hi all
Can anyone out there suggest or give recommendations on a good quality
quick turn fab shop.
Greatly appreciate any suggestions.
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<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN=20
class=3D565314518-20032002>Dan,</SPAN></FONT></DIV>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN=20
class=3D565314518-20032002></SPAN></FONT> </DIV>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN =
class=3D565314518-20032002>We can=20
help you...</SPAN></FONT></DIV>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN=20
class=3D565314518-20032002></SPAN></FONT> </DIV>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN =
class=3D565314518-20032002>Jim=20
Axton</SPAN></FONT></DIV>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN=20
class=3D565314518-20032002>Corporate Director of Test, =
DDI</SPAN></FONT></DIV>
<BLOCKQUOTE style=3D"MARGIN-RIGHT: 0px">
<DIV align=3Dleft class=3DOutlookMessageHeader dir=3Dltr><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of </B>Mauro, Dan<BR><B>Sent:</B> =
Wednesday, March 20, 2002 6:07 AM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> [TN] Quick turn fab=20
shop<BR><BR></DIV></FONT>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D254530514-20032002>Hi=20
all</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D254530514-20032002>Can =
anyone out=20
there suggest or give recommendations on a good quality quick turn fab =
shop.=20
</SPAN></FONT></DIV>
<P><FONT face=3DArial size=3D2><SPAN =
class=3D254530514-20032002>Greatly appreciate=20
any suggestions.</SPAN></FONT></P></BLOCKQUOTE></BODY></HTML>
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Date: Wed, 20 Mar 2002 14:24:41 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Sauer, Steven T." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Sauer, Steven T." <[log in to unmask]>
Subject: Re: Quick turn fab shop
X-To: "Mauro, Dan" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi Dan,
I've used Circuit Center in Dayton, OH with very good results:
http://www.circuitcenter.com/ <http://www.circuitcenter.com/>
One noteworthy point that I'll pass along is to not use the same fabricator
as a "one stop shopping" source. If you're looking for a quick-turn, go to
a fabricator that specializes in quick-turn. If you're looking for a
small-medium production volume fabricator or a medium-high volume
fabricator, go to a fabricator that supports that type of work for the
technology type that you are requiring. No captive or independent
fabricator can consistently produce all product mix types and all delivery
requests without compromise to quality or process control. And remember,
everything has a price.
Steve Sauer
-----Original Message-----
Can anyone out there suggest or give recommendations on a good quality quick
turn fab shop.
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Date: Wed, 20 Mar 2002 15:06:10 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: PGA to SMT sockets...
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Hi all!
Got a fresh new beast to deal with that I've never seen before...a PGA-to-SMT
socket. When you look at the board, it looks like a BGA would go there, but
actually
it's a PGA socket that is soldered to SMT pads...this is a fairly dense
socket, 50-mil spacing. The history is that the yeilds are terrible, and
99.9% of the time when the assembly doesn't play, it's a solder issue with
the sockets.
I've looked closely at these sockets, and they're not very precise. The pins
are strange too. Each pin is about .145" long, .038" diameter, and have a
little .018" diameter, .005" long nub machined into the end of each
pin...this is what sits on the SMT pad and is soldered to. All the pins are
inserted into a 1-inch square, .062" thick FR4 substrate to form the socket.
Go to:
http://www.stevezeva.homestead.com
To get a look at what I'm about to deal with...I've noticed some coplanarity
issues with the pins too. I've got some ideas to try and deal with that. But
have any of you ever dealt with these little "jewels"? Got any tips?
By the way, these sockets MUST be used, no choice...
-Steve Gregory-
--part1_cd.14abe3f1.29ca45b2_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi all!
<BR>
<BR>Got a fresh new beast to deal with that I've never seen before...a PGA-to-SMT socket. When you look at the board, it looks like a BGA would go there, but actually
<BR>it's a PGA socket that is soldered to SMT pads...this is a fairly dense socket, 50-mil spacing. The history is that the yeilds are terrible, and 99.9% of the time when the assembly doesn't play, it's a solder issue with the sockets.
<BR>
<BR>I've looked closely at these sockets, and they're not very precise. The pins are strange too. Each pin is about .145" long, .038" diameter, and have a little .018" diameter, .005" long nub machined into the end of each pin...this is what sits on the SMT pad and is soldered to. All the pins are inserted into a 1-inch square, .062" thick FR4 substrate to form the socket. Go to:
<BR>
<BR>http://www.stevezeva.homestead.com
<BR>
<BR>To get a look at what I'm about to deal with...I've noticed some coplanarity issues with the pins too. I've got some ideas to try and deal with that. But have any of you ever dealt with these little "jewels"? Got any tips?
<BR>
<BR>By the way, these sockets MUST be used, no choice...
<BR>
<BR>-Steve Gregory-</FONT></HTML>
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Date: Wed, 20 Mar 2002 12:10:42 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Richard Hamilton <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Richard Hamilton <[log in to unmask]>
Subject: Re: ESD Smocks
X-To: "Bloomquist, Ken" <[log in to unmask]>
In-Reply-To: <D837F165FB909F4595E9E7CE9645F6AE6393BE@HELIUM>
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As a process engineer I also try to all ends to make the process as
foolproof as possible to help reduce the 'unknown' factors that WILL come
up. I believe someone earlier commented that detergent should NOT be used
in the smock cleaning process and not to embarrass or slight Ken, but do
you see how easily 'detergent' can get sucked into the process. So, the
question is, does the employee have enough interest to get a non-detergent
to use on this one article, or will it get thrown in with all the rest of
the wash using the detergent? I vote for controlled cleaning processes. Now
we get to consider the alternate costs and see what path comes out the
winner!?
Not that I don't trust the employees, I just don't have full faith in ALL
humans!
Best of luck on this one.
Richard Hamilton
At 09:56 AM 3/20/02 -0800, you wrote:
>I think Phil is on the right track. Get a couple of these coats and start
>washing and testing. The only thing you don't have control over is the type
>of washing your employees will do at home, i.e. temperature, amount of
>detergent, type of detergent, drying temperature, fabric softeners, etc. I
>guess you could have each person take your test coats home and wash them,
>test them and pass them on to the next. There are a lot of variables though.
>
>Ken Bloomquist
>Sr. Principal Process Engineer
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Date: Wed, 20 Mar 2002 15:26:24 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Alan Berni <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Alan Berni <[log in to unmask]>
Subject: Re: Bar-code / printing
X-To: [log in to unmask]
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Peter,
Try http://www.symbol.com
or
Symbol Technologies, Inc.
Canada sales office at 905-629-7226
Good Luck,
Alan Berni
>>> [log in to unmask] 03/19/02 12:41PM >>>
Hi all, got a manufacturing question...
I am looking for soft-ware that can handle the following situation:
Operator scans product and places into box. - Label automatically / =
manually
prints with product bar-code and product description. Operator places =
label
on small box.
Operator places box and other boxes of different contents into larger box. =
-
A final label automatically / manually prints with bar-codes and / or list
of contents of all boxes inside.
The customer & product information would be sourced from a Dbase like
Oracle.
Anyone have close to this type of system at their facility?
Peter Crain
Manufacturing Engineering Technologist
Substation Automation Solutions
General Electric Canada Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7 CANADA
Tel: 403.214.4560 Dialcomm: 8.498.4560, Fax: 403.214.4776
Website: www.gepower.com/geharrisenergy/=20
NOTICE: The information contained in this e-mail is privileged, confidentia=
l
and intended solely for the use of the addressee named above. If the =
reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.
---------------------------------------------------------------------------=
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Date: Wed, 20 Mar 2002 15:40:36 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Chris Almeras <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Chris Almeras <[log in to unmask]>
Subject: Re: Quick turn fab shop
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Diversified Systems in Indianapolis has a web site www.divsys.com.
=20
Chris Almeras
DSI
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 9:07 AM
To: [log in to unmask]
Subject: [TN] Quick turn fab shop
Hi all
=20
=20
Can anyone out there suggest or give recommendations on a good quality
quick turn fab shop.=20
Greatly appreciate any suggestions.
------_=_NextPart_001_01C1D04F.7D33B3FE
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<BODY>
<DIV><SPAN class=3D618113920-20032002><FONT face=3DArial color=3D#0000ff =
size=3D2>Diversified Systems in Indianapolis has a web site <A=20
href=3D"http://www.divsys.com">www.divsys.com</A>.</FONT></SPAN></DIV>
<DIV><SPAN class=3D618113920-20032002><FONT face=3DArial color=3D#0000ff =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D618113920-20032002><FONT face=3DArial color=3D#0000ff =
size=3D2>Chris=20
Almeras</FONT></SPAN></DIV>
<DIV><SPAN class=3D618113920-20032002><FONT face=3DArial color=3D#0000ff =
size=3D2>DSI</FONT></SPAN></DIV>
<BLOCKQUOTE dir=3Dltr style=3D"MARGIN-RIGHT: 0px">
<DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> Mauro, Dan=20
[mailto:[log in to unmask]]<BR><B>Sent:</B> Wednesday, March 20, 2002 =
9:07=20
AM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] Quick turn =
fab=20
shop<BR><BR></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D254530514-20032002>Hi=20
all</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D254530514-20032002>Can =
anyone out=20
there suggest or give recommendations on a good quality quick turn fab =
shop.=20
</SPAN></FONT></DIV>
<P><FONT face=3DArial size=3D2><SPAN =
class=3D254530514-20032002>Greatly appreciate=20
any suggestions.</SPAN></FONT></P></BLOCKQUOTE></BODY></HTML>
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Date: Wed, 20 Mar 2002 15:55:01 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McMullen, Kerry" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McMullen, Kerry" <[log in to unmask]>
Subject: Re: PGA to SMT sockets...
X-To: "[log in to unmask]" <[log in to unmask]>
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Hi Steve,
I would suggest you stay away from that type of socket. Try Advanced
Interconnect. Their socket has balls instead of machined pins. Tends to
work a lot better for us.
We use them when we know a die will be respinning and we want to try a few
new ones out quickly before we place a whole lot of BGA's directly to a PCB.
As far as reflow profile......... we use the same as what the board
normally has if we are going to place say 10 - 20 of the sockets.
As far a pad size. We use the same dia pad as the ball.
We use Circuit Tech (Jeff Ferry's place) to place the socket for us in small
lots or quick turn. We also use them to mount the new BGA to the adapter
that will plug into the socket.
Hope this helps,
Kerry
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 3:06 PM
To: [log in to unmask]
Subject: [TN] PGA to SMT sockets...
Hi all!
Got a fresh new beast to deal with that I've never seen before...a
PGA-to-SMT socket. When you look at the board, it looks like a BGA would go
there, but actually
it's a PGA socket that is soldered to SMT pads...this is a fairly dense
socket, 50-mil spacing. The history is that the yeilds are terrible, and
99.9% of the time when the assembly doesn't play, it's a solder issue with
the sockets.
I've looked closely at these sockets, and they're not very precise. The pins
are strange too. Each pin is about .145" long, .038" diameter, and have a
little .018" diameter, .005" long nub machined into the end of each
pin...this is what sits on the SMT pad and is soldered to. All the pins are
inserted into a 1-inch square, .062" thick FR4 substrate to form the socket.
Go to:
http://www.stevezeva.homestead.com
To get a look at what I'm about to deal with...I've noticed some coplanarity
issues with the pins too. I've got some ideas to try and deal with that. But
have any of you ever dealt with these little "jewels"? Got any tips?
By the way, these sockets MUST be used, no choice...
-Steve Gregory-
------_=_NextPart_001_01C1D051.80A0BA30
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charset="iso-8859-1"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
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<META content="MSHTML 5.50.4522.1800" name=GENERATOR></HEAD>
<BODY>
<DIV><SPAN class=810475620-20032002><FONT face=Arial color=#0000ff size=2>Hi
Steve,</FONT></SPAN></DIV>
<DIV><SPAN class=810475620-20032002><FONT face=Arial color=#0000ff size=2>I
would suggest you stay away from that type of socket. Try Advanced
Interconnect. Their socket has balls instead of machined pins. Tends
to work a lot better for us.</FONT></SPAN></DIV>
<DIV><SPAN class=810475620-20032002><FONT face=Arial color=#0000ff size=2>We use
them when we know a die will be respinning and we want to try a few new ones out
quickly before we place a whole lot of BGA's directly to a PCB.
</FONT></SPAN></DIV>
<DIV><SPAN class=810475620-20032002><FONT face=Arial color=#0000ff size=2>As far
as reflow profile......... we use the same as what the board normally has
if we are going to place say 10 - 20 of the sockets.</FONT></SPAN></DIV>
<DIV><SPAN class=810475620-20032002><FONT face=Arial color=#0000ff size=2>As far
a pad size. We use the same dia pad as the ball.</FONT></SPAN></DIV>
<DIV><SPAN class=810475620-20032002><FONT face=Arial color=#0000ff size=2>We use
Circuit Tech (Jeff Ferry's place) to place the socket for us in small lots or
quick turn. We also use them to mount the new BGA to the adapter that will
plug into the socket.</FONT></SPAN></DIV>
<DIV><SPAN class=810475620-20032002><FONT face=Arial color=#0000ff size=2>Hope
this helps,</FONT></SPAN></DIV>
<DIV><SPAN class=810475620-20032002><FONT face=Arial color=#0000ff
size=2>Kerry</FONT> </SPAN></DIV>
<DIV><SPAN class=810475620-20032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<BLOCKQUOTE>
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> [log in to unmask]
[mailto:[log in to unmask]]<BR><B>Sent:</B> Wednesday, March 20, 2002 3:06
PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] PGA to SMT
sockets...<BR><BR></FONT></DIV><FONT face=arial,helvetica><FONT size=2>Hi all!
<BR><BR>Got a fresh new beast to deal with that I've never seen before...a
PGA-to-SMT socket. When you look at the board, it looks like a BGA would go
there, but actually <BR>it's a PGA socket that is soldered to SMT pads...this
is a fairly dense socket, 50-mil spacing. The history is that the yeilds are
terrible, and 99.9% of the time when the assembly doesn't play, it's a solder
issue with the sockets. <BR><BR>I've looked closely at these sockets, and
they're not very precise. The pins are strange too. Each pin is about .145"
long, .038" diameter, and have a little .018" diameter, .005" long nub
machined into the end of each pin...this is what sits on the SMT pad and is
soldered to. All the pins are inserted into a 1-inch square, .062" thick FR4
substrate to form the socket. Go to:
<BR><BR>http://www.stevezeva.homestead.com <BR><BR>To get a look at what I'm
about to deal with...I've noticed some coplanarity issues with the pins too.
I've got some ideas to try and deal with that. But have any of you ever dealt
with these little "jewels"? Got any tips? <BR><BR>By the way, these sockets
MUST be used, no choice... <BR><BR>-Steve Gregory-</FONT>
</FONT></BLOCKQUOTE></BODY></HTML>
------_=_NextPart_001_01C1D051.80A0BA30--
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Date: Wed, 20 Mar 2002 15:00:39 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Scott Kauling <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Scott Kauling <[log in to unmask]>
Organization: Tri-onics, Inc.
Subject: Card Edge Connector
We are inserting a backplane board with gold fingers into a mother board with three connectors to accept the gold fingers.
Is anyone out there that has heard of, or is using some sort of lubricant to insert boards into such connectors?
If you are what are you using?
SCOTT
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Date: Wed, 20 Mar 2002 16:09:23 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: PWB PACKAGING
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hello Technet, here's a simple question... What are your requirements for
packaging PWBs when shipped from your board supplier? We require that
boards are individually wrapped in corrosion inhibiting paper, then placed
in a zip-lock ESD bag. Multiple sealed bags containing the individual
boards then get placed in another sealable bag along with a desiccant and
humidity indicator, then sealed. Is this asking for too much?
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
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Date: Wed, 20 Mar 2002 16:41:21 -0500
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Gerard O'Brien <[log in to unmask]>
Subject: Re: FW: shelve life of pwb's
X-To: Lupita Roberts <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
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Suzanne - as part of a long term real time shelf, I have tested quite a few
of the white tins out there. In all cases the solderability has easily
passed the six months shelf life - in one case the test group is over 700
days on a shelf in my lab with no protection and still soldering. It should
be noted that these samples when manufactured did not have any Stannic Oxide
present (as measured by SERA)in the deposit, one of the major causes for
solderability problems with this type of surface finish, similarly the
presence of sulfur from the catalyst breakdown was also not present. So to
cut to the chase - you will have no problems with 6 months shelf life for
immersion tin (under normal board storage conditions) if the deposit is
"clean".If you have stannic oxide present or sulfur then its all over.
Regards
Gerard O'Brien
Photocircuits Corporation
-----Original Message-----
From: Lupita Roberts [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 11:34 AM
To: [log in to unmask]
Subject: [TN] FW: shelve life of pwb's
I am wondering if anyone can help me with the shelve life of raw
PWB's. I was experiencing solderability issues and oxidation issues
with some boards. I was told by several suppliers that White Tin only
has a shelve life of 6 months and they were not warrantied beyond that
point. I have been unsuccessful in trying to find data in regards to
this issue.
Suzanne Foulkes
QC Supervisor
Inservco Inc.
LaGrange, Ohio 44050
[log in to unmask]
[log in to unmask]
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Date: Wed, 20 Mar 2002 15:36:50 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Quick turn fab shop
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Steve makes some good points (must that good Navy training). Another thing
to find out is what their cleaning process is. I have seen boards from
several quick-turn prototype houses and one of the points they shortcut to
save time is post-HASL or post-plating cleaning. Warning flags should be
cleaning with water only. Red warning flags if using tap water. Neon
glowing red warning flags if cold tap water. You get the idea. Also look
at the flow rates through the cleaning process. 4-8 feet per minute good.
20 feet per minute, be alarmed. They might be optimized for these flow
rates, but color me skeptical.
One quick test you can do to see if they gave you a cheap solder mask.
Take two boards, scrap from the same run is OK. Run one through your ionic
cleanliness tester (or ion chromatography if you have it). Run the second
scrap over the wave solder with no flux added and do the same test. If you
see dramatically higher ionic readings in the second sample, the mask
likely has absorbed residues you don't want. If you are doing engineering
builds, you may be tuning your circuits around the parasitic values
represented by those residues, that won't appear in good production boards.
It has happened (errr, elsewhere of course).
Doug Pauls
Rockwell Collins
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Date: Wed, 20 Mar 2002 23:04:31 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Naisbitt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Naisbitt <[log in to unmask]>
Subject: Re: Contamination
X-To: Brian Ellis <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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Techies,
I know this to be a late posting but, according to the gospel of St Brian of
Cyprus - be careful with your bristles!
Regards Graham Naisbitt
[log in to unmask] <mailto:[log in to unmask]>
Concoat Limited
Alasan House, Albany Park
Camberley GU16 7PH - UK
www.concoat.co.uk <http://www.concoat.co.uk>
Phone: +44 1276 691100
Fax: +44 1276 691227
Mobile: +44 79 6858 2121
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Brian Ellis
> Sent: 19 March 2002 08:26
> To: [log in to unmask]
> Subject: Re: [TN] Contamination
>
>
> Ted
>
> I agree with St. Doug but ther may be some other steps you will find
> useful. Corrosion products are usually a mixture of soluble salts, like
> copper chloride, and insoluble ones, like carbonates, oxides and
> hydroxides, as well as a gunge of the original contamination. The first
> thing I would do is to immerse the products in a 2 - 3% solution of
> hydrochloric acid at, say, 40deg C. This will dissolve away the soluble
> and much of the insoluble corrosion products (a little brushing with a
> nylon-bristles brush will aid the process). I would then suggest a
> proprietary neutraliser (of the type used as a rinse-aid after soldering
> with water-soluble fluxes) containing the disodium salt of EDTA. This
> will help to chelate any remaining metal salts, especially the
> relatively insoluble lead ones. Finally, I would give them a saponifier
> wash, to make sure that all of the original flux residues are removed,
> followed by a damned good rinse cycle, ending with DI water.
>
> At this stage, you can be reasonably sure no corrosion-causing chemistry
> remains on the assembly and it will be possible to evaluate the damage
> and whether the assembly is usable/repairable/throw-awayable. Be
> particularly cautious where there are noble metals: gold-plated kovar
> leads, for example, are notorious for promoting stress corrosion on
> bends and I've seen cases where the kovar has been completely eaten away
> and the component is held on by the gold plating!
>
> Oh, BTW, your solder joints will appear matt after this treatment, but
> this does not matter: they will be perfectly OK from the chemical,
> metallurgical and mechanical points of view. It is purely a cosmetic
> dulling.
>
> Just as an additional precaution, in view of their history, I think I'd
> be inclined to give these assemblies a spray of an acrylic conformal
> coating, but this won't be strictly necessary if they meet the testing
> that Doug advocates.
>
> Brian
>
> Ted Tontis wrote:
> >
> > We have a number of PWB's that show signs of contamination,
> > management wants to find out if there is a way to clean the
> boards. I have
> > told them once the corrosion starts there is no way to clean
> the assemblies
> > and make them dependable enough to cover our warranty. Some of
> the boards
> > show slight contamination and some more aggressive, but these
> have been in a
> > controlled environment for some time. I feel If we where to
> send them out in
> > a industrial environment the corrosion would rapidly increases.
> These boards
> > are FR-4 and not conformal coated. Am I correct on this?
> >
> > Thank you,
> >
> > Ted Tontis C.I.D.
> > Engage Networks, Inc.
> > 1320 N. Dr. Martin Luther King Jr. Drive
> > River Level
> > Milwaukee, WI 53212
> > PH 414-918-4267
> > FX 414-273-7601
> >
> >
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Date: Wed, 20 Mar 2002 23:09:19 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Naisbitt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Naisbitt <[log in to unmask]>
Subject: Re: Conformal Coating BGA's
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Dave
Any chance I could have a copy of that please?
Regards Graham Naisbitt
[log in to unmask] <mailto:[log in to unmask]>
Concoat Limited
Alasan House, Albany Park
Camberley GU16 7PH - UK
www.concoat.co.uk <http://www.concoat.co.uk>
Phone: +44 1276 691100
Fax: +44 1276 691227
Mobile: +44 79 6858 2121
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Dave Hillman
> Sent: 20 March 2002 14:15
> To: [log in to unmask]
> Subject: Re: [TN] Conformal Coating BGA's
>
>
> Hi Bruce! We are routinely putting acrylic conformal coating over plastic
> BGA components without using underfill for avionics use environments. We
> did a fair amount of testing looking both at paraylene and acrylic prior
> implementation. This work was published at the IPC APEX 2000 Conference in
> Long Beach (the paper title was "An Investigation of the Effects
> of Printed
> Wiring Board Surface Finish and Conformal Coating for Ball Grid Array
> Assembly"). Can you expand on your concern of "entrapped air"? We have not
> seen any issues for that topic after 2 years of production experience.
>
> Dave Hillman
> Rockwell Collins
> [log in to unmask]
>
>
>
>
> "Misner, Bruce" <[log in to unmask]>@ipc.org> on 03/19/2002 01:48:38 PM
>
> Please respond to "TechNet E-Mail Forum." <[log in to unmask]>;
> Please respond
> to "Misner, Bruce" <[log in to unmask]>
>
> Sent by: TechNet <[log in to unmask]>
>
>
> To: [log in to unmask]
> cc:
>
> Subject: [TN] Conformal Coating BGA's
>
>
> My question of the day: Is anyone conformal coating (not parylene) plastic
> BGA's on FR-4 in Hi-Rel applications (aircraft; -20 to +71C ambient
> operating temperature requirement) without benefit of an
> underfil? If yes,
> has entrapped air been a major issue? Anyone care to comment on this
> approach?
>
> Regards,
> Bruce Misner
>
> ------------------------------------------------------------------
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> ------------------------------------------------------------------
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>
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Date: Thu, 21 Mar 2002 10:13:04 +1100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Colin Weber <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Colin Weber <[log in to unmask]>
Subject: PBGA & Predicting Stresses
X-To: [log in to unmask]
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; format=flowed
Folks,
Could you assist with any information or white papers that can help us
determine
what stresses can appear at a PBGA , and at it's solder joints, on a
1.6mm-8layer
FR4 board.
While we are attempting to keep board size as small as practible and position
of the 388 pin AMD PBGA, in consideration of several methods of mounting the
PCB we are interested in trying to predict the level of stresses that can be
tolerated so we can tailor our metal work to allow for them. Also, we have
designed to AMD's specification for Solder Mask Defined pads for this ElanSC520
PBGA and I believe this pad design is more susceptible to stress at the joints.
Regards,
Colin Weber
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Date: Thu, 21 Mar 2002 08:25:53 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Juan Li <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Juan Li <[log in to unmask]>
Subject: 3/3mil tolerance
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
As the circuitry width become finer (3/3 mil, 2.5/2.5mil), I would like to know
whether the line width tolerance got new specification or not.
For PCB, the general IPC standard is 20% of circuitry width. Let's say
circuitry width 6mil got +30um tolerance. If circuitry width 3mil, do we still
use 20% of circuitry width as the specification. Does IPC have the new
specification for fine lines? Or from the PCB design point of view, what should
be the general tolerance for 3/3mil and 2.5/2.5mil?
Wish your helpful information!
Best regards!
Li Juan
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Date: Wed, 20 Mar 2002 20:04:29 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: PGA to SMT sockets...
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_b9.1d8b4f19.29ca8b9d_boundary"
--part1_b9.1d8b4f19.29ca8b9d_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
Hi Kerry,
This isn't a BGA socket, but actually a Pin Grid Array (PGA) socket that is
mounted to the board to surface mount pads that looks like a BGA footprint.
This socket must be used due to the pin design that will accept a through
hole Pin Grid Array device.
I've never seen anything like it before...got some new material for my
dreams...errr, I mean nightmares...hehehe.
Did one experiment today trying out a few things...placed and soldered one,
it didn't look too shabby! The real test is tomorrow....
I think I'm seeing some light at the end of the tunnel...or is that the
headlight from the train heading towards me?
-Steve Gregory-
> Hi Steve,
> I would suggest you stay away from that type of socket. Try Advanced
> Interconnect. Their socket has balls instead of machined pins. Tends to
> work a lot better for us.
> We use them when we know a die will be respinning and we want to try a few
> new ones out quickly before we place a whole lot of BGA's directly to a
> PCB.
> As far as reflow profile......... we use the same as what the board
> normally has if we are going to place say 10 - 20 of the sockets.
> As far a pad size. We use the same dia pad as the ball.
> We use Circuit Tech (Jeff Ferry's place) to place the socket for us in
> small lots or quick turn. We also use them to mount the new BGA to the
> adapter that will plug into the socket.
> Hope this helps,
> Kerry
>
--part1_b9.1d8b4f19.29ca8b9d_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Kerry,<BR>
<BR>
This isn't a BGA socket, but actually a Pin Grid Array (PGA) socket that is mounted to the board to surface mount pads that looks like a BGA footprint. This socket must be used due to the pin design that will accept a through hole Pin Grid Array device.<BR>
<BR>
I've never seen anything like it before...got some new material for my dreams...errr, I mean nightmares...hehehe.<BR>
<BR>
Did one experiment today trying out a few things...placed and soldered one, it didn't look too shabby! The real test is tomorrow....<BR>
<BR>
I think I'm seeing some light at the end of the tunnel...or is that the headlight from the train heading towards me?<BR>
<BR>
-Steve Gregory-<BR>
<BR>
</FONT><FONT COLOR="#0000ff" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Hi Steve,</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#0000ff" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">I would suggest you stay away from that type of socket. Try Advanced Interconnect. Their socket has balls instead of machined pins. Tends to work a lot better for us.</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#0000ff" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">We use them when we know a die will be respinning and we want to try a few new ones out quickly before we place a whole lot of BGA's directly to a PCB. </FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#0000ff" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">As far as reflow profile......... we use the same as what the board normally has if we are going to place say 10 - 20 of the sockets.</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#0000ff" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">As far a pad size. We use the same dia pad as the ball.</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#0000ff" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">We use Circuit Tech (Jeff Ferry's place) to place the socket for us in small lots or quick turn. We also use them to mount the new BGA to the adapter that will plug into the socket.</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#0000ff" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">Hope this helps,</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#0000ff" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">Kerry</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"> <BR>
</BLOCKQUOTE><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT></HTML>
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Date: Thu, 21 Mar 2002 00:19:40 +0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Martyn Gaudion <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Martyn Gaudion <[log in to unmask]>
Subject: Re: 3/3mil tolerance
X-To: Juan Li <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
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Hi Li,
I guess it depends on the application, as lines get finer
some backplanes have an issue with series resistance.
Also if circuitry is impedance controlled you should
graph the impedance variation with your min and max tolerance
and ensure it remains in acceptable limits for your customer.
Kind regards
Martyn Gaudion
www.polarinstruments.com
At 08:25 21/03/2002 +0800, you wrote:
>As the circuitry width become finer (3/3 mil, 2.5/2.5mil), I would like to
>know
>whether the line width tolerance got new specification or not.
>For PCB, the general IPC standard is 20% of circuitry width. Let's say
>circuitry width 6mil got +30um tolerance. If circuitry width 3mil, do we
>still
>use 20% of circuitry width as the specification. Does IPC have the new
>specification for fine lines? Or from the PCB design point of view, what
>should
>be the general tolerance for 3/3mil and 2.5/2.5mil?
>
>Wish your helpful information!
>
>Best regards!
>Li Juan
>
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Date: Wed, 20 Mar 2002 22:18:12 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: PGA to SMT sockets...
MIME-Version: 1.0
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Is this that rare? Whoo Boy! I guess I'm really on my own...gonna figure out
something though....
Guess I'm a new guy...
-Steve Gregory-
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Date: Wed, 20 Mar 2002 23:13:41 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Shirley Xiao <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Shirley Xiao <[log in to unmask]>
Subject: Tiny black spots on copper foil surface
MIME-Version: 1.0
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Dear All:
We encountered a problem after develop, etch & strip.
Lots of tiny black spots were found on copper surface.
We are sure that these tiny black spots are not
oxidization.They can not be removed by acetone but is
removable by micro etch.Before get result by EDX
element analysis, I wish anyone have similar
experience can share some information with me.
__________________________________________________
Do You Yahoo!?
Yahoo! Movies - coverage of the 74th Academy Awards®
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Date: Thu, 21 Mar 2002 09:18:53 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Eric Dawson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Eric Dawson <[log in to unmask]>
Subject: Re: PGA to SMT sockets...
X-To: [log in to unmask]
MIME-Version: 1.0
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Hi Steve,
I worked on the development of something like this a while ago. We chose
pins that could 'float' by about 20 thou (mils) and the ends to be soldered
were rounded. The floating allowed for coplanarity issues and the rounded
ends allowed a deeper solder joint. We didn't make many but they soldered
OK.
By the way, the light in the tunnel is probably some blighter with a torch
bringing you more work!
Regards
Eric Dawson
> -----Original Message-----
> From: [log in to unmask] [SMTP:[log in to unmask]]
> Sent: Thursday, March 21, 2002 1:04 AM
> To: [log in to unmask]
> Subject: Re: [TN] PGA to SMT sockets...
>
> Hi Kerry,
>
> This isn't a BGA socket, but actually a Pin Grid Array (PGA) socket that
> is mounted to the board to surface mount pads that looks like a BGA
> footprint. This socket must be used due to the pin design that will accept
> a through hole Pin Grid Array device.
>
> I've never seen anything like it before...got some new material for my
> dreams...errr, I mean nightmares...hehehe.
>
> Did one experiment today trying out a few things...placed and soldered
> one, it didn't look too shabby! The real test is tomorrow....
>
> I think I'm seeing some light at the end of the tunnel...or is that the
> headlight from the train heading towards me?
>
> -Steve Gregory-
>
>
>
> Hi Steve,
> I would suggest you stay away from that type of socket. Try
> Advanced Interconnect. Their socket has balls instead of machined pins.
> Tends to work a lot better for us.
> We use them when we know a die will be respinning and we want to try
> a few new ones out quickly before we place a whole lot of BGA's directly
> to a PCB.
> As far as reflow profile......... we use the same as what the board
> normally has if we are going to place say 10 - 20 of the sockets.
> As far a pad size. We use the same dia pad as the ball.
> We use Circuit Tech (Jeff Ferry's place) to place the socket for us
> in small lots or quick turn. We also use them to mount the new BGA to the
> adapter that will plug into the socket.
> Hope this helps,
> Kerry
>
>
>
>
>
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Date: Thu, 21 Mar 2002 08:28:47 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Tempea, Ioan" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Tempea, Ioan" <[log in to unmask]>
Subject: Re: Card Edge Connector
MIME-Version: 1.0
Content-Type: text/plain
Hi Scott,
I'm not familiar with lubricants, but I think you are trying to fix a poor
design. Why do you need 3 connectors? It's pretty hard to have the
parallelism and the position tolerance controlled for 2 connectors. With
three you go from line into plane, a lot harder to controll.
If you have an option, have the board re-designed for a single connector
that matches the gold finger pattern of your backplane.
Just a thought,
Ioan
> -----Original Message-----
> From: Scott Kauling [SMTP:[log in to unmask]]
> Sent: Wednesday, March 20, 2002 4:01 PM
> To: [log in to unmask]
> Subject: [TN] Card Edge Connector
>
> We are inserting a backplane board with gold fingers into a mother board
> with three connectors to accept the gold fingers.
>
> Is anyone out there that has heard of, or is using some sort of lubricant
> to insert boards into such connectors?
>
> If you are what are you using?
>
> SCOTT
>
> --------------------------------------------------------------------------
> -------
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> --------------------------------------------------------------------------
> -------
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Date: Thu, 21 Mar 2002 07:57:43 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: PGA to SMT sockets...
Mime-Version: 1.0
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Haven't seen this but it is very interesting. The copolarnarity of the =
pins is scary though. Did you find the difference in the pin gap make a =
difference when pasted and reflowed? Is it possible to see a post reflow =
xray?=20
Kathy=20
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<BODY style="MARGIN-TOP: 2px; FONT: 10pt MS Sans Serif; MARGIN-LEFT: 2px">
<DIV>Haven't seen this but it is very interesting. The copolarnarity of
the pins is scary though. Did you find the difference in the pin gap make
a difference when pasted and reflowed? Is it possible to see a post reflow
xray? </DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
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Date: Thu, 21 Mar 2002 09:09:56 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jeff Ferry <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jeff Ferry <[log in to unmask]>
Subject: Re: PGA to SMT sockets...
X-To: "[log in to unmask]" <[log in to unmask]>
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Steve,
Haven't seen this exact socket before, but have worked on a few projects
that look similar. Certainly must defer to the "man on the scene", but from
this view point, seem like the more solder, the better. If you can't easily
add paste to the pads with a screen I'd load up the pin tips with extra
solder. If you need a screen to add paste I may have a few to send out to
ya.
Gooood Luck,
Jeff Ferry
CEO
Circuit Technology Center, Inc.
www.circuittechctr.com
[log in to unmask]
978-374-5000
Sign up for our Free E-mail Newsletter at:
www.circuittechctr.com/general/free_email.htm
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 3:06 PM
To: [log in to unmask]
Subject: [TN] PGA to SMT sockets...
Hi all!
Got a fresh new beast to deal with that I've never seen before...a
PGA-to-SMT socket. When you look at the board, it looks like a BGA would go
there, but actually
it's a PGA socket that is soldered to SMT pads...this is a fairly dense
socket, 50-mil spacing. The history is that the yeilds are terrible, and
99.9% of the time when the assembly doesn't play, it's a solder issue with
the sockets.
I've looked closely at these sockets, and they're not very precise. The pins
are strange too. Each pin is about .145" long, .038" diameter, and have a
little .018" diameter, .005" long nub machined into the end of each
pin...this is what sits on the SMT pad and is soldered to. All the pins are
inserted into a 1-inch square, .062" thick FR4 substrate to form the socket.
Go to:
http://www.stevezeva.homestead.com
To get a look at what I'm about to deal with...I've noticed some coplanarity
issues with the pins too. I've got some ideas to try and deal with that. But
have any of you ever dealt with these little "jewels"? Got any tips?
By the way, these sockets MUST be used, no choice...
-Steve Gregory-
------_=_NextPart_001_01C1D0E2.141A9FC0
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charset="iso-8859-1"
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<BODY>
<DIV><SPAN class=440470314-21032002><FONT size=2>Steve,</FONT></SPAN></DIV>
<DIV><SPAN class=440470314-21032002><FONT size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=440470314-21032002><SPAN class=730365913-21032002><FONT
size=2>Haven't seen this exact socket before, but have worked on a few
projects that look similar. Certainly must defer to the "man on the scene",
but from this view point, seem like the more solder, the better. If
you can't easily add paste to the pads with a screen I'd load up
the pin tips with extra solder. If you need a screen to add paste I may have a
few to send out to ya.</FONT></SPAN></SPAN></DIV>
<DIV><SPAN class=440470314-21032002><SPAN class=730365913-21032002><FONT
size=2></FONT></SPAN></SPAN> </DIV>
<DIV><SPAN class=440470314-21032002><SPAN class=730365913-21032002><FONT
size=2>Gooood Luck,</FONT></SPAN></SPAN></DIV>
<DIV><SPAN class=440470314-21032002><SPAN class=730365913-21032002><FONT size=2>
<P><FONT size=2>Jeff Ferry<BR>CEO<BR>Circuit Technology Center,
Inc.<BR>www.circuittechctr.com<BR>[log in to unmask]<BR>978-374-5000<BR><BR>Sign
up for our Free E-mail Newsletter
at:<BR>www.circuittechctr.com/general/free_email.htm<BR></FONT></P></FONT></SPAN></SPAN></DIV>
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> [log in to unmask]
[mailto:[log in to unmask]]<BR><B>Sent:</B> Wednesday, March 20, 2002 3:06
PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] PGA to SMT
sockets...<BR><BR></FONT></DIV><FONT face=arial,helvetica><FONT size=2>Hi all!
<BR><BR>Got a fresh new beast to deal with that I've never seen before...a
PGA-to-SMT socket. When you look at the board, it looks like a BGA would go
there, but actually <BR>it's a PGA socket that is soldered to SMT pads...this is
a fairly dense socket, 50-mil spacing. The history is that the yeilds are
terrible, and 99.9% of the time when the assembly doesn't play, it's a solder
issue with the sockets. <BR><BR>I've looked closely at these sockets, and
they're not very precise. The pins are strange too. Each pin is about .145"
long, .038" diameter, and have a little .018" diameter, .005" long nub machined
into the end of each pin...this is what sits on the SMT pad and is soldered to.
All the pins are inserted into a 1-inch square, .062" thick FR4 substrate to
form the socket. Go to: <BR><BR>http://www.stevezeva.homestead.com <BR><BR>To
get a look at what I'm about to deal with...I've noticed some coplanarity issues
with the pins too. I've got some ideas to try and deal with that. But have any
of you ever dealt with these little "jewels"? Got any tips? <BR><BR>By the way,
these sockets MUST be used, no choice... <BR><BR>-Steve Gregory-</FONT>
</FONT></BODY></HTML>
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Date: Thu, 21 Mar 2002 14:27:48 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Braime, Justin" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Braime, Justin" <[log in to unmask]>
Subject: BGA reballing
MIME-Version: 1.0
Content-Type: text/plain
Hi guys,
I am looking at using the SolderQuik preforms for reballing some BGAs, but I
am concerned about the reliability of this process in terms of the number of
thermal cycles being sustained by the BGA component. Does anybody know of
any studies done on this?
Thanks
Justin Braime
Senior Production Engineer
Racal Instruments Ltd
480 Bath Rd, Slough
Berkshire, SL1 6BE
England
Tel: +44 (0)1628 604455
Fax: +44 (0)1628 662017
E-mail: [log in to unmask]
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Date: Thu, 21 Mar 2002 08:56:22 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Franklin D Asbell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Franklin D Asbell <[log in to unmask]>
Subject: Re: PWB PACKAGING
X-To: "Marsico, James" <[log in to unmask]>
MIME-Version: 1.0
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WOW...And you pay an additional 10% for the boards???
James,
It should depend on the application, certainly a standard HASL board does
not need that degree of packaging protection, for Entek, immersion tin, etc,
this may be feasable. Other considerations are how soon before the boards
will be used? You don't need to hermetically seal them if they are headed
straight from the dock to the assembly line...you might however, need that
degree of protection if they are going to an outdoor assembly shop on some
south pacific island...located on the beach, in the summertime...
It all depends on the application, surface finish, storage facility,
assembler...etc etc etc...
Question...your placing the desiccant pack in the outer package instead of
in the package containing the board??? Does this buy you anything? I would
think the desiccant pack would be more effective in the package containing
the board you do not want moisture around...hmmmm...
Franklin
----- Original Message -----
From: "Marsico, James" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, March 20, 2002 3:09 PM
Subject: [TN] PWB PACKAGING
> Hello Technet, here's a simple question... What are your requirements for
> packaging PWBs when shipped from your board supplier? We require that
> boards are individually wrapped in corrosion inhibiting paper, then placed
> in a zip-lock ESD bag. Multiple sealed bags containing the individual
> boards then get placed in another sealable bag along with a desiccant and
> humidity indicator, then sealed. Is this asking for too much?
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
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Date: Thu, 21 Mar 2002 08:04:00 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: e-mail
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
I received an e-mail From:Leading Edge Devices ([log in to unmask]) with the
Subject: Must see at IPC containing 5 image attachments and 1 untitled
attachment. With all the BS viruses going around I immediately hit DELETE.
Anyone out there aware of this?
Rick Howieson
Delta Group Electronics, Inc.
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Date: Thu, 21 Mar 2002 10:19:23 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bissonnette, Jean-Francois" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bissonnette, Jean-Francois" <[log in to unmask]>
Subject: Dendrites growth
MIME-Version: 1.0
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Is conformal coating a good protection against dendrites? I read that=20
ionic contamination can cause dendrites, if a board has ionic contamination,
will conformal coating prevent dendrites?
Jean-Fran=E7ois Bissonnette
V=E9rificateur, Contr=F4le de la Qualit=E9
=C9lectronique
Produits et Proc=E9d=E9s
Vapor Rail Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 x2021
(514) 335-4231 fax
<<Bissonnette, Jean-Francois.vcf>>=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally privileged and=
confidential information intended only for the use of the individual or en=
tity named herein. If the reader of this transmission is not the intended r=
ecipient, you are hereby notified that any dissemination, distribution, or =
copying of this transmission is strictly prohibited.
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Date: Thu, 21 Mar 2002 11:55:59 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Collins <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Collins <[log in to unmask]>
Subject: Re: Dendrites growth
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Jean-Francois
As St. Doug will likely say, "depends". Depends on how much ionic =
contamination, what voltage potential is present, and what you are doing =
with the board. It's my understanding that a coating may slow dendrite =
growth, all other factors being equil, but the only way to prevent =
dendrites is to avoid at least one of the holy trinity of dendrite growth =
(contamination, voltage, moisture).
The best protection - a clean board. If the end use environment is what =
is contaminating the boards, then yes - a coating would be a good =
protection. But as a bandaid solution, not good.
regards
Graham Collins
Process Engineer,=20
Northrop Grumman
Atlantic Facility of Litton Systems Canada
(902) 873-2000 ext 6215
>>> [log in to unmask] 03/21/02 11:19AM >>>
Is conformal coating a good protection against dendrites? I read that=20
ionic contamination can cause dendrites, if a board has ionic contamination=
,
will conformal coating prevent dendrites?
Jean-Fran=E7ois Bissonnette
V=E9rificateur, Contr=F4le de la Qualit=E9
=C9lectronique
Produits et Proc=E9d=E9s
Vapor Rail Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 x2021
(514) 335-4231 fax
<<Bissonnette, Jean-Francois.vcf>>=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally privileged =
and confidential information intended only for the use of the individual =
or entity named herein. If the reader of this transmission is not the =
intended recipient, you are hereby notified that any dissemination, =
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Date: Thu, 21 Mar 2002 16:57:21 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Peter Swanson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Peter Swanson <[log in to unmask]>
Subject: Re: BGA reballing
X-To: "Braime, Justin" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Justin,
A good question. Number of BGA reflow steps:
1) Initial placement
2) Removal from pcb
3) Reball
4) Replacement on pcb
4 temp excursions. When this issue has been brought up before in this forum,
I do not believe that a written spec for the maximum number of reflow cycles
of a BGA was ever found. The specific part manufacturer might state
something... There was a rumour that Motorola specified 3 reflow cycles for
its parts, but I never saw anything in writing, and this may be an "urban
myth".
In the TechNet archives there is an e-mail from Axiom Electronics stating
"In all of the parts we have removed, reballed, and replaced, we have not
seen damage due to numerous reflow cycles." This was in 1996 tho... (Message
no 005489). There may be more info there.
It would be important to strictly observe the baking requirements as
determined by the moisture sensitivity level of the device. The reflow
cycles should all be to the correct profiles to minimise thermal shock, etc.
Declaring a commercial interest (as we sell this product), no customer has
reported issues to us.
I would be interested to hear further views!
Regards,
Peter
--
=========================================================
Peter Swanson [log in to unmask]
INTERTRONICS http://www.intertronics.co.uk
INTERTRONICS is dedicated to providing quality material,
consumable and equipment solutions to the electronics
manufacturing and other technology based industries, with
the highest levels of technical support and customer
service.
-----Original Message-----
From: Braime, Justin [mailto:[log in to unmask]]
Sent: 21 March 2002 14:28
To: [log in to unmask]
Subject: [TN] BGA reballing
Hi guys,
I am looking at using the SolderQuik preforms for reballing some BGAs, but I
am concerned about the reliability of this process in terms of the number of
thermal cycles being sustained by the BGA component. Does anybody know of
any studies done on this?
Thanks
Justin Braime
Senior Production Engineer
Racal Instruments Ltd
480 Bath Rd, Slough
Berkshire, SL1 6BE
England
Tel: +44 (0)1628 604455
Fax: +44 (0)1628 662017
E-mail: [log in to unmask]
****************************************************************************
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Date: Thu, 21 Mar 2002 11:10:26 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Dendrites growth
X-To: [log in to unmask]
MIME-Version: 1.0
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Is conformal coating a good protection against dendrites? I read that
ionic contamination can cause dendrites, if a board has ionic
contamination,
will conformal coating prevent dendrites?
*In a word, NO, and I can't stress that enough. To get dendrites, you need
three things: electrical potential (voltage), moisture, and an ionic
contaminant. All conformal coatings are water permeable to a certain
degree, some are better than others in this respect. You can count on
moisture going through the coating, combining with the ionic residues to
form electrolytes. Then dendrites can grow.
I had a number of situations in a former life where a client would be told
he had ionically dirty boards. They did not want to go to the hassle of
cleaning the assemblies and decided to coat over the boards "so that the
environment can't get to the contaminant". We told them that it would not
work, for the reasons above. But to no avail. 9-12 months later they came
back "It didn't work". At best, it only bought them a little time.
Doug Pauls
Rockwell Collins
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Date: Thu, 21 Mar 2002 10:38:04 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Russell Burdick <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Russell Burdick <[log in to unmask]>
Subject: Re: Tiny black spots on copper foil surface
Mime-Version: 1.0
Content-Type: text/plain; format=flowed
Check on the conveyor rollers in the equipment. They can and do get chewed
up and start to disintegrate leaving marks on the boards.
Russ Burdick
Process Engineer
Prototron Circuits Southwest
Tucson, Arizona
520-745-8515
>From: Shirley Xiao <[log in to unmask]>
>Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, Shirley Xiao
><[log in to unmask]>
>To: [log in to unmask]
>Subject: [TN] Tiny black spots on copper foil surface
>Date: Wed, 20 Mar 2002 23:13:41 -0800
>
>Dear All:
>We encountered a problem after develop, etch & strip.
>Lots of tiny black spots were found on copper surface.
>We are sure that these tiny black spots are not
>oxidization.They can not be removed by acetone but is
>removable by micro etch.Before get result by EDX
>element analysis, I wish anyone have similar
>experience can share some information with me.
>
>
>__________________________________________________
>Do You Yahoo!?
>Yahoo! Movies - coverage of the 74th Academy Awards®
>http://movies.yahoo.com/
>
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Date: Thu, 21 Mar 2002 10:04:01 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Patel <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Patel <[log in to unmask]>
Organization: interWAVE Communications, Inc.
Subject: How to secure daughter card...with not lock-in type connector
MIME-Version: 1.0
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Technetters,
I have a problem: A small daughter card (2" x 3") is mounted on a mother
board. Daughter card has a mating connector (without locking mechanism)
along the one of long edge. Other edge of the daughter card is fastened
using stand-off and screws to mother board.
As this connector is not a lock-in type, any twist to the board can make
connector popping out so slightly that it fails during the test.
Fastening at one end is not enough and the vendor does not make
connector with lock-in mechanism. Hence, looking for ideas as how to
secure the daughter card without going through respinning of the fabs.
May be one of you might have faced the similar problem. The gap between
daughter card and mother board is about 0.375".
re,
Ken Patel
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Date: Thu, 21 Mar 2002 10:03:09 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mark Steele <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mark Steele <[log in to unmask]>
Subject: Re: Quick turn fab shop
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----_=_NextPart_001_01C1D102.A8843160"
This message is in MIME format. Since your mail reader does not understand
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------_=_NextPart_001_01C1D102.A8843160
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Quick, good, cheap. Pick any two...
Mark
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 6:07 AM
Subject: Quick turn fab shop
Hi all
Can anyone out there suggest or give recommendations on a good quality quick
turn fab shop.
Greatly appreciate any suggestions.
------_=_NextPart_001_01C1D102.A8843160
Content-Type: text/html;
charset="iso-8859-1"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
<META content="MSHTML 5.00.2314.1000" name=GENERATOR></HEAD>
<BODY>
<DIV><FONT color=#0000ff face=Garamond><SPAN class=130120718-21032002>Quick,
good, cheap. Pick any two...</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Garamond><SPAN
class=130120718-21032002></SPAN></FONT> </DIV>
<DIV><FONT color=#0000ff face=Garamond><SPAN
class=130120718-21032002>Mark</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Garamond><SPAN
class=130120718-21032002></SPAN></FONT> </DIV>
<BLOCKQUOTE
style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">
<DIV align=left class=OutlookMessageHeader dir=ltr><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Mauro, Dan
[mailto:[log in to unmask]]<BR><B>Sent:</B> Wednesday, March 20, 2002 6:07
AM<BR><B>Subject:</B> Quick turn fab shop<BR><BR></DIV></FONT>
<DIV><FONT face=Arial size=2><SPAN class=254530514-20032002>Hi
all</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN
class=254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN class=254530514-20032002>Can anyone out
there suggest or give recommendations on a good quality quick turn fab shop.
</SPAN></FONT></DIV>
<P><FONT face=Arial size=2><SPAN class=254530514-20032002>Greatly appreciate
any suggestions.</SPAN></FONT></P></BLOCKQUOTE></BODY></HTML>
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Date: Thu, 21 Mar 2002 13:15:27 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Mauro, Dan" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Mauro, Dan" <[log in to unmask]>
Subject: Re: Quick turn fab shop
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Explain to me what each means to you? Then maybe I can pick any two.....
Dan
-----Original Message-----
From: Mark Steele [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 1:03 PM
To: [log in to unmask]
Subject: Re: [TN] Quick turn fab shop
Quick, good, cheap. Pick any two...
Mark
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 6:07 AM
Subject: Quick turn fab shop
Hi all
Can anyone out there suggest or give recommendations on a good quality quick
turn fab shop.
Greatly appreciate any suggestions.
------_=_NextPart_001_01C1D104.60911600
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charset="iso-8859-1"
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<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
<META content="MSHTML 6.00.2600.0" name=GENERATOR></HEAD>
<BODY>
<DIV><SPAN class=746591218-21032002><FONT face=Arial color=#0000ff
size=2>Explain to me what each means to you? Then maybe I can pick any
two.....</FONT></SPAN></DIV>
<DIV><SPAN class=746591218-21032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=746591218-21032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=746591218-21032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=746591218-21032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=746591218-21032002><FONT face=Arial color=#0000ff
size=2>Dan</FONT></SPAN></DIV>
<DIV> </DIV>
<BLOCKQUOTE dir=ltr style="MARGIN-RIGHT: 0px">
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Mark Steele
[mailto:[log in to unmask]]<BR><B>Sent:</B> Thursday, March 21,
2002 1:03 PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> Re: [TN] Quick
turn fab shop<BR><BR></FONT></DIV>
<DIV><FONT face=Garamond color=#0000ff><SPAN class=130120718-21032002>Quick,
good, cheap. Pick any two...</SPAN></FONT></DIV>
<DIV><FONT face=Garamond color=#0000ff><SPAN
class=130120718-21032002></SPAN></FONT> </DIV>
<DIV><FONT face=Garamond color=#0000ff><SPAN
class=130120718-21032002>Mark</SPAN></FONT></DIV>
<DIV><FONT face=Garamond color=#0000ff><SPAN
class=130120718-21032002></SPAN></FONT> </DIV>
<BLOCKQUOTE
style="PADDING-LEFT: 5px; MARGIN-LEFT: 5px; BORDER-LEFT: #0000ff 2px solid; MARGIN-RIGHT: 0px">
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Mauro, Dan
[mailto:[log in to unmask]]<BR><B>Sent:</B> Wednesday, March 20, 2002 6:07
AM<BR><B>Subject:</B> Quick turn fab shop<BR><BR></DIV></FONT>
<DIV><FONT face=Arial size=2><SPAN class=254530514-20032002>Hi
all</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN
class=254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN class=254530514-20032002>Can anyone out
there suggest or give recommendations on a good quality quick turn fab shop.
</SPAN></FONT></DIV>
<P><FONT face=Arial size=2><SPAN class=254530514-20032002>Greatly appreciate
any suggestions.</SPAN></FONT></P></BLOCKQUOTE></BLOCKQUOTE></BODY></HTML>
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Date: Thu, 21 Mar 2002 12:50:31 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mike Clemente <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mike Clemente <[log in to unmask]>
Subject: 48 Pin LCC PCB Footprint
Mime-Version: 1.0
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Hi Everyone,
I need the recommended PCB Footprint for a 48 Pin LCC (Leadless Chip =
Carrier). Appreciate any assistance.
Thanks,
Mike
Mike Clemente, C.I.D.
Sr. PCB Design Specialist
dZinit Applied Technologies
Tel: 847-545-8170
Fax: 847-545-8175
Email: [log in to unmask]
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Date: Thu, 21 Mar 2002 13:49:24 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McMullen, Kerry" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McMullen, Kerry" <[log in to unmask]>
Subject: Re: Quick turn fab shop
X-To: "Mauro, Dan" <[log in to unmask]>
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In my mind, if you are doing a quick turn, you are doing it for time to
market reasons. In which case you want a board that functions per your
fabrication specifications. You also want it on time. Soooo, I always go
with Quality and On Time Delivery. I would not want to explain to my boss
that I saved 20% on the boards, but they don't work and did not come in on
time. At least that is the thought pattern in a start up environment.
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 1:15 PM
To: [log in to unmask]
Subject: Re: [TN] Quick turn fab shop
Explain to me what each means to you? Then maybe I can pick any two.....
Dan
-----Original Message-----
From: Mark Steele [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 1:03 PM
To: [log in to unmask]
Subject: Re: [TN] Quick turn fab shop
Quick, good, cheap. Pick any two...
Mark
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 6:07 AM
Subject: Quick turn fab shop
Hi all
Can anyone out there suggest or give recommendations on a good quality quick
turn fab shop.
Greatly appreciate any suggestions.
------_=_NextPart_001_01C1D109.1EA38BB0
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charset="iso-8859-1"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
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<BODY>
<DIV><SPAN class=151155318-21032002><FONT face=Arial color=#0000ff size=2>In my
mind, if you are doing a quick turn, you are doing it for time to market
reasons. In which case you want a board that functions per your
fabrication specifications. You also want it on time. Soooo, I
always go with Quality and On Time Delivery. I would not want to explain
to my boss that I saved 20% on the boards, but they don't work and did not come
in on time. At least that is the thought pattern in a start up
environment.</FONT></SPAN></DIV>
<BLOCKQUOTE dir=ltr style="MARGIN-RIGHT: 0px">
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Mauro, Dan
[mailto:[log in to unmask]]<BR><B>Sent:</B> Thursday, March 21, 2002 1:15
PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> Re: [TN] Quick turn fab
shop<BR><BR></FONT></DIV>
<DIV><SPAN class=746591218-21032002><FONT face=Arial color=#0000ff
size=2>Explain to me what each means to you? Then maybe I can pick any
two.....</FONT></SPAN></DIV>
<DIV><SPAN class=746591218-21032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=746591218-21032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=746591218-21032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=746591218-21032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=746591218-21032002><FONT face=Arial color=#0000ff
size=2>Dan</FONT></SPAN></DIV>
<DIV> </DIV>
<BLOCKQUOTE dir=ltr style="MARGIN-RIGHT: 0px">
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Mark Steele
[mailto:[log in to unmask]]<BR><B>Sent:</B> Thursday, March 21,
2002 1:03 PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> Re: [TN] Quick
turn fab shop<BR><BR></FONT></DIV>
<DIV><FONT face=Garamond color=#0000ff><SPAN class=130120718-21032002>Quick,
good, cheap. Pick any two...</SPAN></FONT></DIV>
<DIV><FONT face=Garamond color=#0000ff><SPAN
class=130120718-21032002></SPAN></FONT> </DIV>
<DIV><FONT face=Garamond color=#0000ff><SPAN
class=130120718-21032002>Mark</SPAN></FONT></DIV>
<DIV><FONT face=Garamond color=#0000ff><SPAN
class=130120718-21032002></SPAN></FONT> </DIV>
<BLOCKQUOTE
style="PADDING-LEFT: 5px; MARGIN-LEFT: 5px; BORDER-LEFT: #0000ff 2px solid; MARGIN-RIGHT: 0px">
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Mauro, Dan
[mailto:[log in to unmask]]<BR><B>Sent:</B> Wednesday, March 20, 2002 6:07
AM<BR><B>Subject:</B> Quick turn fab shop<BR><BR></DIV></FONT>
<DIV><FONT face=Arial size=2><SPAN class=254530514-20032002>Hi
all</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN
class=254530514-20032002></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN class=254530514-20032002>Can anyone out
there suggest or give recommendations on a good quality quick turn fab
shop. </SPAN></FONT></DIV>
<P><FONT face=Arial size=2><SPAN class=254530514-20032002>Greatly
appreciate any
suggestions.</SPAN></FONT></P></BLOCKQUOTE></BLOCKQUOTE></BLOCKQUOTE></BODY></HTML>
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Date: Thu, 21 Mar 2002 11:00:51 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bloomquist, Ken" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bloomquist, Ken" <[log in to unmask]>
Subject: NTC RE: [TN] PWB PACKAGING
MIME-Version: 1.0
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Franklin,
Where is this assembly shop? I think I need to go do a survey on them to see
if they could be our CM! ;-)
KennyB
-----Original Message-----
From: Franklin D Asbell [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 6:56 AM
To: [log in to unmask]
Subject: Re: [TN] PWB PACKAGING
You don't need to hermetically seal them if they are headed
straight from the dock to the assembly line...you might however, need that
degree of protection if they are going to an outdoor assembly shop on some
south pacific island...located on the beach, in the summertime...
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Date: Thu, 21 Mar 2002 14:18:22 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Phil Nutting <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Nutting <[log in to unmask]>
Subject: Re: How to secure daughter card...with not lock-in type connector
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Ken,
Two quick solutions come to mind. You must remember these are "quick =
and dirty" solutions for the inventory on hand. To really make these =
two boards perform best will require some modifications to the bare =
boards.
Simple solution 1 - If there is available space drill holes to accept a =
tie-wrap.
Simple solution 2 - If there is no space to drill, what about self =
adhesive "wall mounts" on each board and then a tie-wrap connecting them =
together.
A less simple solution would be to use some of the board-to-board =
supports like Richco DLCBS-6-01 or Richco SP-6-1. This will require =
holes in both boards.
Just one man's opinion.
Phil
-----Original Message-----
From: Ken Patel [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 1:04 PM
To: [log in to unmask]
Subject: [TN] How to secure daughter card...with not lock-in type
connector
Technetters,
I have a problem: A small daughter card (2" x 3") is mounted on a mother
board. Daughter card has a mating connector (without locking mechanism)
along the one of long edge. Other edge of the daughter card is fastened
using stand-off and screws to mother board.
As this connector is not a lock-in type, any twist to the board can make
connector popping out so slightly that it fails during the test.
Fastening at one end is not enough and the vendor does not make
connector with lock-in mechanism. Hence, looking for ideas as how to
secure the daughter card without going through respinning of the fabs.
May be one of you might have faced the similar problem. The gap between
daughter card and mother board is about 0.375".
re,
Ken Patel
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Date: Thu, 21 Mar 2002 13:25:57 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Franklin D Asbell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Franklin D Asbell <[log in to unmask]>
Subject: Re: NTC RE: [TN] PWB PACKAGING
X-To: "Bloomquist, Ken" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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(((laughing))) Still searching for it...
----- Original Message -----
From: "Bloomquist, Ken" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, March 21, 2002 1:00 PM
Subject: [TN] NTC RE: [TN] PWB PACKAGING
> Franklin,
>
> Where is this assembly shop? I think I need to go do a survey on them to
see
> if they could be our CM! ;-)
>
> KennyB
> -----Original Message-----
> From: Franklin D Asbell [mailto:[log in to unmask]]
> Sent: Thursday, March 21, 2002 6:56 AM
> To: [log in to unmask]
> Subject: Re: [TN] PWB PACKAGING
>
> You don't need to hermetically seal them if they are headed
> straight from the dock to the assembly line...you might however, need that
> degree of protection if they are going to an outdoor assembly shop on some
> south pacific island...located on the beach, in the summertime...
>
> --------------------------------------------------------------------------
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>
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Date: Thu, 21 Mar 2002 11:32:17 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rick Thompson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rick Thompson <[log in to unmask]>
Organization: Ventura Electronics Assembly
Subject: Re: BGA reballing
X-To: "Braime, Justin" <[log in to unmask]>
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Justin,
I'm not aware of specific studies, but some manufacturers may have
reball information available. Motorola for one has a section on page 10
of AN1231 (http://e-www.motorola.com/brdata/PDFDB/docs/AN1231.pdf) that
briefly discusses their position (which is that they only recommend it
for testing of components, not for production use). Of course, they may
have a slightly biased point of view given that they may end up having
to support these packages.
In addition to the number of cycles mentioned in other posts, note that
if you have these parts on both sides of a board you add a thermal
cycle. Plus, removal of the residual solder from the device adds some
thermal stress as well, so what you may end up with is 5 or 6 cycles.
Rick Thompson
Ventura Electronics Assembly
2655 Park Center Dr.
Simi Valley, CA 93065
+1 (805) 584-9858 x-304 voice
+1 (805) 584-1529 fax
[log in to unmask]
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Braime, Justin
Sent: Thursday, March 21, 2002 6:28 AM
To: [log in to unmask]
Subject: [TN] BGA reballing
Hi guys,
I am looking at using the SolderQuik preforms for reballing some BGAs,
but I am concerned about the reliability of this process in terms of the
number of thermal cycles being sustained by the BGA component. Does
anybody know of any studies done on this?
Thanks
Justin Braime
Senior Production Engineer
Racal Instruments Ltd
480 Bath Rd, Slough
Berkshire, SL1 6BE
England
Tel: +44 (0)1628 604455
Fax: +44 (0)1628 662017
E-mail: [log in to unmask]
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Date: Thu, 21 Mar 2002 14:43:49 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Dendrites growth
MIME-Version: 1.0
Content-Type: text/plain; charset="US-ASCII"
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In a message dated 3/21/2002 10:24:53 AM US Eastern Standard Time,
[log in to unmask] writes:
<< Is conformal coating a good protection against dendrites? >>
Graham's answer is a very good one. In a way, this question reminds me of an
advertisement that I often saw in bicycling magazines during my college days.
It was for a new type of lock to hold one's bicycle to the parking rack, and
it had for a headline "Resists Atomic Bombs". The key being that it was not
100% successful, but it did offer resistance.
In every comparative test that I have ever done, uncoated boards fared far
worse than coated ones with respect to dendritic growth. Does that mean that
conformal coating will prevent dendrites from EVER appearing? Clearly not.
My typical tests were 100 hours at 85 C and 85% RH, with power applied, with
the acrylic coated boards normally surviving the entire test and the uncoated
boards failing in 2-8 hours, depending on the soldering process variables
involved.
Jon Moore
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Date: Thu, 21 Mar 2002 14:51:25 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Safavi-Bayat Shahed <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Safavi-Bayat Shahed <[log in to unmask]>
Subject: Re: 48 Pin LCC PCB Footprint
X-To: Mike Clemente <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Go here
http://www.emulation.com/footprints/048-LCC10.gif
Shahed
-----Original Message-----
From: Mike Clemente [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 1:51 PM
To: [log in to unmask]
Subject: [TN] 48 Pin LCC PCB Footprint
Hi Everyone,
I need the recommended PCB Footprint for a 48 Pin LCC (Leadless Chip
Carrier). Appreciate any assistance.
Thanks,
Mike
Mike Clemente, C.I.D.
Sr. PCB Design Specialist
dZinit Applied Technologies
Tel: 847-545-8170
Fax: 847-545-8175
Email: [log in to unmask]
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Date: Thu, 21 Mar 2002 11:56:47 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
JaMi Smith <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: JaMi Smith <[log in to unmask]>
Subject: Re: Tiny black spots on copper foil surface
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
Shirley,
Sounds like it might be very very small pin holes in your resist that is
letting in a microscopic amount of etchant.
JaMi Smith
-----Original Message-----
From: Shirley Xiao [mailto:[log in to unmask]]=20
Sent: Wednesday, March 20, 2002 11:14 PM
To: [log in to unmask]
Subject: [TN] Tiny black spots on copper foil surface
Dear All:
We encountered a problem after develop, etch & strip.
Lots of tiny black spots were found on copper surface.
We are sure that these tiny black spots are not
oxidization.They can not be removed by acetone but is
removable by micro etch.Before get result by EDX
element analysis, I wish anyone have similar
experience can share some information with me.
__________________________________________________
Do You Yahoo!?
Yahoo! Movies - coverage of the 74th Academy Awards(r)
http://movies.yahoo.com/
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Date: Thu, 21 Mar 2002 15:37:46 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: 48 Pin LCC PCB Footprint
MIME-Version: 1.0
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Our rule of thumb is that the board pad should line up with the component
pad under the chip, extending .030" out past the body. Typically, the
metalization under the chip would be .050", add .030" to that for a pad
length of .080". Pin 1 is usually longer.
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Mike Clemente [SMTP:[log in to unmask]]
Sent: Thursday, March 21, 2002 1:51 PM
To: [log in to unmask]
Subject: [TN] 48 Pin LCC PCB Footprint
Hi Everyone,
I need the recommended PCB Footprint for a 48 Pin LCC (Leadless Chip
Carrier). Appreciate any assistance.
Thanks,
Mike
Mike Clemente, C.I.D.
Sr. PCB Design Specialist
dZinit Applied Technologies
Tel: 847-545-8170
Fax: 847-545-8175
Email: [log in to unmask]
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Date: Thu, 21 Mar 2002 14:58:07 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Quick turn fab shop
X-To: "Mauro, Dan" <[log in to unmask]>
Mime-Version: 1.0
Content-type: multipart/mixed;
Boundary="0__=F7qg9I3yCMqE7XyaiksYtEMcvtfpANe9YFnUGC2vICjxywOytfICZEoH"
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With the pcb biz so slow now, most big shops are scratching for work. you can
get 3-5 days turn with competive prices from the big boys, they have the latest
equipment and technologies. Get the best of both worlds! Good luck!
"Mauro, Dan" <[log in to unmask]> on 03/21/2002 12:15:27 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond to
"Mauro, Dan" <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: Warren Crow/US/I-O INC)
Subject: Re: [TN] Quick turn fab shop
Explain to me what each means to you? Then maybe I can pick any two.....
Dan
-----Original Message-----
From: Mark Steele [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 1:03 PM
To: [log in to unmask]
Subject: Re: [TN] Quick turn fab shop
Quick, good, cheap. Pick any two...
Mark
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 6:07 AM
Subject: Quick turn fab shop
Hi all
Can anyone out there suggest or give recommendations on a good quality quick
turn fab shop.
Greatly appreciate any suggestions.
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Date: Thu, 21 Mar 2002 13:11:43 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: Re: NTC RE: [TN] PWB PACKAGING
X-To: Franklin D Asbell <[log in to unmask]>
MIME-version: 1.0
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Dan (looking at snow in the forecast for the weekend) comments.
Please, please lets us know when you find them, I'll send my resume.
Dan
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Date: Thu, 21 Mar 2002 16:40:50 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bissonnette, Jean-Francois" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bissonnette, Jean-Francois" <[log in to unmask]>
Subject: Re: Dendrites growth
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Thank you all for your answers.
Anyone has a picture of dendrites?
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 2:44 PM
To: [log in to unmask]
Subject: Re: [TN] Dendrites growth
In a message dated 3/21/2002 10:24:53 AM US Eastern Standard Time,
[log in to unmask] writes:
<< Is conformal coating a good protection against dendrites? >>
Graham's answer is a very good one. In a way, this question reminds me of
an
advertisement that I often saw in bicycling magazines during my college
days.
It was for a new type of lock to hold one's bicycle to the parking rack,
and
it had for a headline "Resists Atomic Bombs". The key being that it was not
100% successful, but it did offer resistance.
In every comparative test that I have ever done, uncoated boards fared
far
worse than coated ones with respect to dendritic growth. Does that mean
that
conformal coating will prevent dendrites from EVER appearing? Clearly not.
My typical tests were 100 hours at 85 C and 85% RH, with power applied, with
the acrylic coated boards normally surviving the entire test and the
uncoated
boards failing in 2-8 hours, depending on the soldering process variables
involved.
Jon Moore
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Date: Thu, 21 Mar 2002 16:42:52 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Dave Hillman <[log in to unmask]>
Subject: Re: FW: shelve life of pwb's
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Hi Suzanne! Solderability of pwbs is a function of the type and quality of
surface finish deposited. You will find a wide variation of "responses" on
the shelflife of the different surface finishes available. The more you are
willing to pay, the better the shelflife guarantee you will find. Rockwell
Collins has looked at a number of immersion tin chemistries and we found a
wide spectrum of performance (good to bad). My expectations for any pwb
surface finish is 12 months of shelflife in controlled storage conditions
(75F +/-10, 30-60%RH). I have found a number of surface finishes (immersion
tin, immersion silver, immersion gold, OSP, immersion palladium) which can
meet the 12 month shelflife - provided you partner with your pwb
fabricator. The real key is teaming with your pwb fabricator and having
everyone understand your expectations of the surface finish. Good Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
Lupita Roberts <[log in to unmask]>@ipc.org> on 03/20/2002 10:34:07
AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Lupita Roberts <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: [TN] FW: shelve life of pwb's
I am wondering if anyone can help me with the shelve life of raw
PWB's. I was experiencing solderability issues and oxidation issues
with some boards. I was told by several suppliers that White Tin only
has a shelve life of 6 months and they were not warrantied beyond that
point. I have been unsuccessful in trying to find data in regards to
this issue.
Suzanne Foulkes
QC Supervisor
Inservco Inc.
LaGrange, Ohio 44050
[log in to unmask]
[log in to unmask]
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Date: Thu, 21 Mar 2002 14:50:47 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
peter lee <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: peter lee <[log in to unmask]>
Subject: ALIVH PCB
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Hello technetters,
Has anyone had experience with SMT processing using
ALIVH type PCB? I am looking for any process concern,
paste, and reflow characteristics as compared with
FR4.
Rgds,
Peter
__________________________________________________
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Date: Thu, 21 Mar 2002 23:10:32 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Naisbitt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Naisbitt <[log in to unmask]>
Subject: Re: Dendrites growth
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 8bit
Jean-Francois
Yeah verily, as in accordance with the sermon of SIR Doug of Mt. Dew; the
use of a coating will at best, extend the time before failure.
The Canadian Sage, "Graham of Halifax" puts it so succinctly: "Cleanliness
is next to reliabilityness".
:-)
Regards Graham Naisbitt
[log in to unmask] <mailto:[log in to unmask]>
Concoat Limited
Alasan House, Albany Park
Camberley GU16 7PH - UK
www.concoat.co.uk <http://www.concoat.co.uk>
Phone: +44 1276 691100
Fax: +44 1276 691227
Mobile: +44 79 6858 2121
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Bissonnette,
> Jean-Francois
> Sent: 21 March 2002 15:19
> To: [log in to unmask]
> Subject: [TN] Dendrites growth
>
>
> Is conformal coating a good protection against dendrites? I read that
> ionic contamination can cause dendrites, if a board has ionic
> contamination,
> will conformal coating prevent dendrites?
>
> Jean-François Bissonnette
> Vérificateur, Contrôle de la Qualité
> Électronique
> Produits et Procédés
> Vapor Rail Inc.
> 10655 Henri-Bourassa O.
> St-Laurent, Qc
> H4S 1A1
>
> (514) 335-4200 x2021
> (514) 335-4231 fax
>
> <<Bissonnette, Jean-Francois.vcf>>
>
>
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally
> privileged and confidential information intended only for the use
> of the individual or entity named herein. If the reader of this
> transmission is not the intended recipient, you are hereby
> notified that any dissemination, distribution, or copying of this
> transmission is strictly prohibited.
>
> ------------------------------------------------------------------
> ---------------
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Date: Thu, 21 Mar 2002 16:09:46 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Mcmaster, Michael" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Mcmaster, Michael" <[log in to unmask]>
Subject: Re: Flattening a board during assembly
X-To: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Rumor has it that we've reached the bottom of the recent economic downturn.
That may or may not be true. All I know is that I'm busy enough that I've
fallen a few weeks and a few hundred Technet e-mails behind. Maybe I need
to introduce my Technet E-mail Backlog Index and see how it corresponds to
the other financial indicators.
All kidding aside, Hans your "manual assist" process is not advised. I've
seen boards with cracked soldermask that were traced down to someone
"flattening" a warped board before placing on a driller or router bed. I
don't recommend flexing cold boards to remove warpage.
> ----------
> From: Hinners Hans M Civ
> WRALC/LUGE[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;Hinners Hans M Civ WRALC/LUGE
> Sent: Friday, March 08, 2002 10:27 AM
> To: [log in to unmask]
> Subject: Re: [TN] Flattening a board during assembly
>
> Hey Daan,
>
> Here's a generic dewarp I've used in the past. You or preferably the Fab
> house should have an oven large enough to load the panels or boards. If
> done properly you won't see re-warp during the assembly process. Dewarp
> is
> not a board friendly process and I shudder to consider the longer term
> reliability issues but it gets them flat when nothing else will. It's
> usually better to dewarp boards instead of panels because of stress relief
> that occurs at Route. On the other hand a 2 or 4 up panel cuts your cycle
> time down considerably.
>
> 1. Load warped panels into oven. (Keep stacks reasonable sized: ~500
> mils
> of board stock or less - 6-10 panels depending on thickness)
> 2. Place several Caul plates (that match or overlap panel size) ~50
> pounds
> of weight & Use Kraft Paper (Sulfur Free) to protect panels
> 3. Bake at 340+ F for 4-6 hours (Material must be at or slightly above
> Tg)
> 4. Cool slowly to room temp.
> 5. Manually assist (Bend & Twist) the dewarp at Final Inspect. (Great
> upper body workout on those 200+ board shipments)
> 6. Inspect Panels on Flatness (Granite) Table. ("Tap" test the 4
> corners.
> If the board's corners don't touch the table you've got more flexing to
> do.)
>
> Hans
>
> AC-130 Gunship Motto: "You can run but, you'll only die tired."
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> Hans M. Hinners
> Electronics Engineer
> Warner Robins - Air Logistics Center (WR-ALC/LUGE)
> 226 Cochran Street
> Robins AFB GA 31098-1622
>
> mailto:[log in to unmask]
>
> Com: (478) 926 - 5224
> Fax: (478) 926 - 4911
> DSN Prefix: 468
>
>
>
> -----Original Message-----
> From: d. terstegge [mailto:[log in to unmask]]
> Sent: Thursday, March 07, 2002 11:48 AM
> To: [log in to unmask]
> Subject: [TN] Flattening a board during assembly
>
>
> Hi Technetters,
>
> We've got a batch of boards here that's really twisted (about 1.5 % when
> measured according to IPC-TM-650) due to imbalanced design. The customers
> is
> not willing to change the design, and we discussed with them the
> possibility
> of using a carrier-frame for flattening these boards while they are
> processed through our SMT-line.
>
> My worry is that this results in unacceptable stress in the solder joints
> as
> soon as the board is released from the carrier. Fortunately there's no BGA
> on this board, but it does have a small QFP and some 40 mm long
> SMT-connectors. It's supposed to be a high-reliability military product.
>
> Does anyone have any data on the effects of such internal stresses ?
> Also other comments are welcome.
>
> Best regards.
>
> Daan Terstegge
> SMT Centre
> Thales Communications
> Unclassified mail
> Personal Website: http://www.smtinfo.net
>
> --------------------------------------------------------------------------
> --
> -----
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Date: Thu, 21 Mar 2002 16:15:35 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Mcmaster, Michael" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Mcmaster, Michael" <[log in to unmask]>
Subject: Re: Foil Lamination
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain
Unless you build only 2-sided boards there has to be prepreg in the board
somewhere so the board can't be built with just laminate. If your note is
calling out something that doesn't make building the board possible, maybe
it was overlooked.
And if your board is only 2-sided, I can't see that it matters. The
laminate was made using a foil lamination process. It's just a matter of
where it occurred.
> ----------
> From:
> [log in to unmask][SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;[log in to unmask]
> Sent: Monday, March 18, 2002 8:05 AM
> To: [log in to unmask]
> Subject: [TN] Foil Lamination
>
> The call-out on our fab drawings states to use copper clad epoxy laminate
> FR4 base material. Our supplier in the past has purchased and certified
> material to IPC-4101. We have now found out they have incorporated foil
> lamination into their process. What type of requirements should we impose
> or
> verify?
> Thanks for your help!
> Rick Howieson
>
> --------------------------------------------------------------------------
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Date: Fri, 22 Mar 2002 02:24:42 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Dendrites growth
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=iso-8859-1
Content-Transfer-Encoding: 8bit
Jean-Francois
I echo St Doug's NO for all the reasons stated. I can quote another
case: a fairly large European company in the telecomms industry made
5,000 street-box demultiplexers. The bare, large, 8-layer board alone
plus the cost price of the components came to $8,000 each. Now, by my
maths, that is a total cost price of $40 M. Add to that their mark-up.
Now, they took a short-cut because their flux supplier made an
ionics-rich "no-clean", easy to solder with, and these stupid buggers
believed their supplier who told them that they could coat over, without
conducting the slightest qualification test. Would you believe it?
Natch, in the harsh conditions of street furniture, they didn't last 4
or 5 months. They hardly believed it when their customer -- a large
State-owned telephone company, at that time -- returned 5,000 units with
a penalty demand for compensation for interrupting a public service of
nearly $4 M (5% of the selling price). Real nasty: is your company
prepared to take a similar risk?
Best regards
Brian
"Bissonnette, Jean-Francois" wrote:
>
> Is conformal coating a good protection against dendrites? I read that
> ionic contamination can cause dendrites, if a board has ionic contamination,
> will conformal coating prevent dendrites?
>
> Jean-François Bissonnette
> Vérificateur, Contrôle de la Qualité
> Électronique
> Produits et Procédés
> Vapor Rail Inc.
> 10655 Henri-Bourassa O.
> St-Laurent, Qc
> H4S 1A1
>
> (514) 335-4200 x2021
> (514) 335-4231 fax
>
> <<Bissonnette, Jean-Francois.vcf>>
>
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally privileged and confidential information intended only for the use of the individual or entity named herein. If the reader of this transmission is not the intended recipient, you are hereby notified that any dissemination, distribution, or copying of this transmission is strictly prohibited.
>
> ---------------------------------------------------------------------------------
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Date: Thu, 21 Mar 2002 16:49:56 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: Re: FW: shelve life of pwb's
X-To: [log in to unmask]
MIME-version: 1.0
Content-type: text/plain; charset=iso-8859-1
Content-transfer-encoding: 7BIT
I've been watching this one and waiting for some one to mention what bit me
on immersion tin, a pcb vendor with poor process control. The folks who made
the process helped me solve the problem I was having, i.e. non-existent
solderability after re-flow. The PCB vendor (no longer getting PO's) was
putting the tin down at 1/10 the recommended thickness. A couple of months
on the shelf, a trip through our re-flow oven and.... my customer could not
solder the assembly to their pcb. So from my corner of the world a qualified
pcb vendor is the most important factor in shelf life.
BTW the only reason I would consider immersion tin again is the great
service and above and beyond the call service I received from the process
manufacturer.
Dan
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Date: Thu, 21 Mar 2002 17:22:28 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Mcmaster, Michael" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Mcmaster, Michael" <[log in to unmask]>
Subject: Re: e-mail
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain
I got it, too. Ditto on delete.
> ----------
> From:
> [log in to unmask][SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;[log in to unmask]
> Sent: Thursday, March 21, 2002 7:04 AM
> To: [log in to unmask]
> Subject: [TN] e-mail
>
> I received an e-mail From:Leading Edge Devices ([log in to unmask]) with the
> Subject: Must see at IPC containing 5 image attachments and 1 untitled
> attachment. With all the BS viruses going around I immediately hit DELETE.
> Anyone out there aware of this?
> Rick Howieson
> Delta Group Electronics, Inc.
>
> --------------------------------------------------------------------------
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> --------------------------------------------------------------------------
> -------
>
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Date: Thu, 21 Mar 2002 17:27:20 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Mcmaster, Michael" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Mcmaster, Michael" <[log in to unmask]>
Subject: Re: Solder Joint Mechanical Stress
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Peter
It only seems like a "circus"....
> ----------
> From: [log in to unmask][SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;[log in to unmask]
> Sent: Wednesday, March 13, 2002 7:42 PM
> To: [log in to unmask]
> Subject: Re: [TN] Solder Joint Mechanical Stress
>
> Was this strength test written into the requirements when the job was
> taken
> on? 20 in pounds is quite a torque to apply to an electronic component.
> Does your customer have any first-hand experience of circus board
> manufacture? - it's sounds like "no", or he'ld understand for himself why
> it's a bad idea to perform a test like this. Is it intended to be 100%
> inspection?
>
> The process to stick the heatsinks to the BGA's should have been confirmed
> as part of a product qualification test, as should the means and method of
> testing the adhesion. Properly specified, this process can then be passed
> onto CM's or whoever assembles the boards to repeat.
>
> For process monitoring purposes, to ensure adequate adhesion is being
> maintained, batch sampling can be done, but I wouldn't do it on expensive
> "live" product - I would load the occasional board with appropriate dummy
> components, mount the heatsink and test those. If there's a problem, stop
> and review the processes.
>
> Otherwise, what is the test going to prove? Either the heatsink comes off,
> or the BGA does (especially if it's one of Earl's illigitimate TI things),
> or they both stay on the board but the solder joints (ball to board or
> balls to device or both) have been unnecessarily stressed, which is bound
> to reduce working life by anyone's reasoning - by how much, should have
> been one of the HALT test results, using a non-torqued set of pieces for
> comparison.
>
> How to change the customer's mind? Ask what qual tests were done and what
> results were obtained along the lines I suggested above, and judge for
> yourself if they were adequate. If not explain why you think so, and if
> he's still adamant about carrying out the test on live product, get him to
> sign a disclaimer removing your liability for failures now or later for
> any
> boards on which this test has been carried out.
>
> Can't suggest anything else, but good luck.
>
> Peter
>
>
>
>
> Carl Ray
> <carlr.ray@SANMIN To: [log in to unmask]
> A-SCI.COM> cc: (bcc: DUNCAN
> Peter/Asst Prin Engr/ST
> Sent by: TechNet Aero/ST Group)
> <[log in to unmask]> Subject: [TN] Solder
> Joint Mechanical Stress
>
>
> 03/14/02 12:17 AM
> Please respond to
> "TechNet E-Mail
> Forum."; Please
> respond to Carl
> Ray
>
>
>
>
>
>
> I have a customer who is requiring that I verify the bond strength of a
> heat sink that is glued to the top of PBGA. The customer has supplied me
> with a torque tool to verify the strength of the bond between the heat
> sink and the BGA. I have concerns that testing the strength of the glue
> bond may affect the solder joint reliability of the BGA. The tool
> supplied by the customer is set at 20 in pound torque. Any ideas how I
> can "change" my customer mind?
>
> --------------------------------------------------------------------------
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Date: Thu, 21 Mar 2002 21:08:54 -0500
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "[log in to unmask]" <[log in to unmask]>
Subject: Re: FW: shelve life of pwb's
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Dave,
As a fabricator I could not agree with you more... Tell us what your expectations are before we send you the boards...not=
afterwards...especially not upt to 2 years afterwards (there is a long story behind that last remark that I am sure othe=
r fabricators can relate to)
Franklin
Original Message:
-----------------
From: Dave Hillman [log in to unmask]
Date: Thu, 21 Mar 2002 16:42:52 -0600
To: [log in to unmask]
Subject: Re: [TN] FW: shelve life of pwb's
Hi Suzanne! Solderability of pwbs is a function of the type and quality of
surface finish deposited. You will find a wide variation of "responses" on
the shelflife of the different surface finishes available. The more you are
willing to pay, the better the shelflife guarantee you will find. Rockwell
Collins has looked at a number of immersion tin chemistries and we found a
wide spectrum of performance (good to bad). My expectations for any pwb
surface finish is 12 months of shelflife in controlled storage conditions
(75F +/-10, 30-60%RH). I have found a number of surface finishes (immersion
tin, immersion silver, immersion gold, OSP, immersion palladium) which can
meet the 12 month shelflife - provided you partner with your pwb
fabricator. The real key is teaming with your pwb fabricator and having
everyone understand your expectations of the surface finish. Good Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
Lupita Roberts <[log in to unmask]>@ipc.org> on 03/20/2002 10:34:07
AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Lupita Roberts <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: [TN] FW: shelve life of pwb's
I am wondering if anyone can help me with the shelve life of raw
PWB's. I was experiencing solderability issues and oxidation issues
with some boards. I was told by several suppliers that White Tin only
has a shelve life of 6 months and they were not warrantied beyond that
point. I have been unsuccessful in trying to find data in regards to
this issue.
Suzanne Foulkes
QC Supervisor
Inservco Inc.
LaGrange, Ohio 44050
[log in to unmask]
[log in to unmask]
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Date: Fri, 22 Mar 2002 11:22:19 +0530
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Vinit Verma <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Vinit Verma <[log in to unmask]>
Subject: Blistering of PCB
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi Technetters,
We are currently running an 8 layer PCB, 1.6mm thickness. In the last run of
approx. 400 nos. we found approx. 10 nos PCBs with blisters in some specific
areas. In approx. 40-50 nos. the blistering is not there but the laminate
has discoloration.
Can anybody suggest any possible causes of the same.
We are not baking the PCBs prior to processing, but the boards are in vacuum
packing and the packing is opened only at the Stencil printing stage.
Any suggestions welcome
Regards
Vinit Verma
Flextronics Technologies (India) Pvt. Ltd.
88A, Electronic City, Hosur Road,
Bangalore-561 229
Tel: +91-80-852 0022, Ext. 161 ; Fax: +91-80-852-1022
E-Mail : [log in to unmask]
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Date: Fri, 22 Mar 2002 09:17:54 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Busko, Wolfgang" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Busko, Wolfgang" <[log in to unmask]>
Subject: Re: NTC RE: [TN] PWB PACKAGING
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Folks,
a while ago ( about 2 years ) there was a thread on SMTnet =B4bout a =
site in
Puerto Rico just 50m from a beautiful beach (at least I hope =B4t=B4was
beautiful)...
... wonder if it=B4s still there ... and maybe doing fine ...and =
maybe
thinking of expanding ...
But, be honest, would you really like to work in such a =
caribean-dream-place
instead of ... mmmh ... oh may be they have this place fit to the given
suggestions and it=B4s a quite good climate in there. Leaves at least =
the
evenings and weekends to compensate for that small little inconvenience
during the days.=20
I think Earl knew the place and all of it=B4s amenities ;-)
Just dreaming away
Wolfgang
> -----Original Message-----
> From: Dan R. Johnson [mailto:[log in to unmask]]
> Sent: Thursday, March 21, 2002 10:12 PM
> To: [log in to unmask]
> Subject: Re: [TN] NTC RE: [TN] PWB PACKAGING
>=20
>=20
> Dan (looking at snow in the forecast for the weekend) comments.
> Please, please lets us know when you find them, I'll send my resume.
>=20
> Dan
>=20
> --------------------------------------------------------------
> -------------------
> Technet Mail List provided as a free service by IPC using=20
> LISTSERV 1.8d
> To unsubscribe, send a message to [log in to unmask] with=20
> following text in
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> To temporarily halt delivery of Technet send e-mail to=20
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> To receive ONE mailing per day of all the posts: send e-mail=20
> to [log in to unmask]: SET Technet Digest
> Search previous postings at: www.ipc.org > On-Line Resources=20
> & Databases > E-mail Archives
> Please visit IPC web site http://www.ipc.org/html/forum.htm=20
> for additional
> information, or contact Keach Sasamori at [log in to unmask] or=20
> 847-509-9700 ext.5315
> --------------------------------------------------------------
> -------------------
>=20
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Date: Fri, 22 Mar 2002 09:25:21 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Busko, Wolfgang" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Busko, Wolfgang" <[log in to unmask]>
Subject: Re: Dendrites growth
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Jean-Francois,
you may visit Steve=B4s page
http://stevezeva.homestead.com/index.html
there still is a picture up showing dendrites.
Thanks for his picture service
Wolfgang
> -----Original Message-----
> From: Bissonnette, Jean-Francois [mailto:[log in to unmask]]
> Sent: Thursday, March 21, 2002 10:41 PM
> To: [log in to unmask]
> Subject: Re: [TN] Dendrites growth
>=20
>=20
> Thank you all for your answers.
>=20
> Anyone has a picture of dendrites?
>=20
> -----Original Message-----
> From: [log in to unmask] [mailto:[log in to unmask]]
> Sent: Thursday, March 21, 2002 2:44 PM
> To: [log in to unmask]
> Subject: Re: [TN] Dendrites growth
>=20
>=20
> In a message dated 3/21/2002 10:24:53 AM US Eastern Standard Time,
> [log in to unmask] writes:
>=20
> << Is conformal coating a good protection against dendrites? >>
>=20
> Graham's answer is a very good one. In a way, this question=20
> reminds me of
> an
> advertisement that I often saw in bicycling magazines during=20
> my college
> days.
> It was for a new type of lock to hold one's bicycle to the=20
> parking rack,
> and
> it had for a headline "Resists Atomic Bombs". The key being=20
> that it was not
> 100% successful, but it did offer resistance.
> In every comparative test that I have ever done, uncoated=20
> boards fared
> far
> worse than coated ones with respect to dendritic growth. =20
> Does that mean
> that
> conformal coating will prevent dendrites from EVER appearing?=20
> Clearly not.
> My typical tests were 100 hours at 85 C and 85% RH, with=20
> power applied, with
> the acrylic coated boards normally surviving the entire test and the
> uncoated
> boards failing in 2-8 hours, depending on the soldering=20
> process variables
> involved.
>=20
> Jon Moore
>=20
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> Technet NOMAIL
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> information, or contact Keach Sasamori at [log in to unmask] or=20
> 847-509-9700
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> --------------------------------------------------------------
> --------------
> -----
>=20
>=20
> WABTEC CORPORATION CONFIDENTIALITY NOTE
> The content contained in this e-mail transmission is legally=20
> privileged and confidential information intended only for the=20
> use of the individual or entity named herein. If the reader=20
> of this transmission is not the intended recipient, you are=20
> hereby notified that any dissemination, distribution, or=20
> copying of this transmission is strictly prohibited.
>=20
> --------------------------------------------------------------
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> 847-509-9700 ext.5315
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Date: Fri, 22 Mar 2002 09:36:36 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"KIPPING, Michael (York Rd)" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "KIPPING, Michael (York Rd)" <[log in to unmask]>
Subject: PCB exposure to solvents
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Hi there
We conformally coat our PCB assemblies using an acrylic and use Methyl Ethyl
Ketone to strip assemblies if they require rework.
Has anyone carried out any work on the maximum exposure time you can expose
PCBs to solvents? (I realise that it will depend on the laminate materials,
component constuction etc.)
Thanks
Michael Kipping
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Date: Fri, 22 Mar 2002 12:57:11 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Lon Weffers <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Lon Weffers <[log in to unmask]>
Subject: esd defect opamp
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Dit is een meerdelig bericht in MIME-indeling.
------=_NextPart_000_0018_01C1D1A1.14C74CB0
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Dear technetters,
How likely is the fact that an assembled AD844 opamp gets defect by ESD?
We are certain that these components were produced in an esd safe process,
so I presume there is an esd problem with our customer.
We produced about 50 boards with on each board 4 AD844’s. 15 boards have
damaged AD844’s on different places on the board.
Regards Lon Weffers’
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<p class=3DMsoNormal><span class=3DEmailStijl15><font size=3D2 =
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style=3D'font-size:10.0pt;mso-bidi-font-size:12.0pt;
font-family:Arial;mso-ansi-language:EN-GB'>Dear =
technetters,<o:p></o:p></span></font></span></p>
<p class=3DMsoNormal><span class=3DEmailStijl15><font size=3D2 =
color=3Dblack
face=3DArial><span lang=3DEN-GB =
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<p class=3DMsoNormal><span class=3DEmailStijl15><font size=3D2 =
color=3Dblack
face=3DArial><span lang=3DEN-GB =
style=3D'font-size:10.0pt;mso-bidi-font-size:12.0pt;
font-family:Arial;mso-ansi-language:EN-GB'>How likely is the fact that =
an
assembled AD844 opamp gets defect by ESD? =
<o:p></o:p></span></font></span></p>
<p class=3DMsoNormal><span class=3DEmailStijl15><font size=3D2 =
color=3Dblack
face=3DArial><span lang=3DEN-GB =
style=3D'font-size:10.0pt;mso-bidi-font-size:12.0pt;
font-family:Arial;mso-ansi-language:EN-GB'>We are certain that these =
components
were produced in an esd safe process, so I presume there is an esd =
problem with
our customer.<o:p></o:p></span></font></span></p>
<p class=3DMsoNormal><span class=3DEmailStijl15><font size=3D2 =
color=3Dblack
face=3DArial><span lang=3DEN-GB =
style=3D'font-size:10.0pt;mso-bidi-font-size:12.0pt;
font-family:Arial;mso-ansi-language:EN-GB'>We produced about 50 boards =
with on
each board 4 AD844’s. 15 boards have damaged AD844’s on =
different places on the
board.<o:p></o:p></span></font></span></p>
<p class=3DMsoNormal><span class=3DEmailStijl15><font size=3D2 =
color=3Dblack
face=3DArial><span lang=3DEN-GB =
style=3D'font-size:10.0pt;mso-bidi-font-size:12.0pt;
font-family:Arial;mso-ansi-language:EN-GB'><![if =
!supportEmptyParas]> <![endif]><o:p></o:p></span></font></span></p>
<p class=3DMsoNormal><span class=3DEmailStijl15><font size=3D2 =
color=3Dblack
face=3DArial><span lang=3DEN-GB =
style=3D'font-size:10.0pt;mso-bidi-font-size:12.0pt;
font-family:Arial;mso-ansi-language:EN-GB'>Regards Lon =
Weffers’<o:p></o:p></span></font></span></p>
<p class=3DMsoNormal><span class=3DEmailStijl15><font size=3D2 =
color=3Dblack
face=3DArial><span lang=3DEN-GB =
style=3D'font-size:10.0pt;mso-bidi-font-size:12.0pt;
font-family:Arial;mso-ansi-language:EN-GB'><![if =
!supportEmptyParas]> <![endif]><o:p></o:p></span></font></span></p>
</div>
</body>
</html>
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Date: Fri, 22 Mar 2002 12:07:48 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Steve Owen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Steve Owen <[log in to unmask]>
Subject: Re: Dendrites growth
X-To: "Bissonnette, Jean-Francois" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi Jean,
If you want pictures of Dendrites go to www.npl.co.uk/npl/ei Then click on
SOLDERABILITY under the heading KEY WORDS. Then click on RELIABILITY.
Dendrites are here under RELIABILITY and CLEANLINESS.
Good luck
Steve.
-----Original Message-----
From: Bissonnette, Jean-Francois [mailto:[log in to unmask]]
Sent: 21 March 2002 21:41
To: [log in to unmask]
Subject: Re: [TN] Dendrites growth
Thank you all for your answers.
Anyone has a picture of dendrites?
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 2:44 PM
To: [log in to unmask]
Subject: Re: [TN] Dendrites growth
In a message dated 3/21/2002 10:24:53 AM US Eastern Standard Time,
[log in to unmask] writes:
<< Is conformal coating a good protection against dendrites? >>
Graham's answer is a very good one. In a way, this question reminds me of
an
advertisement that I often saw in bicycling magazines during my college
days.
It was for a new type of lock to hold one's bicycle to the parking rack,
and
it had for a headline "Resists Atomic Bombs". The key being that it was not
100% successful, but it did offer resistance.
In every comparative test that I have ever done, uncoated boards fared
far
worse than coated ones with respect to dendritic growth. Does that mean
that
conformal coating will prevent dendrites from EVER appearing? Clearly not.
My typical tests were 100 hours at 85 C and 85% RH, with power applied, with
the acrylic coated boards normally surviving the entire test and the
uncoated
boards failing in 2-8 hours, depending on the soldering process variables
involved.
Jon Moore
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Date: Fri, 22 Mar 2002 07:25:45 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: PCB exposure to solvents
X-To: "KIPPING, Michael (York Rd)" <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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We have used MEK to take multi-layer PWBs apart for reverse engineering
purposes. It isn't very fast but it is effective. We have not studied how
much time it takes before the board begins to delaminate. Room temperature
the solvent is not very effective. Heating improves performance . . . which
would be a bad thing from your perspective.
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of KIPPING, Michael
> (York Rd)
> Sent: Friday, March 22, 2002 4:37 AM
> To: [log in to unmask]
> Subject: [TN] PCB exposure to solvents
>
>
> Hi there
>
> We conformally coat our PCB assemblies using an acrylic and use
> Methyl Ethyl
> Ketone to strip assemblies if they require rework.
> Has anyone carried out any work on the maximum exposure time you
> can expose
> PCBs to solvents? (I realise that it will depend on the laminate
> materials,
> component constuction etc.)
>
> Thanks
>
> Michael Kipping
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Date: Fri, 22 Mar 2002 06:29:17 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: esd defect opamp
X-To: [log in to unmask]
Been down this road, and all others associated with failure modes,
mechanisms, effects, and the analysis thereof. Sure, the possibility
exists. So do many others.
I placed a report/presentation on a ftp site some time back. It included all
the analysis I had done concerning GaAs FET amplifier failures. There are
about ten or so blank pages where the ESD failures were supposed to go.
Aganin, the pages were blank.
I had two labs do ESD (both LCD and SEM search), PIND, Acoustic Microscopy,
RGA, SEM, EDX, X-section, X-Ray, thermal, mechanical, and all other viable
tests pertaining to these devices, in accordance with MIL-STD-883E, and
found the failure mechanism to be a single PCB design issue with a little
help from just a few suspect prototype components. The component and design
issues were resolved and the assembly did as specified.
MoonMan
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Date: Fri, 22 Mar 2002 07:34:30 -0500
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "[log in to unmask]" <[log in to unmask]>
Subject: Re: NTC RE: [TN] PWB PACKAGING
Content-Transfer-Encoding: Quoted-Printable
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Wolf...
So is that what you call your workday...that "small little inconvenience
during the day" ~smiling~
As I'm living and working in Texas, I'm still looking for my summer job in Seattle... Just can't seem to get the owner to=
open up Network Circuits, Inc WEST. Just don't look forward to Texas summer's in a PCB plating or press area...wheeeww!!=
!
Franklin
Original Message:
-----------------
From: Busko, Wolfgang [log in to unmask]
Date: Fri, 22 Mar 2002 09:17:54 +0100
To: [log in to unmask]
Subject: Re: [TN] NTC RE: [TN] PWB PACKAGING
Folks,
a while ago ( about 2 years ) there was a thread on SMTnet =B4bout a site in
Puerto Rico just 50m from a beautiful beach (at least I hope =B4t=B4was
beautiful)...
.. wonder if it=B4s still there ... and maybe doing fine ...and maybe
thinking of expanding ...
But, be honest, would you really like to work in such a caribean-dream-place
instead of ... mmmh ... oh may be they have this place fit to the given
suggestions and it=B4s a quite good climate in there. Leaves at least the
evenings and weekends to compensate for that small little inconvenience
during the days.
I think Earl knew the place and all of it=B4s amenities ;-)
Just dreaming away
Wolfgang
> -----Original Message-----
> From: Dan R. Johnson [mailto:[log in to unmask]]
> Sent: Thursday, March 21, 2002 10:12 PM
> To: [log in to unmask]
> Subject: Re: [TN] NTC RE: [TN] PWB PACKAGING
>
>
> Dan (looking at snow in the forecast for the weekend) comments.
> Please, please lets us know when you find them, I'll send my resume.
>
> Dan
>
> --------------------------------------------------------------
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Date: Fri, 22 Mar 2002 07:50:48 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Andy Magee <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Andy Magee <[log in to unmask]>
Subject: Re: Dendrite Growth
MIME-Version: 1.0
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boundary="----=_NextPart_000_003E_01C1D176.47AAB340"
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------=_NextPart_000_003E_01C1D176.47AAB340
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
As for the Holy Trinity of dendritic growth, be careful about where you =
think the contamination element is coming from. I did some papers on =
this back in 94-97. (Electrolytic Metal Migration In Flexible Printed =
Circuits) Essentially what we found was that with perfectly prepared =
base circuits (no measurable contamination) the application of coverfilm =
alone could lead to potential dendritic growth problems. It was entirely =
dependent on the resin formulation of the adhesive in the coverfilm, and =
you could grow a beautiful set of arching dendrites (following the field =
lines) through the adhesive between traces. The problem was that the =
adhesive had enough inherent ionics in it to become a solid state =
electrolyte when exposed to moisture. The bad news was that the control =
in our test was the industry standard at the time, and there were tons =
of circuits being made (including for avionics applications) with the =
susceptible coverfilm formulation.=20
The interesting thing about this growth mode was that it had a clear =
incubation period, followed by steady growth until the circuit closed. =
It the circuit was going to fail you knew it fairly quickly. If it was a =
good one, no matter how long you left it, it would never initiate =
dendrites. Depending on the current you could get the dendrites to act =
like a fuse. Once they closed the circuit, high enough current would =
flow to blow the fuse, and then a new dendrite would start growing to =
replace it. The adhesive in question wasn't fire resistant, and we =
wondered if it would ever start a fire. We found numerous charred spots, =
but never got one to torch off.
I always wanted to invent something that would take advantage of the =
solid state electrolyte effect, but for now I'm still sleeping on it.
All the best,
Andy Magee - Flex Guru
Senior Consultant - Bourton Group
------=_NextPart_000_003E_01C1D176.47AAB340
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charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META content=3D"text/html; charset=3Diso-8859-1" =
http-equiv=3DContent-Type>
<META content=3D"MSHTML 5.00.3018.900" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial>As for the Holy Trinity of dendritic growth, be =
careful=20
about where you think the contamination element is coming from. I did =
some=20
papers on this back in 94-97. (<FONT size=3D3><SPAN=20
style=3D"FONT-FAMILY: Times; FONT-SIZE: 10pt; mso-fareast-font-family: =
'Times New Roman'; mso-bidi-font-family: 'Times New Roman'; =
mso-ansi-language: EN-US; mso-fareast-language: EN-US; =
mso-bidi-language: AR-SA"><FONT=20
face=3DArial size=3D3>Electrolytic Metal Migration In Flexible Printed =
Circuits)=20
Essentially what we found was that with perfectly prepared base circuits =
(no=20
measurable contamination) the application of coverfilm alone could lead =
to=20
potential dendritic growth problems. It was entirely dependent on the =
resin=20
formulation of the adhesive in the coverfilm, and you could grow a =
beautiful set=20
of arching dendrites (following the field lines) through the adhesive =
between=20
traces. The problem was that the adhesive had enough inherent ionics in =
it to=20
become a solid state electrolyte when exposed to moisture. The bad news =
was=20
that the control in our test was the industry standard at the time, =
and=20
there were tons of circuits being made (including for avionics=20
applications) with the susceptible coverfilm formulation.=20
</FONT></SPAN></FONT></FONT></DIV>
<DIV><FONT face=3DArial><FONT size=3D3><SPAN=20
style=3D"FONT-FAMILY: Times; FONT-SIZE: 10pt; mso-fareast-font-family: =
'Times New Roman'; mso-bidi-font-family: 'Times New Roman'; =
mso-ansi-language: EN-US; mso-fareast-language: EN-US; =
mso-bidi-language: AR-SA"></SPAN></FONT></FONT> </DIV>
<DIV><FONT face=3DArial size=3D3><SPAN=20
style=3D"FONT-FAMILY: Times; FONT-SIZE: 10pt; mso-fareast-font-family: =
'Times New Roman'; mso-bidi-font-family: 'Times New Roman'; =
mso-ansi-language: EN-US; mso-fareast-language: EN-US; =
mso-bidi-language: AR-SA"><FONT=20
face=3DArial size=3D3>The interesting thing about this growth mode was =
that it had a=20
clear incubation period, followed by steady growth until the circuit =
closed. It=20
the circuit was going to fail you knew it fairly quickly. If it was a =
good one,=20
no matter how long you left it, it would never initiate dendrites. =
Depending on=20
the current you could get the dendrites to act like a fuse. Once they =
closed the=20
circuit, high enough current would flow to blow the fuse, and then =
a new=20
dendrite would start growing to replace it. The adhesive in question =
wasn't fire=20
resistant, and we wondered if it would ever start a fire. We found =
numerous=20
charred spots, but never got one to torch =
off.</FONT></SPAN></FONT></DIV>
<DIV><SPAN=20
style=3D"FONT-FAMILY: Times; FONT-SIZE: 10pt; mso-fareast-font-family: =
'Times New Roman'; mso-bidi-font-family: 'Times New Roman'; =
mso-ansi-language: EN-US; mso-fareast-language: EN-US; =
mso-bidi-language: AR-SA"></SPAN> </DIV>
<DIV><FONT face=3DArial size=3D3><SPAN=20
style=3D"FONT-FAMILY: Times; FONT-SIZE: 10pt; mso-fareast-font-family: =
'Times New Roman'; mso-bidi-font-family: 'Times New Roman'; =
mso-ansi-language: EN-US; mso-fareast-language: EN-US; =
mso-bidi-language: AR-SA"><FONT=20
face=3DArial size=3D3>I always wanted to invent something that would =
take advantage=20
of the solid state electrolyte effect, but for now I'm still sleeping on =
it.</FONT></SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D3><SPAN=20
style=3D"FONT-FAMILY: Times; FONT-SIZE: 10pt; mso-fareast-font-family: =
'Times New Roman'; mso-bidi-font-family: 'Times New Roman'; =
mso-ansi-language: EN-US; mso-fareast-language: EN-US; =
mso-bidi-language: AR-SA"></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D3><SPAN=20
style=3D"FONT-FAMILY: Times; FONT-SIZE: 10pt; mso-fareast-font-family: =
'Times New Roman'; mso-bidi-font-family: 'Times New Roman'; =
mso-ansi-language: EN-US; mso-fareast-language: EN-US; =
mso-bidi-language: AR-SA"><FONT=20
face=3DArial size=3D3>All the best,</FONT></SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D3><SPAN=20
style=3D"FONT-FAMILY: Times; FONT-SIZE: 10pt; mso-fareast-font-family: =
'Times New Roman'; mso-bidi-font-family: 'Times New Roman'; =
mso-ansi-language: EN-US; mso-fareast-language: EN-US; =
mso-bidi-language: AR-SA"><FONT=20
face=3DArial size=3D3>Andy Magee - Flex Guru</FONT></SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D3><SPAN=20
style=3D"FONT-FAMILY: Times; FONT-SIZE: 10pt; mso-fareast-font-family: =
'Times New Roman'; mso-bidi-font-family: 'Times New Roman'; =
mso-ansi-language: EN-US; mso-fareast-language: EN-US; =
mso-bidi-language: AR-SA"><FONT=20
face=3DArial size=3D3>Senior Consultant - Bourton =
Group</FONT></SPAN></FONT></DIV>
<DIV> </DIV>
<DIV><SPAN=20
style=3D"FONT-FAMILY: Times; FONT-SIZE: 10pt; mso-fareast-font-family: =
'Times New Roman'; mso-bidi-font-family: 'Times New Roman'; =
mso-ansi-language: EN-US; mso-fareast-language: EN-US; =
mso-bidi-language: AR-SA"></SPAN> </DIV>
<DIV> </DIV></BODY></HTML>
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Date: Fri, 22 Mar 2002 08:02:16 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Chris Almeras <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Chris Almeras <[log in to unmask]>
Subject: Re: Quick turn fab shop
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There is one problem with going with the big boys who are hurting for
work, if they have not been doing rapid 3-5 day turns, the quality issue
can become a major issue when speeding up your normal process time. The
quick turn shops who have been doing this kind of business for years may
come at a little higher price, but their process in a quick turn
environment is already stable, and some of those shops can turn a pcb in
24 to 48 hours. Just a thought.
Chris Almeras
DSI
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 3:58 PM
To: [log in to unmask]
Subject: Re: [TN] Quick turn fab shop
With the pcb biz so slow now, most big shops are scratching for work.
you can
get 3-5 days turn with competive prices from the big boys, they have the
latest
equipment and technologies. Get the best of both worlds! Good luck!
"Mauro, Dan" <[log in to unmask]> on 03/21/2002 12:15:27 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please
respond to
"Mauro, Dan" <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: Warren Crow/US/I-O INC)
Subject: Re: [TN] Quick turn fab shop
Explain to me what each means to you? Then maybe I can pick any two.....
Dan
-----Original Message-----
From: Mark Steele [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 1:03 PM
To: [log in to unmask]
Subject: Re: [TN] Quick turn fab shop
Quick, good, cheap. Pick any two...
Mark
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 6:07 AM
Subject: Quick turn fab shop
Hi all
Can anyone out there suggest or give recommendations on a good quality
quick
turn fab shop.
Greatly appreciate any suggestions.
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Date: Fri, 22 Mar 2002 07:06:57 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: PCB exposure to solvents
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
We conformally coat our PCB assemblies using an acrylic and use Methyl
Ethyl
Ketone to strip assemblies if they require rework.
Has anyone carried out any work on the maximum exposure time you can expose
PCBs to solvents? (I realise that it will depend on the laminate
materials,
component constuction etc.)
Michael,
The maximum time is "no longer than absolutely necessary". We use toluene
to strip our acrylics and it seldom takes longer than 5 minutes. We verify
removal using black light. MEK is pretty darned aggressive. The time is
more dependent on the solder mask you are using, since that covers most of
your laminate surface. Most solder masks are only designed to take 4-5
exposures to reflow conditions before they start to break down. By the
time you get to the rework stage, you may have already seen 3-4 reflow
excursions (HASL, SMT reflow, wave, touchup), so the mask becomes more
porous and more susceptible to chemical attack.
Methinks I hear echos in the background of someone who left the boards in
the MEK over a lunch break and wonders if the assemblies are still
good......
Doug Pauls
Rockwell Collins
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Date: Fri, 22 Mar 2002 08:31:41 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Goldman, Patricia J." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Goldman, Patricia J." <[log in to unmask]>
Subject: Re: e-mail
X-To: "Mcmaster, Michael" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
They were advertising equipment to be shown at IPC Expo... Obviously not a very good way to do it!
Patty
Patricia J. Goldman
PPG Industries, Inc.
724-274-3417
[log in to unmask]
-----Original Message-----
From: Mcmaster, Michael [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 8:22 PM
To: [log in to unmask]
Subject: Re: [TN] e-mail
I got it, too. Ditto on delete.
> ----------
> From:
> [log in to unmask][SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;[log in to unmask]
> Sent: Thursday, March 21, 2002 7:04 AM
> To: [log in to unmask]
> Subject: [TN] e-mail
>
> I received an e-mail From:Leading Edge Devices ([log in to unmask]) with the
> Subject: Must see at IPC containing 5 image attachments and 1 untitled
> attachment. With all the BS viruses going around I immediately hit DELETE.
> Anyone out there aware of this?
> Rick Howieson
> Delta Group Electronics, Inc.
>
> --------------------------------------------------------------------------
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>
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Date: Fri, 22 Mar 2002 08:49:15 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Francois Monette <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Francois Monette <[log in to unmask]>
Subject: BGA reballing
X-cc: [log in to unmask]
In-Reply-To: <[log in to unmask]>
MIME-version: 1.0
Content-type: text/plain; charset=iso-8859-1
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Justin,
As far as I know, the number 3 that came up in other replies is based on the
fact that all moisture sensitive components, including PBGAs, are
pre-conditioned with 3 reflow cycles prior to package qualification (ref.
J-STD-020 and J-STD-033). This is done right after soaking the parts to
their specified moisture content. This means that you can rely on the fact
that the parts will survive at least 3 reflow cycles at their maximum floor
life which is defined by their MS level. Beyond that, there is no data to
guarantee the reliability of the component. Of course if you bake the parts
prior to reflow you will reduce the concern relative to moisture/reflow
damage. On the other hand, there is also a limit specified for the maximum
number of bake cycles at 125C (currently only one bake cycle allowed),
because of solderability issues.
As someone already pointed out, boards with BGAs on both sides imply at
least two reflow cycles to begin with. Removal, re-attachment and reballing
should also be considered if the package body exceeds 200C. This is the
critical limit set by the IPC/JEDEC standard to define a reflow cycle which
can cause potential internal damage to the parts.
I hope this is helpful.
Francois Monette
Cogiscan Inc.
Tel : 450-534-2644
Fax : 450-534-0092
E-mail : [log in to unmask]
www.cogiscan.com
Date: Thu, 21 Mar 2002 14:27:48 -0000
From: "Braime, Justin" <[log in to unmask]>
Subject: BGA reballing
Hi guys,
I am looking at using the SolderQuik preforms for reballing some BGAs, but I
am concerned about the reliability of this process in terms of the number of
thermal cycles being sustained by the BGA component. Does anybody know of
any studies done on this?
Thanks
Justin Braime
Senior Production Engineer
Racal Instruments Ltd
480 Bath Rd, Slough
Berkshire, SL1 6BE
England
Tel: +44 (0)1628 604455
Fax: +44 (0)1628 662017
E-mail: [log in to unmask]
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Date: Fri, 22 Mar 2002 09:54:07 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: esd defect opamp
X-To: Lon Weffers <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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The component is ESD rated 1000V and is a bipolar input desgin.
My experience with these type devices; they are pretty tough. Much less
suseptable to damage than many MOSFET or JFET input opamps. Which may have
500V ratings or less.
I find my mind moving in the same path as Moon's. What about EOS damage?
What kind of buffer is there between the input and the outside world.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Lon Weffers
Sent: Friday, March 22, 2002 6:57 AM
To: [log in to unmask]
Subject: [TN] esd defect opamp
Dear technetters,
How likely is the fact that an assembled AD844 opamp gets defect by ESD?
We are certain that these components were produced in an esd safe process,
so I presume there is an esd problem with our customer.
We produced about 50 boards with on each board 4 AD844’s. 15 boards have
damaged AD844’s on different places on the board.
Regards Lon Weffers’
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<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN =
class=3D72495713-22032002>The=20
component is ESD rated 1000V and is a bipolar input desgin. =
</SPAN></FONT></DIV>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN=20
class=3D72495713-22032002></SPAN></FONT> </DIV>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN =
class=3D72495713-22032002>My=20
experience with these type devices; they are pretty tough. Much less =
suseptable=20
to damage than many MOSFET or JFET input opamps. Which may have 500V =
ratings or=20
less.</SPAN></FONT></DIV>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN=20
class=3D72495713-22032002></SPAN></FONT> </DIV>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN =
class=3D72495713-22032002>I find=20
my mind moving in the same path as Moon's. What about EOS damage?=20
</SPAN></FONT><FONT color=3D#0000ff face=3DArial size=3D2><SPAN=20
class=3D72495713-22032002>What kind of buffer is there between the =
input and=20
the outside world. </SPAN></FONT></DIV>
<BLOCKQUOTE=20
style=3D"BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: =
0px; PADDING-LEFT: 5px">
<DIV class=3DOutlookMessageHeader><FONT face=3D"Times New Roman"=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of</B> Lon =
Weffers<BR><B>Sent:</B>=20
Friday, March 22, 2002 6:57 AM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> [TN] esd defect =
opamp<BR><BR></DIV></FONT>
<DIV class=3DSection1>
<P class=3DMsoNormal><SPAN class=3DEmailStijl15><FONT color=3Dblack =
face=3DArial=20
size=3D2><SPAN lang=3DEN-GB=20
style=3D"FONT-FAMILY: Arial; FONT-SIZE: 10pt; mso-bidi-font-size: =
12.0pt; mso-ansi-language: EN-GB">Dear=20
technetters,<o:p></o:p></SPAN></FONT></SPAN></P>
<P class=3DMsoNormal><SPAN class=3DEmailStijl15><FONT color=3Dblack =
face=3DArial=20
size=3D2><SPAN lang=3DEN-GB=20
style=3D"FONT-FAMILY: Arial; FONT-SIZE: 10pt; mso-bidi-font-size: =
12.0pt; mso-ansi-language: EN-GB"><![if =
!supportEmptyParas]> <![endif]><o:p></o:p></SPAN></FONT></SPAN></P>
<P class=3DMsoNormal><SPAN class=3DEmailStijl15><FONT color=3Dblack =
face=3DArial=20
size=3D2><SPAN lang=3DEN-GB=20
style=3D"FONT-FAMILY: Arial; FONT-SIZE: 10pt; mso-bidi-font-size: =
12.0pt; mso-ansi-language: EN-GB">How=20
likely is the fact that an assembled AD844 opamp gets defect by ESD?=20
<o:p></o:p></SPAN></FONT></SPAN></P>
<P class=3DMsoNormal><SPAN class=3DEmailStijl15><FONT color=3Dblack =
face=3DArial=20
size=3D2><SPAN lang=3DEN-GB=20
style=3D"FONT-FAMILY: Arial; FONT-SIZE: 10pt; mso-bidi-font-size: =
12.0pt; mso-ansi-language: EN-GB">We=20
are certain that these components were produced in an esd safe =
process, so I=20
presume there is an esd problem with our=20
customer.<o:p></o:p></SPAN></FONT></SPAN></P>
<P class=3DMsoNormal><SPAN class=3DEmailStijl15><FONT color=3Dblack =
face=3DArial=20
size=3D2><SPAN lang=3DEN-GB=20
style=3D"FONT-FAMILY: Arial; FONT-SIZE: 10pt; mso-bidi-font-size: =
12.0pt; mso-ansi-language: EN-GB">We=20
produced about 50 boards with on each board 4 AD844’s. 15 boards =
have damaged=20
AD844’s on different places on the =
board.<o:p></o:p></SPAN></FONT></SPAN></P>
<P class=3DMsoNormal><SPAN class=3DEmailStijl15><FONT color=3Dblack =
face=3DArial=20
size=3D2><SPAN lang=3DEN-GB=20
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style=3D"FONT-FAMILY: Arial; FONT-SIZE: 10pt; mso-bidi-font-size: =
12.0pt; mso-ansi-language: EN-GB">Regards=20
Lon Weffers’<o:p></o:p></SPAN></FONT></SPAN></P>
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Date: Fri, 22 Mar 2002 14:54:09 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Subject: Re: Tiny black spots on copper foil surface
Or somebody sneezed.
You might try to recreate the spots by flicking some water on the panel.
It could also be algae growing in the tanks.
When I hear black spots on copper I think tarnish.
Hans
-----Original Message-----
From: JaMi Smith [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 2:57 PM
To: [log in to unmask]
Subject: Re: [TN] Tiny black spots on copper foil surface
Shirley,
Sounds like it might be very very small pin holes in your resist that is
letting in a microscopic amount of etchant.
JaMi Smith
-----Original Message-----
From: Shirley Xiao [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 11:14 PM
To: [log in to unmask]
Subject: [TN] Tiny black spots on copper foil surface
Dear All:
We encountered a problem after develop, etch & strip.
Lots of tiny black spots were found on copper surface.
We are sure that these tiny black spots are not
oxidization.They can not be removed by acetone but is
removable by micro etch.Before get result by EDX
element analysis, I wish anyone have similar
experience can share some information with me.
__________________________________________________
Do You Yahoo!?
Yahoo! Movies - coverage of the 74th Academy Awards(r)
http://movies.yahoo.com/
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Date: Fri, 22 Mar 2002 08:56:04 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Quick turn fab shop
X-To: Chris Almeras <[log in to unmask]>
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Using the big shops it's not a matter of "speeding up the process" it still take
the same time to build a board. They just have available capacity and will place
jobs ahead of others in the line from operation to operation. The advantage is
they will have automated equipment, expensive wet process monitors, AOI, modern
drills, mulit head flying grid testers. They tend to do fine pitch, blind and
burried, laser micro via, high aspect ratio, the tough stuff that requires
current technology equipment and processes as well as the easy. They are willing
to cut the expedite fees, reduce tooling charges. Side benifit is you only pay
tooling 1 time if you go to production with the same artwork. The smaller quick
turn shop might give more help and better personal service. Good luck either
way, we have had great success using the big guys for quick prototype for 1 1/2
yrs.
Chris Almeras <[log in to unmask]> on 03/22/2002 07:02:16 AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond to
Chris Almeras <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: Warren Crow/US/I-O INC)
Subject: Re: [TN] Quick turn fab shop
There is one problem with going with the big boys who are hurting for
work, if they have not been doing rapid 3-5 day turns, the quality issue
can become a major issue when speeding up your normal process time. The
quick turn shops who have been doing this kind of business for years may
come at a little higher price, but their process in a quick turn
environment is already stable, and some of those shops can turn a pcb in
24 to 48 hours. Just a thought.
Chris Almeras
DSI
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 3:58 PM
To: [log in to unmask]
Subject: Re: [TN] Quick turn fab shop
With the pcb biz so slow now, most big shops are scratching for work.
you can
get 3-5 days turn with competive prices from the big boys, they have the
latest
equipment and technologies. Get the best of both worlds! Good luck!
"Mauro, Dan" <[log in to unmask]> on 03/21/2002 12:15:27 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please
respond to
"Mauro, Dan" <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: Warren Crow/US/I-O INC)
Subject: Re: [TN] Quick turn fab shop
Explain to me what each means to you? Then maybe I can pick any two.....
Dan
-----Original Message-----
From: Mark Steele [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 1:03 PM
To: [log in to unmask]
Subject: Re: [TN] Quick turn fab shop
Quick, good, cheap. Pick any two...
Mark
-----Original Message-----
From: Mauro, Dan [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 6:07 AM
Subject: Quick turn fab shop
Hi all
Can anyone out there suggest or give recommendations on a good quality
quick
turn fab shop.
Greatly appreciate any suggestions.
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Date: Fri, 22 Mar 2002 09:56:01 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jim Mathis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jim Mathis <[log in to unmask]>
Subject: 2-sided SMT assemblies
MIME-Version: 1.0
Content-Type: multipart/alternative;
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My fellow TechNetters,
Can someone please point me to where I can find information for implement=
ing 2-sided SMT assembly processes? Any information about 2-sided reflow=
soldering, necessary equipment, inspection and testing, anything at all =
will be greatly appreciated.
Thanks, all!Get more from the Web. FREE MSN Explorer download : http://e=
xplorer.msn.com
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<HTML><BODY STYLE=3D"font:10pt verdana; border:none;"><DIV>My fellow Tech=
Netters,</DIV> <DIV> </DIV> <DIV>Can someone please point me to wher=
e I can find information for implementing 2-sided SMT assembly processes?=
Any information about 2-sided reflow soldering, necessary equipmen=
t, inspection and testing, anything at all will be greatly appreciated.</=
DIV> <DIV> </DIV> <DIV>Thanks, all!<BR><BR></DIV></BODY></HTML><br c=
lear=3Dall><hr>Get more from the Web. FREE MSN Explorer download : <a hr=
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Date: Fri, 22 Mar 2002 12:58:20 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Bissonnette, Jean-Francois" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Bissonnette, Jean-Francois" <[log in to unmask]>
Subject: Dendrites: More than expected
MIME-Version: 1.0
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Thank you all for your precious information. That will be some helpful
information.
Jean-Fran=E7ois Bissonnette
V=E9rificateur, Contr=F4le de la Qualit=E9
=C9lectronique
Produits et Proc=E9d=E9s
Vapor Rail Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 x2021
(514) 335-4231 fax
<<Bissonnette, Jean-Francois.vcf>>=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally privileged and=
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Date: Fri, 22 Mar 2002 10:21:46 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
James TerVeen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: James TerVeen <[log in to unmask]>
Subject: Re: 2-sided SMT assemblies
X-To: Jim Mathis <[log in to unmask]>
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I am certain that everyone will give some great ideas for all your
questions. My one and I think very important one, will be to make sure
everyone knows all during the process that they are two sided boards, and
that you handle them differently. If you do not, you will find missing
parts later in the assembly process and no one will know how it happened.
Operators need to understand this otherwise you will be pointing fingers
later.
Jim Mathis
<rsimathis@HOT To: [log in to unmask]
MAIL.COM> cc:
Sent by: Subject: [TN] 2-sided SMT assemblies
TechNet
<[log in to unmask]
RG>
03/22/02 09:56
AM
Please respond
to "TechNet
E-Mail
Forum.";
Please respond
to Jim Mathis
My fellow TechNetters,
Can someone please point me to where I can find information for
implementing 2-sided SMT assembly processes? Any information about 2-sided
reflow soldering, necessary equipment, inspection and testing, anything at
all will be greatly appreciated.
Thanks, all!
Get more from the Web. FREE MSN Explorer download : http://explorer.msn.com
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Date: Fri, 22 Mar 2002 13:46:57 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: 2-sided SMT assemblies
X-To: Jim Mathis <[log in to unmask]>
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Unless you have about $1M and 6-10 months to spend. Try to send work out to
CEM's (Custom Electronic Manufacturers).
Jim Mathis <[log in to unmask]> on 03/22/2002 08:56:01 AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond to
Jim Mathis <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: Warren Crow/US/I-O INC)
Subject: [TN] 2-sided SMT assemblies
My fellow TechNetters,
Can someone please point me to where I can find information for implementing
2-sided SMT assembly processes? Any information about 2-sided reflow soldering,
necessary equipment, inspection and testing, anything at all will be greatly
appreciated.
Thanks, all!Get more from the Web. FREE MSN Explorer download :
http://explorer.msn.com
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Date: Fri, 22 Mar 2002 15:10:05 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
ART HAMPTON <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: ART HAMPTON <[log in to unmask]>
Subject: 2-sided SMD assembiles
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Hello Jim,=0D
My one and only bit of advice is if you are reflowing components on the
bottom side=0D
then your profile must be robust enough to maintain a proper reflow on th=
e
top and not lose =0D
the parts on the bottom side, however this should not be a problem due to
surface tension,=0D
next depending on the type of transport system you reflow oven has will h=
elp
you determine =0D
how successful you will be.=0D
=0D
Art,=0D
Q-Tronics
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<DIV>My one and only bit of advice is if you are=20
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problem due to surface tension,</DIV>
<DIV>next depending on the type of transport system you reflow=
oven=20
has will help you determine </DIV>
<DIV>how successful you will be.</DIV>
<DIV> </DIV>
<DIV>Art,</DIV>
<DIV>Q-Tronics</DIV></DIV></DIV></DIV></TD></TR>
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Date: Fri, 22 Mar 2002 16:53:42 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Subject: Re: Flattening a board during assembly
Hi Michael,
I know that board flattening procedure isn't board friendly thing but what's
a better alternative? It came down to either do the bake & twist procedure
or scrap the panels.
You are 100% correct that excesses could cause irreparable damage to the
panels but the procedure was only done by the PE (me), QEs and the Final
Inspect Leads. Your caution/warning could apply to any manual operation.
At least a flattened board stayed flat and didn't curl up when it saw an
elevated temp. (smt reflow) at the assembly house. If I could have figured
a way to laminate an unbalanced construction flat the extra procedure
wouldn't have been necessary.
Hans
-----Original Message-----
From: Mcmaster, Michael [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 7:10 PM
To: [log in to unmask]
Subject: Re: [TN] Flattening a board during assembly
Rumor has it that we've reached the bottom of the recent economic downturn.
That may or may not be true. All I know is that I'm busy enough that I've
fallen a few weeks and a few hundred Technet e-mails behind. Maybe I need
to introduce my Technet E-mail Backlog Index and see how it corresponds to
the other financial indicators.
All kidding aside, Hans your "manual assist" process is not advised. I've
seen boards with cracked soldermask that were traced down to someone
"flattening" a warped board before placing on a driller or router bed. I
don't recommend flexing cold boards to remove warpage.
> ----------
> From: Hinners Hans M Civ
> WRALC/LUGE[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;Hinners Hans M Civ WRALC/LUGE
> Sent: Friday, March 08, 2002 10:27 AM
> To: [log in to unmask]
> Subject: Re: [TN] Flattening a board during assembly
>
> Hey Daan,
>
> Here's a generic dewarp I've used in the past. You or preferably the Fab
> house should have an oven large enough to load the panels or boards. If
> done properly you won't see re-warp during the assembly process. Dewarp
> is
> not a board friendly process and I shudder to consider the longer term
> reliability issues but it gets them flat when nothing else will. It's
> usually better to dewarp boards instead of panels because of stress relief
> that occurs at Route. On the other hand a 2 or 4 up panel cuts your cycle
> time down considerably.
>
> 1. Load warped panels into oven. (Keep stacks reasonable sized: ~500
> mils
> of board stock or less - 6-10 panels depending on thickness)
> 2. Place several Caul plates (that match or overlap panel size) ~50
> pounds
> of weight & Use Kraft Paper (Sulfur Free) to protect panels
> 3. Bake at 340+ F for 4-6 hours (Material must be at or slightly above
> Tg)
> 4. Cool slowly to room temp.
> 5. Manually assist (Bend & Twist) the dewarp at Final Inspect. (Great
> upper body workout on those 200+ board shipments)
> 6. Inspect Panels on Flatness (Granite) Table. ("Tap" test the 4
> corners.
> If the board's corners don't touch the table you've got more flexing to
> do.)
>
> Hans
>
> AC-130 Gunship Motto: "You can run but, you'll only die tired."
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> Hans M. Hinners
> Electronics Engineer
> Warner Robins - Air Logistics Center (WR-ALC/LUGE)
> 226 Cochran Street
> Robins AFB GA 31098-1622
>
> mailto:[log in to unmask]
>
> Com: (478) 926 - 5224
> Fax: (478) 926 - 4911
> DSN Prefix: 468
>
>
>
> -----Original Message-----
> From: d. terstegge [mailto:[log in to unmask]]
> Sent: Thursday, March 07, 2002 11:48 AM
> To: [log in to unmask]
> Subject: [TN] Flattening a board during assembly
>
>
> Hi Technetters,
>
> We've got a batch of boards here that's really twisted (about 1.5 % when
> measured according to IPC-TM-650) due to imbalanced design. The customers
> is
> not willing to change the design, and we discussed with them the
> possibility
> of using a carrier-frame for flattening these boards while they are
> processed through our SMT-line.
>
> My worry is that this results in unacceptable stress in the solder joints
> as
> soon as the board is released from the carrier. Fortunately there's no BGA
> on this board, but it does have a small QFP and some 40 mm long
> SMT-connectors. It's supposed to be a high-reliability military product.
>
> Does anyone have any data on the effects of such internal stresses ?
> Also other comments are welcome.
>
> Best regards.
>
> Daan Terstegge
> SMT Centre
> Thales Communications
> Unclassified mail
> Personal Website: http://www.smtinfo.net
>
> --------------------------------------------------------------------------
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Date: Fri, 22 Mar 2002 17:22:29 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: PCB exposure to solvents
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Toluene or xylene or butyl acetate generally work well on acrylics, with less
damage to the PCB.
Jon Moore
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Date: Sat, 23 Mar 2002 02:30:04 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: PCB exposure to solvents
X-To: "KIPPING, Michael (York Rd)" <[log in to unmask]>
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Michael
It all depends on the solvent. MEK is a fairly aggressive and toxic
solvent. I'd suggest trying to find a milder one, such as one of the
paraffins. I'll answer your question with another: how long is a piece
of string?
Brian
"KIPPING, Michael (York Rd)" wrote:
>
> Hi there
>
> We conformally coat our PCB assemblies using an acrylic and use Methyl Ethyl
> Ketone to strip assemblies if they require rework.
> Has anyone carried out any work on the maximum exposure time you can expose
> PCBs to solvents? (I realise that it will depend on the laminate materials,
> component constuction etc.)
>
> Thanks
>
> Michael Kipping
>
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Date: Mon, 25 Mar 2002 07:05:35 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Atkinson, Neil" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Atkinson, Neil" <[log in to unmask]>
Subject: Re: BGA reballing
MIME-Version: 1.0
Content-Type: text/plain; charset="ISO-8859-1"
I guess the key here is to minimise the heat sustained by the BGA.
I have seen one company here in the UK (Retronix) who use a laser system for
reballing BGAs. I don't have direct experience of using their service for
BGAs but having witnessed it working, it looks pretty good at only applying
the minimum amount of heat exactly where it is required...
Neil
-----Original Message-----
From: Peter Swanson [mailto:[log in to unmask]]
Sent: 21 March 2002 16:57
Subject: Re: BGA reballing
Justin,
A good question. Number of BGA reflow steps:
1) Initial placement
2) Removal from pcb
3) Reball
4) Replacement on pcb
4 temp excursions. When this issue has been brought up before in this forum,
I do not believe that a written spec for the maximum number of reflow cycles
of a BGA was ever found. The specific part manufacturer might state
something... There was a rumour that Motorola specified 3 reflow cycles for
its parts, but I never saw anything in writing, and this may be an "urban
myth".
In the TechNet archives there is an e-mail from Axiom Electronics stating
"In all of the parts we have removed, reballed, and replaced, we have not
seen damage due to numerous reflow cycles." This was in 1996 tho... (Message
no 005489). There may be more info there.
It would be important to strictly observe the baking requirements as
determined by the moisture sensitivity level of the device. The reflow
cycles should all be to the correct profiles to minimise thermal shock, etc.
Declaring a commercial interest (as we sell this product), no customer has
reported issues to us.
I would be interested to hear further views!
Regards,
Peter
--
=========================================================
Peter Swanson [log in to unmask]
INTERTRONICS http://www.intertronics.co.uk
INTERTRONICS is dedicated to providing quality material,
consumable and equipment solutions to the electronics
manufacturing and other technology based industries, with
the highest levels of technical support and customer
service.
-----Original Message-----
From: Braime, Justin [mailto:[log in to unmask]]
Sent: 21 March 2002 14:28
To: [log in to unmask]
Subject: [TN] BGA reballing
Hi guys,
I am looking at using the SolderQuik preforms for reballing some BGAs, but I
am concerned about the reliability of this process in terms of the number of
thermal cycles being sustained by the BGA component. Does anybody know of
any studies done on this?
Thanks
Justin Braime
Senior Production Engineer
Racal Instruments Ltd
480 Bath Rd, Slough
Berkshire, SL1 6BE
England
Tel: +44 (0)1628 604455
Fax: +44 (0)1628 662017
E-mail: [log in to unmask]
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Date: Mon, 25 Mar 2002 10:08:26 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Busko, Wolfgang" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Busko, Wolfgang" <[log in to unmask]>
Subject: Re: 2-sided SMT assemblies
X-To: Jim Mathis <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----_=_NextPart_001_01C1D3DC.9F4DDAB0"
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Hi Jim,
=20
depends on what your assemblies look like. With the usual stuff (R=B4s =
and C=B4s
and smaller (lighter parts)) on one side, usually called bottom side, =
it=B4s
should really not be a problem at all, just do the heavy stuff last.
As mentioned before look after possible mechanical impact of the =
already
populated side, especially during second reflow.=20
If you go for glueing and wavesolder SMD the same caution should be =
taken.
If the latter is true for you it might take a bit more effort to =
implement
the process of glueing and handling your workpieces, with doubleside =
reflow
it=B4s not that much of a problem ... except for your THT-parts.
=20
Good luck=20
=20
Wolfgang
=20
------_=_NextPart_001_01C1D3DC.9F4DDAB0
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4807.2300" name=3DGENERATOR></HEAD>
<BODY=20
style=3D"BORDER-RIGHT: medium none; BORDER-TOP: medium none; FONT: 10pt =
verdana; BORDER-LEFT: medium none; BORDER-BOTTOM: medium none">
<DIV><SPAN class=3D737355508-25032002><FONT face=3Dverdana>Hi=20
Jim,</FONT></SPAN></DIV>
<DIV><SPAN class=3D737355508-25032002></SPAN> </DIV>
<DIV><SPAN class=3D737355508-25032002><FONT face=3Dverdana>depends on =
what your=20
assemblies look like. With the usual stuff (R=B4s and C=B4s and smaller =
(lighter=20
parts)) on one side, usually called bottom side, it=B4s should really =
not be a=20
problem at all, just do the heavy stuff last.</FONT></SPAN></DIV>
<DIV><SPAN class=3D737355508-25032002>As mentioned before look after =
possible=20
mechanical impact of the already populated side, especially during =
second=20
reflow. </SPAN></DIV>
<DIV><SPAN class=3D737355508-25032002>If you go for glueing and =
wavesolder SMD the=20
same caution should be taken.</SPAN></DIV>
<DIV><SPAN class=3D737355508-25032002>If the latter is true for you it =
might take=20
a bit more effort to implement the process of glueing and handling your =
workpieces, with doubleside reflow it=B4s not that much of a problem =
... except=20
for your THT-parts.</SPAN></DIV>
<DIV><SPAN class=3D737355508-25032002></SPAN> </DIV>
<DIV><SPAN class=3D737355508-25032002><FONT face=3Dverdana>Good luck=20
</FONT></SPAN></DIV>
<DIV><SPAN class=3D737355508-25032002></SPAN> </DIV>
<DIV><SPAN class=3D737355508-25032002><FONT=20
face=3Dverdana>Wolfgang</FONT></SPAN></DIV>
<DIV><SPAN class=3D737355508-25032002></SPAN><FONT=20
face=3DTahoma><BR> </DIV></FONT></BODY></HTML>
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Date: Mon, 25 Mar 2002 06:29:34 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dieselberg, Ron" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dieselberg, Ron" <[log in to unmask]>
Subject: Re: Card Edge Connector
X-To: Scott Kauling <[log in to unmask]>
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Scott, in one of my former lives I used to do printer servicing for IBM. We
used an oil type of material (about the consistency of mineral oil) to lube
and protect the fingers and sockets. I cannot remember the name of the
material, but if you can contact your local IBM printer service engineer he
can probably tell you where you can get it. It is used very sparingly!
Good luck.
Ron Dieselberg
Trainer/Auditor
CMC ELECTRONICS
CINCINNATI
[log in to unmask]
-----Original Message-----
From: Scott Kauling [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 16:01 PM
To: [log in to unmask]
Subject: [TN] Card Edge Connector
We are inserting a backplane board with gold fingers into a
mother board with three connectors to accept the gold fingers.
Is anyone out there that has heard of, or is using some sort
of lubricant to insert boards into such connectors?
If you are what are you using?
SCOTT
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<TITLE>RE: [TN] Card Edge Connector</TITLE>
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<BODY>
<P><FONT SIZE=3D2 FACE=3D"Arial">Scott, in one of my former lives I =
used to do printer servicing for IBM. We used an oil type of material =
(about the consistency of mineral oil) to lube and protect the fingers =
and sockets. I cannot remember the name of the material, but if you can =
contact your local IBM printer service engineer he can probably tell =
you where you can get it.</FONT><U> <FONT SIZE=3D2 FACE=3D"Arial">It is =
used very sparingly!</FONT></U></P>
<P><FONT SIZE=3D2 FACE=3D"Arial">Good luck.</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Courier New">Ron Dieselberg</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">Trainer/Auditor</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">CMC ELECTRONICS</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">CINCINNATI</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">[log in to unmask]</FONT>
</P>
<UL><UL>
<P><A NAME=3D"_MailData"><FONT SIZE=3D2 FACE=3D"Arial">-----Original =
Message-----</FONT></A>
<BR><B><FONT SIZE=3D2 FACE=3D"Arial">From: Scott Kauling =
[<A =
HREF=3D"mailto:[log in to unmask]">mailto:[log in to unmask]</A>=
]</FONT></B>
<BR><B><FONT SIZE=3D2 FACE=3D"Arial">Sent: </FONT></B> <FONT =
SIZE=3D2 FACE=3D"Arial">Wednesday, March 20, 2002 16:01 PM</FONT>
<BR><B><FONT SIZE=3D2 =
FACE=3D"Arial">To: </FONT></B> <FONT SIZE=3D2 =
FACE=3D"Arial">[log in to unmask]</FONT>
<BR><B><FONT SIZE=3D2 =
FACE=3D"Arial">Subject: </FONT>=
</B> <FONT SIZE=3D2 FACE=3D"Arial">[TN] Card Edge Connector</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">We are inserting a backplane board =
with gold fingers into a mother board with three connectors to accept =
the gold fingers.</FONT></P>
<P><FONT SIZE=3D2 FACE=3D"Arial">Is anyone out there that has heard of, =
or is using some sort of lubricant to insert boards into such =
connectors?</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">If you are what are you using?</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">SCOTT</FONT>
</P>
<P><FONT SIZE=3D2 =
FACE=3D"Arial">---------------------------------------------------------=
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Date: Mon, 25 Mar 2002 13:46:20 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"d. terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: Re: 2-sided SMT assemblies
MIME-Version: 1.0 (Generated by NET-TEL Mailguard SMTP version 4.0.0.22)
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Hi Jim,
Another issue that you should think about is that you need to have some =
free areas on the first-assembled side of the board, so that you can =
support the board during stencilprinting of the second side. Especially =
when stencilling fine-pitch components board-support becomes a critical =
parameter.
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net=20
>>> Jim Mathis <[log in to unmask]> 03/22 3:56 pm >>>
My fellow TechNetters,
Can someone please point me to where I can find information for implementin=
g 2-sided SMT assembly processes? Any information about 2-sided reflow =
soldering, necessary equipment, inspection and testing, anything at all =
will be greatly appreciated.
Thanks, all!Get more from the Web. FREE MSN Explorer download : http://exp=
lorer.msn.com
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Date: Mon, 25 Mar 2002 08:20:15 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dieselberg, Ron" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dieselberg, Ron" <[log in to unmask]>
Subject: Re: PCB exposure to solvents
X-To: Brian Ellis <[log in to unmask]>
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Brian, I have the answer to the string quiz. Long enough to reach from one
tin can to the other tin can. Was I rite?
Ron Dieselberg
Trainer/Auditor
CMC ELECTRONICS
CINCINNATI
[log in to unmask]
-----Original Message-----
From: Brian Ellis [mailto:[log in to unmask]]
Sent: Friday, March 22, 2002 19:30 PM
To: [log in to unmask]
Subject: Re: [TN] PCB exposure to solvents
Michael
It all depends on the solvent. MEK is a fairly aggressive
and toxic
solvent. I'd suggest trying to find a milder one, such as
one of the
paraffins. I'll answer your question with another: how long
is a piece
of string?
Brian
"KIPPING, Michael (York Rd)" wrote:
>
> Hi there
>
> We conformally coat our PCB assemblies using an acrylic
and use Methyl Ethyl
> Ketone to strip assemblies if they require rework.
> Has anyone carried out any work on the maximum exposure
time you can expose
> PCBs to solvents? (I realise that it will depend on the
laminate materials,
> component constuction etc.)
>
> Thanks
>
> Michael Kipping
>
>
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<TITLE>RE: [TN] PCB exposure to solvents</TITLE>
</HEAD>
<BODY>
<P><FONT SIZE=3D2 FACE=3D"Arial">Brian, I have the answer to the string =
quiz. Long enough to reach from one tin can to the other tin can. Was I =
rite?</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Courier New">Ron Dieselberg</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">Trainer/Auditor</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">CMC ELECTRONICS</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">CINCINNATI</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Courier New">[log in to unmask]</FONT>
</P>
<UL><UL>
<P><A NAME=3D"_MailData"><FONT SIZE=3D2 FACE=3D"Arial">-----Original =
Message-----</FONT></A>
<BR><B><FONT SIZE=3D2 FACE=3D"Arial">From: Brian Ellis [<A =
HREF=3D"mailto:[log in to unmask]">mailto:[log in to unmask]</A>=
]</FONT></B>
<BR><B><FONT SIZE=3D2 FACE=3D"Arial">Sent: </FONT></B> <FONT =
SIZE=3D2 FACE=3D"Arial">Friday, March 22, 2002 19:30 PM</FONT>
<BR><B><FONT SIZE=3D2 =
FACE=3D"Arial">To: </FONT></B> <FONT SIZE=3D2 =
FACE=3D"Arial">[log in to unmask]</FONT>
<BR><B><FONT SIZE=3D2 =
FACE=3D"Arial">Subject: </FONT>=
</B> <FONT SIZE=3D2 FACE=3D"Arial">Re: [TN] PCB exposure to =
solvents</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">Michael</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">It all depends on the solvent. MEK is =
a fairly aggressive and toxic</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">solvent. I'd suggest trying to find a =
milder one, such as one of the</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">paraffins. I'll answer your question =
with another: how long is a piece</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">of string?</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">Brian</FONT>
</P>
<P><FONT SIZE=3D2 FACE=3D"Arial">"KIPPING, Michael (York Rd)" =
wrote:</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">></FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">> Hi there</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">></FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">> We conformally coat our PCB =
assemblies using an acrylic and use Methyl Ethyl</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">> Ketone to strip assemblies if =
they require rework.</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">> Has anyone carried out any work =
on the maximum exposure time you can expose</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">> PCBs to solvents? (I =
realise that it will depend on the laminate materials,</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">> component constuction =
etc.)</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">></FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">> Thanks</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">></FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">> Michael Kipping</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">></FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">> =
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Date: Mon, 25 Mar 2002 07:45:01 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: 2-sided SMT assemblies
X-To: [log in to unmask]
Good point Daan. Although, if you're fortunate enough to have the latest DEK
stuff as FormFlex, this needn't necessarily be the case.
Old Steve has one of those 288's, or whatever the number (I can't remember
them as 265's or is it 283 GSX'S and LITE'S like my old Chevy engines), I
think, and I got to play with one two years ago and again a few months ago.
Anyway, anyone care to comment on the form flex stuff? I remember
programming the fine pitch auto flex (fpa) and using the non fine pitch
version as well as machining permanent fixtures to do the same job but
expensive.
Hell, I'm going down a stencil printing memory lane over the past 5 years
plus I'm snowed in, bored, and freezing in MI. How times have changed!
MoonMan
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Date: Mon, 25 Mar 2002 15:06:27 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"d. terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: Re: 2-sided SMT assemblies
X-To: [log in to unmask]
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Hi Earl,
Since a few weeks we do have this formflex-system in our 265 and it seems =
to work quite good, although set-up time is a bit longer than DEK =
promised. We were used to making a board-specific metal plate with holes =
in it to place DEK's support pins in, and that's no longer needed. With =
about 3 new boards per week that saves an awefull lot of time for =
production engineering.=20
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
>>> Earl Moon <[log in to unmask]> 03/25 2:45 pm >>>
Good point Daan. Although, if you're fortunate enough to have the latest =
DEK
stuff as FormFlex, this needn't necessarily be the case.
Old Steve has one of those 288's, or whatever the number (I can't remember
them as 265's or is it 283 GSX'S and LITE'S like my old Chevy engines), I
think, and I got to play with one two years ago and again a few months =
ago.
Anyway, anyone care to comment on the form flex stuff? I remember
programming the fine pitch auto flex (fpa) and using the non fine pitch
version as well as machining permanent fixtures to do the same job but
expensive.
Hell, I'm going down a stencil printing memory lane over the past 5 years
plus I'm snowed in, bored, and freezing in MI. How times have changed!
MoonMan
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Date: Mon, 25 Mar 2002 14:17:21 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"KIPPING, Michael (York Rd)" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "KIPPING, Michael (York Rd)" <[log in to unmask]>
Subject: PCB exposure to solvents
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
So I take it from the responses so far that no-one has carried out any
testing to determine the length of time they are able to leave electronic
assemblies in solvent strip tanks?
Leaving an assembly in for 'the shortest possible time' is ok in theory but
it isn't a specification for operators to work by. Does this mean that we
are all relying on manufacturing operatives to make their own decisions on
how long to leave assemblies in for (do they have the training to make
decisions like that)?
Regards
Michael Kipping
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Date: Mon, 25 Mar 2002 08:48:32 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Charles Caswell <[log in to unmask]>
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Subject: Re: PCB exposure to solvents
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=20
-----Original Message-----
From: Dieselberg, Ron [mailto:[log in to unmask]]
Sent: Monday, March 25, 2002 7:20 AM
To: [log in to unmask]
Subject: Re: [TN] PCB exposure to solvents
I use plain isopropyl to strip acrylic conf. coat. Usually half hour =
soak brushing once or twice with a soft brush followed by aqueous =
cleaning. Sometimes have to repeat but works well and is safer for you =
and the product.
Charles Caswell
Process Lead, PCB
Frontier Electronic Systems
"KIPPING, Michael (York Rd)" wrote:=20
>=20
> Hi there=20
>=20
> We conformally coat our PCB assemblies using an acrylic and use Methyl =
Ethyl=20
> Ketone to strip assemblies if they require rework.=20
> Has anyone carried out any work on the maximum exposure time you can =
expose=20
> PCBs to solvents? (I realise that it will depend on the laminate =
materials,=20
> component constuction etc.)=20
>=20
> Thanks=20
>=20
> Michael Kipping=20
>=20
> =
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> information, or contact Keach Sasamori at [log in to unmask] or =
847-509-9700 ext.5315=20
> =
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<DIV> </DIV>
<BLOCKQUOTE>
<DIV align=3Dleft class=3DOutlookMessageHeader dir=3Dltr><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> Dieselberg, Ron=20
[mailto:[log in to unmask]]<BR><B>Sent:</B> Monday, March 25, =
2002 7:20=20
AM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> Re: [TN] PCB =
exposure to=20
solvents<BR><BR></DIV></FONT>
<UL>
<UL>
<P><SPAN class=3D290424214-25032002>I use plain isopropyl to strip =
acrylic=20
conf. coat. Usually half hour soak brushing once or twice with a =
soft=20
brush followed by aqueous cleaning. Sometimes have to repeat but =
works=20
well and is safer for you and the product.</SPAN></P>
<P><SPAN class=3D290424214-25032002>Charles Caswell</SPAN></P>
<P><SPAN class=3D290424214-25032002>Process Lead, PCB</SPAN></P>
<P><SPAN class=3D290424214-25032002>Frontier Electronic =
Systems</SPAN></P>
<P><FONT face=3DArial size=3D2>"KIPPING, Michael (York Rd)" =
wrote:</FONT>=20
<BR><FONT face=3DArial size=3D2>></FONT> <BR><FONT face=3DArial =
size=3D2>>=20
Hi there</FONT> <BR><FONT face=3DArial size=3D2>></FONT> =
<BR><FONT=20
face=3DArial size=3D2>> We conformally coat our PCB assemblies =
using an=20
acrylic and use Methyl Ethyl</FONT> <BR><FONT face=3DArial =
size=3D2>>=20
Ketone to strip assemblies if they require rework.</FONT> =
<BR><FONT=20
face=3DArial size=3D2>> Has anyone carried out any work on the =
maximum=20
exposure time you can expose</FONT> <BR><FONT face=3DArial =
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to solvents? (I realise that it will depend on the laminate=20
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<BR><FONT face=3DArial size=3D2>> Michael Kipping</FONT> =
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Date: Mon, 25 Mar 2002 08:51:06 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: 2-sided SMT assemblies
X-To: [log in to unmask]
Thanks Daan,
Doing this DFM/CE stuff, I don't get chances to keep up. So you can retro
older machines as well? Always hated programming FPA (don't know the time
delta between formflex and that) and the damn table kept having problems
like pins sticking, etc.
Enjoy,
Earl
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Date: Mon, 25 Mar 2002 15:56:01 -0000
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Mike Fenner <[log in to unmask]>
Subject: Re: PCB exposure to solvents
In-Reply-To: <[log in to unmask]>
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RE: [TN] PCB exposure to solventsOn advanced training course [to answer hard
questions],
I was taught the answer
"twice half its length"
Kind Regards
Mike Fenner
Applications Engineer, European Operations
Indium Corporation
T: + 44 1908 580 400
M: + 44 7810 526 317
F: + 44 1908 580 411
E: [log in to unmask]
W: www.indium.com
Leadfree: www.Pb-Free.com
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Dieselberg, Ron
Sent: Monday, March 25, 2002 1:20 PM
To: [log in to unmask]
Subject: Re: [TN] PCB exposure to solvents
Brian, I have the answer to the string quiz. Long enough to reach from one
tin can to the other tin can. Was I rite?
Ron Dieselberg
Trainer/Auditor
CMC ELECTRONICS
CINCINNATI
[log in to unmask]
-----Original Message-----
From: Brian Ellis [mailto:[log in to unmask]]
Sent: Friday, March 22, 2002 19:30 PM
To: [log in to unmask]
Subject: Re: [TN] PCB exposure to solvents
Michael
It all depends on the solvent. MEK is a fairly aggressive and toxic
solvent. I'd suggest trying to find a milder one, such as one of the
paraffins. I'll answer your question with another: how long is a piece
of string?
Brian
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<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<TITLE>RE: [TN] PCB exposure to solvents</TITLE>
<META content=3D"MSHTML 6.00.2600.0" name=3DGENERATOR></HEAD>
<BODY>
<DIV>
<DIV><SPAN class=3D926355115-25032002><FONT face=3DArial><FONT =
color=3D#0000ff><SPAN=20
class=3D067245315-25032002>On</SPAN> advanced training =
course <SPAN=20
class=3D067245315-25032002>[</SPAN>to answer hard questions<SPAN=20
class=3D067245315-25032002>],</SPAN></FONT></FONT></SPAN></DIV>
<DIV><SPAN class=3D926355115-25032002><SPAN =
class=3D067245315-25032002></SPAN><FONT=20
face=3DArial><FONT color=3D#0000ff><SPAN =
class=3D067245315-25032002>I</SPAN> was=20
taught the answer</FONT></FONT></SPAN></DIV>
<DIV><FONT face=3DArial color=3D#0000ff><SPAN=20
class=3D926355115-25032002></SPAN></FONT> </DIV>
<DIV><SPAN class=3D926355115-25032002><FONT face=3DArial><FONT =
color=3D#0000ff><SPAN=20
class=3D067245315-25032002>"</SPAN>twice half its length<SPAN=20
class=3D067245315-25032002>"</SPAN></FONT></FONT></SPAN></DIV></DIV>
<DIV> </DIV>
<P><FONT face=3DArial color=3D#0000ff>Kind Regards</FONT> </P>
<P><FONT face=3DArial color=3D#0000ff>Mike Fenner</FONT> </P>
<P><FONT face=3DArial color=3D#0000ff>Applications Engineer, European=20
Operations</FONT> <BR><B><FONT face=3DArial color=3D#0000ff>Indium=20
Corporation</FONT></B> <BR><FONT face=3DArial color=3D#0000ff> T: + =
44 1908 580=20
400</FONT> <BR><FONT face=3DArial color=3D#0000ff>M: + 44 7810 526 =
317</FONT>=20
<BR><FONT face=3DArial color=3D#0000ff> F: + 44 1908 580 411</FONT> =
<BR><FONT=20
face=3DArial color=3D#0000ff> E: [log in to unmask]</FONT> =
<BR><FONT face=3DArial=20
color=3D#0000ff>W:<U> www.indium.com</U> </FONT><BR><FONT =
face=3DArial=20
color=3D#0000ff>Leadfree:</FONT><U> <FONT face=3DArial=20
color=3D#0000ff>www.Pb-Free.com</FONT></U> </P>
<BLOCKQUOTE>
<DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of </B>Dieselberg, =
Ron<BR><B>Sent:</B>=20
Monday, March 25, 2002 1:20 PM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> Re: [TN] PCB exposure to=20
solvents<BR><BR></FONT></DIV>
<P><FONT face=3DArial size=3D2>Brian, I have the answer to the string =
quiz. Long=20
enough to reach from one tin can to the other tin can. Was I =
rite?</FONT> </P>
<P><FONT face=3D"Courier New" size=3D2>Ron Dieselberg</FONT> <BR><FONT =
face=3D"Courier New" size=3D2>Trainer/Auditor</FONT> <BR><FONT =
face=3D"Courier New"=20
size=3D2>CMC ELECTRONICS</FONT> <BR><FONT face=3D"Courier New"=20
size=3D2>CINCINNATI</FONT> <BR><FONT face=3D"Courier New"=20
size=3D2>[log in to unmask]</FONT> </P>
<UL>
<UL>
<P><A name=3D_MailData><FONT face=3DArial size=3D2>-----Original=20
Message-----</FONT></A> <BR><B><FONT face=3DArial =
size=3D2>From: =20
Brian Ellis [<A=20
=
href=3D"mailto:[log in to unmask]">mailto:[log in to unmask]</A>]=
</FONT></B>=20
<BR><B><FONT face=3DArial size=3D2>Sent: </FONT></B> =
<FONT=20
face=3DArial size=3D2>Friday, March 22, 2002 19:30 PM</FONT> =
<BR><B><FONT=20
face=3DArial size=3D2>To: </FONT></B> <FONT =
face=3DArial=20
size=3D2>[log in to unmask]</FONT> <BR><B><FONT face=3DArial=20
=
size=3D2>Subject: </FONT></B> =
<FONT=20
face=3DArial size=3D2>Re: [TN] PCB exposure to solvents</FONT> =
</P>
<P><FONT face=3DArial size=3D2>Michael</FONT> </P>
<P><FONT face=3DArial size=3D2>It all depends on the solvent. MEK =
is a fairly=20
aggressive and toxic</FONT> <BR><FONT face=3DArial =
size=3D2>solvent. I'd=20
suggest trying to find a milder one, such as one of the</FONT> =
<BR><FONT=20
face=3DArial size=3D2>paraffins. I'll answer your question with =
another: how=20
long is a piece</FONT> <BR><FONT face=3DArial size=3D2>of =
string?</FONT> </P>
<P><FONT face=3DArial size=3D2>Brian</FONT>=20
</P></UL></UL></BLOCKQUOTE></BODY></HTML>
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Date: Mon, 25 Mar 2002 10:20:08 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: PCB exposure to solvents
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So I take it from the responses so far that no-one has carried out any
testing to determine the length of time they are able to leave electronic
assemblies in solvent strip tanks?
*Well, yes and no. I occasionally get the same situations that you
describe and am asked if the assembly is still good. We do some testing on
the hardware to see if we notice any real change or degradation of
properties. That becomes part of our experience, not part of the
specifications or work instructions for operators. And, the data is only
good for that solvent, for that exposure, on that solder mask, on that
laminate, etc. It is not an exhaustive testing to determine process
windows by any stretch of the imagination.
Leaving an assembly in for 'the shortest possible time' is ok in theory but
it isn't a specification for operators to work by. Does this mean that we
are all relying on manufacturing operatives to make their own decisions on
how long to leave assemblies in for (do they have the training to make
decisions like that)?
*No, the operators do not have the training for that. This is why we
employ materials experts or Experts On Call, to answer the questions when
they come up. In our work instruction, we do use "minimal time" and so on.
The operators understand that. We don't put in "up to one hour" because
some might take it the wrong way and use all of that time, if they figure
it acceptable.
Doug Pauls
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Date: Mon, 25 Mar 2002 08:39:09 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Pelkey, Glenn" <[log in to unmask]>
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From: "Pelkey, Glenn" <[log in to unmask]>
Subject: Balanced Constructions
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Hello all,
We've talked before about the importance of balancing copper weights
within a multilayer board. What are your thoughts of balancing glass
styles? What if the glass is not balanced but all the dielectric spacings
are within tolerance?
Thanks,
Glenn
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<P><FONT SIZE=3D2 FACE=3D"Arial">Hello all,</FONT>
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<P> <FONT SIZE=3D2 =
FACE=3D"Arial">We've talked before about the importance of balancing =
copper weights within a multilayer board. What are your thoughts =
of balancing glass styles? What if the glass is not balanced but =
all the dielectric spacings are within tolerance?</FONT></P>
<P><FONT SIZE=3D2 FACE=3D"Arial">Thanks,</FONT>
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<P><FONT SIZE=3D2 FACE=3D"Arial">Glenn</FONT>
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Date: Mon, 25 Mar 2002 10:46:09 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Genny Gibbard <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Genny Gibbard <[log in to unmask]>
Subject: Solderability testing
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Hello,
We have the opportunity to buy parts that are up to 4 years old ('98 date
code) for an excellent price. Still in original factory packaging. They
are warranteed by the supplier for a few months after purchase, but we may
not use them until late summer. We are bringing a few of them in to check
their condition out, but I don't know how to test them, and couldn't find
anything in the IPC-TM-650 that seemed to apply. These are IC's that are
normally worth over $100 a pop to us so we don't want to waste too many.
We are a design and test type company - we do not fab our own boards or
populate them in house other than a few hand installed components on most
products. So we don't have reflow ovens, etc. We have a very small solder
pot. There is a small CM in our city that we use that say they can do the
testing, but the cost seems high - for the quantity we want to buy they say
we should test 32 of them and they will not be useable for pick and place
afterwards. There is a small chance some of them may be salvageable for
manual installation.
Can anybody direct me to some information - test procedures, equipment - on
whether we might be able to evaluate these PQFP, fine pitch, high lead count
devices ourselves? And what is a reasonable condition for the components to
be in after this testing?
Genny Gibbard (mailto:[log in to unmask])
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Date: Mon, 25 Mar 2002 10:56:24 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Balanced Constructions
X-To: [log in to unmask]
Depends on what is meant by balanced glass styles. I have commented before
on this and prefer unbalanced constructions within each dielectric thickness
requiring multiple plies. The caveat is using homogeneous styles to promote
dimensional stability.
As an example when 5 mil thickness is required it is advantageous, instead
of using 2 plies of 1080, to use a single ply of 106 and one of 2113 to
acheive the same result. This allows a high resin to glass ratio, as the
106, for better bond characteristics and lower resin content, as the 2113,
for higher dimensional stability. Plus, the two ply 1080 is very "juicy" and
tends to slip about too much.
If you are talking about using, say, a balanced construction on one board
side, as several two ply 2113 styles per dielectric thickness, and another
on the other side, this too has merit. I recently used a construcion, when
the copper foil was heavier on one side than the other, consisting of
several plies of 7628, sandwiched between two plies of 2113, to counter the
copper imbalance to minimize bow and twist.
This is a good question and has many answers depending on design requirements.
MoonMan
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Date: Mon, 25 Mar 2002 14:12:27 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Phil Nutting <[log in to unmask]>
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From: Phil Nutting <[log in to unmask]>
Subject: large plastic blocks/bars needed
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Good afternoon all,
We have a project that needs plastic blocks 6x10x12 (in inches). It can =
be Polyethylene (Low Density), Polyethylene (High Density), =
Polypropylene or PVC. "Bar stock" would also work as long as we can cut =
the above sized blocks out of it.
Any ideas for a source?
Thanks in advance,
Phil Nutting
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Date: Mon, 25 Mar 2002 15:13:49 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Dave Hillman <[log in to unmask]>
Subject: Re: Solderability testing
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Hi Genny! The test details/methods you need can be found in the
specification for solderability testing of components: IPC-JSTD-002A.
Obtain a copy from IPC and if you have any questions please contact me.
Dave Hillman
CoChairman JSTD-002A committee
[log in to unmask]
Genny Gibbard <[log in to unmask]>@ipc.org> on 03/25/2002 10:46:09 AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Genny Gibbard <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: [TN] Solderability testing
Hello,
We have the opportunity to buy parts that are up to 4 years old ('98 date
code) for an excellent price. Still in original factory packaging. They
are warranteed by the supplier for a few months after purchase, but we may
not use them until late summer. We are bringing a few of them in to check
their condition out, but I don't know how to test them, and couldn't find
anything in the IPC-TM-650 that seemed to apply. These are IC's that are
normally worth over $100 a pop to us so we don't want to waste too many.
We are a design and test type company - we do not fab our own boards or
populate them in house other than a few hand installed components on most
products. So we don't have reflow ovens, etc. We have a very small solder
pot. There is a small CM in our city that we use that say they can do the
testing, but the cost seems high - for the quantity we want to buy they say
we should test 32 of them and they will not be useable for pick and place
afterwards. There is a small chance some of them may be salvageable for
manual installation.
Can anybody direct me to some information - test procedures, equipment - on
whether we might be able to evaluate these PQFP, fine pitch, high lead
count
devices ourselves? And what is a reasonable condition for the components
to
be in after this testing?
Genny Gibbard (mailto:[log in to unmask])
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Date: Mon, 25 Mar 2002 19:08:23 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: large plastic blocks/bars needed
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Hi Phil!
From the sites that I visited, that size block is pretty non-standard, you
might have to get something custom fabricated. Can you have some sheet stock
bonded together to get that size? Anyways, here's a few places to try:
http://www.adaptplastics.com/plasticmaterials.htm
http://www.plastic-products.com/stock.htm
http://www.vision-plastics.com/plastics.htm
http://www.modernplastics.com/
http://www.professionalplastics.com/
-Steve Gregory-
> Good afternoon all,
>
> We have a project that needs plastic blocks 6x10x12 (in inches). It can be
> Polyethylene (Low Density), Polyethylene (High Density), Polypropylene or
> PVC. "Bar stock" would also work as long as we can cut the above sized
> blocks out of it.
>
> Any ideas for a source?
>
> Thanks in advance,
>
> Phil Nutting
>
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Content-Type: text/html; charset="US-ASCII"
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Phil!<BR>
<BR>
From the sites that I visited, that size block is pretty non-standard, you might have to get something custom fabricated. Can you have some sheet stock bonded together to get that size? Anyways, here's a few places to try:<BR>
<BR>
http://www.adaptplastics.com/plasticmaterials.htm<BR>
http://www.plastic-products.com/stock.htm<BR>
http://www.vision-plastics.com/plastics.htm<BR>
http://www.modernplastics.com/<BR>
http://www.professionalplastics.com/<BR>
<BR>
-Steve Gregory-<BR>
<BR>
<BR>
<BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Good afternoon all,<BR>
<BR>
We have a project that needs plastic blocks 6x10x12 (in inches). It can be Polyethylene (Low Density), Polyethylene (High Density), Polypropylene or PVC. "Bar stock" would also work as long as we can cut the above sized blocks out of it.<BR>
<BR>
Any ideas for a source?<BR>
<BR>
Thanks in advance,<BR>
<BR>
Phil Nutting<BR>
</BLOCKQUOTE><BR>
<BR>
</FONT></HTML>
--part1_168.aebe5ff.29d115f7_boundary--
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Date: Mon, 25 Mar 2002 18:46:21 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: PADS POWER PCB DESIGNER
Any Pads Power PCB designers out there wanting to get real serious about DC
and RF MLB boards needing serious improvement through correction and
complete redesign. Must know BGA's as well and be able to get along with
someone intense like me. You know how I LOVE DFM/CE and all that goes with it.
MoonMan
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Date: Mon, 25 Mar 2002 21:11:11 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Valquirio N. Carvalho" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Valquirio N. Carvalho" <[log in to unmask]>
Subject: Re: large plastic blocks/bars needed
X-To: Phil Nutting <[log in to unmask]>
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Laminated Plastics in Billerica, MA (978) 663-8800 has an extensive
stock of matierials and will cut to order in most instances. You will
have to inquire about lead time and toleances. We have gotten a quick
turn on some odd ball stuff from them in the past.
Valquirio N. Carvalho
Mfg. Engineer
Teradyne, Inc.
Phil Nutting wrote:
>Good afternoon all,
>
>We have a project that needs plastic blocks 6x10x12 (in inches). It can be Polyethylene (Low Density), Polyethylene (High Density), Polypropylene or PVC. "Bar stock" would also work as long as we can cut the above sized blocks out of it.
>
>Any ideas for a source?
>
>Thanks in advance,
>
>Phil Nutting
>
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>---------------------------------------------------------------------------------
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Date: Mon, 25 Mar 2002 23:23:44 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Leland Woodall <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Leland Woodall <[log in to unmask]>
Subject: Lifted Resistors and Resistor Modules
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All,
We've lately noticed a marked increase in the number of lifted chip
resistors and castellated termination resistor packs on one of our SMT
manufacturing lines. This began after we upped our reflow profile to solve
some solderability issues. When we recognized this new problem, we restored
to profile to its original settings, but we're still seeing the increased
volume of "floating" components. They're not completely tombstoned, but God
love 'em, they're trying their best to be.
Our solder prints measure as they always have, both in height and pad
coverage.
Any suggestions?
Thanks in advance,
Leland Woodall
Quality Coordinator
Keihin Carolina System Technology, Inc.
4047 McNair Road
Tarboro, NC 27886
Phone: (252) 641-6750, Ext. 2865
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Date: Tue, 26 Mar 2002 10:13:57 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Busko, Wolfgang" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Busko, Wolfgang" <[log in to unmask]>
Subject: Re: Lifted Resistors and Resistor Modules
X-To: Leland Woodall <[log in to unmask]>
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Leland,
sorry, but I don=B4t believe you, namely in that point that you=B4ve =
gone back
to the previous settings and things are still wrong.
If it was Ok and than turned bad something has to have changed, your =
task is
to find out what is was.
If you are lucky it=B4s just "the one thing", experience showed that =
most of
the times there are more than one slight (little) changes that cause a =
great
mess.
The obvious things in your case to look at first are the profile =
(especially
the ramps), the paste (handling, environment and datecode), the parts =
in
question (solderability, contamination, handling and may the PCB too) =
and
the landpattern design (especially the castellated R-nets do need a =
good pad
design).
I would go through all procedures first and look for point that=B4s =
been
changed and not set back, have been through that more than one time.
Good luck
Wolfgang
=20
> -----Original Message-----
> From: Leland Woodall [mailto:[log in to unmask]]
> Sent: Tuesday, March 26, 2002 5:24 AM
> To: [log in to unmask]
> Subject: [TN] Lifted Resistors and Resistor Modules
>=20
>=20
> All,
>=20
> We've lately noticed a marked increase in the number of lifted chip
> resistors and castellated termination resistor packs on one of our =
SMT
> manufacturing lines. This began after we upped our reflow=20
> profile to solve
> some solderability issues. When we recognized this new=20
> problem, we restored
> to profile to its original settings, but we're still seeing=20
> the increased
> volume of "floating" components. They're not completely=20
> tombstoned, but God
> love 'em, they're trying their best to be.
>=20
> Our solder prints measure as they always have, both in height and pad
> coverage.
>=20
> Any suggestions?
>=20
> Thanks in advance,
>=20
> Leland Woodall
> Quality Coordinator
> Keihin Carolina System Technology, Inc.
> 4047 McNair Road
> Tarboro, NC 27886
>=20
> Phone: (252) 641-6750, Ext. 2865
>=20
> --------------------------------------------------------------
> -------------------
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Date: Tue, 26 Mar 2002 09:32:08 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Geoff Layhe <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Geoff Layhe <[log in to unmask]>
Subject: Re: Balanced Constructions
X-To: "Pelkey, Glenn" <[log in to unmask]>
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To quote a much used technical phrase:- It depends.
In general to make a flat multilayer you need to have the construction so
that it's symmetrical around the centre line with respect to copper
thickness and pre-preg styles. To keep the dielectric the same is not enough
because the different glass styles have different stresses in them due to
the glass strand thickness and the number of strands in the warp & fill.
However it's possible to "balance" the construction and use different
pre-pregs side to side to compensate for different copper weights, but I
guess this is an art rather than a science.
Geoff Layhe
www.lamar-uk.co.uk <http://www.lamar-uk.co.uk>
-----Original Message-----
From: Pelkey, Glenn [mailto:[log in to unmask]]
Sent: 25 March 2002 16:39
To: [log in to unmask]
Subject: [TN] Balanced Constructions
Hello all,
We've talked before about the importance of balancing copper weights
within a multilayer board. What are your thoughts of balancing glass
styles? What if the glass is not balanced but all the dielectric spacings
are within tolerance?
Thanks,
Glenn
Private & Confidential:
This e-mail message is confidential and is intended solely for the person or
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charset="iso-8859-1"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
<TITLE>Balanced Constructions</TITLE>
<META content="MSHTML 5.50.4134.600" name=GENERATOR></HEAD>
<BODY>
<DIV><SPAN class=680401109-26032002><FONT face=Arial color=#0000ff size=2>To
quote a much used technical phrase:- It depends.</FONT></SPAN></DIV>
<DIV><SPAN class=680401109-26032002><FONT face=Arial color=#0000ff size=2>In
general to make a flat multilayer you need to have the construction so that
it's symmetrical around the centre line with respect to copper thickness
and pre-preg styles. To keep the dielectric the same is not enough because the
different glass styles have different stresses in them due to the glass strand
thickness and the number of strands in the warp &
fill.</FONT></SPAN></DIV>
<DIV><SPAN class=680401109-26032002><FONT face=Arial color=#0000ff
size=2>However it's possible to "balance" the construction and use
different pre-pregs side to side to compensate for different copper weights, but
I guess this is an art rather than a science.</FONT></SPAN></DIV>
<DIV><SPAN class=680401109-26032002><FONT face=Arial color=#0000ff size=2>Geoff
Layhe</FONT> </SPAN></DIV>
<DIV><SPAN class=680401109-26032002><FONT face=Arial color=#0000ff size=2><A
href="http://www.lamar-uk.co.uk">www.lamar-uk.co.uk</A></FONT></SPAN></DIV>
<BLOCKQUOTE dir=ltr style="MARGIN-RIGHT: 0px">
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Pelkey, Glenn
[mailto:[log in to unmask]]<BR><B>Sent:</B> 25 March 2002
16:39<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] Balanced
Constructions<BR><BR></FONT></DIV>
<P><FONT face=Arial size=2>Hello all,</FONT> </P>
<P> <FONT face=Arial size=2>We've
talked before about the importance of balancing copper weights within a
multilayer board. What are your thoughts of balancing glass
styles? What if the glass is not balanced but all the dielectric
spacings are within tolerance?</FONT></P>
<P><FONT face=Arial size=2>Thanks,</FONT> </P>
<P><FONT face=Arial size=2>Glenn</FONT> </P></BLOCKQUOTE></BODY></HTML>
<BR>
<BR>
<P><B><FONT SIZE=2 FACE="Arial">Private & Confidential:</FONT></B></P>
<P><B><FONT SIZE=2 FACE="Arial">This e-mail message is confidential and is intended solely for the person or</FONT></B></P>
<P><B><FONT SIZE=2 FACE="Arial">organisation to whom it is addressed. If the message is received by anyone</FONT></B></P>
<P><B><FONT SIZE=2 FACE="Arial">other than the addressee please return the message to the sender by replying</FONT></B></P>
<P><B><FONT SIZE=2 FACE="Arial">to it and then delete the message from your computer.</FONT></B></P>
<BR>
<BR>
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Date: Tue, 26 Mar 2002 15:48:44 +0530
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Vinit Verma <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Vinit Verma <[log in to unmask]>
Subject: Blistering in PCBs
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Probably the following message did not get delivered to this forum a few
days before since I did not get ANY reply hence posting it again.
Hi Technetters,
We are currently running an 8 layer PCB, 1.6mm thickness. In the last run of
approx. 400 nos. we found approx. 10 nos PCBs with blisters in some specific
areas. In approx. 40-50 nos. the blistering is not there but the laminate
has discoloration. More specifically, the blistering is seen in a
particular area with a ground plane just beneath. In some PCBs the
blistering is there on both sides of the PCB (just mirrored on both sides)
and in some cases just on one side.
Looking carefully at the bare PCBs I observed that there is a small ring
around all the vias/PTHs with a width of approx. 0.2-0.3mm. This ring is
basically the laminate itself but slightly raised and hence looking like a
small ring. Is this normal? Can this be causing the blistering? OR is this
an indication of some other phenomenon which is causing the blistering?
Actually this ring is visible in ALL vias and PTHs all over the board, but
blistering is happening ONLY in one particular area. What bothers me the
most is that ALL PCBs have this ring around the vias/PTHs but the
blistering has happened in approx. only 10 out of 400 PCBs.
Somebody pointed it out to the reflow profile, which actually is withing the
the paste manufacturer's specified range. Even if it IS due to the profile
then why ONLY 10/400? Why not more?
Can anybody suggest any possible causes of the same.
We are not baking the PCBs prior to processing, but the boards are in vacuum
packing with 10 PCBs per bag and the packing is opened only at the Stencil
printing stage.
Any suggestions welcome.
Regards
Vinit Verma
Flextronics Technologies (India) Pvt. Ltd.
88A, Electronic City, Hosur Road,
Bangalore-561 229
Tel: +91-80-852 0022, Ext. 161 ; Fax: +91-80-852-1022
E-Mail : [log in to unmask]
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Date: Tue, 26 Mar 2002 05:48:22 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Balanced Constructions
X-To: [log in to unmask]
It's only an art, whether MLB constructions and material selections
comprising them, until the experiment is conducted and the effects are
proven acceptable.
MoonMan
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Date: Tue, 26 Mar 2002 05:53:48 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Blistering in PCBs
X-To: Vinit Verma <[log in to unmask]>
You know some blistering/delamination causes as poor design rules, poor
material selections, poor material, poor relamination process management,
poor thermal management.
You need the x-sections to make a proper determination. The rings may be
pink types. Though IPC does not consider this condition rejectable, it may
be an indicator of process management issues that need to be addressed.
MoonMan
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Date: Tue, 26 Mar 2002 06:12:11 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: PADS POWER PCB DESIGNER
Folks,
The following is an ad I'm considering for the Pads designer I need. I'm
posting it here only to get reactions from you all, as PCB experts,
concerning the job responsibilities and requirements. Let me know what you
think, please.
Pads Power Printed Circuit Board Design Engineer/Designer
Serious growing telecommunications company needs serious PCB designer.
Boards consist of several MLB types from 6 to 12 layers with BGA?s, CSP?s,
and other fine pitch devices and attendant components. Both DC and Analog
circuitry reside on these boards and impedance is critical in specified
areas. Designer MUST:
Be very focused on fulfilling responsibilities in a timely, professional manner
Be capable of working in small company environment under ?quality? pressure
first, then schedule
Be capable of managing design processes for several board types as
management directs priority
Have 5 years minimum experience using Pads Power
Have clear understanding of DFM principles using concurrent engineering (CE)
Have clear understanding of MLB design, fabrication, assembly, and test
requirements
Have clear understanding of microstrip and stripline impedance requirements
Have clear understanding of micro, blind, and buried vias
Have clear understanding of MLB materials, constructions, and solderability
Have clear understanding of MLB?s and all that comprise them
Have AutoCad 14 experience to create mechanicals as master, assembly
drawings, etc.
Have extensive experience working with many component types
Have clear understanding of all applicable IPC guidelines and requirements
Have ability to communicate PCB requirements clearly to management,
purchasing, engineering, and suppliers using concurrent engineering
Have understanding of ISO 9000 (4.6): 94 and/or 2000 (7.3) design control
requirements
Prefer:
MoonMan
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Date: Tue, 26 Mar 2002 05:34:25 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: Blistering in PCBs
X-To: Vinit Verma <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii; x-mac-type="54455854";
x-mac-creator="4D4F5353"
Content-Transfer-Encoding: 7bit
Vinit,
The "raised" area around the vias/PTHs is probably due to damage to the laminates when the holes were
made.
You did not say if the blistered/discolored areas were around the holes.
If possible try to post some pictures at steve's web site: http://stevezeva.homestead.com/index.html
You may need to do a cross section of the damaged area.
David A. Douthit
Manager
LoCan LLC
Vinit Verma wrote:
> Probably the following message did not get delivered to this forum a few
> days before since I did not get ANY reply hence posting it again.
>
> Hi Technetters,
>
> We are currently running an 8 layer PCB, 1.6mm thickness. In the last run of
> approx. 400 nos. we found approx. 10 nos PCBs with blisters in some specific
> areas. In approx. 40-50 nos. the blistering is not there but the laminate
> has discoloration. More specifically, the blistering is seen in a
> particular area with a ground plane just beneath. In some PCBs the
> blistering is there on both sides of the PCB (just mirrored on both sides)
> and in some cases just on one side.
>
> Looking carefully at the bare PCBs I observed that there is a small ring
> around all the vias/PTHs with a width of approx. 0.2-0.3mm. This ring is
> basically the laminate itself but slightly raised and hence looking like a
> small ring. Is this normal? Can this be causing the blistering? OR is this
> an indication of some other phenomenon which is causing the blistering?
> Actually this ring is visible in ALL vias and PTHs all over the board, but
> blistering is happening ONLY in one particular area. What bothers me the
> most is that ALL PCBs have this ring around the vias/PTHs but the
> blistering has happened in approx. only 10 out of 400 PCBs.
>
> Somebody pointed it out to the reflow profile, which actually is withing the
> the paste manufacturer's specified range. Even if it IS due to the profile
> then why ONLY 10/400? Why not more?
>
> Can anybody suggest any possible causes of the same.
>
> We are not baking the PCBs prior to processing, but the boards are in vacuum
> packing with 10 PCBs per bag and the packing is opened only at the Stencil
> printing stage.
>
> Any suggestions welcome.
>
> Regards
> Vinit Verma
> Flextronics Technologies (India) Pvt. Ltd.
> 88A, Electronic City, Hosur Road,
> Bangalore-561 229
> Tel: +91-80-852 0022, Ext. 161 ; Fax: +91-80-852-1022
> E-Mail : [log in to unmask]
>
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Date: Tue, 26 Mar 2002 06:47:29 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Tostevin, Bruce" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Tostevin, Bruce" <[log in to unmask]>
Subject: Re: large plastic blocks/bars needed
X-To: Phil Nutting <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
Phil,
I'm not sure what the plastic is (polystyrene?) ... but otherwise, what
about building them out of LEGOs?
Bruce Tostevin
Benchmark Electronics
Hudson, NH
> -----Original Message-----
> From: Phil Nutting [SMTP:[log in to unmask]]
> Sent: Monday, March 25, 2002 2:12 PM
> To: [log in to unmask]
> Subject: [TN] large plastic blocks/bars needed
>
> Good afternoon all,
>
> We have a project that needs plastic blocks 6x10x12 (in inches). It can
> be Polyethylene (Low Density), Polyethylene (High Density), Polypropylene
> or PVC. "Bar stock" would also work as long as we can cut the above sized
> blocks out of it.
>
> Any ideas for a source?
>
> Thanks in advance,
>
> Phil Nutting
>
> --------------------------------------------------------------------------
> -------
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Date: Tue, 26 Mar 2002 07:38:13 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Edward S. Wheeler" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Edward S. Wheeler" <[log in to unmask]>
Subject: Re: large plastic blocks/bars needed
X-To: Phil Nutting <[log in to unmask]>
In-Reply-To: <[log in to unmask]
sys.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; format=flowed
Call your local machine shop. They should have plenty of catalogs, possibly
material in house.
Ed
At 02:12 PM 3/25/2002 -0500, you wrote:
>Good afternoon all,
>
>We have a project that needs plastic blocks 6x10x12 (in inches). It can
>be Polyethylene (Low Density), Polyethylene (High Density), Polypropylene
>or PVC. "Bar stock" would also work as long as we can cut the above sized
>blocks out of it.
>
>Any ideas for a source?
>
>Thanks in advance,
>
>Phil Nutting
>
>---------------------------------------------------------------------------------
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>
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Date: Tue, 26 Mar 2002 09:16:51 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Joseph Spicuzza <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Joseph Spicuzza <[log in to unmask]>
Subject: Re: PADS POWER PCB DESIGNER
X-To: Earl Moon <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Hey Earl,
Our CAD guys could probably help you if you want to send the design here.
Call John Gralewski at 412 858-6144 for details.
Don't know if this is what you're looking for, just trying to help.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Earl Moon
Sent: Tuesday, March 26, 2002 7:12 AM
To: [log in to unmask]
Subject: Re: [TN] PADS POWER PCB DESIGNER
Folks,
The following is an ad I'm considering for the Pads designer I need. I'm
posting it here only to get reactions from you all, as PCB experts,
concerning the job responsibilities and requirements. Let me know what you
think, please.
Pads Power Printed Circuit Board Design Engineer/Designer
Serious growing telecommunications company needs serious PCB designer.
Boards consist of several MLB types from 6 to 12 layers with BGA?s, CSP?s,
and other fine pitch devices and attendant components. Both DC and Analog
circuitry reside on these boards and impedance is critical in specified
areas. Designer MUST:
Be very focused on fulfilling responsibilities in a timely, professional
manner
Be capable of working in small company environment under ?quality? pressure
first, then schedule
Be capable of managing design processes for several board types as
management directs priority
Have 5 years minimum experience using Pads Power
Have clear understanding of DFM principles using concurrent engineering (CE)
Have clear understanding of MLB design, fabrication, assembly, and test
requirements
Have clear understanding of microstrip and stripline impedance requirements
Have clear understanding of micro, blind, and buried vias
Have clear understanding of MLB materials, constructions, and solderability
Have clear understanding of MLB?s and all that comprise them
Have AutoCad 14 experience to create mechanicals as master, assembly
drawings, etc.
Have extensive experience working with many component types
Have clear understanding of all applicable IPC guidelines and requirements
Have ability to communicate PCB requirements clearly to management,
purchasing, engineering, and suppliers using concurrent engineering
Have understanding of ISO 9000 (4.6): 94 and/or 2000 (7.3) design control
requirements
Prefer:
MoonMan
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Date: Tue, 26 Mar 2002 08:23:18 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: PADS POWER PCB DESIGNER
X-To: [log in to unmask]
Really do thank you Joseph,
First I'm looking for someone to work in house. Failing that, I will look at
a bureau. However, I must have a senior person capable of doing it all as I
said. I've had too many situations where musical chairs were the game name
and had to jump through hoops to get the job done in a reasonable time.
I know you folks are very professional, but I need complete attention on
these jobs. Quality is first then time then cost. Can't afford to strecht
this thing out for someone else's benefit.
Looking forward to talking more if I can't find a contractor to come in house.
Earl
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Date: Tue, 26 Mar 2002 15:36:39 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Volkmar Huss <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Volkmar Huss <[log in to unmask]>
Organization: =?iso-8859-1?Q?Dr=E4ger?= Electronics GmbH
Subject: Measuring "No Clean" process quality
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Date: Tue, 26 Mar 2002 06:57:48 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: Re: large plastic blocks/bars needed
X-To: Phil Nutting <[log in to unmask]>
MIME-version: 1.0
Content-type: text/plain; charset=iso-8859-1
Content-transfer-encoding: 7BIT
Phil,
As if you don't already have enough choices to look into try,
http://www.polymerplastics.com
I have used them a few times, it's usually easy to get samples but I feel
they are a bit pricey for cutting. Try to have a local shop do the final
cuts.
Dan
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Date: Tue, 26 Mar 2002 09:18:05 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, jim <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: jim <[log in to unmask]>
Subject: Re: large plastic blocks/bars needed
X-To: "Edward S. Wheeler" <[log in to unmask]>
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The MSC catalog has these and all you have to do is cut them to length and
width ( easily done on a band saw).
give me a call if you need thier number or have any questions.
Jim Gleason
972-494-1911
----- Original Message -----
From: "Edward S. Wheeler" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Tuesday, March 26, 2002 6:38 AM
Subject: Re: [TN] large plastic blocks/bars needed
> Call your local machine shop. They should have plenty of catalogs,
possibly
> material in house.
>
> Ed
>
>
> At 02:12 PM 3/25/2002 -0500, you wrote:
> >Good afternoon all,
> >
> >We have a project that needs plastic blocks 6x10x12 (in inches). It can
> >be Polyethylene (Low Density), Polyethylene (High Density), Polypropylene
> >or PVC. "Bar stock" would also work as long as we can cut the above
sized
> >blocks out of it.
> >
> >Any ideas for a source?
> >
> >Thanks in advance,
> >
> >Phil Nutting
> >
>
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Date: Tue, 26 Mar 2002 07:30:07 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
J G <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: J G <[log in to unmask]>
Subject: I'm back
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Hello everybody,
Jason Gregory here. I've been off for a while due to
employment reasons and looking forward to catching up.
It's only been a week or so, but I know a lot can lost
on Technet in only a week. Earl, contact me
directly....I have questions for ya.
Jason Gregory
__________________________________________________
Do You Yahoo!?
Yahoo! Movies - coverage of the 74th Academy Awards®
http://movies.yahoo.com/
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Date: Tue, 26 Mar 2002 08:06:58 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ed Popielarski <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ed Popielarski <[log in to unmask]>
Subject: Re: BGA reballing
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Hi all,
One more temp excursion that hasn't been mentioned is the site prep of =
the pads after de-soldering from the PCB and prior to reballing. We =
developed a system that does this quite nicely with minimal risk of =
lifting pads (something to worry about as well).=20
Our reballer uses a pallet that the devices go through reflow in which =
acts as a heat sink for the topside of the BGA (the part is run balls =
up, bottom side) minimizing thermal stress. There have been several =
studies by fortune 500 companies to determine reliability and this =
method has been approved, however, they are not willing to publish them =
to the world at large.
Once again, my two cents worth.
Regards,
Ed Popielarski
QTA Machine
10 Mc Laren, Ste D
Irvine, Ca. 92618
Phone:949-581-6601
Fax: 949-581-2448
Cel: 949-337-2578
WWW.QTA.NET
------=_NextPart_000_0012_01C1D49D.33CCD360
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charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4807.2300" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Hi all,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>One more temp excursion that hasn't =
been mentioned=20
is the site prep of the pads after de-soldering from the PCB and prior =
to=20
reballing. We developed a system that does this quite nicely with =
minimal risk=20
of lifting pads (something to worry about as well). </FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Our reballer uses a pallet that the =
devices go=20
through reflow in which acts as a heat sink for the topside of the BGA =
(the part=20
is run balls up, bottom side) minimizing thermal stress. There have been =
several=20
studies by fortune 500 companies to determine reliability and this =
method has=20
been approved, however, they are not willing to publish them to the =
world at=20
large.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Once again, my two cents =
worth.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Regards,</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Ed Popielarski<BR>QTA Machine<BR>10 Mc =
Laren, Ste=20
D<BR>Irvine, Ca. 92618</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Phone:949-581-6601<BR>Fax: =
949-581-2448<BR>Cel:=20
949-337-2578</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2><A=20
href=3D"http://www.QTA.NET">WWW.QTA.NET</A></FONT></DIV></BODY></HTML>
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Date: Tue, 26 Mar 2002 11:45:42 -0800
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: I'm back
X-To: J G <[log in to unmask]>
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Jason,
Talk to me babe,
Earl
----- Original Message -----
From: "J G" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Tuesday, March 26, 2002 7:30 AM
Subject: [TN] I'm back
> Hello everybody,
> Jason Gregory here. I've been off for a while due to
> employment reasons and looking forward to catching up.
> It's only been a week or so, but I know a lot can lost
> on Technet in only a week. Earl, contact me
> directly....I have questions for ya.
>
> Jason Gregory
>
> __________________________________________________
> Do You Yahoo!?
> Yahoo! Movies - coverage of the 74th Academy Awards®
> http://movies.yahoo.com/
>
> --------------------------------------------------------------------------
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Date: Tue, 26 Mar 2002 12:25:26 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: Measuring "No Clean" process quality
X-To: Volkmar Huss <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
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IPC/ANSI J-STD-004 estabishes methods classification and testing of fluxes.
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Volkmar Huss
> Sent: Tuesday, March 26, 2002 9:37 AM
> To: [log in to unmask]
> Subject: [TN] Measuring "No Clean" process quality
>
>
> Hi TechNetters,
>
> we are working on defining our "No Clean" soldering process. The
> solder-paste and flux manufacturers certify the "No Clean" capability of
>
> their products to some extend, but what is the definition of "No Clean"?
>
> And I don't mean the statement, that only inert residues of flux and
> solder-paste additives remain on the board.
> Are there any standards that can used as a reference?
> How do you measure the:
> "No Clean" capability of solder paste, flux and tubular solder with flux
>
> core?
> "No Clean" quality of printed board assemblies?
> "No Clean" quality of printed board assemblies onto which devices have
> been hand-soldered?
> and all of this for prototype and series production?
>
> I have gleaned some insights from the TechNet archives, but any
> additional input is very welcome.
>
> Best regards
>
> Volkmar Huß
>
> Engineering Electronic Circuit Boards
> Aufbau- und Verbindungstechnik
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
> DRÄGER ELECTRONICS
>
> Draeger Electronics GmbH
> Moislinger Allee 53-55
> D-23558 Lübeck
>
> Tel: +49-451-882-3998
> Fax: +49-451-882-4365
> mailto:[log in to unmask]
> Website http://www.draeger.com/de/EL
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
> --
> Best regards / Mit freundlichen Grüßen
>
> Volkmar Huß
>
> Engineering Electronic Circuit Boards
> Aufbau- und Verbindungstechnik
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
> DRÄGER ELECTRONICS
>
> Draeger Electronics GmbH
> Moislinger Allee 53-55
> D-23558 Lübeck
>
> Tel: +49-451-882-3998
> Fax: +49-451-882-4365
> mailto:[log in to unmask]
> Website http://www.draeger.com/de/EL
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
>
> Mçëj) Ë®‹u籧yë®øy¼<+ x!$ ñÔº{nlj·zw™ëj
> ²M!Tƒ9 Ø¢YÂ)µì {x `Ó¶ ¹¸r×zW
> c Tr µ:zjª—(–×–+¯*Mçëzw™¨¶‚²Û®ør HDyÈzÓ0 N qèx㙨 xz·Ê‡–[zš¶Ë×j
> ) ¸¶Ç¾*¢¸ 4r ´8zËyª†š¾*²š¶)±«Ã r :r䲋qëjÖjÇ f”
> †+°ùjÇ È ðy»µè¶ŸÃ > ¥Êƒøš_¢»†Ù¢¶v+¢v w®f ‰Êµ§)æ…&jj‰«jÆ¢*¢¸¯ÎçOïMÆÞ
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Date: Tue, 26 Mar 2002 11:03:14 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ed Popielarski <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ed Popielarski <[log in to unmask]>
Subject: Vitronics Isotherm 500
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Hi all,
I'm looking for a "used" manual for a Vitronics Isotherm 500C. Can =
anyone help here?
Regards,
Ed Popielarski
QTA Machine
10 Mc Laren, Ste D
Irvine, Ca. 92618
Phone:949-581-6601
Fax: 949-581-2448
Cel: 949-337-2578
WWW.QTA.NET
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<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Hi all,</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>I'm looking for a "used" manual for a =
Vitronics=20
Isotherm 500C. Can anyone help here?</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Regards,</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Ed Popielarski<BR>QTA Machine<BR>10 Mc =
Laren, Ste=20
D<BR>Irvine, Ca. 92618</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Phone:949-581-6601<BR>Fax: =
949-581-2448<BR>Cel:=20
949-337-2578</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2><A=20
href=3D"http://www.QTA.NET">WWW.QTA.NET</A></FONT></DIV></BODY></HTML>
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Date: Tue, 26 Mar 2002 15:14:56 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Edward S. Wheeler" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Edward S. Wheeler" <[log in to unmask]>
Subject: Double Sided Reflow Flux and surface tension
Mime-Version: 1.0
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Hello Tech-Net users! I am new to the group here, and would like your
assistance on a couple of matters concerning a double sided reflow process
we are undertaking. We are new to this process, so we would appreciate any
expertise on the matter.
We are using an OA type solder paste, and like to wash our boards within 2
hours, 4 being the maximum in house limit. To perform our double sided
reflow process in mass production, we may want to run all day on one side
and do the other side the next. My question is... does any of the residual
flux material aid the second reflow process, or can we wash it off before
the second reflow and get as good of results? I am concerned that the
solder joint may have an outer layer of oxidation or graininess due to the
lack of flux once it reflows again. Is there any flux left over that is
active, or is it simply the remainder of the carrier?
What luck are people having with BGAs populated on the bottom side? Is
there more of a concern with warp on the second pass?
Is there a rule of thumb for the pad surface area / part weight ratio to
maintain enough surface tension to correctly hold the part?
Does anybody use adhesives to stake heavy parts on the first pass?
Does anybody have a solid rule of thumb for pin-in-paste apertures? On our
first try we used an 8 mil step up and had the aperture the same size as
outer edge of the PTH. Would an oversize print work better?
Thanks in advance for any help.
Ed
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Date: Tue, 26 Mar 2002 15:00:56 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Double Sided Reflow Flux and surface tension
X-To: Edward Wheeler <[log in to unmask]>
Ed,
You ask some of the best questions ever even though they've been covered
before. I'm not one to welcome anyone but WELCOME.
I'm only answering with no answers to ilicit more responses even though I've
been involved in most of what you're attempting. It all works so stand by
for some very specific answers to your postings.
Earl Moon
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Date: Tue, 26 Mar 2002 16:45:09 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Vitronics Isotherm 500
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Have you tried contacting Vitronics-Soltec and asking for a copy of the
manual ? Their number (in Stratham, NH) is 603-772-7778.
Phil Zarrow
ITM Consulting
Durham, NH USA
www.ITM-SMT.com
T: (603) 868-1754
F: (603) 868-3623
EM:[log in to unmask]
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">Have you tried contacting Vitronics-Soltec and asking for a copy of the manual ? Their number (in Stratham, NH) is 603-772-7778. <BR>
<BR>
Phil Zarrow<BR>
<BR>
<B>ITM Consulting <BR>
Durham, NH USA<BR>
www.ITM-SMT.com<BR>
T: (603) 868-1754<BR>
F: (603) 868-3623<BR>
EM:[log in to unmask]</B></FONT></HTML>
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Date: Tue, 26 Mar 2002 15:33:27 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Barry Gallegos <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Barry Gallegos <[log in to unmask]>
Subject: ICT
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G'day
Was asked if I could come up with some information on ICT.
Where can I find if any on standards that govern ICT "if any" or
how to's on fixturing etc.
Barry.
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Date: Wed, 27 Mar 2002 01:32:58 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Measuring "No Clean" process quality
X-To: Volkmar Huss <[log in to unmask]>
MIME-Version: 1.0
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Volkmar
Manufacturers of fluxes produce and sell a wide range of fluxes which
are sold as "no-clean". Some contain rosin, others don't. Some contain
halogenated activators, others don't. Some are very active and are
consequently easy to solder with, but leave more dangerous residues,
others don't, but are the devil to solder with. Some you can clean,
others you cannot.
To answer your questions: you have to select a shortlist of, say, 5
fluxes which meet your criteria, on paper. You then do extensive trials,
with various parameters (Taguchi is very useful for this, as you can cut
the number of experiments drastically). After having optimised the
process for each flux, you have to produce some test boards that you
need to qualify as meeting your requirements for reliability under the
conditions the boards will be used in (electrochemical migration etc.)
and for setting up your process for quality control. As a result of
this, you can select your #1 candidate and #2 to fall back on if there
is an interruption of supply. No one here can do your homework for you,
I'm afraid.
Brian
Volkmar Huss wrote:
>
> Hi TechNetters,
>
> we are working on defining our "No Clean" soldering process. The
> solder-paste and flux manufacturers certify the "No Clean" capability of
>
> their products to some extend, but what is the definition of "No Clean"?
>
> And I don't mean the statement, that only inert residues of flux and
> solder-paste additives remain on the board.
> Are there any standards that can used as a reference?
> How do you measure the:
> "No Clean" capability of solder paste, flux and tubular solder with flux
>
> core?
> "No Clean" quality of printed board assemblies?
> "No Clean" quality of printed board assemblies onto which devices have
> been hand-soldered?
> and all of this for prototype and series production?
>
> I have gleaned some insights from the TechNet archives, but any
> additional input is very welcome.
>
> Best regards
>
> Volkmar Huß
>
> Engineering Electronic Circuit Boards
> Aufbau- und Verbindungstechnik
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
> DRÄGER ELECTRONICS
>
> Draeger Electronics GmbH
> Moislinger Allee 53-55
> D-23558 Lübeck
>
> Tel: +49-451-882-3998
> Fax: +49-451-882-4365
> mailto:[log in to unmask]
> Website http://www.draeger.com/de/EL
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
> --
> Best regards / Mit freundlichen Grüßen
>
> Volkmar Huß
>
> Engineering Electronic Circuit Boards
> Aufbau- und Verbindungstechnik
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
> DRÄGER ELECTRONICS
>
> Draeger Electronics GmbH
> Moislinger Allee 53-55
> D-23558 Lübeck
>
> Tel: +49-451-882-3998
> Fax: +49-451-882-4365
> mailto:[log in to unmask]
> Website http://www.draeger.com/de/EL
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
> Mç!ëLj)K Ëi®‹âuçZ±§ëyë ®øœy¼ˆ<+¬ x!$Ò uñÔèº{.nÇ+‰·¬zwZ™ë,j ² M! TƒÂ9 ° Ø_¢YhÂ)àµìm {ax ƒ`Ó“¶ ¬¹¸Þr×âzWR cN TÞr Þµ:-zjhªâ—(Z–×^–+Þ¯* Mç!ëlzw^™¨¥¶‚â²Û ®ø©r àHDÓyÈgzÓN0 N Þqè¯xãD™¨¥ x)z·Zʇږ[azš,¶Ë צj)m ¸¬¶Ç«¾*\¢¸ 4Þr Þ´8 zËRyªÜ†šÞ¾*.²š,¶)౫pà ©r à:râä^²‹«që jÖ›jǬ f¢”
> ܆+Þ°ù^jǯ È ð°y»"µèm¶ŸÿÃ"¥Ê+ƒømš_ߢ»¦†ÙŸ¢¶v+b¢v¥ wè®f ‰èÊ'µ§-)朅&¬jj+‰«ljƤ¢*\¢¸(¯Î;çO}ïM ÆÞw15==
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Date: Tue, 26 Mar 2002 15:38:48 -0800
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This e-mail may contain SEL confidential information. The opinions expressed
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the sender, permanently delete it, and destroy any printout. Thank you.
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Date: Wed, 27 Mar 2002 11:32:32 +1100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
DUTTON Phil <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: DUTTON Phil <[log in to unmask]>
Subject: Re: ICT
X-To: Barry Gallegos <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hello Barry,
IPC-2221 3.5 has some good info on testing and In Circuit Testing design
requirements.
Can be quite involved, and the circuit design needs to consider the test
requirements as well. Test probe lands are typically 0.040" and pitched at
0.100" centres for bed-of-nails type test fixtures. Different types/sizes of
probe pins are available.
Good idea to talk to the people who will be testing your boards very early.
Phil Dutton C.I.D.
Senior CAD Technician
IPC Certified Interconnect Designer
-----Original Message-----
From: Barry Gallegos [mailto:[log in to unmask]]
Sent: Wednesday, 27 March 2002 09:03
To: [log in to unmask]
Subject: [TN] ICT
G'day
Was asked if I could come up with some information on ICT.
Where can I find if any on standards that govern ICT "if any" or
how to's on fixturing etc.
Barry.
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Date: Tue, 26 Mar 2002 20:45:25 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Thin Laminates with low dielectric constant..
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Hi all,
Just checking with everyone, but looking for a laminate that can stay at
3-mils with half ounce copper plated for the features, and can maintain a Er
of 3-5...know that's asking a lot...we're trying to push the envelope with a
VME card, and use Stablecor material...I think that Stablecor has great
potential...just gotta shrink everything else.
Found a site that talks about a product called SpeedBoard C that is very
thin, and improves the dielectric constant when used with standard core
materials. Go to:
http://www.goreelectronics.com/products/dielectric_materials/Speedboard_C_Prep
reg.cfm
Trying to pack a 16-layer board (including Stablecor material) to stay under
.070"...fun stuff huh?
Have any of you had any experience with SpeedBoard C?
As always, thanks in advance...
-Steve Gregory-
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Date: Wed, 27 Mar 2002 09:48:52 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Conformal Coating BGA's
X-To: "Misner, Bruce" <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hi, Bruce,
We apply Humiseal acrylic coating to boards that fit your description and
application precisely, except that we do underfill the BGA's with a
reworkable epoxy, applied after assembly. The only exception was for the
case of two boards destined for temperature cycling measurement, for which
we couldn't get a supply of underfill material at the time. We substituted
thinned Humiseal as the boards would not be flying, as we were concerned
about entrapped air and also no suuport for the BGA joints. Humiseal is not
a proper substitute for the specialised proper epoxy, but was sufficient
for our particular purpose.
The main issue as I see it would be moisture and other contaminants in the
entrapped air, but I have no first hand data to help you decide if that
causes problems or not.
Good luck
Peter
"Misner,
Bruce" To: [log in to unmask]
<Bruce_Misner cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
@ATK.COM> Aero/ST Group)
Sent by: Subject: [TN] Conformal Coating BGA's
TechNet
<[log in to unmask]
ORG>
03/20/02
03:48 AM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
"Misner,
Bruce"
My question of the day: Is anyone conformal coating (not parylene) plastic
BGA's on FR-4 in Hi-Rel applications (aircraft; -20 to +71C ambient
operating temperature requirement) without benefit of an underfil? If yes,
has entrapped air been a major issue? Anyone care to comment on this
approach?
Regards,
Bruce Misner
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Date: Tue, 26 Mar 2002 20:20:25 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: Measuring "No Clean" process quality
X-To: Brian Ellis <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=iso-8859-1; x-mac-type="54455854";
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Brian,
Well said!!!
Particularly the qualification testing part!
David A. Douthit
Manager
LoCan LLC
Brian Ellis wrote:
> Volkmar
>
> Manufacturers of fluxes produce and sell a wide range of fluxes which
> are sold as "no-clean". Some contain rosin, others don't. Some contain
> halogenated activators, others don't. Some are very active and are
> consequently easy to solder with, but leave more dangerous residues,
> others don't, but are the devil to solder with. Some you can clean,
> others you cannot.
>
> To answer your questions: you have to select a shortlist of, say, 5
> fluxes which meet your criteria, on paper. You then do extensive trials,
> with various parameters (Taguchi is very useful for this, as you can cut
> the number of experiments drastically). After having optimised the
> process for each flux, you have to produce some test boards that you
> need to qualify as meeting your requirements for reliability under the
> conditions the boards will be used in (electrochemical migration etc.)
> and for setting up your process for quality control. As a result of
> this, you can select your #1 candidate and #2 to fall back on if there
> is an interruption of supply. No one here can do your homework for you,
> I'm afraid.
>
> Brian
>
> Volkmar Huss wrote:
> >
> > Hi TechNetters,
> >
> > we are working on defining our "No Clean" soldering process. The
> > solder-paste and flux manufacturers certify the "No Clean" capability of
> >
> > their products to some extend, but what is the definition of "No Clean"?
> >
> > And I don't mean the statement, that only inert residues of flux and
> > solder-paste additives remain on the board.
> > Are there any standards that can used as a reference?
> > How do you measure the:
> > "No Clean" capability of solder paste, flux and tubular solder with flux
> >
> > core?
> > "No Clean" quality of printed board assemblies?
> > "No Clean" quality of printed board assemblies onto which devices have
> > been hand-soldered?
> > and all of this for prototype and series production?
> >
> > I have gleaned some insights from the TechNet archives, but any
> > additional input is very welcome.
> >
> > Best regards
> >
> > Volkmar Huß
> >
> > Engineering Electronic Circuit Boards
> > Aufbau- und Verbindungstechnik
> > _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
> >
> > DRÄGER ELECTRONICS
> >
> > Draeger Electronics GmbH
> > Moislinger Allee 53-55
> > D-23558 Lübeck
> >
> > Tel: +49-451-882-3998
> > Fax: +49-451-882-4365
> > mailto:[log in to unmask]
> > Website http://www.draeger.com/de/EL
> > _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
> >
> > --
> > Best regards / Mit freundlichen Grüßen
> >
> > Volkmar Huß
> >
> > Engineering Electronic Circuit Boards
> > Aufbau- und Verbindungstechnik
> > _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
> >
> > DRÄGER ELECTRONICS
> >
> > Draeger Electronics GmbH
> > Moislinger Allee 53-55
> > D-23558 Lübeck
> >
> > Tel: +49-451-882-3998
> > Fax: +49-451-882-4365
> > mailto:[log in to unmask]
> > Website http://www.draeger.com/de/EL
> > _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
> >
> > Mç!*ëLj)K Ëi®?âuçZ±§ëyë ®øœy*ˆ<+¬ x!$Ò uñÔèº{.nÇ+‰·¬zwZ™ë,j ? 2 M! TƒÂ9 ° Ø_¢YhÂ)àµìm {ax ƒ`Ó“¶ ¬1¸?rxâzWR cN T?r ?µ:-zjh?ªâ—(Z?x^?+?¯* Mç!*ëlzw^™¨¥¶‚â2Û ®ø©r àHDÓyÈgzÓN0 N ?qè¯xãD™¨¥ x)z·ZÊ?Ú?[azs,¶Ë *x|j)m ¸¬¶Ç«**\¢¸ 4?r ?´8 zËRyªÜ?s?**.2s,¶)౫pà ©r à:râ*ä^2?«që jÖ?jǬ f¢”
> > Ü?+?°ù^jǯ È? ?°y»"µèm¶ŸÿÃ"¥Ê+ƒøms_ߢ»|?ÙŸ¢¶*v+b¢v¥ wè®f? ‰è?Ê'µ§-)朅&¬jj+‰«ljÆ€¢*\¢¸(¯Î;çO}ïM Æ?w15==
>
> ---------------------------------------------------------------------------------
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> ---------------------------------------------------------------------------------
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Date: Wed, 27 Mar 2002 01:04:33 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: another materials question
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_157.b36cee5.29d2baf1_boundary"
--part1_157.b36cee5.29d2baf1_boundary
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I'm learning about laminate materials and read with interest several recent
tecnet emails on the subject.
I'd like to submit a question about a particular construction that is a
challenge with respect to registration.
The construction is all 2 core and 3 core. The prepregs are 1-106 and
1-1080, which I have learned are described as resin rich. The construction
is balanced with respect to copper weights, glass styles, core thicknesses,
and prepreg openings.
What I am observing with this part is variation in how much certain cores
shrink, lot to lot,
and variation that I would describe as a shift or possibly a rotation in some
of the internal layers.
Am I correct in assuming that these thin cores and these particular prepregs
will contribute to lower yields due to misregistration? If anyone would
care to offer up ideas on how to tackle the registration challenge that I am
observing on this kind of construction, I would appreciate hearing your ideas.
Mark J.
--part1_157.b36cee5.29d2baf1_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>I'm learning about laminate materials and read with interest several recent tecnet emails on the subject.
<BR>I'd like to submit a question about a particular construction that is a challenge with respect to registration.
<BR>
<BR>The construction is all 2 core and 3 core. The prepregs are 1-106 and 1-1080, which I have learned are described as resin rich. The construction is balanced with respect to copper weights, glass styles, core thicknesses, and prepreg openings.
<BR>
<BR>What I am observing with this part is variation in how much certain cores shrink, lot to lot,
<BR>and variation that I would describe as a shift or possibly a rotation in some of the internal layers.
<BR>
<BR>Am I correct in assuming that these thin cores and these particular prepregs will contribute to lower yields due to misregistration? If anyone would care to offer up ideas on how to tackle the registration challenge that I am observing on this kind of construction, I would appreciate hearing your ideas.
<BR>
<BR>Mark J.</FONT></HTML>
--part1_157.b36cee5.29d2baf1_boundary--
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Date: Wed, 27 Mar 2002 10:11:27 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Busko, Wolfgang" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Busko, Wolfgang" <[log in to unmask]>
Subject: Re: Measuring "No Clean" process quality
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Brian,=20
short and to the point, really a nice one.
But knowing a bit about the special situation, and I think that=B4s =
also true
for many other small- and mediumsize CM=B4s, there is no or only vague
knowledge regarding the precise requirements for reliability under
(sometimes)not very well known conditions.
It=B4s also often a question of time and resources to perform all =
necessary
steps to get where you want or need to be.
The first and IMHO most important step is to agree on the criteria one =
wants
to meet, the rest is business and routine. To master this first =
"obstacle"
it might be best for many in the same situation to look for external
assistance especially regarding the necessary testing that has to be =
done
during qualifying.
In Volkmars case I would discuss that topic also with ISIT, an =
institute
that does a lot of the needed qualification tests and offers consulting =
for
the electronic industry. I think he knows the contact already.
Greetings from sunny but still cold Hamburg
Wolfgang
> -----Original Message-----
> From: Brian Ellis [mailto:[log in to unmask]]
> Sent: Wednesday, March 27, 2002 12:33 AM
> To: [log in to unmask]
> Subject: Re: [TN] Measuring "No Clean" process quality
>=20
>=20
> Volkmar
>=20
> Manufacturers of fluxes produce and sell a wide range of fluxes which
> are sold as "no-clean". Some contain rosin, others don't. Some =
contain
> halogenated activators, others don't. Some are very active and are
> consequently easy to solder with, but leave more dangerous residues,
> others don't, but are the devil to solder with. Some you can clean,
> others you cannot.
>=20
> To answer your questions: you have to select a shortlist of, say, 5
> fluxes which meet your criteria, on paper. You then do=20
> extensive trials,
> with various parameters (Taguchi is very useful for this, as=20
> you can cut
> the number of experiments drastically). After having optimised the
> process for each flux, you have to produce some test boards that you
> need to qualify as meeting your requirements for reliability under =
the
> conditions the boards will be used in (electrochemical migration =
etc.)
> and for setting up your process for quality control. As a result of
> this, you can select your #1 candidate and #2 to fall back on if =
there
> is an interruption of supply. No one here can do your=20
> homework for you,
> I'm afraid.
>=20
> Brian
>=20
> Volkmar Huss wrote:
> >
> > Hi TechNetters,
> >
> > we are working on defining our "No Clean" soldering process. The
> > solder-paste and flux manufacturers certify the "No Clean"=20
> capability of
> >
> > their products to some extend, but what is the definition=20
> of "No Clean"?
> >
> > And I don't mean the statement, that only inert residues of flux =
and
> > solder-paste additives remain on the board.
> > Are there any standards that can used as a reference?
> > How do you measure the:
> > "No Clean" capability of solder paste, flux and tubular=20
> solder with flux
> >
> > core?
> > "No Clean" quality of printed board assemblies?
> > "No Clean" quality of printed board assemblies onto which=20
> devices have
> > been hand-soldered?
> > and all of this for prototype and series production?
> >
> > I have gleaned some insights from the TechNet archives, but any
> > additional input is very welcome.
> >
> > Best regards
> >
> > Volkmar Hu=DF
> >
> > Engineering Electronic Circuit Boards
> > Aufbau- und Verbindungstechnik
> > _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
> >
> > DR=C4GER ELECTRONICS
> >
> > Draeger Electronics GmbH
> > Moislinger Allee 53-55
> > D-23558 L=FCbeck
> >
> > Tel: +49-451-882-3998
> > Fax: +49-451-882-4365
> > mailto:[log in to unmask]
> > Website http://www.draeger.com/de/EL
> > _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
> >
> > --
> > Best regards / Mit freundlichen Gr=FC=DFen
> >
> > Volkmar Hu=DF
> >
> > Engineering Electronic Circuit Boards
> > Aufbau- und Verbindungstechnik
> > _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
> >
> > DR=C4GER ELECTRONICS
> >
> > Draeger Electronics GmbH
> > Moislinger Allee 53-55
> > D-23558 L=FCbeck
> >
> > Tel: +49-451-882-3998
> > Fax: +49-451-882-4365
> > mailto:[log in to unmask]
> > Website http://www.draeger.com/de/EL
> > _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
> >
> > M=E7!=9D=EBLj)K =CBi=AE<=E2u=E7Z=B1=A7=EBy=EB =AE=F8oey=BC^<+=AC =
x!$=D2 =20
> u=F1=D4=E8=BA{.n=C7+?=B7=ACzwZ(tm)=EB,j =AD =B2 M! Tf=C29 =B0 =
=D8_=A2Yh=C2)=E0=B5=ECm {ax f`=D3"=B6=20
> =AC=B9=B8=DEr=D7=E2zWR cN T=DEr =DE=B5:-zjh=AD=AA=E2-(Z-=D7^-+=DE=AF* =
M=E7!=9D=EBlzw^(tm)=A8=A5=B6'=E2=B2=DB=20
> =AE=F8=A9r =E0HD=D3y=C8gz=D3N0 N =DEq=E8=AFx=E3D(tm)=A8=A5 =
x)z=B7Z=CA?=DA-[azs,=B6=CB =9D=D7=A6j)m=20
> =B8=AC=B6=C7=AB=BE*\=A2=B8 4=DEr =DE=B48 =
z=CBRy=AA=DC?s=DE=BE*.=B2s,=B6)=E0=B1=ABp=C3 =A9r =
=E0:r=E2=9D=E4^=B2<=ABq=EB j=D6>j=C7=AC f=A2"
> > =DC?+=DE=B0=F9^j=C7=AF =C8=AD =
=F0=B0y=BB"=B5=E8m=B6Y=FF=C3"=A5=CA+f=F8ms_=DF=A2=BB=A6?=D9Y=A2=B6=9Dv+b=
=A2v=A5 w=E8=AEf=AD=20
> =
?=E8=AD=CA'=B5=A7-)=E6oe...&=ACjj+?=ABlj=C6=A4=A2*\=A2=B8(=AF=CE;=E7O}=EF=
M =C6=DEw15=3D=3D
>=20
> --------------------------------------------------------------
> -------------------
> Technet Mail List provided as a free service by IPC using=20
> LISTSERV 1.8d
> To unsubscribe, send a message to [log in to unmask] with=20
> following text in
> the BODY (NOT the subject field): SIGNOFF Technet
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> To receive ONE mailing per day of all the posts: send e-mail=20
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> for additional
> information, or contact Keach Sasamori at [log in to unmask] or=20
> 847-509-9700 ext.5315
> --------------------------------------------------------------
> -------------------
>=20
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Date: Wed, 27 Mar 2002 06:25:12 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Thin Laminates with low dielectric constant..
X-To: [log in to unmask]
Steve,
The Gore material works well. As we've discussed before, and as I indicated
in Marks questions, this is, currently, a highly specialized part of the MLB
world. I know you must do what you need and have selected one or more
qualified suppliers with many more lurking in the wings. The big caustion,
as you already know, is those lurking having transitioned from more common
board types to hi-rel types.
Gore presents its lamination press cycles to get full "cure." This is a two
stage press cycle (A and B( and a critical cool down cycle. The cycles are
similar to other "hi-rel" MLB requirements as polyimide and GTEK. The
"ordinary" fab folks are very happy with a much simpler cycle going to full
pressure and temperature in one big move for about 90 minutes and POP, it's
out of there and enjoyed by all commercial folks.
As for the thin core/preg stuff, I outlined that in my response to Mark
below. No matter, we must continue pushing the envelope in all we do, so why
not here.
You live the good life Steve, according to:
The MoonMan
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Date: Wed, 27 Mar 2002 07:08:36 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: another materials question
X-To: [log in to unmask]
Mark,
Good study and good questions though I wrote a much better reply before but
it didn't take because of my ignorance in taking too much time the first
time. So, here goes again.
Mark: I'm learning about laminate materials and read with interest several
recent tecnet emails on the subject. I'd like to submit a question about a
particular construction that is a challenge with respect to registration.
Earl: Wish I simply copy what I wrote earlier. Registration, as all
specified requirements, suffers when bad design choices are made concerning
material selections and MLB constructions. You already know that.
Mark: The construction is all 2 core and 3 core. The prepregs are 1-106 and
1-1080, which I have learned are described as resin rich. The construction
is balanced with respect to copper weights, glass styles, core thicknesses,
and prepreg openings.
Earl: Unless selecting and using relatively exotic materials, you must stay
away from very thin core/preg materials for several reasons. If you're
serious about making your own capacitance cores you must consider foil
choices as not ED copper unless tooth faicing out. Of course, there is a
patent issues as well though I still don't know why. You will need to use
rolled copper unless as stated above with ED. Again, because the thin
core/pregs are so resin rich, you face dimensional issues both in the press
and in product significantly reducing yelds mostly because of
misregistration issues.
Mark: What I am observing with this part is variation in how much certain
cores shrink, lot to lot, and variation that I would describe as a shift or
possibly a rotation in some of the internal layers.
Earl: Don't know all what you mean by shrinkage but core variability should
not be an as received issue. It is when married with very thin, resin rich
stuff as you describe (106 and 1080). These glass styles are so juicy they
slip and slide in the press and books therein. I have images depicting
relamination dynamics and, if you wish, I'll ask Steve Gregory to post them.
There is so much more to this, but the general idea, unless pushing the
envelope like Steve, you should carefully consider your options as design
compromises faced every day by GOOD designers and fabricators.
I wanted to write more, and did before this, but time prohibits.
Best wishes,
Earl
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Date: Wed, 27 Mar 2002 08:38:58 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
tony steinke <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: tony steinke <[log in to unmask]>
Subject: Re: another materials question
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_000C_01C1D56A.D6931E60"
This is a multi-part message in MIME format.
------=_NextPart_000_000C_01C1D56A.D6931E60
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Mark,
You should not assume that poor yields are a result of material =
shrinkage.
A good board fabrication shop should be able to predict how much =
shrinkage
occurs during normal fabrication of one's laminate. Yes shrinkage does =
vary
from supplier to supplier, but it should be consistent. For instance we =
here
at AIT use a ton of .005 1/1 cores and we will compensate(scale) the =
image
so that by the time the board is complete it will be at 1:1. This may =
mean
that we start a job some .015-.03 over 1:1 in the beginning.
Tony Steinke
----- Original Message -----=20
From: [log in to unmask]
To: [log in to unmask]
Sent: Tuesday, March 26, 2002 10:04 PM
Subject: [TN] another materials question
I'm learning about laminate materials and read with interest several =
recent tecnet emails on the subject.=20
I'd like to submit a question about a particular construction that is =
a challenge with respect to registration.=20
The construction is all 2 core and 3 core. The prepregs are 1-106 and =
1-1080, which I have learned are described as resin rich. The =
construction is balanced with respect to copper weights, glass styles, =
core thicknesses, and prepreg openings.=20
What I am observing with this part is variation in how much certain =
cores shrink, lot to lot,=20
and variation that I would describe as a shift or possibly a rotation =
in some of the internal layers. =20
Am I correct in assuming that these thin cores and these particular =
prepregs will contribute to lower yields due to misregistration? If =
anyone would care to offer up ideas on how to tackle the registration =
challenge that I am observing on this kind of construction, I would =
appreciate hearing your ideas.=20
Mark J.=20
------=_NextPart_000_000C_01C1D56A.D6931E60
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4807.2300" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#fff8e0>
<DIV><FONT face=3DArial size=3D2>Mark,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>You should not assume that poor yields =
are a result=20
of material shrinkage.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>A good board fabrication shop should be =
able to=20
predict how much shrinkage</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>occurs during normal fabrication of =
one's laminate.=20
Yes shrinkage does vary</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>from supplier to supplier, but it =
should be=20
consistent. For instance we here</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>at AIT use a ton of .005 1/1 cores and =
we will=20
compensate(scale) the image</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>so that by the time the board is =
complete it will=20
be at 1:1. This may mean</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>that we start a job some .015-.03 over =
1:1 in the=20
beginning.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Tony Steinke</FONT></DIV>
<BLOCKQUOTE=20
style=3D"PADDING-RIGHT: 0px; PADDING-LEFT: 5px; MARGIN-LEFT: 5px; =
BORDER-LEFT: #000000 2px solid; MARGIN-RIGHT: 0px">
<DIV style=3D"FONT: 10pt arial">----- Original Message ----- </DIV>
<DIV=20
style=3D"BACKGROUND: #e4e4e4; FONT: 10pt arial; font-color: =
black"><B>From:</B>=20
<A [log in to unmask] =
href=3D"mailto:[log in to unmask]">[log in to unmask]</A>=20
</DIV>
<DIV style=3D"FONT: 10pt arial"><B>To:</B> <A [log in to unmask]
href=3D"mailto:[log in to unmask]">[log in to unmask]</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>Sent:</B> Tuesday, March 26, 2002 =
10:04=20
PM</DIV>
<DIV style=3D"FONT: 10pt arial"><B>Subject:</B> [TN] another materials =
question</DIV>
<DIV><BR></DIV><FONT face=3Darial,helvetica><FONT size=3D2>I'm =
learning about=20
laminate materials and read with interest several recent tecnet emails =
on the=20
subject. <BR>I'd like to submit a question about a particular =
construction=20
that is a challenge with respect to registration. <BR><BR>The =
construction is=20
all 2 core and 3 core. The prepregs are 1-106 and 1-1080, which =
I have=20
learned are described as resin rich. The construction is =
balanced=20
with respect to copper weights, glass styles, core thicknesses, and =
prepreg=20
openings. <BR><BR>What I am observing with this part is variation in =
how much=20
certain cores shrink, lot to lot, <BR>and variation that I would =
describe as a=20
shift or possibly a rotation in some of the internal layers. =
<BR><BR>Am=20
I correct in assuming that these thin cores and these particular =
prepregs will=20
contribute to lower yields due to misregistration? If =
anyone would=20
care to offer up ideas on how to tackle the registration challenge =
that I am=20
observing on this kind of construction, I would appreciate hearing =
your ideas.=20
<BR><BR>Mark J.</FONT> </FONT></BLOCKQUOTE></BODY></HTML>
------=_NextPart_000_000C_01C1D56A.D6931E60--
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Date: Wed, 27 Mar 2002 08:48:00 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McMullen, Kerry" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McMullen, Kerry" <[log in to unmask]>
Subject: Re: ICT
X-To: DUTTON Phil <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi Barry,
If your board is highly populated, and test point space is at a premium, you
can go do to a .035 square pad on .070 centers.
But you need a very good fixture house.
Good luck,
Kerry
-----Original Message-----
From: DUTTON Phil [mailto:[log in to unmask]]
Sent: Tuesday, March 26, 2002 7:33 PM
To: [log in to unmask]
Subject: Re: [TN] ICT
Hello Barry,
IPC-2221 3.5 has some good info on testing and In Circuit Testing design
requirements.
Can be quite involved, and the circuit design needs to consider the test
requirements as well. Test probe lands are typically 0.040" and pitched at
0.100" centres for bed-of-nails type test fixtures. Different types/sizes of
probe pins are available.
Good idea to talk to the people who will be testing your boards very early.
Phil Dutton C.I.D.
Senior CAD Technician
IPC Certified Interconnect Designer
-----Original Message-----
From: Barry Gallegos [mailto:[log in to unmask]]
Sent: Wednesday, 27 March 2002 09:03
To: [log in to unmask]
Subject: [TN] ICT
G'day
Was asked if I could come up with some information on ICT.
Where can I find if any on standards that govern ICT "if any" or
how to's on fixturing etc.
Barry.
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Date: Wed, 27 Mar 2002 08:19:00 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Hafften <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Hafften <[log in to unmask]>
Subject: Imaging Clean Rooms
MIME-Version: 1.0
Content-Type: text/plain; charset=iso-8859-1
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We are in the process of evaluating our clean room for inner and outer layer
circuit imaging. I am interested in finding out more information on the use
of clean rooms for printed circuit processing, particularly imaging. This
would include not only clean room requirements for imaging .003" lines but
also methods to achieve the required level of cleanliness. There seems to
be alot of information for processing microelectronics but not for printed
circuits. Thanks in advance for any help.
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Date: Wed, 27 Mar 2002 07:08:22 -0800
Reply-To: Leo Roos <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Leo Roos <[log in to unmask]>
Subject: Re: Imaging Clean Rooms
X-To: Ken Hafften <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Some years ago PCFab had a series of articles in the same issue addressing
clean rooms. Major article was written by Bob Almond of Dupont. It provided
a great deal of information that we used in the building of our own clean
rooms. You might also try Dr. Karl Dietz ant Dupont, located at RTP, NC.
Leo Roos
----- Original Message -----
From: "Ken Hafften" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, March 27, 2002 6:19 AM
Subject: [TN] Imaging Clean Rooms
> We are in the process of evaluating our clean room for inner and outer
layer
> circuit imaging. I am interested in finding out more information on the
use
> of clean rooms for printed circuit processing, particularly imaging. This
> would include not only clean room requirements for imaging .003" lines but
> also methods to achieve the required level of cleanliness. There seems to
> be alot of information for processing microelectronics but not for printed
> circuits. Thanks in advance for any help.
>
> --------------------------------------------------------------------------
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Date: Wed, 27 Mar 2002 09:05:45 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: another materials question
X-To: [log in to unmask]
Outstanding Tony. Your statistical database must be extensive.
Earl
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Date: Wed, 27 Mar 2002 10:11:45 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Phil Nutting <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Nutting <[log in to unmask]>
Subject: solder mask tape dots
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Here is another question for all you gurus.
We have a hand build, through hole circuit board that has 8 locations =
that must be free of solder for the next level of assembly. So far I =
can only find solder mask tape dots at Contact East. Are there any other =
suppliers out there? Our terminal measures 0.28 inch diameter, so a =
0.3" pad might be just the thing.
Thanks in advance,
Phil
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Date: Wed, 27 Mar 2002 15:15:17 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Subject: Re: another materials question
X-To: [log in to unmask]
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this format, some or all of this message may not be legible.
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boundary="----_=_NextPart_001_01C1D5A2.33A19410"
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Hi Mark,
You should be able to dial this job in like any other but it may take an
iterative process. Thin core shouldn't translate into always having lower
yields - it might require tweaking the artwork comp. factors. Thinner
materials do like to shrink up (relax) once you etch the copper off.
Good registration requires understanding what the materials are doing
through the imaging to lamination processes. I'm stronger in the lam
department than artwork area but somebody else can cover for me.
If you really do have excessive core shrinkage (lot to lot) then I'd get
your lam supplier in there double quick to explain what's going on in their
process. Have you verified that your Artwork, Imaging & Lamination process
is in control?
Artwork - temp. & humidity within spec., best available artwork comp.
factors per sheet.
Imaging - Artwork & core stabilized, job running on one imaging unit
Lamination - Lamin. Pins and Bushings not overly worn, PEP data consistent
It sounds like you are having random registration problems - is that true on
all your layers or only some? Can you describe the misregistration better?
Hans
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask] <mailto:[log in to unmask]>
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Wednesday, March 27, 2002 1:05 AM
To: [log in to unmask]
Subject: [TN] another materials question
I'm learning about laminate materials and read with interest several recent
tecnet emails on the subject.
I'd like to submit a question about a particular construction that is a
challenge with respect to registration.
The construction is all 2 core and 3 core. The prepregs are 1-106 and
1-1080, which I have learned are described as resin rich. The construction
is balanced with respect to copper weights, glass styles, core thicknesses,
and prepreg openings.
What I am observing with this part is variation in how much certain cores
shrink, lot to lot,
and variation that I would describe as a shift or possibly a rotation in
some of the internal layers.
Am I correct in assuming that these thin cores and these particular prepregs
will contribute to lower yields due to misregistration? If anyone would
care to offer up ideas on how to tackle the registration challenge that I am
observing on this kind of construction, I would appreciate hearing your
ideas.
Mark J.
------_=_NextPart_001_01C1D5A2.33A19410
Content-Type: text/html;
charset="iso-8859-1"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
<META content="MSHTML 6.00.2712.300" name=GENERATOR></HEAD>
<BODY>
<DIV><SPAN class=109463214-27032002><FONT color=#0000ff>Hi
Mark,</FONT></SPAN></DIV>
<DIV><SPAN class=109463214-27032002><FONT
color=#0000ff></FONT></SPAN> </DIV>
<DIV><SPAN class=109463214-27032002><FONT color=#0000ff>You should be able to
dial this job in like any other but it may take an iterative process. Thin
core shouldn't translate into always having lower yields - it might require
tweaking the artwork comp. factors. Thinner materials do like to shrink up
(relax) once you etch the copper off.</FONT></SPAN></DIV>
<DIV><SPAN class=109463214-27032002><FONT
color=#0000ff></FONT></SPAN> </DIV>
<DIV><SPAN class=109463214-27032002><FONT color=#0000ff>Good registration
requires understanding what the materials are doing through
the imaging to lamination processes. I'm stronger in the lam
department than artwork area but somebody else can cover for
me. </FONT></SPAN></DIV>
<DIV><SPAN class=109463214-27032002><FONT
color=#0000ff></FONT></SPAN> </DIV>
<DIV><SPAN class=109463214-27032002> <FONT color=#0000ff>If you really do
have excessive core shrinkage (lot to lot) then I'd get your lam supplier
in there double quick to explain what's going on in their process.
Have you verified that your Artwork, Imaging & Lamination process
is in control? </FONT></SPAN></DIV>
<DIV><SPAN class=109463214-27032002><FONT
color=#0000ff></FONT></SPAN> </DIV>
<DIV><SPAN class=109463214-27032002><FONT color=#0000ff>Artwork - temp. &
humidity within spec., best available artwork comp. factors per
sheet.</FONT></SPAN></DIV>
<DIV><SPAN class=109463214-27032002><FONT color=#0000ff>Imaging - Artwork &
core stabilized, job running on one imaging unit</FONT></SPAN></DIV>
<DIV><SPAN class=109463214-27032002><FONT color=#0000ff>Lamination - Lamin. Pins
and Bushings not overly worn, PEP data consistent</FONT></SPAN></DIV>
<DIV><SPAN class=109463214-27032002><FONT
color=#0000ff></FONT></SPAN> </DIV>
<DIV><SPAN class=109463214-27032002><FONT color=#0000ff>It sounds like you
are having random registration problems - is that true on all your
layers or only some? Can you describe the misregistration
better?</FONT></SPAN></DIV>
<DIV><SPAN class=109463214-27032002><FONT
color=#0000ff></FONT></SPAN> </DIV>
<DIV><SPAN class=109463214-27032002><FONT color=#0000ff>Hans</FONT></SPAN></DIV>
<DIV><SPAN class=109463214-27032002><FONT color=#0000ff></FONT><BR><FONT
face=Verdana>~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</FONT> <BR><FONT
face=Verdana>Hans M. Hinners</FONT> <BR><FONT face=Verdana>Electronics
Engineer</FONT> <BR><FONT face=Verdana>Warner Robins - Air Logistics Center
(WR-ALC/LUGE)</FONT> <BR><FONT face=Verdana>226 Cochran Street</FONT> <BR><FONT
face=Verdana>Robins AFB GA 31098-1622</FONT> </DIV>
<DIV>
<P><FONT face=Verdana><A
href="mailto:[log in to unmask]">mailto:[log in to unmask]</A></FONT>
</P>
<P><FONT face=Verdana>Com: (478) 926 - 5224</FONT> <BR><FONT
face=Verdana>Fax: (478) 926 - 4911</FONT> <BR><FONT face=Arial
size=2>DSN Prefix: 468</FONT> </P></SPAN></DIV>
<DIV><SPAN class=109463214-27032002><FONT
color=#0000ff></FONT></SPAN> </DIV>
<BLOCKQUOTE>
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> [log in to unmask]
[mailto:[log in to unmask]]<BR><B>Sent:</B> Wednesday, March 27, 2002 1:05
AM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] another materials
question<BR><BR></FONT></DIV><FONT face=arial,helvetica><FONT size=2>I'm
learning about laminate materials and read with interest several recent tecnet
emails on the subject. <BR>I'd like to submit a question about a particular
construction that is a challenge with respect to registration. <BR><BR>The
construction is all 2 core and 3 core. The prepregs are 1-106 and
1-1080, which I have learned are described as resin rich. The
construction is balanced with respect to copper weights, glass styles, core
thicknesses, and prepreg openings. <BR><BR>What I am observing with this part
is variation in how much certain cores shrink, lot to lot, <BR>and variation
that I would describe as a shift or possibly a rotation in some of the
internal layers. <BR><BR>Am I correct in assuming that these thin cores
and these particular prepregs will contribute to lower yields due to
misregistration? If anyone would care to offer up ideas on how to
tackle the registration challenge that I am observing on this kind of
construction, I would appreciate hearing your ideas. <BR><BR>Mark J.</FONT>
</FONT></BLOCKQUOTE></BODY></HTML>
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Date: Wed, 27 Mar 2002 10:16:03 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Thin Laminates with low dielectric constant..
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Steve,
Have you thought of using Kapton (adhesiveless -offcourse) to build the brd with. THis is very proven technology (rigid-flex). Pricy, but can't imagine it to be much more than SpeedBoard.
We have build brds with Kapton to provide thin brds w/ high layer count. Benefits:-
1) Er of 3.2-3.6.
2) Can use 2 mil thick material.. 2 mil thick has been used in rigid-flex for years.
Call offline if you want to discuss further.
Rush
818.768.3919
www.accueng.com
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Date: Wed, 27 Mar 2002 18:29:48 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Measuring "No Clean" process quality
X-To: Volkmar Huss <[log in to unmask]>
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Bruno
As they say in the country where I used to live, "Groezi wohl" to kalt
Hamburg. Yes, I agree that outside consultancy can help and probably be
cheaper in the long run, provided that Volkmar has researched the
problem sufficiently to be able to define the terms of reference. If he
leaves this open-ended, then it will cost zillions and may not get
optimum results.
My experience as a consultant is that most clients approach me saying
that they want to change from x cleaning method to y cleaning method or
z not to clean at all, without having a clue what is involved. It
typically doubles the cost of the consultancy if they have not
previously defined at least a baseline, because the act of definition
gives them a much clearer mind and how to go about it. Another stumbling
block is that, prior to visiting the site, I'm sometimes misinformed as
to things like available equipment, end use conditions etc. which means
that my preparation is often of limited use (I minimalise preparation,
now, for that reason).
Greetings from a cold and sunny Washington DC (back to the warmth of
Cyprus by Friday!).
Brian
Volkmar Huss wrote:
>
> Hi TechNetters,
>
> we are working on defining our "No Clean" soldering process. The
> solder-paste and flux manufacturers certify the "No Clean" capability of
>
> their products to some extend, but what is the definition of "No Clean"?
>
> And I don't mean the statement, that only inert residues of flux and
> solder-paste additives remain on the board.
> Are there any standards that can used as a reference?
> How do you measure the:
> "No Clean" capability of solder paste, flux and tubular solder with flux
>
> core?
> "No Clean" quality of printed board assemblies?
> "No Clean" quality of printed board assemblies onto which devices have
> been hand-soldered?
> and all of this for prototype and series production?
>
> I have gleaned some insights from the TechNet archives, but any
> additional input is very welcome.
>
> Best regards
>
> Volkmar Huß
>
> Engineering Electronic Circuit Boards
> Aufbau- und Verbindungstechnik
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
> DRÄGER ELECTRONICS
>
> Draeger Electronics GmbH
> Moislinger Allee 53-55
> D-23558 Lübeck
>
> Tel: +49-451-882-3998
> Fax: +49-451-882-4365
> mailto:[log in to unmask]
> Website http://www.draeger.com/de/EL
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
> --
> Best regards / Mit freundlichen Grüßen
>
> Volkmar Huß
>
> Engineering Electronic Circuit Boards
> Aufbau- und Verbindungstechnik
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
> DRÄGER ELECTRONICS
>
> Draeger Electronics GmbH
> Moislinger Allee 53-55
> D-23558 Lübeck
>
> Tel: +49-451-882-3998
> Fax: +49-451-882-4365
> mailto:[log in to unmask]
> Website http://www.draeger.com/de/EL
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
> Mç!ëLj)K Ëi®‹âuçZ±§ëyë ®øœy¼ˆ<+¬ x!$Ò uñÔèº{.nÇ+‰·¬zwZ™ë,j ² M! TƒÂ9 ° Ø_¢YhÂ)àµìm {ax ƒ`Ó“¶ ¬¹¸Þr×âzWR cN TÞr Þµ:-zjhªâ—(Z–×^–+Þ¯* Mç!ëlzw^™¨¥¶‚â²Û ®ø©r àHDÓyÈgzÓN0 N Þqè¯xãD™¨¥ x)z·Zʇږ[azš,¶Ë צj)m ¸¬¶Ç«¾*\¢¸ 4Þr Þ´8 zËRyªÜ†šÞ¾*.²š,¶)౫pà ©r à:râä^²‹«që jÖ›jǬ f¢”
> ܆+Þ°ù^jǯ È ð°y»"µèm¶ŸÿÃ"¥Ê+ƒømš_ߢ»¦†ÙŸ¢¶v+b¢v¥ wè®f ‰èÊ'µ§-)朅&¬jj+‰«ljƤ¢*\¢¸(¯Î;çO}ïM ÆÞw15==
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Date: Wed, 27 Mar 2002 11:55:03 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Tempea, Ioan" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Tempea, Ioan" <[log in to unmask]>
Subject: Re: solder mask tape dots
MIME-Version: 1.0
Content-Type: text/plain
What about peelable solder mask Phil?
Regards,
Ioan
> -----Original Message-----
> From: Phil Nutting [SMTP:[log in to unmask]]
> Sent: Wednesday, March 27, 2002 10:12 AM
> To: [log in to unmask]
> Subject: [TN] solder mask tape dots
>
> Here is another question for all you gurus.
>
> We have a hand build, through hole circuit board that has 8 locations that
> must be free of solder for the next level of assembly. So far I can only
> find solder mask tape dots at Contact East. Are there any other suppliers
> out there? Our terminal measures 0.28 inch diameter, so a 0.3" pad might
> be just the thing.
>
> Thanks in advance,
>
> Phil
>
> --------------------------------------------------------------------------
> -------
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Date: Wed, 27 Mar 2002 12:12:14 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Howard Watson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Howard Watson <[log in to unmask]>
Subject: Re: Double Sided Reflow Flux and surface tension
X-To: "Edward S. Wheeler" <[log in to unmask]>
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Ed,
I can't answer your questions regarding the OA flux and BGA's, but I can
help with your other questions:
"Is there a rule of thumb for the pad surface area / part weight ratio to
maintain enough surface tension to correctly hold the part?" Yes, as stated in previous TechNet threads on the subject, the "rule of
thumb" formula is the weight of the component in grams / Total pad mating
area in square inches. The resulting value in grams per sq. in. must be
less than 30.
"Does anybody use adhesives to stake heavy parts on the first pass?" No I don't, but it shouldn't cause you any worries. There are issues with thermal balance and back to back components that
you will need to investigate to obtain the proper reflow.
"Does anybody have a solid rule of thumb for pin-in-paste apertures? On
our
first try we used an 8 mil step up and had the aperture the same size as
outer edge of the PTH. Would an oversize print work better?" The key is to get a sufficient amount of solder fill in the hole and to
provide for good fillets. A simple formula to use for paste required is:
Vp = [Vh - Vl]x Fh x Sp ,where:
Vp = The "target" volume of paste
Vh = Volume of the hole (self explanatory)
Vl = Volume of the lead (again, self explanatory)
Fh = Through hole fill percentage (This depends on your own needs, ie:IPC
class I,II,II)
Sp = Paste shrink factor (depends on your paste, I use 51%)
I have used this formula and have achieved great success reflowing through
hole parts. I have overprinted the pads out of necessity to get the
desired volume of paste, up to a .22" aperture, and the paste reflowed
into the barrel, creating good top and bottom side fillets. The amount of
overprint is dictated by the paste volume formula, and also by the PCB
layout of nearby SMT components, the pitch of the device,vias, or other
keep out areas. I created a spreadsheet that helps me design the
apertures based on the above formula, and I can email this to you if you
are interested. IPC-7525 contains some very useful guidelines for
"Intrusive Reflow". Their formula is more detailed, but may be overkill.
I hope this is of some help. Good luck!
Howard Watson
Manufacturing Engineer
AMETEK/Dixson
"Edward S. Wheeler" <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
03/26/02 01:14 PM
Please respond to "TechNet E-Mail Forum."; Please respond to "Edward S.
Wheeler"
To: [log in to unmask]
cc:
Subject: [TN] Double Sided Reflow Flux and surface tension
Hello Tech-Net users! I am new to the group here, and would like your
assistance on a couple of matters concerning a double sided reflow process
we are undertaking. We are new to this process, so we would appreciate any
expertise on the matter.
We are using an OA type solder paste, and like to wash our boards within 2
hours, 4 being the maximum in house limit. To perform our double sided
reflow process in mass production, we may want to run all day on one side
and do the other side the next. My question is... does any of the residual
flux material aid the second reflow process, or can we wash it off before
the second reflow and get as good of results? I am concerned that the
solder joint may have an outer layer of oxidation or graininess due to the
lack of flux once it reflows again. Is there any flux left over that is
active, or is it simply the remainder of the carrier?
What luck are people having with BGAs populated on the bottom side? Is
there more of a concern with warp on the second pass?
Is there a rule of thumb for the pad surface area / part weight ratio to
maintain enough surface tension to correctly hold the part?
Does anybody use adhesives to stake heavy parts on the first pass?
Does anybody have a solid rule of thumb for pin-in-paste apertures? On our
first try we used an 8 mil step up and had the aperture the same size as
outer edge of the PTH. Would an oversize print work better?
Thanks in advance for any help.
Ed
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Content-Type: text/html; charset="us-ascii"
<br><font size=2 face="sans-serif">Ed,</font>
<br>
<br><font size=2 face="sans-serif">I can't answer your questions regarding the OA flux and BGA's, but I can help with your other questions:</font>
<br>
<br><font size=2 face="Courier New"><i>"Is there a rule of thumb for the pad surface area / part weight ratio to<br>
maintain enough surface tension to correctly hold the part?"</i> Yes, as stated in previous TechNet threads on the subject, the "rule of thumb" formula is the weight of the component in grams / Total pad mating area in square inches. The resulting value in grams per sq. in. must be less than 30.<br>
<br>
<i>"Does anybody use adhesives to stake heavy parts on the first pass?" </i>No I don't, but it shouldn't cause you any worries<i>.</i> There are issues with thermal balance and back to back components that you will need to investigate to obtain the proper reflow.<br>
<br>
<i>"Does anybody have a solid rule of thumb for pin-in-paste apertures? On our<br>
first try we used an 8 mil step up and had the aperture the same size as<br>
outer edge of the PTH. Would an oversize print work better?" </i>The key is to get a sufficient amount of solder fill in the hole and to provide for good fillets. A simple formula to use for paste required is: V<sub>p</sub> = [V<sub>h </sub>- V<sub>l</sub>]x F<sub>h</sub> x S<sub>p</sub> ,where:</font>
<br><font size=2 face="Courier New">V<sub>p</sub> = The "target" volume of paste</font>
<br><font size=2 face="Courier New">V<sub>h</sub> = Volume of the hole (self explanatory)</font>
<br><font size=2 face="Courier New">V<sub>l</sub> = Volume of the lead (again, self explanatory)</font>
<br><font size=2 face="Courier New">F<sub>h</sub> = Through hole fill percentage (This depends on your own needs, ie:IPC class I,II,II)</font>
<br><font size=2 face="Courier New">S<sub>p</sub> = Paste shrink factor (depends on your paste, I use 51%)</font>
<br><font size=2 face="Courier New">I have used this formula and have achieved great success reflowing through hole parts. I have overprinted the pads out of necessity to get the desired volume of paste, up to a .22" aperture, and the paste reflowed into the barrel, creating good top and bottom side fillets. The amount of overprint is dictated by the paste volume formula, and also by the PCB layout of nearby SMT components, the pitch of the device,vias, or other keep out areas. I created a spreadsheet that helps me design the apertures based on the above formula, and I can email this to you if you are interested. IPC-7525 contains some very useful guidelines for "Intrusive Reflow". Their formula is more detailed, but may be overkill. I hope this is of some help. Good luck!</font>
<br>
<br><font size=2 face="sans-serif">Howard Watson<br>
Manufacturing Engineer<br>
AMETEK/Dixson</font>
<br>
<br>
<br>
<table width=100%>
<tr valign=top>
<td>
<td><font size=1 face="sans-serif"><b>"Edward S. Wheeler" <[log in to unmask]></b></font>
<br><font size=1 face="sans-serif">Sent by: TechNet <[log in to unmask]></font>
<p><font size=1 face="sans-serif">03/26/02 01:14 PM</font>
<br><font size=1 face="sans-serif">Please respond to "TechNet E-Mail Forum."; Please respond to "Edward S. Wheeler"</font>
<br>
<td><font size=1 face="Arial"> </font>
<br><font size=1 face="sans-serif"> To: [log in to unmask]</font>
<br><font size=1 face="sans-serif"> cc: </font>
<br><font size=1 face="sans-serif"> Subject: [TN] Double Sided Reflow Flux and surface tension</font></table>
<br>
<br>
<br><font size=2 face="Courier New">Hello Tech-Net users! I am new to the group here, and would like your<br>
assistance on a couple of matters concerning a double sided reflow process<br>
we are undertaking. We are new to this process, so we would appreciate any<br>
expertise on the matter.<br>
<br>
We are using an OA type solder paste, and like to wash our boards within 2<br>
hours, 4 being the maximum in house limit. To perform our double sided<br>
reflow process in mass production, we may want to run all day on one side<br>
and do the other side the next. My question is... does any of the residual<br>
flux material aid the second reflow process, or can we wash it off before<br>
the second reflow and get as good of results? I am concerned that the<br>
solder joint may have an outer layer of oxidation or graininess due to the<br>
lack of flux once it reflows again. Is there any flux left over that is<br>
active, or is it simply the remainder of the carrier?<br>
<br>
What luck are people having with BGAs populated on the bottom side? Is<br>
there more of a concern with warp on the second pass?<br>
<br>
Is there a rule of thumb for the pad surface area / part weight ratio to<br>
maintain enough surface tension to correctly hold the part?<br>
<br>
Does anybody use adhesives to stake heavy parts on the first pass?<br>
<br>
Does anybody have a solid rule of thumb for pin-in-paste apertures? On our<br>
first try we used an 8 mil step up and had the aperture the same size as<br>
outer edge of the PTH. Would an oversize print work better?<br>
<br>
Thanks in advance for any help.<br>
<br>
Ed<br>
<br>
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</font>
<br>
<br>
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Date: Wed, 27 Mar 2002 12:23:16 -0500
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Gary Bremer <[log in to unmask]>
Subject: New Laminate Material
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Gentelmen,
Does anyone have information on carbon-core Printed Wiring
Boards? Who makes this material and how easy is it to work with?
Gary Bremer
Manufacturing Engineer
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Date: Wed, 27 Mar 2002 12:41:29 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
bbarr <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: bbarr <[log in to unmask]>
Subject: Re: Double Sided Reflow Flux and surface tension
X-To: Howard Watson <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
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boundary="----=_NextPart_000_000E_01C1D58C.B766F440"
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A question regarding the "total pad mating area" in the formula below. Does
one take into consideration only the area where the bottom of the lead
contacts the pad, or the entire pad area? And, is the contact area of the
bottom of the lead and the contact area of the top of the pad in contact
with the lead added together to get the total contact area for that lead?
Hope this question makes sense!
Bob
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Howard Watson
Sent: Wednesday, March 27, 2002 12:12 PM
To: [log in to unmask]
Subject: Re: [TN] Double Sided Reflow Flux and surface tension
Ed,
I can't answer your questions regarding the OA flux and BGA's, but I can
help with your other questions:
"Is there a rule of thumb for the pad surface area / part weight ratio to
maintain enough surface tension to correctly hold the part?" Yes, as
stated in previous TechNet threads on the subject, the "rule of thumb"
formula is the weight of the component in grams / Total pad mating area in
square inches. The resulting value in grams per sq. in. must be less than
30.
------=_NextPart_000_000E_01C1D58C.B766F440
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4913.1100" name=3DGENERATOR></HEAD>
<BODY>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D370093417-27032002>A =
question regarding=20
the "total pad mating area" in the formula below. Does one take into=20
consideration only the area where the bottom of the lead contacts =
the pad,=20
or the entire pad area? And, is the contact area of the bottom of =
the lead=20
and the contact area of the top of the pad in contact with the lead =
added=20
together to get the total contact area for that lead? Hope this question =
makes=20
sense!</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<P><FONT size=3D2>Bob<BR></FONT></P>
<BLOCKQUOTE=20
style=3D"PADDING-LEFT: 5px; MARGIN-LEFT: 5px; BORDER-LEFT: #000000 2px =
solid">
<DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of </B>Howard =
Watson<BR><B>Sent:</B>=20
Wednesday, March 27, 2002 12:12 PM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> Re: [TN] Double Sided Reflow Flux =
and=20
surface tension<BR><BR></FONT></DIV><BR><FONT face=3Dsans-serif=20
size=3D2>Ed,</FONT> <BR><BR><FONT face=3Dsans-serif size=3D2>I can't =
answer your=20
questions regarding the OA flux and BGA's, but I can help with your =
other=20
questions:</FONT> <BR><BR><FONT face=3D"Courier New" size=3D2><I>"Is =
there a rule=20
of thumb for the pad surface area / part weight ratio to<BR>maintain =
enough=20
surface tension to correctly hold the part?"</I> Yes, as stated =
in=20
previous TechNet threads on the subject, the "rule of thumb" formula =
is the=20
weight of the component in grams / Total pad mating area in square =
inches.=20
The resulting value in grams per sq. in. must be less than=20
30.<BR></FONT></BLOCKQUOTE></BODY></HTML>
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Date: Wed, 27 Mar 2002 10:48:36 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Barry Gallegos <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Barry Gallegos <[log in to unmask]>
Subject: Re: ICT
X-To: "McMullen, Kerry" <[log in to unmask]>
MIME-Version: 1.0
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Thank you all for your assistance.
Barry.
-----Original Message-----
From: McMullen, Kerry [mailto:[log in to unmask]]
Sent: Wednesday, March 27, 2002 6:48 AM
To: [log in to unmask]
Subject: Re: [TN] ICT
Hi Barry,
If your board is highly populated, and test point space is at a premium, you
can go do to a .035 square pad on .070 centers.
But you need a very good fixture house.
Good luck,
Kerry
-----Original Message-----
From: DUTTON Phil [mailto:[log in to unmask]]
Sent: Tuesday, March 26, 2002 7:33 PM
To: [log in to unmask]
Subject: Re: [TN] ICT
Hello Barry,
IPC-2221 3.5 has some good info on testing and In Circuit Testing design
requirements.
Can be quite involved, and the circuit design needs to consider the test
requirements as well. Test probe lands are typically 0.040" and pitched at
0.100" centres for bed-of-nails type test fixtures. Different types/sizes of
probe pins are available.
Good idea to talk to the people who will be testing your boards very early.
Phil Dutton C.I.D.
Senior CAD Technician
IPC Certified Interconnect Designer
-----Original Message-----
From: Barry Gallegos [mailto:[log in to unmask]]
Sent: Wednesday, 27 March 2002 09:03
To: [log in to unmask]
Subject: [TN] ICT
G'day
Was asked if I could come up with some information on ICT.
Where can I find if any on standards that govern ICT "if any" or
how to's on fixturing etc.
Barry.
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Date: Wed, 27 Mar 2002 13:26:05 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Phil Nutting <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Nutting <[log in to unmask]>
Subject: Re: solder mask tape dots
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Ioan,
That would be a solution, but that requires my assemblers to wait for it =
to cure. If time wasn't an issue that would be fine as we have that in =
stock. As a fallback I may use some of the Kapton wave solder masking =
tape we have in house. The only problem is this will cover too much =
space, or my assemblers will spend way to much time trying to make the =
tape fit.
Thanks for the thought.
Phil
-----Original Message-----
From: Tempea, Ioan [mailto:[log in to unmask]]
Sent: Wednesday, March 27, 2002 11:55 AM
To: [log in to unmask]
Subject: Re: [TN] solder mask tape dots
What about peelable solder mask Phil?
Regards,
Ioan
> -----Original Message-----
> From: Phil Nutting [SMTP:[log in to unmask]]
> Sent: Wednesday, March 27, 2002 10:12 AM
> To: [log in to unmask]
> Subject: [TN] solder mask tape dots
>
> Here is another question for all you gurus.
>
> We have a hand build, through hole circuit board that has 8 locations =
that
> must be free of solder for the next level of assembly. So far I can =
only
> find solder mask tape dots at Contact East. Are there any other =
suppliers
> out there? Our terminal measures 0.28 inch diameter, so a 0.3" pad =
might
> be just the thing.
>
> Thanks in advance,
>
> Phil
>
> =
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Date: Wed, 27 Mar 2002 13:29:16 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Sauer, Steven T." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Sauer, Steven T." <[log in to unmask]>
Subject: Re: solder mask tape dots
X-To: Phil Nutting <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Phil,
Check this site for solder plugs and other types of boots and maskant
products: http://www.kinnarney.com/
I've used these folks for a long time and have had great success.
Steve
-----Original Message-----
From: Phil Nutting [mailto:[log in to unmask]]
We have a hand build, through hole circuit board that has 8 locations that
must be free of solder for the next level of assembly. So far I can only
find solder mask tape dots at Contact East. Are there any other suppliers
out there? Our terminal measures 0.28 inch diameter, so a 0.3" pad might be
just the thing.
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Date: Wed, 27 Mar 2002 15:12:34 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: Double Sided Reflow Flux and surface tension
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The formula is conservative and assumes the lead is completely on the land.
Surface tension on the wetted sides and heel of leaded devices add to the
forces to that in cases where the leads occupy about 85% of the land pattern
it is okay to use the land pattern in the formula. If the land patterns are
unusually large you might have trouble. Then, use the surface area of the
component lead. For, BGAs use the land pattern.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of bbarr
Sent: Wednesday, March 27, 2002 12:41 PM
To: [log in to unmask]
Subject: Re: [TN] Double Sided Reflow Flux and surface tension
A question regarding the "total pad mating area" in the formula below.
Does one take into consideration only the area where the bottom of the lead
contacts the pad, or the entire pad area? And, is the contact area of the
bottom of the lead and the contact area of the top of the pad in contact
with the lead added together to get the total contact area for that lead?
Hope this question makes sense!
Bob
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Howard Watson
Sent: Wednesday, March 27, 2002 12:12 PM
To: [log in to unmask]
Subject: Re: [TN] Double Sided Reflow Flux and surface tension
Ed,
I can't answer your questions regarding the OA flux and BGA's, but I can
help with your other questions:
"Is there a rule of thumb for the pad surface area / part weight ratio
to
maintain enough surface tension to correctly hold the part?" Yes, as
stated in previous TechNet threads on the subject, the "rule of thumb"
formula is the weight of the component in grams / Total pad mating area in
square inches. The resulting value in grams per sq. in. must be less than
30.
------=_NextPart_000_0050_01C1D5A1.D27DDF40
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META content=3D"text/html; charset=3Diso-8859-1" =
http-equiv=3DContent-Type>
<META content=3D"MSHTML 5.00.3105.105" name=3DGENERATOR></HEAD>
<BODY>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN =
class=3D258080520-27032002>The=20
formula is conservative and assumes the lead is completely on the land. =
Surface=20
tension on the wetted sides and heel of leaded devices add to the forces =
to that=20
in cases where the leads occupy about 85% of the land pattern it is okay =
to use=20
the land pattern in the formula. If the land patterns are unusually =
large=20
you might have trouble. Then, use the surface area of the component =
lead. For, =20
BGAs use the land pattern. </SPAN></FONT></DIV>
<DIV> </DIV>
<DIV> </DIV>
<BLOCKQUOTE=20
style=3D"BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: =
0px; PADDING-LEFT: 5px">
<DIV class=3DOutlookMessageHeader><FONT face=3D"Times New Roman"=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of</B> bbarr<BR><B>Sent:</B> =
Wednesday,=20
March 27, 2002 12:41 PM<BR><B>To:</B> =
[log in to unmask]<BR><B>Subject:</B> Re:=20
[TN] Double Sided Reflow Flux and surface tension<BR><BR></DIV></FONT>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D370093417-27032002>A =
question=20
regarding the "total pad mating area" in the formula below. Does one =
take into=20
consideration only the area where the bottom of the lead contacts =
the=20
pad, or the entire pad area? And, is the contact area of the bottom of =
the lead and the contact area of the top of the pad in contact =
with the=20
lead added together to get the total contact area for that lead? Hope =
this=20
question makes sense!</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<P><FONT size=3D2>Bob<BR></FONT></P>
<BLOCKQUOTE=20
style=3D"BORDER-LEFT: #000000 2px solid; MARGIN-LEFT: 5px; =
PADDING-LEFT: 5px">
<DIV align=3Dleft class=3DOutlookMessageHeader dir=3Dltr><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of </B>Howard =
Watson<BR><B>Sent:</B>=20
Wednesday, March 27, 2002 12:12 PM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> Re: [TN] Double Sided Reflow Flux =
and=20
surface tension<BR><BR></FONT></DIV><BR><FONT face=3Dsans-serif=20
size=3D2>Ed,</FONT> <BR><BR><FONT face=3Dsans-serif size=3D2>I can't =
answer your=20
questions regarding the OA flux and BGA's, but I can help with your =
other=20
questions:</FONT> <BR><BR><FONT face=3D"Courier New" size=3D2><I>"Is =
there a=20
rule of thumb for the pad surface area / part weight ratio =
to<BR>maintain=20
enough surface tension to correctly hold the part?"</I> Yes, =
as stated=20
in previous TechNet threads on the subject, the "rule of thumb" =
formula is=20
the weight of the component in grams / Total pad mating area in =
square=20
inches. The resulting value in grams per sq. in. must be less =
than=20
30.<BR></FONT></BLOCKQUOTE></BLOCKQUOTE></BODY></HTML>
------=_NextPart_000_0050_01C1D5A1.D27DDF40--
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Date: Wed, 27 Mar 2002 12:05:42 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Thorup, John" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Thorup, John" <[log in to unmask]>
Subject: Re: solder mask tape dots
X-To: "Sauer, Steven T." <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
We use the "solder wave disks" from Shercon. Basically it's a roll of dots
of high temp masking tape. Among others there are .250 and .375 dia. They
work well for us and don't leave any goop. We buy them thru Com-Kyl.
> -----Original Message-----
> From: Sauer, Steven T. [SMTP:[log in to unmask]]
> Sent: Wednesday, March 27, 2002 10:29 AM
> To: [log in to unmask]
> Subject: Re: [TN] solder mask tape dots
>
> Phil,
> Check this site for solder plugs and other types of boots and maskant
> products: http://www.kinnarney.com/
> I've used these folks for a long time and have had great success.
>
> Steve
>
> -----Original Message-----
> From: Phil Nutting [mailto:[log in to unmask]]
>
> We have a hand build, through hole circuit board that has 8 locations that
> must be free of solder for the next level of assembly. So far I can only
> find solder mask tape dots at Contact East. Are there any other suppliers
> out there? Our terminal measures 0.28 inch diameter, so a 0.3" pad might
> be
> just the thing.
>
> --------------------------------------------------------------------------
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Date: Wed, 27 Mar 2002 16:40:21 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: solder mask tape dots
X-To: Phil Nutting <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Phil,
One more solution - UV curable spotmask, made by several of the peelable
and/or water-soluble spot mask suppliers. Available at Contact East and
other distributors.
Al Kreplick
Sr. Mfg. Eng.
Teradyne, Inc.
500 Riverpark Drive
North Reading, MA 01864
978-370-1726
(Embedded
image moved TechNet <[log in to unmask]>
to file: 03/27/2002 01:26 PM
pic31591.pcx)
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Phil Nutting <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: Re: [TN] solder mask tape dots
Ioan,
That would be a solution, but that requires my assemblers to wait for it to
cure. If time wasn't an issue that would be fine as we have that in stock.
As a fallback I may use some of the Kapton wave solder masking tape we have
in house. The only problem is this will cover too much space, or my
assemblers will spend way to much time trying to make the tape fit.
Thanks for the thought.
Phil
-----Original Message-----
From: Tempea, Ioan [mailto:[log in to unmask]]
Sent: Wednesday, March 27, 2002 11:55 AM
To: [log in to unmask]
Subject: Re: [TN] solder mask tape dots
What about peelable solder mask Phil?
Regards,
Ioan
> -----Original Message-----
> From: Phil Nutting [SMTP:[log in to unmask]]
> Sent: Wednesday, March 27, 2002 10:12 AM
> To: [log in to unmask]
> Subject: [TN] solder mask tape dots
>
> Here is another question for all you gurus.
>
> We have a hand build, through hole circuit board that has 8 locations
that
> must be free of solder for the next level of assembly. So far I can only
> find solder mask tape dots at Contact East. Are there any other suppliers
> out there? Our terminal measures 0.28 inch diameter, so a 0.3" pad might
> be just the thing.
>
> Thanks in advance,
>
> Phil
>
>
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Date: Wed, 27 Mar 2002 16:40:54 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Dave Hillman <[log in to unmask]>
Subject: Re: Conformal Coating BGA's
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Hi Peter! You have me confused (which is a normal state for me if I don't
have a Coke in my hand). Collins has been using BGAs in avionics use
environments, not underfilled, with acrylic conformal coating very
successfully for a couple of years. What was the reason/rationale for using
BGAs with underfill? Was is an issue with solder joint thermal cycle
fatigue for a given use environment? Corrosion? Customer requirements?
Residual flux issues? Sheer terror of the unknown?
Dave Hillman
Rockwell Collins
[log in to unmask]
[log in to unmask]@ipc.org> on 03/26/2002 07:48:52 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to [log in to unmask]
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: Re: [TN] Conformal Coating BGA's
Hi, Bruce,
We apply Humiseal acrylic coating to boards that fit your description and
application precisely, except that we do underfill the BGA's with a
reworkable epoxy, applied after assembly. The only exception was for the
case of two boards destined for temperature cycling measurement, for which
we couldn't get a supply of underfill material at the time. We substituted
thinned Humiseal as the boards would not be flying, as we were concerned
about entrapped air and also no suuport for the BGA joints. Humiseal is not
a proper substitute for the specialised proper epoxy, but was sufficient
for our particular purpose.
The main issue as I see it would be moisture and other contaminants in the
entrapped air, but I have no first hand data to help you decide if that
causes problems or not.
Good luck
Peter
"Misner,
Bruce" To: [log in to unmask]
<Bruce_Misner cc: (bcc: DUNCAN Peter/Asst
Prin Engr/ST
@ATK.COM> Aero/ST Group)
Sent by: Subject: [TN] Conformal
Coating BGA's
TechNet
<[log in to unmask]
ORG>
03/20/02
03:48 AM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
"Misner,
Bruce"
My question of the day: Is anyone conformal coating (not parylene) plastic
BGA's on FR-4 in Hi-Rel applications (aircraft; -20 to +71C ambient
operating temperature requirement) without benefit of an underfil? If yes,
has entrapped air been a major issue? Anyone care to comment on this
approach?
Regards,
Bruce Misner
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Date: Wed, 27 Mar 2002 18:37:53 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: solder mask tape dots
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_90.23777ee9.29d3b1d1_boundary"
--part1_90.23777ee9.29d3b1d1_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
Hi Phil!
Here's another suggestion to add to the answers you've received, reusable
tapered plugs. Check out:
http://www.echosupply.com/catalog_pdf/echo6.pdf
-Steve Gregory-
> Here is another question for all you gurus.
>
> We have a hand build, through hole circuit board that has 8 locations that
> must be free of solder for the next level of assembly. So far I can only
> find solder mask tape dots at Contact East. Are there any other suppliers
> out there? Our terminal measures 0.28 inch diameter, so a 0.3" pad might
> be just the thing.
>
> Thanks in advance,
>
> Phil
>
--part1_90.23777ee9.29d3b1d1_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Phil!<BR>
<BR>
Here's another suggestion to add to the answers you've received, reusable tapered plugs. Check out:<BR>
<BR>
http://www.echosupply.com/catalog_pdf/echo6.pdf<BR>
<BR>
-Steve Gregory-<BR>
<BR>
<BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Here is another question for all you gurus.<BR>
<BR>
We have a hand build, through hole circuit board that has 8 locations that must be free of solder for the next level of assembly. So far I can only find solder mask tape dots at Contact East. Are there any other suppliers out there? Our terminal measures 0.28 inch diameter, so a 0.3" pad might be just the thing.<BR>
<BR>
Thanks in advance,<BR>
<BR>
Phil<BR>
</BLOCKQUOTE><BR>
<BR>
</FONT></HTML>
--part1_90.23777ee9.29d3b1d1_boundary--
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Date: Wed, 27 Mar 2002 18:54:25 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: solder mask tape dots
MIME-Version: 1.0
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Humiseal makes tape dots that are designed for coating masking, but I have
used them at wave in the past. You might try to get a sample from them to
test.
Jon Moore
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Date: Wed, 27 Mar 2002 18:35:00 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jack Crawford <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jack Crawford <[log in to unmask]>
Subject: IPC News Release--IPC AND ITS MEMBERS CLAIM VICTORY
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properly handle MIME multipart messages.
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Contact Information:
Joe Dudeck, IPC Communications Manager
847-790-5371
For Immediate Release
IPC AND ITS MEMBERS CLAIM VICTORY
NORTHBROOK, Ill., March 15, 2002--IPC-Association Connecting Electronics =
Industries=AE has announced a victory in its efforts to pass a realistic =
depreciation bill for the electronics assembly and printed circuit board =
industries.
The U.S. Congress and the Bush Administration recently reached an =
agreement to pass an economic stimulus package that includes a significant =
accelerated depreciation provision for the electronic interconnection =
industry and other U.S. manufacturers. This realistic depreciation issue =
has been a cornerstone of IPC's Government Relations policy for more than =
seven years. The bipartisan effort received support from nearly every =
congressman and senator IPC contacted to support the bill.
"This is a great victory for IPC, its Board and its dedicated members," =
said IPC President Denny McGuirk. "I congratulate and thank all those =
individuals, especially those that serve on our Government Relations =
committee, who have given their time and energy to attend past Capitol =
Hill Day events, write letters and host plant tours on this very important =
issue."
The "Job Creation and Worker Assistance Act of 2002," which was signed =
into law by President Bush on March 9, contains a 30 percent accelerated =
depreciation benefit over the next three years that will spur investment =
in state-of-the-art manufacturing equipment and assist in the recovery of =
the PCB and EMS industry. The applicable time period for equipment =
covered under the new law is property that was acquired after September =
10, 2001, and before September 11, 2004.
"The passing of this bill is timely for our industry and our national =
economy," added McGuirk. "With IPC Printed Circuits Expo=AE 2002 just =
around the corner, the 30 percent accelerated depreciation benefit will =
likely impact many attendees' purchasing decisions in a positive way."
For more information, contact John Kania, IPC's director of Government =
Relations, at [log in to unmask] or 202-962-0460.
About IPC
IPC is a U.S.-based trade association dedicated to the competitive =
excellence and financial success of its more than 2,600 member companies =
which represent all facets of the electronic interconnection industry, =
including design, printed wiring board manufacturing and electronics =
assembly. As a member-driven organization and leading source for industry =
standards, training, market research and public policy advocacy, IPC =
supports programs to meet the needs of a $44 billion U.S. industry =
employing more than 400,000 people.
//30//
NR02056AccDepSupport
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; charset=3Diso-8859-1"=
>
<META content=3D"MSHTML 5.50.4134.600" name=3DGENERATOR></HEAD>
<BODY style=3D"MARGIN-TOP: 2px; FONT: 8pt MS Sans Serif; MARGIN-LEFT: =
2px"><FONT=20
face=3D"Times New Roman" size=3D3>
<DIV><STRONG>Contact Information:</STRONG><BR>Joe Dudeck, IPC Communication=
s=20
Manager<BR>847-790-5371</DIV>
<DIV> </DIV>
<DIV><FONT size=3D4><STRONG>For Immediate Release</STRONG></FONT></DIV>
<DIV> </DIV>
<DIV align=3Dcenter><FONT size=3D5><STRONG><U>IPC AND ITS MEMBERS CLAIM=20
VICTORY</U></STRONG></FONT></DIV>
<DIV> </DIV>
<DIV><STRONG>NORTHBROOK, Ill., March 15, 2002</STRONG>--IPC-Association=20
Connecting Electronics Industries=AE has announced a victory in its =
efforts to=20
pass a realistic depreciation bill for the electronics assembly and =
printed=20
circuit board industries.</DIV>
<DIV><BR>The U.S. Congress and the Bush Administration recently reached =
an=20
agreement to pass an economic stimulus package that includes a significant=
=20
accelerated depreciation provision for the electronic interconnection =
industry=20
and other U.S. manufacturers. This realistic depreciation issue has =
been a=20
cornerstone of IPC's Government Relations policy for more than seven=20
years. The bipartisan effort received support from nearly every=20
congressman and senator IPC contacted to support the bill.</DIV>
<DIV> </DIV>
<DIV>"This is a great victory for IPC, its Board and its dedicated =
members,"=20
said IPC President Denny McGuirk. "I congratulate and thank all =
those=20
individuals, especially those that serve on our Government Relations =
committee,=20
who have given their time and energy to attend past Capitol Hill Day =
events,=20
write letters and host plant tours on this very important issue."</DIV>
<DIV><BR>The "Job Creation and Worker Assistance Act of 2002," which was =
signed=20
into law by President Bush on March 9, contains a 30 percent accelerated=20=
depreciation benefit over the next three years that will spur investment =
in=20
state-of-the-art manufacturing equipment and assist in the recovery of the =
PCB=20
and EMS industry. The applicable time period for equipment covered =
under=20
the new law is property that was acquired after September 10, 2001, and =
before=20
September 11, 2004.</DIV>
<DIV> </DIV>
<DIV>"The passing of this bill is timely for our industry and our =
national=20
economy," added McGuirk. "With IPC Printed Circuits Expo=AE 2002 =
just around=20
the corner, the 30 percent accelerated depreciation benefit will likely =
impact=20
many attendees' purchasing decisions in a positive way."</DIV>
<DIV> </DIV>
<DIV>For more information, contact John Kania, IPC's director of Government=
=20
Relations, at <A href=3D"mailto:[log in to unmask]">[log in to unmask]</A> or=20
202-962-0460.</DIV>
<DIV> </DIV>
<DIV><STRONG><U>About IPC</U></STRONG><BR>IPC is a U.S.-based trade =
association=20
dedicated to the competitive excellence and financial success of its more =
than=20
2,600 member companies which represent all facets of the electronic=20
interconnection industry, including design, printed wiring=20
board manufacturing and electronics assembly. As a member-driven=
=20
organization and leading source for industry standards, training, =
market=20
research and public policy advocacy, IPC supports programs to meet the =
needs of=20
a $44 billion U.S. industry employing more than 400,000 people.<BR></DIV>
<DIV align=3Dcenter>//30//</DIV>
<DIV> </DIV>
<DIV><FONT size=3D1>NR02056AccDepSupport</FONT></DIV></FONT></BODY></HTML>
--=_B9E42A2A.9FFE9FBF--
---------------------------------------------------------------------------------
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Please visit IPC web site http://www.ipc.org/html/forum.htm for additional
information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315
---------------------------------------------------------------------------------
=========================================================================
Date: Wed, 27 Mar 2002 21:57:10 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: IPC News Release--IPC AND ITS MEMBERS CLAIM VICTORY
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_96.2406ad14.29d3e086_boundary"
--part1_96.2406ad14.29d3e086_boundary
Content-Type: text/plain; charset="ISO-8859-1"
Content-Transfer-Encoding: quoted-printable
All I can say is; OUTSTANDING!! Although I must admit, I've not been involve=
d=20
intimately with this issue, just been watching from a far.
I've got a question though, I looked at the bill from links that I searched=20
about the bill, and it seems to me, that any money that you spend that is=20
considered a capital cost (for example, $49,000 for a circuitcam software=20
suite for our pick-n-place stuff) can be rolled into this tax break...am I=20
correct in my assumption?
I'm pretty sure our bean counters aren't aware about this news, but we have=20
spent some money on stuff that we capitalized recently...since 9/11.
Also, one last question, there isn't any differentiation if the money was=20
spent on new equipment, or used, is there?
PLEASE, PLEASE ya'll, don't think that this stuff is what I worry about, I=20
just thought I could pass on some good information to our financial staff=20
that they may not be aware of...I'm not a "Bean Counter"...hehehe.
-Steve Gregory-
> Contact Information:
> Joe Dudeck, IPC Communications Manager
> 847-790-5371
> =20
> For Immediate Release
> =20
> IPC AND ITS MEMBERS CLAIM VICTORY
> =20
> NORTHBROOK, Ill., March 15, 2002--IPC-Association Connecting Electronics=20
> Industries=AE has announced a victory in its efforts to pass a realistic=20
> depreciation bill for the electronics assembly and printed circuit board=20
> industries.
>=20
> The U.S. Congress and the Bush Administration recently reached an agreemen=
t=20
> to pass an economic stimulus package that includes a significant=20
> accelerated depreciation provision for the electronic interconnection=20
> industry and other U.S. manufacturers. This realistic depreciation issue=20
> has been a cornerstone of IPC's Government Relations policy for more than=20
> seven years. The bipartisan effort received support from nearly every=20
> congressman and senator IPC contacted to support the bill.
> =20
> "This is a great victory for IPC, its Board and its dedicated members,"=20
> said IPC President Denny McGuirk. "I congratulate and thank all those=20
> individuals, especially those that serve on our Government Relations=20
> committee, who have given their time and energy to attend past Capitol Hil=
l=20
> Day events, write letters and host plant tours on this very important=20
> issue."
>=20
> The "Job Creation and Worker Assistance Act of 2002," which was signed int=
o=20
> law by President Bush on March 9, contains a 30 percent accelerated=20
> depreciation benefit over the next three years that will spur investment i=
n=20
> state-of-the-art manufacturing equipment and assist in the recovery of the=
=20
> PCB and EMS industry. The applicable time period for equipment covered=20
> under the new law is property that was acquired after September 10, 2001,=20
> and before September 11, 2004.
> =20
> "The passing of this bill is timely for our industry and our national=20
> economy," added McGuirk. "With IPC Printed Circuits Expo=AE 2002 just aro=
und=20
> the corner, the 30 percent accelerated depreciation benefit will likely=20
> impact many attendees' purchasing decisions in a positive way."
> =20
> For more information, contact John Kania, IPC's director of Government=20
> Relations, at <A HREF=3D"mailto:[log in to unmask]">[log in to unmask]</A> or 202-=
962-0460.
> =20
> About IPC
> IPC is a U.S.-based trade association dedicated to the competitive=20
> excellence and financial success of its more than 2,600 member companies=20
> which represent all facets of the electronic interconnection industry,=20
> including design, printed wiring board manufacturing and electronics=20
> assembly. As a member-driven organization and leading source for industry=
=20
> standards, training, market research and public policy advocacy, IPC=20
> supports programs to meet the needs of a $44 billion U.S. industry=20
> employing more than 400,000 people.
>=20
> //30//
> =20
> NR02056AccDepSupport
>=20
--part1_96.2406ad14.29d3e086_boundary
Content-Type: text/html; charset="ISO-8859-1"
Content-Transfer-Encoding: quoted-printable
<HTML><FONT FACE=3Darial,helvetica><FONT SIZE=3D2 FAMILY=3D"SANSSERIF" FACE=
=3D"Arial" LANG=3D"0">All I can say is; OUTSTANDING!! Although I must admit,=
I've not been involved intimately with this issue, just been watching from=20=
a far.<BR>
<BR>
I've got a question though, I looked at the bill from links that I searched=20=
about the bill, and it seems to me, that any money that you spend that is co=
nsidered a capital cost (for example, $49,000 for a circuitcam software suit=
e for our pick-n-place stuff) can be rolled into this tax break...am I corre=
ct in my assumption?<BR>
<BR>
I'm pretty sure our bean counters aren't aware about this news, but we have=20=
spent some money on stuff that we capitalized recently...since 9/11.<BR>
<BR>
Also, one last question, there isn't any differentiation if the money was sp=
ent on new equipment, or used, is there?<BR>
<BR>
PLEASE, PLEASE ya'll, don't think that this stuff is what I worry about, I j=
ust thought I could pass on some good information to our financial staff tha=
t they may not be aware of...I'm not a "Bean Counter"...hehehe.<BR>
<BR>
-Steve Gregory-<BR>
<BR>
</FONT><FONT COLOR=3D"#000000" style=3D"BACKGROUND-COLOR: #ffffff" SIZE=3D3=
FAMILY=3D"SERIF" FACE=3D"Times New Roman" LANG=3D"0"><BLOCKQUOTE TYPE=3DCIT=
E style=3D"BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0=
px; PADDING-LEFT: 5px"><B>Contact Information:</B><BR>
Joe Dudeck, IPC Communications Manager<BR>
847-790-5371<BR>
<BR>
</FONT><FONT COLOR=3D"#000000" style=3D"BACKGROUND-COLOR: #ffffff" SIZE=3D4=
FAMILY=3D"SERIF" FACE=3D"Times New Roman" LANG=3D"0"><B>For Immediate Relea=
se</FONT><FONT COLOR=3D"#000000" style=3D"BACKGROUND-COLOR: #ffffff" SIZE=
=3D3 FAMILY=3D"SERIF" FACE=3D"Times New Roman" LANG=3D"0"></B><BR>
<BR>
</FONT><FONT COLOR=3D"#000000" style=3D"BACKGROUND-COLOR: #ffffff" SIZE=3D5=
FAMILY=3D"SERIF" FACE=3D"Times New Roman" LANG=3D"0"><B><U>IPC AND ITS MEMB=
ERS CLAIM VICTORY</FONT><FONT COLOR=3D"#000000" style=3D"BACKGROUND-COLOR:=20=
#ffffff" SIZE=3D3 FAMILY=3D"SERIF" FACE=3D"Times New Roman" LANG=3D"0"></B><=
/U><BR>
<BR>
<B>NORTHBROOK, Ill., March 15, 2002</B>--IPC-Association Connecting Electron=
ics Industries=AE has announced a victory in its efforts to pass a realistic=
depreciation bill for the electronics assembly and printed circuit board in=
dustries.<BR>
<BR>
The U.S. Congress and the Bush Administration recently reached an agreement=20=
to pass an economic stimulus package that includes a significant accelerated=
depreciation provision for the electronic interconnection industry and othe=
r U.S. manufacturers. This realistic depreciation issue has been a cor=
nerstone of IPC's Government Relations policy for more than seven years.&nbs=
p; The bipartisan effort received support from nearly every congressman and=20=
senator IPC contacted to support the bill.<BR>
<BR>
"This is a great victory for IPC, its Board and its dedicated members," said=
IPC President Denny McGuirk. "I congratulate and thank all those indi=
viduals, especially those that serve on our Government Relations committee,=20=
who have given their time and energy to attend past Capitol Hill Day events,=
write letters and host plant tours on this very important issue."<BR>
<BR>
The "Job Creation and Worker Assistance Act of 2002," which was signed into=20=
law by President Bush on March 9, contains a 30 percent accelerated deprecia=
tion benefit over the next three years that will spur investment in state-of=
-the-art manufacturing equipment and assist in the recovery of the PCB and E=
MS industry. The applicable time period for equipment covered under th=
e new law is property that was acquired after September 10, 2001, and before=
September 11, 2004.<BR>
<BR>
"The passing of this bill is timely for our industry and our national econom=
y," added McGuirk. "With IPC Printed Circuits Expo=AE 2002 just around=
the corner, the 30 percent accelerated depreciation benefit will likely imp=
act many attendees' purchasing decisions in a positive way."<BR>
<BR>
For more information, contact John Kania, IPC's director of Government Relat=
ions, at <A HREF=3D"mailto:[log in to unmask]">[log in to unmask]</A> or 202-962-046=
0.<BR>
<BR>
<B><U>About IPC</B></U><BR>
IPC is a U.S.-based trade association dedicated to the competitive excellenc=
e and financial success of its more than 2,600 member companies which repres=
ent all facets of the electronic interconnection industry, including design,=
printed wiring board manufacturing and electronics assembly. As a mem=
ber-driven organization and leading source for industry standards, training,=
market research and public policy advocacy, IPC supports programs to meet t=
he needs of a $44 billion U.S. industry employing more than 400,000 people.<=
BR>
<BR>
//30//<BR>
<BR>
</FONT><FONT COLOR=3D"#000000" style=3D"BACKGROUND-COLOR: #ffffff" SIZE=3D1=
FAMILY=3D"SERIF" FACE=3D"Times New Roman" LANG=3D"0">NR02056AccDepSupport</=
FONT><FONT COLOR=3D"#000000" style=3D"BACKGROUND-COLOR: #ffffff" SIZE=3D3 F=
AMILY=3D"SERIF" FACE=3D"Times New Roman" LANG=3D"0"><BR>
</BLOCKQUOTE><BR>
</FONT><FONT COLOR=3D"#000000" style=3D"BACKGROUND-COLOR: #ffffff" SIZE=3D2=
FAMILY=3D"SANSSERIF" FACE=3D"Arial" LANG=3D"0"><BR>
</FONT></HTML>
--part1_96.2406ad14.29d3e086_boundary--
---------------------------------------------------------------------------------
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To unsubscribe, send a message to [log in to unmask] with following text in
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To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest
Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives
Please visit IPC web site http://www.ipc.org/html/forum.htm for additional
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---------------------------------------------------------------------------------
=========================================================================
Date: Thu, 28 Mar 2002 11:29:20 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
kevinyeah <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: kevinyeah <[log in to unmask]>
Subject: Re: Blistering in PCBs
X-To: "[log in to unmask]" <[log in to unmask]>
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PSA9DQoJCQkNCg0KICAgICAgICAgICAgICAgICAgICDWwg0KwPGjoQ0KCQkJCSANCiAgICAgICAg
ICAgICAgIGtldmlueWVhaA0KICAgICAgICAgICAgICAga2V2aW55ZWFoQHNvaHUuY29tDQoJCQkJ
CTIwMDItMDMtMjggDQo=
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Date: Thu, 28 Mar 2002 14:06:59 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
fullname <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: fullname <[log in to unmask]>
Organization: DSO National Laboratories
Subject: MIL-C-28809 Replacement/supersede
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Understand that MIL-C-28809 has been cancelled. However, there are two
tables indicates in this mil-spec on the max. number allowed permitted
for plated-thorugh hole repair and circuit repair. Can someone point to
me where else can I find similar tables for repair under IPC standards?
Thank you very much in advance - Wee Mei.
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Date: Thu, 28 Mar 2002 09:33:29 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"d. terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: Re: Double Sided Reflow Flux and surface tension
MIME-Version: 1.0 (Generated by NET-TEL Mailguard SMTP version 4.0.0.22)
Content-Type: text/plain; charset=US-ASCII
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Hi Edward,
An answer to your question about using adhesives: yes, when there are =
heavy components going through "inverted reflow" we apply a few gluedots =
to the corners of these parts. We use the same Hereaus glue that we use =
for wave soldering of smd's, it is applied after soldering and cleaning of =
the first side.=20
Instead of using an additional curing step we let the adhesive harden in =
the preheat-zones of the reflow oven, so that it is cured before the =
solder melts.
It works, but I still see it as a makeshift for badly designed boards, and =
it should not be standard practice.
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
>>> "Edward S. Wheeler" <[log in to unmask]> 03/26 9:14 pm >>>
Hello Tech-Net users! I am new to the group here, and would like your
assistance on a couple of matters concerning a double sided reflow process
we are undertaking. We are new to this process, so we would appreciate any
expertise on the matter.
We are using an OA type solder paste, and like to wash our boards within 2
hours, 4 being the maximum in house limit. To perform our double sided
reflow process in mass production, we may want to run all day on one side
and do the other side the next. My question is... does any of the residual
flux material aid the second reflow process, or can we wash it off before
the second reflow and get as good of results? I am concerned that the
solder joint may have an outer layer of oxidation or graininess due to the
lack of flux once it reflows again. Is there any flux left over that is
active, or is it simply the remainder of the carrier?
What luck are people having with BGAs populated on the bottom side? Is
there more of a concern with warp on the second pass?
Is there a rule of thumb for the pad surface area / part weight ratio to
maintain enough surface tension to correctly hold the part?
Does anybody use adhesives to stake heavy parts on the first pass?
Does anybody have a solid rule of thumb for pin-in-paste apertures? On our
first try we used an 8 mil step up and had the aperture the same size as
outer edge of the PTH. Would an oversize print work better?
Thanks in advance for any help.
Ed
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Date: Thu, 28 Mar 2002 06:05:33 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Blistering in PCBs
X-To: [log in to unmask]
I completely agree with the following:
IHRlbXBvcmFyaWx5IGhhbHQgZGVsaXZlcnkgb2YgVGVjaG5ldCBzZW5kIGUtbWFpbCB0byBMaXN0
c2VydkBpcGMub3JnOiBTRVQgVGVjaG5ldCBOT01BSUwNCj5UbyByZWNlaXZlIE9ORSBtYWlsaW5n
IHBlciBkYXkgb2YgYWxsIHRoZSBwb3N0czogc2VuZCBlLW1haWwgdG8gTGlzdHNlcnZAaXBjLm9y
ZzogU0VUIFRlY2huZXQgRGlnZXN0DQo+U2VhcmNo
However, Vinit sent me some really ugly photos showing the condition. Out of
respect for his privacy and sorrow, I won't even attempt posting them unless
he wishes. Never seen anything so ugly.
MoonMan
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Date: Thu, 28 Mar 2002 07:47:20 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Sauer, Steven T." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Sauer, Steven T." <[log in to unmask]>
Subject: Re: MIL-C-28809 Replacement/supersede
X-To: fullname <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hello Wee Mei,
To my knowledge, the information that you are looking for does not exist in
a replacement military specification nor other industry association
documents.
On one hand, the information contained in MIL-C-28809 was considered
requirements for "standard" repair/modification. Repair and modifications
that did not fall within these requirements, "non-standard", were turned
over to a Material Review Board (MRB) and dependent on contractual
requirements may have included customer review and approval/disapproval.
With today's technology and the ever changing end use environments,
"standard" repairs should be reviewed by a MRB for issues related to
quality, performance, reliability and maintainability of the deliverable
product. The guidance information contained in MIL-C-28809 can be used to
develop criteria for use by a MRB or better yet, used to develop an in-house
procedure for standard repairs that defines specifics for your products.
IPC-7721 (supercedes IPC-R-700) is widely accepted and used for repair and
modification of electronic assemblies, but it does not contain "maximum
allowable" criteria.
Steve Sauer
-----Original Message-----
From: fullname [mailto:[log in to unmask]]
Understand that MIL-C-28809 has been cancelled. However, there are two
tables indicates in this mil-spec on the max. number allowed permitted
for plated-thorugh hole repair and circuit repair. Can someone point to
me where else can I find similar tables for repair under IPC standards?
---------------------------------------------------------------------------------
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Date: Thu, 28 Mar 2002 08:44:36 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Tempea, Ioan" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Tempea, Ioan" <[log in to unmask]>
Subject: MSD tracking
MIME-Version: 1.0
Content-Type: text/plain
Hi Technos,
for me it's payback time. We always ask our customers to supply the Moisture
Sensitive Devices in controlled conditions, you know, sealed bags,
desiccant, humidity indicators. In turn, they started asking us how do we
control the MSDs on the floor.
Right now, we do tracking sheets, a system very close to the one the Moonman
presents in his procedure.
I badly need your input on the following:
- what is the trend in the industry, more companies using the manual system,
like we do, with tracking sheets, or more companies using high-tech systems
like Cogiscan?
- does anybody use the MRP system to log tracking data?
Thanks,
Ioan
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Date: Thu, 28 Mar 2002 07:50:14 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: IPC News Release--IPC AND ITS MEMBERS CLAIM VICTORY
Mime-Version: 1.0
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This is a MIME message. If you are reading this text, you may want to
consider changing to a mail reader or gateway that understands how to
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--=_4F12DDA7.E786EB29
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I agree with Steve I have already forwarded it to the bean counters. =
Which now I can look into another experiment I have always wanted to =
watch, How fast can a bean counter move when saving is at stake.....HEHEHEH=
EHEHE
Kathy=20
--=_4F12DDA7.E786EB29
Content-Type: text/plain
Content-Disposition: attachment; filename="TEXT.htm"
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<META http-equiv=Content-Type content="text/html; charset=iso-8859-1">
<META content="MSHTML 6.00.2713.1100" name=GENERATOR></HEAD>
<BODY style="MARGIN-TOP: 2px; FONT: 10pt MS Sans Serif; MARGIN-LEFT: 2px">
<DIV>I agree with Steve I have already forwarded it to the bean counters.
Which now I can look into another experiment I have always wanted to watch, How
fast can a bean counter move when saving is at stake.....HEHEHEHEHEHE</DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
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Date: Thu, 28 Mar 2002 09:32:11 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Francois Monette <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Francois Monette <[log in to unmask]>
Subject: Double Sided Reflow Flux and surface tension
X-cc: [log in to unmask]
MIME-version: 1.0
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Ed,
One very important consideration for double-side reflow that many people
overlook is the additional control required for moisture sensitive
components.
As you are probably aware, most PBGAs are classified as moisture sensitive
and as such they have a limited floor life prior to reflow. When you run a
double-side reflow process, it is important to understand that the floor
life clock is not reset by the first reflow. In other words, the components
that are assembled on the first side will continue to absorb moisture after
being assembled and before the second reflow. This means that you need some
method to keep track of the remaining floor life of components on partially
assembled board between the first and second reflow.
Ref : J-STD-033, Section 8.4.4. "If more than one reflow pass is used, care
must be taken to ensure that no moisture sensitive components, mounted or
unmounted, have exceeded their floor life prior to the final pass."
Let me know if you need more information on this subject.
Francois Monette
Cogiscan Inc.
Tel : 450-534-2644
Fax : 450-534-0092
E-mail : [log in to unmask]
www.cogiscan.com
"Edward S. Wheeler" <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
03/26/02 01:14 PM
Please respond to "TechNet E-Mail Forum."; Please respond to "Edward S.
Wheeler"
To: [log in to unmask]
cc:
Subject: [TN] Double Sided Reflow Flux and surface tension
Hello Tech-Net users! I am new to the group here, and would like your
assistance on a couple of matters concerning a double sided reflow process
we are undertaking. We are new to this process, so we would appreciate any
expertise on the matter.
We are using an OA type solder paste, and like to wash our boards within 2
hours, 4 being the maximum in house limit. To perform our double sided
reflow process in mass production, we may want to run all day on one side
and do the other side the next. My question is... does any of the residual
flux material aid the second reflow process, or can we wash it off before
the second reflow and get as good of results? I am concerned that the
solder joint may have an outer layer of oxidation or graininess due to the
lack of flux once it reflows again. Is there any flux left over that is
active, or is it simply the remainder of the carrier?
What luck are people having with BGAs populated on the bottom side? Is
there more of a concern with warp on the second pass?
Is there a rule of thumb for the pad surface area / part weight ratio to
maintain enough surface tension to correctly hold the part?
Does anybody use adhesives to stake heavy parts on the first pass?
Does anybody have a solid rule of thumb for pin-in-paste apertures? On our
first try we used an 8 mil step up and had the aperture the same size as
outer edge of the PTH. Would an oversize print work better?
Thanks in advance for any help.
Ed
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=========================================================================
Date: Thu, 28 Mar 2002 09:54:37 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: MSD tracking
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_4b.1ab75487.29d488ad_boundary"
--part1_4b.1ab75487.29d488ad_boundary
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Ioan -
The sad fact of the matter is that most companies do not track MSD at all.
The industry is slowly becoming aware of the issue and proper procedures.
Soon MSD will have the "stature" of concern in the industry that ESD has.
When we do Process Audits, MSD "awareness" and tracking is a key category.
Of the companies that do track, the majority seem to be using a traveller
system. However, these are prone to "human" error (just as inspection
logging in AQl methodology). In my opinion, the Cogiscan system is the way
to go. It is relatively new, though, so there are limited installations.
But where they have gone in, it makes MSD tracking as "idiot proof" as
possible.
Bear in mind that MSD tracking becomes even more difficult with double-sided
assemblies (if MSDs are on the first side). I am aware of a at least one
Cogiscan installation at an automobile electronics manufacturer in which
their method of electronic tracking saved the day.
In terms of ROI, the Cogiscan system is very economical. I suggest you look
into it.
My colleagues and I at ITM are advocates of MSD awareness. We are currently
looking into whether the IC manufacturers have any idea how many of their
components were returned as "bad" when, in fact, they were done in by
improper MSD handling.
Think dry!
Phil Zarrow
ITM Consulting
Durham, NH USA
www.ITM-SMT.com
T: (603) 868-1754
F: (603) 868-3623
EM:[log in to unmask]
--part1_4b.1ab75487.29d488ad_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">Ioan - <BR>
The sad fact of the matter is that most companies do not track MSD at all. The industry is slowly becoming aware of the issue and proper procedures. Soon MSD will have the "stature" of concern in the industry that ESD has. <BR>
When we do Process Audits, MSD "awareness" and tracking is a key category. Of the companies that do track, the majority seem to be using a traveller system. However, these are prone to "human" error (just as inspection logging in AQl methodology). In my opinion, the Cogiscan system is the way to go. It is relatively new, though, so there are limited installations. But where they have gone in, it makes MSD tracking as "idiot proof" as possible.<BR>
Bear in mind that MSD tracking becomes even more difficult with double-sided assemblies (if MSDs are on the first side). I am aware of a at least one Cogiscan installation at an automobile electronics manufacturer in which their method of electronic tracking saved the day. <BR>
In terms of ROI, the Cogiscan system is very economical. I suggest you look into it.<BR>
My colleagues and I at ITM are advocates of MSD awareness. We are currently looking into whether the IC manufacturers have any idea how many of their components were returned as "bad" when, in fact, they were done in by improper MSD handling.<BR>
<BR>
Think dry!<BR>
<BR>
Phil Zarrow<BR>
<BR>
<B>ITM Consulting <BR>
Durham, NH USA<BR>
www.ITM-SMT.com<BR>
T: (603) 868-1754<BR>
F: (603) 868-3623<BR>
EM:[log in to unmask]</B></FONT></HTML>
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=========================================================================
Date: Thu, 28 Mar 2002 09:29:42 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Carlile <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Carlile <[log in to unmask]>
Subject: Heatsink wanted
I am currently looking for 2 heatsinks:
(1) Approximately 3/4" x 3/4" that is an adhesive tape mount
(2) Approximately 1.575" x 1.575" (40mm x 40mm)that is an adhesive mount
type with a fan attached
Since these are for BGAs, a clip mounting is not acceptable.
Does anybody know where I can find these? I am trying to avoid mom & pop
type shops. Surely a major manufacturer has to make this and distributors
stock it.
Can anybody point me in the right direction???
Thanks!
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Date: Thu, 28 Mar 2002 10:32:12 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Howard Watson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Howard Watson <[log in to unmask]>
Subject: Re: IPC News Release--IPC AND ITS MEMBERS CLAIM VICTORY
X-To: Kathy Kuhlow <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/mixed; boundary="=_mixed 00551DC887256B8A_="
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I also forwarded this to our financial folks, because frankly I don't know
what its impact is to my company. I am making a $147k capital purchase
now, so what is the bottom line benefit to my company? Any ideas?
Howard Watson
Manufacturing Engineer
AMETEK/Dixson
Kathy Kuhlow <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
03/28/02 06:50 AM
Please respond to "TechNet E-Mail Forum."; Please respond to Kathy Kuhlow
To: [log in to unmask]
cc:
Subject: Re: [TN] IPC News Release--IPC AND ITS MEMBERS CLAIM VICTORY
I agree with Steve I have already forwarded it to the bean counters. Which
now I can look into another experiment I have always wanted to watch, How
fast can a bean counter move when saving is at stake.....HEHEHEHEHEHE
Kathy
--=_alternative 00551DC887256B8A_=
Content-Type: text/html; charset="us-ascii"
<br><font size=2 face="sans-serif">I also forwarded this to our financial folks, because frankly I don't know what its impact is to my company. I am making a $147k capital purchase now, so what is the bottom line benefit to my company? Any ideas?</font>
<br>
<br><font size=2 face="sans-serif">Howard Watson<br>
Manufacturing Engineer<br>
AMETEK/Dixson</font>
<br>
<br>
<br>
<table width=100%>
<tr valign=top>
<td>
<td><font size=1 face="sans-serif"><b>Kathy Kuhlow <[log in to unmask]></b></font>
<br><font size=1 face="sans-serif">Sent by: TechNet <[log in to unmask]></font>
<p><font size=1 face="sans-serif">03/28/02 06:50 AM</font>
<br><font size=1 face="sans-serif">Please respond to "TechNet E-Mail Forum."; Please respond to Kathy Kuhlow</font>
<br>
<td><font size=1 face="Arial"> </font>
<br><font size=1 face="sans-serif"> To: [log in to unmask]</font>
<br><font size=1 face="sans-serif"> cc: </font>
<br><font size=1 face="sans-serif"> Subject: Re: [TN] IPC News Release--IPC AND ITS MEMBERS CLAIM VICTORY</font></table>
<br>
<br>
<br><font size=2 face="Courier New">I agree with Steve I have already forwarded it to the bean counters. Which now I can look into another experiment I have always wanted to watch, How fast can a bean counter move when saving is at stake.....HEHEHEHEHEHE<br>
<br>
Kathy <br>
</font>
<br>
<br>
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Content-Type: text/html; name="TEXT.htm"
Content-Disposition: attachment; filename="TEXT.htm"
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<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; charset=3Diso-8859-1">
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<BODY style=3D"MARGIN-TOP: 2px; FONT: 10pt MS Sans Serif; MARGIN-LEFT: 2px">
<DIV>I agree with Steve I have already forwarded it to the bean counters.&n=
bsp;
Which now I can look into another experiment I have always wanted to watch,=
How
fast can a bean counter move when saving is at stake.....HEHEHEHEHEHE</DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
--=_mixed 00551DC887256B8A_=--
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Date: Thu, 28 Mar 2002 09:59:48 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Adrian Hanks." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Adrian Hanks." <[log in to unmask]>
Subject: BGA Double Drop
Hi Technetters,
Can anyone help me?
We are curently running some BGA'S through reflow, and on inspecting them
through our Ersascope BGA inspection system have measured there is a ball
drop of around 30% from original ball size. The actual ball formation looks
very "border line" as in, has it single or double dropped. Does anyone know
the guidlines for such a drop? Is 30% the bottom end tolerance and if so
should I be looking at a drop of + 30% to insure a good looking sound joint
on the BGA.
Many thanks in advance,
Adrian Hanks.
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Date: Thu, 28 Mar 2002 11:25:03 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Edward S. Wheeler" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Edward S. Wheeler" <[log in to unmask]>
Subject: Re: BGA Double Drop
X-To: "Adrian Hanks." <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; format=flowed
Adrian, I have a few questions, then if they are consistent with what we
have seen, we can discuss this further. Is the "drop" from the original
size due to the fact the chip is warped and pulled the ball up into a
column? Are they located in the corners and edges mostly? Is this a plastic
BGA? Are you inspecting for solder paste in the BGA areas? Are you losing
solder down your vias by way of a short trace?
Ed
At 09:59 AM 3/28/2002 -0600, you wrote:
>Hi Technetters,
>
>Can anyone help me?
>
>We are curently running some BGA'S through reflow, and on inspecting them
>through our Ersascope BGA inspection system have measured there is a ball
>drop of around 30% from original ball size. The actual ball formation looks
>very "border line" as in, has it single or double dropped. Does anyone know
>the guidlines for such a drop? Is 30% the bottom end tolerance and if so
>should I be looking at a drop of + 30% to insure a good looking sound joint
>on the BGA.
>
>Many thanks in advance,
>
>Adrian Hanks.
>
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>
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Date: Thu, 28 Mar 2002 11:41:42 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Tempea, Ioan" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Tempea, Ioan" <[log in to unmask]>
Subject: Re: MSD tracking
MIME-Version: 1.0
Content-Type: text/plain
Thanks Phil,
although I don't really agree with dry thinking right now, when Easter has
to be celebrated.
Ioan
> -----Original Message-----
> From: [log in to unmask] [SMTP:[log in to unmask]]
> Sent: Thursday, March 28, 2002 9:55 AM
> To: [log in to unmask]
> Subject: Re: [TN] MSD tracking
>
> Ioan -
> The sad fact of the matter is that most companies do not track MSD at all.
> The industry is slowly becoming aware of the issue and proper procedures.
> Soon MSD will have the "stature" of concern in the industry that ESD has.
>
> When we do Process Audits, MSD "awareness" and tracking is a key category.
> Of the companies that do track, the majority seem to be using a traveller
> system. However, these are prone to "human" error (just as inspection
> logging in AQl methodology). In my opinion, the Cogiscan system is the
> way to go. It is relatively new, though, so there are limited
> installations. But where they have gone in, it makes MSD tracking as
> "idiot proof" as possible.
> Bear in mind that MSD tracking becomes even more difficult with
> double-sided assemblies (if MSDs are on the first side). I am aware of a
> at least one Cogiscan installation at an automobile electronics
> manufacturer in which their method of electronic tracking saved the day.
>
> In terms of ROI, the Cogiscan system is very economical. I suggest you
> look into it.
> My colleagues and I at ITM are advocates of MSD awareness. We are
> currently looking into whether the IC manufacturers have any idea how many
> of their components were returned as "bad" when, in fact, they were done
> in by improper MSD handling.
>
> Think dry!
>
> Phil Zarrow
>
> ITM Consulting
> Durham, NH USA
> www.ITM-SMT.com
> T: (603) 868-1754
> F: (603) 868-3623
> EM:[log in to unmask]
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Date: Thu, 28 Mar 2002 11:42:40 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: BGA Double Drop
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_95.19f590d1.29d4a200_boundary"
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Hi Adrian!
Is this part a Texas Instrument part that has a big metal heat slug in the
top? I've seen this happen with that part because of the weight of the heat
slug...the balls
look kinda "squished" too...
-Steve Gregory-
> Hi Technetters,
>
> Can anyone help me?
>
> We are curently running some BGA'S through reflow, and on inspecting them
> through our Ersascope BGA inspection system have measured there is a ball
> drop of around 30% from original ball size. The actual ball formation looks
> very "border line" as in, has it single or double dropped. Does anyone know
> the guidlines for such a drop? Is 30% the bottom end tolerance and if so
> should I be looking at a drop of + 30% to insure a good looking sound joint
> on the BGA.
>
> Many thanks in advance,
>
> Adrian Hanks.
>
--part1_95.19f590d1.29d4a200_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Adrian!
<BR>
<BR>Is this part a Texas Instrument part that has a big metal heat slug in the top? I've seen this happen with that part because of the weight of the heat slug...the balls
<BR>look kinda "squished" too...
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Hi Technetters,
<BR>
<BR>Can anyone help me?
<BR>
<BR>We are curently running some BGA'S through reflow, and on inspecting them
<BR>through our Ersascope BGA inspection system have measured there is a ball
<BR>drop of around 30% from original ball size. The actual ball formation looks
<BR>very "border line" as in, has it single or double dropped. Does anyone know
<BR>the guidlines for such a drop? Is 30% the bottom end tolerance and if so
<BR>should I be looking at a drop of + 30% to insure a good looking sound joint
<BR>on the BGA.
<BR>
<BR>Many thanks in advance,
<BR>
<BR>Adrian Hanks.
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
--part1_95.19f590d1.29d4a200_boundary--
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Date: Thu, 28 Mar 2002 09:00:21 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: standard package dimensions
MIME-version: 1.0
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--Boundary_(ID_U/esmW0BpRhdtJ7Nwt57Uw)
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Content-transfer-encoding: 7BIT
Does anyone know of a web site that gives standard dimensions for QFP, PLCC, etc.?
We have a couple of new products coming out and I need to find shipping tubes, hopefully off the shelf.
The parts are .175" X .175" X .066", .190" X .220" X .065, and .276" X .378" X .092.
Thanks,
Dan
--Boundary_(ID_U/esmW0BpRhdtJ7Nwt57Uw)
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<BODY bgColor=#ffffff>
<DIV><FONT face=Arial size=2>Does anyone know of a web site that gives standard
dimensions for QFP, PLCC, etc.?</FONT></DIV>
<DIV><FONT face=Arial size=2>We have a couple of new products coming out and I
need to find shipping tubes, hopefully off the shelf.</FONT></DIV>
<DIV><FONT face=Arial size=2>The parts are .175" X .175" X .066", .190" X .220"
X .065, and .276" X .378" X .092.</FONT></DIV>
<DIV><FONT face=Arial size=2>Thanks,</FONT></DIV>
<DIV><FONT face=Arial size=2>Dan</FONT></DIV></BODY></HTML>
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Date: Thu, 28 Mar 2002 12:02:23 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: IPC News Release--IPC AND ITS MEMBERS CLAIM VICTORY
MIME-Version: 1.0
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Hi Howard!
I found a link that has the whole bill in a *.PDF file. Go to:
http://thomas.loc.gov/cgi-bin/bdquery/z?d107:H.R.3090:
Then click on the PDF link...
I think I found the answer to my question about software, I think you can
depreciate that too...I just need to read section 167(f)(1)(B) to see if
CircuitCam falls under that description...
-Steve Gregory-
> I also forwarded this to our financial folks, because frankly I don't know
> what its impact is to my company. I am making a $147k capital purchase
> now, so what is the bottom line benefit to my company? Any ideas?
>
> Howard Watson
> Manufacturing Engineer
> AMETEK/Dixson
>
--part1_49.1ad0e868.29d4a69f_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Howard!
<BR>
<BR>I found a link that has the whole bill in a *.PDF file. Go to:
<BR>
<BR>http://thomas.loc.gov/cgi-bin/bdquery/z?d107:H.R.3090:
<BR>
<BR>Then click on the </FONT><FONT COLOR="#0000ff" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><U>PDF</FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></U> link...
<BR>
<BR>I think I found the answer to my question about software, I think you can depreciate that too...I just need to read section 167(f)(1)(B) to see if CircuitCam falls under that description...
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">I also forwarded this to our financial folks, because frankly I don't know what its impact is to my company. I am making a $147k capital purchase now, so what is the bottom line benefit to my company? Any ideas?
<BR>
<BR>Howard Watson
<BR>Manufacturing Engineer
<BR>AMETEK/Dixson
<BR></BLOCKQUOTE>
<BR>
<BR></FONT></HTML>
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Date: Thu, 28 Mar 2002 10:58:47 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Heatsink wanted
X-To: Ken Carlile <[log in to unmask]>
Carlile, you aninmal, the following are but a few I use daily. Knowing you,
I'm sure you'll look at the second one first. I did.
http://www.accelindustrial.com/single2.html
http://www.usa-assmann.com/
http://www.serteksales.com/page7.html
http://www.surplusales.com/Heatsinks/HeatSink-1.html
http://www.chtechnology.com/customfr.htm
http://www.jdf.dk/menukole.htm
http:[log in to unmask]
http://www.micforg.co.jp/
http://www.qats.com/html/products.html
http://www.darrahelectric.com/
http://www.melcor.com/
http://www.wakefield.com/
http://www.thermalloy.com/
http://www.heatsink.com/bhs.html
Wakefield and Thermalloy are most famous.
MoonMan
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Date: Thu, 28 Mar 2002 11:08:10 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Conformal coating: high humidity environment.
What is the name of the book that you referenced? Is it CLEANING AND
CONTAMINATION OF ELECTRONICS COMPONENTS AND ASSEMBLIES ?
Thanks,
Jason
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Date: Thu, 28 Mar 2002 09:32:41 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Debbie Goodwin <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Debbie Goodwin <[log in to unmask]>
Subject: Re: standard package dimensions
X-To: "Dan R. Johnson" <[log in to unmask]>
MIME-Version: 1.0
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------_=_NextPart_001_01C1D67E.903A0770
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Hi Dan,
Our catalog of "Dummy" components contains most of this information as does
our website www.practicalcomponents.com <http://www.practicalcomponents.com>
Please contact me off line if you would like a hardcopy catalog sent to you.
We may also be able to help you with empty tubes/trays.
Sincerely,
Debbie Goodwin
Account Representative
10867 Portal Dr
Los Alamitos, CA 90720
Phone = (714) 252-0010
Fax = (714) 252-0026
PLEASE NOTE - Effective Immediately New e-mail address is:
[log in to unmask]
__________________________________________________
This message is intended for the use of the individual entity to which it is
addressed and may contain information that is privileged, confidential and
exempt from disclosure under applicable law. If the reader of this message
is not the intended recipient, or the employee or agent responsible for
delivering the message to the intended recipient, you are hereby notified
that any dissemination, distribution or copying of this communication is
strictly prohibited. If you have received this communication in error,
please notify us immediately by calling
714.252.0010 or returning the original message to us. Thank You.
-----Original Message-----
From: Dan R. Johnson [mailto:[log in to unmask]]
Sent: Thursday, March 28, 2002 9:00 AM
To: [log in to unmask]
Subject: [TN] standard package dimensions
Does anyone know of a web site that gives standard dimensions for QFP, PLCC,
etc.?
We have a couple of new products coming out and I need to find shipping
tubes, hopefully off the shelf.
The parts are .175" X .175" X .066", .190" X .220" X .065, and .276" X .378"
X .092.
Thanks,
Dan
------_=_NextPart_001_01C1D67E.903A0770
Content-Type: text/html;
charset="iso-8859-1"
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<DIV><FONT face=Arial size=2><SPAN class=260234517-28032002>Hi
Dan,</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=260234517-28032002></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN class=260234517-28032002>Our catalog of
"Dummy" components contains most of this information as does our website <FONT
color=#000000><A
href="http://www.practicalcomponents.com">www.practicalcomponents.com</A></FONT></SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=260234517-28032002></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN class=260234517-28032002>Please contact me
off line if you would like a hardcopy catalog sent to you.</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=260234517-28032002></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN class=260234517-28032002>We may also be able
to help you with empty tubes/trays.</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=260234517-28032002></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN
class=260234517-28032002>Sincerely,</SPAN></FONT></DIV>
<P><FONT face=Arial size=2>Debbie Goodwin</FONT> <BR><FONT face=Arial
size=2>Account Representative</FONT> <BR><FONT face=Arial size=2>10867 Portal
Dr</FONT> <BR><FONT face=Arial size=2>Los Alamitos, CA 90720</FONT> <BR><FONT
face=Arial size=2>Phone = (714) 252-0010 </FONT><BR><FONT face=Arial size=2>Fax
= (714) 252-0026</FONT> <BR><FONT face=Arial size=2>PLEASE NOTE - Effective
Immediately New e-mail address is: [log in to unmask]</FONT>
<BR><FONT face=Arial
size=2>__________________________________________________</FONT> <BR><FONT
face=Arial size=1>This message is intended for the use of the individual entity
to which it is addressed and may contain information that is privileged,
confidential and exempt from disclosure under applicable law. If the
reader of this message is not the intended recipient, or the employee or agent
responsible for delivering the message to the intended recipient, you are hereby
notified that any dissemination, distribution or copying of this communication
is strictly prohibited. If you have received this communication in error,
please notify us immediately by calling </FONT></P>
<P><FONT face=Arial size=1>714.252.0010 or returning the original message to
us. Thank You.</FONT> </P>
<BLOCKQUOTE style="MARGIN-RIGHT: 0px">
<DIV align=left class=OutlookMessageHeader dir=ltr><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Dan R. Johnson
[mailto:[log in to unmask]]<BR><B>Sent:</B> Thursday, March 28, 2002 9:00
AM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] standard package
dimensions<BR><BR></DIV></FONT>
<DIV><FONT face=Arial size=2>Does anyone know of a web site that gives
standard dimensions for QFP, PLCC, etc.?</FONT></DIV>
<DIV><FONT face=Arial size=2>We have a couple of new products coming out and I
need to find shipping tubes, hopefully off the shelf.</FONT></DIV>
<DIV><FONT face=Arial size=2>The parts are .175" X .175" X .066", .190" X
.220" X .065, and .276" X .378" X .092.</FONT></DIV>
<DIV><FONT face=Arial size=2>Thanks,</FONT></DIV>
<DIV><FONT face=Arial size=2>Dan</FONT></DIV></BLOCKQUOTE></BODY></HTML>
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Date: Thu, 28 Mar 2002 10:45:46 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Barry Gallegos <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Barry Gallegos <[log in to unmask]>
Subject: Board Panelization
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Good day folks.
If a guy who has never been involved in board panelizations wanted to get in
and really
learn the how too's. Where and how would I go about this?
Thanks to all for your undying commitment to a better Industry by the way.
Barry.
---------------------------------------------------------------------------------
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Date: Thu, 28 Mar 2002 09:44:27 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brummer Chuck <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brummer Chuck <[log in to unmask]>
Subject: Re: another materials question
X-To: "[log in to unmask]" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----_=_NextPart_001_01C1D680.34F601A0"
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charset="iso-8859-1"
Mark,
A rule of thumb is that the greater the resin content the worse the
dimensional stability. Lighter glass will also have different thread counts
in each direction.
Chuck Brummer
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Tuesday, March 26, 2002 10:05 PM
To: [log in to unmask]
Subject: [TN] another materials question
I'm learning about laminate materials and read with interest several recent
tecnet emails on the subject.
I'd like to submit a question about a particular construction that is a
challenge with respect to registration.
The construction is all 2 core and 3 core. The prepregs are 1-106 and
1-1080, which I have learned are described as resin rich. The construction
is balanced with respect to copper weights, glass styles, core thicknesses,
and prepreg openings.
What I am observing with this part is variation in how much certain cores
shrink, lot to lot,
and variation that I would describe as a shift or possibly a rotation in
some of the internal layers.
Am I correct in assuming that these thin cores and these particular prepregs
will contribute to lower yields due to misregistration? If anyone would
care to offer up ideas on how to tackle the registration challenge that I am
observing on this kind of construction, I would appreciate hearing your
ideas.
Mark J.
------_=_NextPart_001_01C1D680.34F601A0
Content-Type: text/html;
charset="iso-8859-1"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
<META content="MSHTML 5.50.4807.2300" name=GENERATOR></HEAD>
<BODY>
<DIV><SPAN class=710505317-28032002><FONT face=Arial color=#0000ff
size=2>Mark,</FONT></SPAN></DIV>
<DIV><SPAN class=710505317-28032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=710505317-28032002><FONT face=Arial color=#0000ff size=2>A rule
of thumb is that the greater the resin content the worse the dimensional
stability. Lighter glass will also have different thread counts in each
direction. </FONT></SPAN></DIV>
<DIV><SPAN class=710505317-28032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=710505317-28032002><FONT face=Arial color=#0000ff size=2>Chuck
Brummer</FONT></SPAN></DIV>
<DIV><SPAN class=710505317-28032002></SPAN> </DIV>
<BLOCKQUOTE>
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> [log in to unmask]
[mailto:[log in to unmask]]<BR><B>Sent:</B> Tuesday, March 26, 2002 10:05
PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] another materials
question<BR><BR></FONT></DIV><FONT face=arial,helvetica><FONT size=2>I'm
learning about laminate materials and read with interest several recent tecnet
emails on the subject. <BR>I'd like to submit a question about a particular
construction that is a challenge with respect to registration. <BR><BR>The
construction is all 2 core and 3 core. The prepregs are 1-106 and
1-1080, which I have learned are described as resin rich. The
construction is balanced with respect to copper weights, glass styles, core
thicknesses, and prepreg openings. <BR><BR>What I am observing with this part
is variation in how much certain cores shrink, lot to lot, <BR>and variation
that I would describe as a shift or possibly a rotation in some of the
internal layers. <BR><BR>Am I correct in assuming that these thin cores
and these particular prepregs will contribute to lower yields due to
misregistration? If anyone would care to offer up ideas on how to
tackle the registration challenge that I am observing on this kind of
construction, I would appreciate hearing your ideas. <BR><BR>Mark J.</FONT>
</FONT></BLOCKQUOTE></BODY></HTML>
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Date: Thu, 28 Mar 2002 09:47:25 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brummer Chuck <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brummer Chuck <[log in to unmask]>
Subject: Re: Imaging Clean Rooms
X-To: Ken Hafften <[log in to unmask]>
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IPC has a guide for cleanrooms. TA-724. Look that up.
Chuck Brummer
Acuson
-----Original Message-----
From: Ken Hafften [mailto:[log in to unmask]]
Sent: Wednesday, March 27, 2002 6:19 AM
To: [log in to unmask]
Subject: [TN] Imaging Clean Rooms
We are in the process of evaluating our clean room for inner and outer layer
circuit imaging. I am interested in finding out more information on the use
of clean rooms for printed circuit processing, particularly imaging. This
would include not only clean room requirements for imaging .003" lines but
also methods to achieve the required level of cleanliness. There seems to
be alot of information for processing microelectronics but not for printed
circuits. Thanks in advance for any help.
----------------------------------------------------------------------------
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charset=3Diso-8859-1">
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5.5.2653.12">
<TITLE>RE: [TN] Imaging Clean Rooms</TITLE>
</HEAD>
<BODY>
<P><FONT SIZE=3D2>IPC has a guide for cleanrooms. TA-724. =
Look that up.</FONT>
<BR><FONT SIZE=3D2>Chuck Brummer</FONT>
<BR><FONT SIZE=3D2>Acuson</FONT>
</P>
<P><FONT SIZE=3D2>-----Original Message-----</FONT>
<BR><FONT SIZE=3D2>From: Ken Hafften [<A =
HREF=3D"mailto:[log in to unmask]">mailto:[log in to unmask]</A>]<=
/FONT>
<BR><FONT SIZE=3D2>Sent: Wednesday, March 27, 2002 6:19 AM</FONT>
<BR><FONT SIZE=3D2>To: [log in to unmask]</FONT>
<BR><FONT SIZE=3D2>Subject: [TN] Imaging Clean Rooms</FONT>
</P>
<BR>
<P><FONT SIZE=3D2>We are in the process of evaluating our clean room =
for inner and outer layer</FONT>
<BR><FONT SIZE=3D2>circuit imaging. I am interested in finding =
out more information on the use</FONT>
<BR><FONT SIZE=3D2>of clean rooms for printed circuit processing, =
particularly imaging. This</FONT>
<BR><FONT SIZE=3D2>would include not only clean room requirements for =
imaging .003" lines but</FONT>
<BR><FONT SIZE=3D2>also methods to achieve the required level of =
cleanliness. There seems to</FONT>
<BR><FONT SIZE=3D2>be alot of information for processing =
microelectronics but not for printed</FONT>
<BR><FONT SIZE=3D2>circuits. Thanks in advance for any =
help.</FONT>
</P>
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Date: Thu, 28 Mar 2002 13:13:38 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Charlie McMahon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Charlie McMahon <[log in to unmask]>
Subject: Re: Board Panelization
X-To: Barry Gallegos <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii; format=flowed
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Barry:
This is an issue close to my heart....
When panel choices are on the table, I have found there are no standard
methodologies that fit all.
The primary reason is due to costing drivers at the board fabricator and
placment/productivity constraints at the assembler
Therefore, the way to handle this challenge in my view is to provide the
individual board size to the fabricator for their review and
advisory as to #-up and breakaway methods. Pricing will follow.
Upon receipt of this information, submit same to the assembly folks for
ratification and or revision. Pricing will follow as well.
Both fabricator and assembler need to work together with you to attain
the most cost effective panel strategy for you,
the client, to meet your pricing goals.
Yes, this takes more effort....it need be done but once. However the
benefits in yield, productivity, cost and ultimately
higher margins to you, the client, can be enhanced.
Just a suggestion.
Charlie McMahon
Barry Gallegos wrote:
>Good day folks.
>If a guy who has never been involved in board panelizations wanted to get in
>and really
>learn the how too's. Where and how would I go about this?
>
>Thanks to all for your undying commitment to a better Industry by the way.
>
>Barry.
>
>---------------------------------------------------------------------------------
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>---------------------------------------------------------------------------------
>
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Date: Thu, 28 Mar 2002 18:25:08 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Naisbitt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Naisbitt <[log in to unmask]>
Subject: Re: solder mask tape dots
X-To: Phil Nutting <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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Yup - we are and you can try HumiSeal
Regards Graham Naisbitt
[log in to unmask] <mailto:[log in to unmask]>
Concoat Limited
Alasan House, Albany Park
Camberley GU16 7PH - UK
www.concoat.co.uk <http://www.concoat.co.uk>
Phone: +44 1276 691100
Fax: +44 1276 691227
Mobile: +44 79 6858 2121
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Phil Nutting
> Sent: 27 March 2002 15:12
> To: [log in to unmask]
> Subject: [TN] solder mask tape dots
>
>
> Here is another question for all you gurus.
>
> We have a hand build, through hole circuit board that has 8
> locations that must be free of solder for the next level of
> assembly. So far I can only find solder mask tape dots at
> Contact East. Are there any other suppliers out there? Our
> terminal measures 0.28 inch diameter, so a 0.3" pad might be just
> the thing.
>
> Thanks in advance,
>
> Phil
>
> ------------------------------------------------------------------
> ---------------
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> ------------------------------------------------------------------
> ---------------
>
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Date: Thu, 28 Mar 2002 18:25:05 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Naisbitt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Naisbitt <[log in to unmask]>
Subject: Re: Measuring "No Clean" process quality
X-To: Volkmar Huss <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 8bit
Volkmar
As the Chairman of a new IEC committee to produce a "Process
Characterisation" specification, I can very probably help you.
That's the good news! The bad news is that we only have the spec in draft -
however, if you wish, I will try to send you something to consider but I
will have to send this off-line.
Regards Graham Naisbitt
[log in to unmask] <mailto:[log in to unmask]>
Concoat Limited
Alasan House, Albany Park
Camberley GU16 7PH - UK
www.concoat.co.uk <http://www.concoat.co.uk>
Phone: +44 1276 691100
Fax: +44 1276 691227
Mobile: +44 79 6858 2121
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Volkmar Huss
> Sent: 26 March 2002 14:37
> To: [log in to unmask]
> Subject: [TN] Measuring "No Clean" process quality
>
>
> Hi TechNetters,
>
> we are working on defining our "No Clean" soldering process. The
> solder-paste and flux manufacturers certify the "No Clean" capability of
>
> their products to some extend, but what is the definition of "No Clean"?
>
> And I don't mean the statement, that only inert residues of flux and
> solder-paste additives remain on the board.
> Are there any standards that can used as a reference?
> How do you measure the:
> "No Clean" capability of solder paste, flux and tubular solder with flux
>
> core?
> "No Clean" quality of printed board assemblies?
> "No Clean" quality of printed board assemblies onto which devices have
> been hand-soldered?
> and all of this for prototype and series production?
>
> I have gleaned some insights from the TechNet archives, but any
> additional input is very welcome.
>
> Best regards
>
> Volkmar Huß
>
> Engineering Electronic Circuit Boards
> Aufbau- und Verbindungstechnik
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
> DRÄGER ELECTRONICS
>
> Draeger Electronics GmbH
> Moislinger Allee 53-55
> D-23558 Lübeck
>
> Tel: +49-451-882-3998
> Fax: +49-451-882-4365
> mailto:[log in to unmask]
> Website http://www.draeger.com/de/EL
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
> --
> Best regards / Mit freundlichen Grüßen
>
> Volkmar Huß
>
> Engineering Electronic Circuit Boards
> Aufbau- und Verbindungstechnik
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
> DRÄGER ELECTRONICS
>
> Draeger Electronics GmbH
> Moislinger Allee 53-55
> D-23558 Lübeck
>
> Tel: +49-451-882-3998
> Fax: +49-451-882-4365
> mailto:[log in to unmask]
> Website http://www.draeger.com/de/EL
> _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
>
>
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>
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Date: Thu, 28 Mar 2002 14:00:15 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Maddox, Allen T" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Maddox, Allen T" <[log in to unmask]>
Subject: Re: standard package dimensions
X-To: "Dan R. Johnson" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Try here:
http://www.jedec.org/download/default.cfm
<http://www.jedec.org/download/default.cfm>
Allen M.
-----Original Message-----
From: Dan R. Johnson [mailto:[log in to unmask]]
Sent: Thursday, March 28, 2002 12:00 PM
To: [log in to unmask]
Subject: [TN] standard package dimensions
Does anyone know of a web site that gives standard dimensions for QFP, PLCC,
etc.?
We have a couple of new products coming out and I need to find shipping
tubes, hopefully off the shelf.
The parts are .175" X .175" X .066", .190" X .220" X .065, and .276" X .378"
X .092.
Thanks,
Dan
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Date: Thu, 28 Mar 2002 14:31:32 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Safavi-Bayat Shahed <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Safavi-Bayat Shahed <[log in to unmask]>
Subject: Re: standard package dimensions
X-To: "Dan R. Johnson" <[log in to unmask]>
MIME-Version: 1.0
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boundary="----_=_NextPart_001_01C1D68F.2A8A744E"
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this format, some or all of this message may not be legible.
------_=_NextPart_001_01C1D68F.2A8A744E
Content-Type: text/plain;
charset="iso-8859-1"
Try
www.toplinedummy.com <http://www.toplinedummy.com>
shahed
-----Original Message-----
From: Dan R. Johnson [mailto:[log in to unmask]]
Sent: Thursday, March 28, 2002 12:00 PM
To: [log in to unmask]
Subject: [TN] standard package dimensions
Does anyone know of a web site that gives standard dimensions for QFP, PLCC,
etc.?
We have a couple of new products coming out and I need to find shipping
tubes, hopefully off the shelf.
The parts are .175" X .175" X .066", .190" X .220" X .065, and .276" X .378"
X .092.
Thanks,
Dan
------_=_NextPart_001_01C1D68F.2A8A744E
Content-Type: text/html;
charset="iso-8859-1"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
<META content="MSHTML 6.00.2712.300" name=GENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=#ffffff>
<DIV><SPAN class=033573819-28032002><FONT face="Courier New"
color=#0000ff>Try</FONT></SPAN></DIV>
<DIV><SPAN class=033573819-28032002><FONT face="Courier New" color=#0000ff><A
href="http://www.toplinedummy.com">www.toplinedummy.com</A></FONT></SPAN></DIV>
<DIV> </DIV><SPAN class=033573819-28032002></SPAN><FONT
face="Courier New"><FONT color=#0000ff>shahed<SPAN
class=033573819-28032002></SPAN></FONT></FONT><BR><BR>
<P align=left><FONT face=AvantGarde> </FONT><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Dan R. Johnson
[mailto:[log in to unmask]]<BR><B>Sent:</B> Thursday, March 28, 2002 12:00
PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] standard package
dimensions<BR><BR></FONT></P>
<BLOCKQUOTE dir=ltr style="MARGIN-RIGHT: 0px">
<DIV><FONT face=Arial size=2>Does anyone know of a web site that gives
standard dimensions for QFP, PLCC, etc.?</FONT></DIV>
<DIV><FONT face=Arial size=2>We have a couple of new products coming out and I
need to find shipping tubes, hopefully off the shelf.</FONT></DIV>
<DIV><FONT face=Arial size=2>The parts are .175" X .175" X .066", .190" X
.220" X .065, and .276" X .378" X .092.</FONT></DIV>
<DIV><FONT face=Arial size=2>Thanks,</FONT></DIV>
<DIV><FONT face=Arial size=2>Dan</FONT></DIV></BLOCKQUOTE></BODY></HTML>
------_=_NextPart_001_01C1D68F.2A8A744E--
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Date: Thu, 28 Mar 2002 15:51:34 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Flex circuit design guidelines
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hello Technet:
I'm looking for some design guidelines for a flex circuit. What factors
should be considered when designing a circuit used for continued flexing?
Foil thickness, bend radius, etc. I know that IPC 2223 has this info, but I
don't have a copy yet and need this information ASAP. Any information will
be helpful.
Thanks,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
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Date: Thu, 28 Mar 2002 16:20:19 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Flex circuit design guidelines
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_102.12d97df1.29d4e313_boundary"
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Hi Jim!
Here's a couple of links that might be helpful:
http://www.minco.com/pdf/aa24.pdf
http://www.allflexinc.com/desi.shtml
-Steve Gregory-
> Hello Technet:
> I'm looking for some design guidelines for a flex circuit. What factors
> should be considered when designing a circuit used for continued flexing?
> Foil thickness, bend radius, etc. I know that IPC 2223 has this info, but I
> don't have a copy yet and need this information ASAP. Any information will
> be helpful.
>
> Thanks,
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
--part1_102.12d97df1.29d4e313_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Jim!
<BR>
<BR>Here's a couple of links that might be helpful:
<BR>
<BR>http://www.minco.com/pdf/aa24.pdf
<BR>http://www.allflexinc.com/desi.shtml
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Hello Technet:
<BR>I'm looking for some design guidelines for a flex circuit. What factors
<BR>should be considered when designing a circuit used for continued flexing?
<BR>Foil thickness, bend radius, etc. I know that IPC 2223 has this info, but I
<BR>don't have a copy yet and need this information ASAP. Any information will
<BR>be helpful.
<BR>
<BR>Thanks,
<BR>Jim Marsico
<BR>Senior Engineer
<BR>Production Engineering
<BR>EDO Electronics Systems Group
<BR>[log in to unmask] <mailto:[log in to unmask]>
<BR>631-595-5879
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
--part1_102.12d97df1.29d4e313_boundary--
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Date: Thu, 28 Mar 2002 16:59:39 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Tempea, Ioan" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Tempea, Ioan" <[log in to unmask]>
Subject: Re: Flex circuit design guidelines
MIME-Version: 1.0
Content-Type: text/plain
Hi Jim,
check http:\\www.mflex.com. They have a design manual. Just got my free copy
on CD.
Regards,
Ioan
> -----Original Message-----
> From: Marsico, James [SMTP:[log in to unmask]]
> Sent: Thursday, March 28, 2002 3:52 PM
> To: [log in to unmask]
> Subject: [TN] Flex circuit design guidelines
>
> Hello Technet:
> I'm looking for some design guidelines for a flex circuit. What factors
> should be considered when designing a circuit used for continued flexing?
> Foil thickness, bend radius, etc. I know that IPC 2223 has this info, but
> I
> don't have a copy yet and need this information ASAP. Any information
> will
> be helpful.
>
> Thanks,
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
> --------------------------------------------------------------------------
> -------
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> information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700
> ext.5315
> --------------------------------------------------------------------------
> -------
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Date: Thu, 28 Mar 2002 23:13:30 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"D.Terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "D.Terstegge" <[log in to unmask]>
Subject: Re: Board Panelization
X-To: Barry Gallegos <[log in to unmask]>
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Hi Barry,
One of the most important things to keep in mind when designing a =
panelization is how good your panel fits in the pcb-suppliers production =
panel, as this determines how efficient the material is used, and thus =
the price. With programs like KwickFit (www.micromeg.com, trial version =
available) it is easily demonstrated how large the differences can be.=20
The main problem I see is that as for an assembly guy it's hard to tell =
where the breakaway-tabs should be, as you need to inspect all the board =
layers (you'll want no tab where there's tracks close to it) which may =
take lots time. However, leaving it to the pcb vendor sometimes results =
in unpleasant surprises. I'd like to hear how other deal with this..... =
=20
Daan Terstegge
http://www.smtinfo.net
----- Original Message -----=20
From: Barry Gallegos=20
To: [log in to unmask]
Sent: Thursday, March 28, 2002 6:45 PM
Subject: [TN] Board Panelization
Good day folks.
If a guy who has never been involved in board panelizations wanted to =
get in
and really
learn the how too's. Where and how would I go about this?
Thanks to all for your undying commitment to a better Industry by the =
way.
Barry.
=
-------------------------------------------------------------------------=
--------
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1.8d
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in
the BODY (NOT the subject field): SIGNOFF Technet
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[log in to unmask]: SET Technet NOMAIL
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[log in to unmask]: SET Technet Digest
Search previous postings at: www.ipc.org > On-Line Resources & =
Databases > E-mail Archives
Please visit IPC web site http://www.ipc.org/html/forum.htm for =
additional
information, or contact Keach Sasamori at [log in to unmask] or =
847-509-9700 ext.5315
=
-------------------------------------------------------------------------=
--------
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4134.600" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV>Hi Barry,</DIV>
<DIV> </DIV>
<DIV>One of the most important things to keep in mind when designing a=20
panelization is how good your panel fits in the pcb-suppliers production =
panel,=20
as this determines how efficient the material is used, and =
thus the=20
price. With programs like KwickFit (<A=20
href=3D"http://www.micromeg.com">www.micromeg.com</A>, trial version=20
available) it is easily demonstrated how large the differences =
can=20
be. </DIV>
<DIV>The main problem I see is that as for an assembly guy it's hard to =
tell=20
where the breakaway-tabs should be, as you need to inspect all the board =
layers=20
(you'll want no tab where there's tracks close to it) which may take =
lots=20
time. However, leaving it to the pcb vendor sometimes results in =
unpleasant=20
surprises. I'd like to hear how other deal with=20
this..... </DIV>
<DIV> </DIV>
<DIV> </DIV>
<DIV>Daan Terstegge</DIV>
<DIV>http://<A href=3D"http://www.smtinfo.net">www.smtinfo.net</A></DIV>
<DIV> </DIV>
<DIV> </DIV>
<BLOCKQUOTE=20
style=3D"PADDING-RIGHT: 0px; PADDING-LEFT: 5px; MARGIN-LEFT: 5px; =
BORDER-LEFT: #000000 2px solid; MARGIN-RIGHT: 0px">
<DIV style=3D"FONT: 10pt arial"><FONT face=3DVerdana =
size=3D3></FONT> </DIV>
<DIV style=3D"FONT: 10pt arial">----- Original Message ----- </DIV>
<DIV=20
style=3D"BACKGROUND: #e4e4e4; FONT: 10pt arial; font-color: =
black"><B>From:</B>=20
<A [log in to unmask]
href=3D"mailto:[log in to unmask]">Barry Gallegos</A> =
</DIV>
<DIV style=3D"FONT: 10pt arial"><B>To:</B> <A [log in to unmask]
href=3D"mailto:[log in to unmask]">[log in to unmask]</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>Sent:</B> Thursday, March 28, 2002 =
6:45=20
PM</DIV>
<DIV style=3D"FONT: 10pt arial"><B>Subject:</B> [TN] Board =
Panelization</DIV>
<DIV><BR></DIV>Good day folks.<BR>If a guy who has never been involved =
in=20
board panelizations wanted to get in<BR>and really<BR>learn the how =
too's.=20
Where and how would I go about this?<BR><BR>Thanks to all for your =
undying=20
commitment to a better Industry by the=20
=
way.<BR><BR>Barry.<BR><BR>-----------------------------------------------=
----------------------------------<BR>Technet=20
Mail List provided as a free service by IPC using LISTSERV 1.8d<BR>To=20
unsubscribe, send a message to <A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A> with following =
text=20
in<BR>the BODY (NOT the subject field): SIGNOFF Technet<BR>To =
temporarily halt=20
delivery of Technet send e-mail to <A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A>: SET Technet =
NOMAIL<BR>To=20
receive ONE mailing per day of all the posts: send e-mail to <A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A>: SET Technet=20
Digest<BR>Search previous postings at: <A=20
href=3D"http://www.ipc.org">www.ipc.org</A> > On-Line Resources =
&=20
Databases > E-mail Archives<BR>Please visit IPC web site <A=20
=
href=3D"http://www.ipc.org/html/forum.htm">http://www.ipc.org/html/forum.=
htm</A>=20
for additional<BR>information, or contact Keach Sasamori at <A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A> or 847-509-9700=20
=
ext.5315<BR>-------------------------------------------------------------=
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Date: Thu, 28 Mar 2002 14:22:31 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
peter lee <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: peter lee <[log in to unmask]>
Subject: LPI solder mask
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Does anyone know what the difference is between
Probimer 52 and Probimer 77 solder mask?
In particular, I would like more info. on the impact
of switching from 52 to 77 has on the manufacturing
process. i.e. Implications and impact on reflow,
conformal coating compatibility etc.
Rgds,
Peter
__________________________________________________
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=========================================================================
Date: Thu, 28 Mar 2002 14:33:48 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Self life PC Boards
Mime-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hello Technet,
Can someone tell me the shelf life of PC boards with HASL and immersion gold
finish?
Thanks,
Patrick
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Date: Thu, 28 Mar 2002 17:06:08 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Dave Hillman <[log in to unmask]>
Subject: Re: Conformal Coating BGA's
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Hi Peter! Cool, now your underfill rationale falls into place, especially
since you were reacting to a less-than-robust design. I have test boards in
the thermal cycle chamber right now in an attempt to understand just how
much of an "improvement" the underfill operation adds to the solder joint
thermal cycle fatigue life. And yes, underfill adds an extra processing
step thus increasing time and cost. If the underfill operation doesn't
result in a value added benefit for our use environments then it most
definitely won't be a suggested process addition. The EMMA project has
published an extensive data set on the impact of vibration on area array
components (BGA, CSP, FC) which might be useful to you. Contact Lee
Whiteman for access to the data ([log in to unmask]).
Dave
[log in to unmask] on 03/27/2002 06:22:10 PM
To: <[log in to unmask]>
cc:
Subject: Re: [TN] Conformal Coating BGA's
Hi, Dave,
Got a Coke to hand? OK. Reason for underfilling BGA's was that the first
BGA boards we had were designed and assembled for us by a s/c. The first
time we put them near any form of vibration, and it was gentle, they
failed. Investigation followed, and I learned more about BGA's, ENIG boards
and the poor manufacturing quality of whoever assembled the things.
I had a couple more boards assembled myself, full of sheer terror, as you
correctly guessed, of the ENIG and BGA horror stories I'd heard about, and
heard about what Underfills were supposed to do. So I opted to use it,
partly to fillin the air gap but mostly to add support to the solder joints
against creep fatigue.
I do know, though, that many high reliability appliactions do not underfill
their BGA's, but they've maybe had more money, resources, time and
experience to prove it isn't necessary with the processes they use. If I
could be confident enough, I wouldn't use it either - it's one more process
to take time and cost, right?
Peter
<ddhillma@rockwellco
llins.com> To: [log in to unmask],
DUNCAN Peter/Asst Prin
Engr/ST Aero/ST Group@ST
Domain
03/28/02 06:40 AM cc:
Subject: Re: [TN]
Conformal Coating BGA's
Hi Peter! You have me confused (which is a normal state for me if I don't
have a Coke in my hand). Collins has been using BGAs in avionics use
environments, not underfilled, with acrylic conformal coating very
successfully for a couple of years. What was the reason/rationale for using
BGAs with underfill? Was is an issue with solder joint thermal cycle
fatigue for a given use environment? Corrosion? Customer requirements?
Residual flux issues? Sheer terror of the unknown?
Dave Hillman
Rockwell Collins
[log in to unmask]
[log in to unmask]@ipc.org> on 03/26/2002 07:48:52 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to [log in to unmask]
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: Re: [TN] Conformal Coating BGA's
Hi, Bruce,
We apply Humiseal acrylic coating to boards that fit your description and
application precisely, except that we do underfill the BGA's with a
reworkable epoxy, applied after assembly. The only exception was for the
case of two boards destined for temperature cycling measurement, for which
we couldn't get a supply of underfill material at the time. We substituted
thinned Humiseal as the boards would not be flying, as we were concerned
about entrapped air and also no suuport for the BGA joints. Humiseal is not
a proper substitute for the specialised proper epoxy, but was sufficient
for our particular purpose.
The main issue as I see it would be moisture and other contaminants in the
entrapped air, but I have no first hand data to help you decide if that
causes problems or not.
Good luck
Peter
"Misner,
Bruce" To: [log in to unmask]
<Bruce_Misner cc: (bcc: DUNCAN Peter/Asst
Prin Engr/ST
@ATK.COM> Aero/ST Group)
Sent by: Subject: [TN] Conformal
Coating BGA's
TechNet
<[log in to unmask]
ORG>
03/20/02
03:48 AM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
"Misner,
Bruce"
My question of the day: Is anyone conformal coating (not parylene) plastic
BGA's on FR-4 in Hi-Rel applications (aircraft; -20 to +71C ambient
operating temperature requirement) without benefit of an underfil? If yes,
has entrapped air been a major issue? Anyone care to comment on this
approach?
Regards,
Bruce Misner
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=========================================================================
Date: Thu, 28 Mar 2002 17:22:51 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brad Mecham <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brad Mecham <[log in to unmask]>
Subject: SMT Ceramic Resonators
Does someone know if there is an IPC standard for a SMT Ceramic Resonators
which has Castellated Terminations? Does IPC require a good Castellated
fillet on both sides of the part even though the pad is continuos?
On the middle pad we are getting good wetting on one of the Castellated
terminals. However the other side does not have a good fillet. I feel
that since the part has a pad all the way underneath itself, that a good
Castellated terminal one side means that the bottom pad is also soldered.
I guess the question I am asking is, according to IPC do Castellated
Terminations (section 12.2.4 of IPC-A-610 C) only apply to Leadless Chip
Carriers or any part that has a castellated terminal. Any help on this
would be greatly appreciated.
Thanks,
Brad Mecham
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=========================================================================
Date: Thu, 28 Mar 2002 21:43:10 -0600
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Seth Goodman <[log in to unmask]>
Subject: Re: Conformal Coating BGA's
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
Hi Dave,
Just curious on this one. When you apply Humiseal to a board with BGA's
with no underfill, I take that to mean the coating just bridges the gap
between part and board around the perimeter of the BGA without wicking
underneath very far. This traps air under the BGA. Obviously this works
fine, as you have been using it in avionics for some time and that is a
tough environment. My naive question is why doesn't the coating around the
BGA perimeter blow out when the trapped air under the BGA heats up due to
power dissipation in the BGA itself? If it was going to happen at all, your
application is possibly a worst case with the combination of high ambient
temperature and low ambient pressure.
I would also be interested to know the results of your test to see how the
underfill affects the failure rate due to temperature cycling. Since
neither the underfill nor the conformal coating will really keep moisture
out, it would be nice to know if there are any real benefits conferred by
this extra processing step.
Seth Goodman
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Dave Hillman
Sent: Thursday, March 28, 2002 5:06 PM
To: [log in to unmask]
Subject: Re: [TN] Conformal Coating BGA's
Hi Peter! Cool, now your underfill rationale falls into place, especially
since you were reacting to a less-than-robust design. I have test boards in
the thermal cycle chamber right now in an attempt to understand just how
much of an "improvement" the underfill operation adds to the solder joint
thermal cycle fatigue life. And yes, underfill adds an extra processing
step thus increasing time and cost. If the underfill operation doesn't
result in a value added benefit for our use environments then it most
definitely won't be a suggested process addition. The EMMA project has
published an extensive data set on the impact of vibration on area array
components (BGA, CSP, FC) which might be useful to you. Contact Lee
Whiteman for access to the data ([log in to unmask]).
Dave
[log in to unmask] on 03/27/2002 06:22:10 PM
To: <[log in to unmask]>
cc:
Subject: Re: [TN] Conformal Coating BGA's
Hi, Dave,
Got a Coke to hand? OK. Reason for underfilling BGA's was that the first
BGA boards we had were designed and assembled for us by a s/c. The first
time we put them near any form of vibration, and it was gentle, they
failed. Investigation followed, and I learned more about BGA's, ENIG boards
and the poor manufacturing quality of whoever assembled the things.
I had a couple more boards assembled myself, full of sheer terror, as you
correctly guessed, of the ENIG and BGA horror stories I'd heard about, and
heard about what Underfills were supposed to do. So I opted to use it,
partly to fillin the air gap but mostly to add support to the solder joints
against creep fatigue.
I do know, though, that many high reliability appliactions do not underfill
their BGA's, but they've maybe had more money, resources, time and
experience to prove it isn't necessary with the processes they use. If I
could be confident enough, I wouldn't use it either - it's one more process
to take time and cost, right?
Peter
<ddhillma@rockwellco
llins.com> To: [log in to unmask],
DUNCAN Peter/Asst Prin
Engr/ST Aero/ST Group@ST
Domain
03/28/02 06:40 AM cc:
Subject: Re: [TN]
Conformal Coating BGA's
Hi Peter! You have me confused (which is a normal state for me if I don't
have a Coke in my hand). Collins has been using BGAs in avionics use
environments, not underfilled, with acrylic conformal coating very
successfully for a couple of years. What was the reason/rationale for using
BGAs with underfill? Was is an issue with solder joint thermal cycle
fatigue for a given use environment? Corrosion? Customer requirements?
Residual flux issues? Sheer terror of the unknown?
Dave Hillman
Rockwell Collins
[log in to unmask]
[log in to unmask]@ipc.org> on 03/26/2002 07:48:52 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to [log in to unmask]
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: Re: [TN] Conformal Coating BGA's
Hi, Bruce,
We apply Humiseal acrylic coating to boards that fit your description and
application precisely, except that we do underfill the BGA's with a
reworkable epoxy, applied after assembly. The only exception was for the
case of two boards destined for temperature cycling measurement, for which
we couldn't get a supply of underfill material at the time. We substituted
thinned Humiseal as the boards would not be flying, as we were concerned
about entrapped air and also no suuport for the BGA joints. Humiseal is not
a proper substitute for the specialised proper epoxy, but was sufficient
for our particular purpose.
The main issue as I see it would be moisture and other contaminants in the
entrapped air, but I have no first hand data to help you decide if that
causes problems or not.
Good luck
Peter
"Misner,
Bruce" To: [log in to unmask]
<Bruce_Misner cc: (bcc: DUNCAN Peter/Asst
Prin Engr/ST
@ATK.COM> Aero/ST Group)
Sent by: Subject: [TN] Conformal
Coating BGA's
TechNet
<[log in to unmask]
ORG>
03/20/02
03:48 AM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
"Misner,
Bruce"
My question of the day: Is anyone conformal coating (not parylene) plastic
BGA's on FR-4 in Hi-Rel applications (aircraft; -20 to +71C ambient
operating temperature requirement) without benefit of an underfil? If yes,
has entrapped air been a major issue? Anyone care to comment on this
approach?
Regards,
Bruce Misner
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=========================================================================
Date: Fri, 29 Mar 2002 11:08:46 +0530
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Vinit Verma <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Vinit Verma <[log in to unmask]>
Subject: Re: Blistering in PCBs
X-To: Earl Moon <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi Earl,
Thanks for your "condolences". I would'nt mind your posting the photographs!
Rather it might enable somebody else too to give some insight!!
Where would you post them anyway?? Steve's site?
Regards
Vinit
-----Original Message-----
From: Earl Moon [mailto:[log in to unmask]]
Sent: Thursday, March 28, 2002 5:36 PM
To: [log in to unmask]
Subject: Re: [TN] Blistering in PCBs
I completely agree with the following:
IHRlbXBvcmFyaWx5IGhhbHQgZGVsaXZlcnkgb2YgVGVjaG5ldCBzZW5kIGUtbWFpbCB0byBMaXN0
c2VydkBpcGMub3JnOiBTRVQgVGVjaG5ldCBOT01BSUwNCj5UbyByZWNlaXZlIE9ORSBtYWlsaW5n
IHBlciBkYXkgb2YgYWxsIHRoZSBwb3N0czogc2VuZCBlLW1haWwgdG8gTGlzdHNlcnZAaXBjLm9y
ZzogU0VUIFRlY2huZXQgRGlnZXN0DQo+U2VhcmNo
However, Vinit sent me some really ugly photos showing the condition. Out of
respect for his privacy and sorrow, I won't even attempt posting them unless
he wishes. Never seen anything so ugly.
MoonMan
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=========================================================================
Date: Fri, 29 Mar 2002 08:18:47 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Conformal coating: high humidity environment.
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
This seems to be out of context, but I think that this was referred to
in the original thread
Brian
[log in to unmask] wrote:
>
> What is the name of the book that you referenced? Is it CLEANING AND
> CONTAMINATION OF ELECTRONICS COMPONENTS AND ASSEMBLIES ?
>
> Thanks,
> Jason
>
> ---------------------------------------------------------------------------------
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> ---------------------------------------------------------------------------------
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=========================================================================
Date: Fri, 29 Mar 2002 06:49:27 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Blistering in PCBs
X-To: Vinit Verma <[log in to unmask]>
Vinit,
Ok, here we go. Never seen nothin' like these before. Oh well, maybe once
when I was a "young gun" process engineer at Xerox. That's another story
I'll not bore anyone with now.
Concerning the pics, it is obvious there is delam everywhere but maybe the
edges. Vinitdelam3's discoloration also is delamination, not solder mask
related.
Someone else take shots at this and Vinit's supplier. This shop shoundn't
exist unless they just lost it all on his boards ONE PING ONLY PLEASE.
A pleasure to serve Vinit. Don't often get to see how bad something can be
besides a train wreck.
MoonMan
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=========================================================================
Date: Fri, 29 Mar 2002 09:13:26 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Flex circuit design guidelines
MIME-Version: 1.0
Content-Type: text/plain; charset="US-ASCII"
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hello Jim,
Quick thought for flex...
Use .002 1/1 or half over half adhesiveless
Use .001 cover coat (Polyimide Kapton)
Termination of cover coat .025-.075 at rigid junction requires this area to
be via free for .10 inch... thats a tuff one I know
Traces only perpendicularly transition rigid flex
Traces only perpendicularly transition rigid flex
Relieved planes in flex are very nice for flexing
No adhesive between flex pairs
Either epoxy or poly rigid works
complex flex will require preheat and a fixture after assembly for shape
forming
If your doing FR4 flex things are different
I love flex
Boston Brad
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Date: Fri, 29 Mar 2002 09:32:55 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Don Vischulis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Don Vischulis <[log in to unmask]>
Subject: Re: Blistering in PCBs
X-To: Earl Moon <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
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Hey Earl
Where can I see these photos? Don't see them on Steve's site.
Don Vischulis
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Earl Moon
Sent: Friday, March 29, 2002 6:49 AM
To: [log in to unmask]
Subject: Re: [TN] Blistering in PCBs
Vinit,
Ok, here we go. Never seen nothin' like these before. Oh well, maybe once
when I was a "young gun" process engineer at Xerox. That's another story
I'll not bore anyone with now.
Concerning the pics, it is obvious there is delam everywhere but maybe the
edges. Vinitdelam3's discoloration also is delamination, not solder mask
related.
Someone else take shots at this and Vinit's supplier. This shop shoundn't
exist unless they just lost it all on his boards ONE PING ONLY PLEASE.
A pleasure to serve Vinit. Don't often get to see how bad something can be
besides a train wreck.
MoonMan
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Date: Fri, 29 Mar 2002 10:48:31 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
tony steinke <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: tony steinke <[log in to unmask]>
Subject: solder paste registration
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_0053_01C1D70F.448172A0"
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Ladies and Gentlemen,
We are having a major problem with an assembly house with registering
the solder paste to surface mount features prior to pick and place. They
are claiming that the boards are growing/shrinking some 15-20 mils.
We have done extensive measuring on unpopulated boards in-house
and cannot see more than 3-5 mils misregistration. The panel size
is approximately 14.00 x 16.00 inches, 20-24 mil pitch, and 15 BGA's
throughout the panel. Overall thickness .080. Is it possible that the =
mesh
screen that they are using can expand/contract over time? has anyone
heard of this experienced this situation before. Any information would =
be
greatly appreciated.
Thanks
Tony Steinke
AIT-Atlanta
------=_NextPart_000_0053_01C1D70F.448172A0
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4807.2300" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#fff8e0>
<DIV><FONT face=3DArial size=3D2>Ladies and Gentlemen,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>We are having a major problem with an =
assembly=20
house with registering</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>the solder paste to surface mount =
features prior to=20
pick and place. They</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>are claiming that the boards are =
growing/shrinking=20
some 15-20 mils.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>We have done extensive measuring on =
unpopulated=20
boards in-house</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>and cannot see more than 3-5 mils =
misregistration.=20
The panel size</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>is approximately 14.00 x 16.00 inches, =
20-24 mil=20
pitch, and 15 BGA's</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>throughout the panel. Overall thickness =
.080. Is it=20
possible that the mesh</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>screen that they are using can =
expand/contract over=20
time? has anyone</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>heard of this experienced this =
situation before.=20
Any information would be</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>greatly appreciated.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Thanks</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Tony Steinke</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>AIT-Atlanta</FONT></DIV></BODY></HTML>
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Date: Fri, 29 Mar 2002 11:08:34 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McMullen, Kerry" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McMullen, Kerry" <[log in to unmask]>
Subject: Re: solder paste registration
X-To: tony steinke <[log in to unmask]>
MIME-Version: 1.0
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I have seen 3-5 mils with our boards. Nothing more. What material are they
using for the stencil and the board?
-----Original Message-----
From: tony steinke [mailto:[log in to unmask]]
Sent: Friday, March 29, 2002 1:49 PM
To: [log in to unmask]
Subject: [TN] solder paste registration
Ladies and Gentlemen,
We are having a major problem with an assembly house with registering
the solder paste to surface mount features prior to pick and place. They
are claiming that the boards are growing/shrinking some 15-20 mils.
We have done extensive measuring on unpopulated boards in-house
and cannot see more than 3-5 mils misregistration. The panel size
is approximately 14.00 x 16.00 inches, 20-24 mil pitch, and 15 BGA's
throughout the panel. Overall thickness .080. Is it possible that the mesh
screen that they are using can expand/contract over time? has anyone
heard of this experienced this situation before. Any information would be
greatly appreciated.
Thanks
Tony Steinke
AIT-Atlanta
------_=_NextPart_001_01C1D73B.FA2DC370
Content-Type: text/html;
charset="iso-8859-1"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
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<STYLE></STYLE>
</HEAD>
<BODY bgColor=#fff8e0>
<DIV><SPAN class=006001516-29032002><FONT face=Arial color=#0000ff size=2>I have
seen 3-5 mils with our boards. Nothing more. What material are they
using for the stencil and the board?</FONT></SPAN></DIV>
<BLOCKQUOTE dir=ltr style="MARGIN-RIGHT: 0px">
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> tony steinke
[mailto:[log in to unmask]]<BR><B>Sent:</B> Friday, March 29, 2002 1:49
PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] solder paste
registration<BR><BR></FONT></DIV>
<DIV><FONT face=Arial size=2>Ladies and Gentlemen,</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>We are having a major problem with an assembly
house with registering</FONT></DIV>
<DIV><FONT face=Arial size=2>the solder paste to surface mount features prior
to pick and place. They</FONT></DIV>
<DIV><FONT face=Arial size=2>are claiming that the boards are
growing/shrinking some 15-20 mils.</FONT></DIV>
<DIV><FONT face=Arial size=2>We have done extensive measuring on unpopulated
boards in-house</FONT></DIV>
<DIV><FONT face=Arial size=2>and cannot see more than 3-5 mils
misregistration. The panel size</FONT></DIV>
<DIV><FONT face=Arial size=2>is approximately 14.00 x 16.00 inches, 20-24 mil
pitch, and 15 BGA's</FONT></DIV>
<DIV><FONT face=Arial size=2>throughout the panel. Overall thickness .080. Is
it possible that the mesh</FONT></DIV>
<DIV><FONT face=Arial size=2>screen that they are using can expand/contract
over time? has anyone</FONT></DIV>
<DIV><FONT face=Arial size=2>heard of this experienced this situation before.
Any information would be</FONT></DIV>
<DIV><FONT face=Arial size=2>greatly appreciated.</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>Thanks</FONT></DIV>
<DIV><FONT face=Arial size=2>Tony Steinke</FONT></DIV>
<DIV><FONT face=Arial size=2>AIT-Atlanta</FONT></DIV></BLOCKQUOTE></BODY></HTML>
------_=_NextPart_001_01C1D73B.FA2DC370--
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Date: Fri, 29 Mar 2002 11:18:52 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Blistering in PCBs
MIME-Version: 1.0
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Don and Everybody!
The pic's are now up! Go to: http://www.stevezeva.homestead.com
I gotta say, those are some UGLY boards!
-Steve Gregory-
> Hey Earl
>
> Where can I see these photos? Don't see them on Steve's site.
>
> Don Vischulis
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Earl Moon
> Sent: Friday, March 29, 2002 6:49 AM
> To: [log in to unmask]
> Subject: Re: [TN] Blistering in PCBs
>
>
> Vinit,
>
> Ok, here we go. Never seen nothin' like these before. Oh well, maybe once
> when I was a "young gun" process engineer at Xerox. That's another story
> I'll not bore anyone with now.
>
> Concerning the pics, it is obvious there is delam everywhere but maybe the
> edges. Vinitdelam3's discoloration also is delamination, not solder mask
> related.
>
> Someone else take shots at this and Vinit's supplier. This shop shoundn't
> exist unless they just lost it all on his boards ONE PING ONLY PLEASE.
>
> A pleasure to serve Vinit. Don't often get to see how bad something can be
> besides a train wreck.
>
> MoonMan
>
--part1_59.19574e84.29d5edec_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Don and Everybody!<BR>
<BR>
The pic's are now up! Go to: http://www.stevezeva.homestead.com<BR>
<BR>
I gotta say, those are some UGLY boards!<BR>
<BR>
-Steve Gregory-<BR>
<BR>
<BR>
<BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Hey Earl<BR>
<BR>
Where can I see these photos? Don't see them on Steve's site.<BR>
<BR>
Don Vischulis<BR>
<BR>
-----Original Message-----<BR>
From: TechNet [mailto:[log in to unmask]]On Behalf Of Earl Moon<BR>
Sent: Friday, March 29, 2002 6:49 AM<BR>
To: [log in to unmask]<BR>
Subject: Re: [TN] Blistering in PCBs<BR>
<BR>
<BR>
Vinit,<BR>
<BR>
Ok, here we go. Never seen nothin' like these before. Oh well, maybe once<BR>
when I was a "young gun" process engineer at Xerox. That's another story<BR>
I'll not bore anyone with now.<BR>
<BR>
Concerning the pics, it is obvious there is delam everywhere but maybe the<BR>
edges. Vinitdelam3's discoloration also is delamination, not solder mask<BR>
related.<BR>
<BR>
Someone else take shots at this and Vinit's supplier. This shop shoundn't<BR>
exist unless they just lost it all on his boards ONE PING ONLY PLEASE.<BR>
<BR>
A pleasure to serve Vinit. Don't often get to see how bad something can be<BR>
besides a train wreck.<BR>
<BR>
MoonMan<BR>
</BLOCKQUOTE><BR>
<BR>
</FONT></HTML>
--part1_59.19574e84.29d5edec_boundary--
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Date: Fri, 29 Mar 2002 11:47:39 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Edward S. Wheeler" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Edward S. Wheeler" <[log in to unmask]>
Subject: Re: solder paste registration
X-To: tony steinke <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/html; charset="us-ascii"
<html>
We have only seen stretch on our stencils cause a problem when they are
old and very used. At this point it is best to purchase a new stencil, as
it will pay for itself with reduced defects almost immediately. It may be
worth while to see how the board is fixtured, as it can sometimes shift
during the print cycle from time to time and cause problems. <br><br>
Hope some of this is useful.<br><br>
Ed<br><br>
<br><br>
<br>
At 10:48 AM 3/29/2002 -0800, you wrote:<br>
<blockquote type=cite class=cite cite><font face="arial" size=2>Ladies
and Gentlemen,</font><br>
<br>
<font face="arial" size=2>We are having a major problem with an assembly
house with registering</font><br>
<font face="arial" size=2>the solder paste to surface mount features
prior to pick and place. They</font><br>
<font face="arial" size=2>are claiming that the boards are
growing/shrinking some 15-20 mils.</font><br>
<font face="arial" size=2>We have done extensive measuring on unpopulated
boards in-house</font><br>
<font face="arial" size=2>and cannot see more than 3-5 mils
misregistration. The panel size</font><br>
<font face="arial" size=2>is approximately 14.00 x 16.00 inches, 20-24
mil pitch, and 15 BGA's</font><br>
<font face="arial" size=2>throughout the panel. Overall thickness .080.
Is it possible that the mesh</font><br>
<font face="arial" size=2>screen that they are using can expand/contract
over time? has anyone</font><br>
<font face="arial" size=2>heard of this experienced this situation
before. Any information would be</font><br>
<font face="arial" size=2>greatly appreciated.</font><br>
<br>
<font face="arial" size=2>Thanks</font><br>
<font face="arial" size=2>Tony Steinke</font><br>
<font face="arial" size=2>AIT-Atlanta</font></blockquote><br>
</html>
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Date: Fri, 29 Mar 2002 19:01:59 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: solder paste registration
X-To: tony steinke <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Tony
You don't say what type of screen is being used. If it's a
nylon/polyester one, then I'd say you're in deep trouble. If it's a
stainless steel one, it can still stretch as the squeegee distorts it.
You really should use a stencil.
Brian
> tony steinke wrote:
>
> Ladies and Gentlemen,
>
> We are having a major problem with an assembly house with registering
> the solder paste to surface mount features prior to pick and place.
> They
> are claiming that the boards are growing/shrinking some 15-20 mils.
> We have done extensive measuring on unpopulated boards in-house
> and cannot see more than 3-5 mils misregistration. The panel size
> is approximately 14.00 x 16.00 inches, 20-24 mil pitch, and 15 BGA's
> throughout the panel. Overall thickness .080. Is it possible that the
> mesh
> screen that they are using can expand/contract over time? has anyone
> heard of this experienced this situation before. Any information would
> be
> greatly appreciated.
>
> Thanks
> Tony Steinke
> AIT-Atlanta
---------------------------------------------------------------------------------
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=========================================================================
Date: Fri, 29 Mar 2002 11:06:21 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jorge Santana <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jorge Santana <[log in to unmask]>
Subject: Underwater application
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Hi
We need found out a way to keep the board working in a underwater
environment, there is possibilities of occasional flood inside the box
enclosure and the board has to survive, the water came from rain.
Folks from automotive world " under hood applications" have this
experience since cars are subject to flood also.
What kind of material is used ? What recommended thickness ?
We are thinking about RTV Elastomeric Conformal Coating.
It is not necessary to say that the solution should be not expensive and
effective.
Thanks
Jorge Santana
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Date: Fri, 29 Mar 2002 12:15:04 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
tony steinke <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: tony steinke <[log in to unmask]>
Subject: Re: solder paste registration
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Hey Folks,
The solder paste is being applied with a stencil. Thanks for all the info.
Tony steinke
----- Original Message -----
From: Brian Ellis <[log in to unmask]>
To: TechNet E-Mail Forum. <[log in to unmask]>; tony steinke
<[log in to unmask]>
Sent: Friday, March 29, 2002 9:01 AM
Subject: Re: [TN] solder paste registration
> Tony
>
> You don't say what type of screen is being used. If it's a
> nylon/polyester one, then I'd say you're in deep trouble. If it's a
> stainless steel one, it can still stretch as the squeegee distorts it.
> You really should use a stencil.
>
> Brian
>
> > tony steinke wrote:
> >
> > Ladies and Gentlemen,
> >
> > We are having a major problem with an assembly house with registering
> > the solder paste to surface mount features prior to pick and place.
> > They
> > are claiming that the boards are growing/shrinking some 15-20 mils.
> > We have done extensive measuring on unpopulated boards in-house
> > and cannot see more than 3-5 mils misregistration. The panel size
> > is approximately 14.00 x 16.00 inches, 20-24 mil pitch, and 15 BGA's
> > throughout the panel. Overall thickness .080. Is it possible that the
> > mesh
> > screen that they are using can expand/contract over time? has anyone
> > heard of this experienced this situation before. Any information would
> > be
> > greatly appreciated.
> >
> > Thanks
> > Tony Steinke
> > AIT-Atlanta
---------------------------------------------------------------------------------
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Date: Fri, 29 Mar 2002 09:30:28 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Crepeau, Phil" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crepeau, Phil" <[log in to unmask]>
Subject: Re: Underwater application
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
hi,
i know, i know...here i go again with parylene. but it will work.
phil
-----Original Message-----
From: Jorge Santana [mailto:[log in to unmask]]
Sent: Friday, March 29, 2002 9:06 AM
To: [log in to unmask]
Subject: [TN] Underwater application
Hi
We need found out a way to keep the board working in a underwater
environment, there is possibilities of occasional flood inside the box
enclosure and the board has to survive, the water came from rain.
Folks from automotive world " under hood applications" have this
experience since cars are subject to flood also.
What kind of material is used ? What recommended thickness ?
We are thinking about RTV Elastomeric Conformal Coating.
It is not necessary to say that the solution should be not expensive and
effective.
Thanks
Jorge Santana
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Date: Fri, 29 Mar 2002 11:45:37 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: solder paste registration
X-To: [log in to unmask]
Tony,
You know the stencil is not the first concern. The board may be very
different than the foil as it too moves though the stencil is pretty set in
concrete upon receipt. Always see no green when the stencil is ready for
printing.
Earl
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Date: Fri, 29 Mar 2002 12:54:37 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: solder paste registration
MIME-Version: 1.0
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boundary="part1_141.bfb2ba6.29d6045d_boundary"
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Hi Tony!
How old is the stencil? I think for it to stretch it would have to quite old
and have been used to print thousands of boards...stainless steel (which is
the standard) doesn't stretch that much...
What it could be is that the tension of the stencil within the frame is not
what it should be, and along with high squeegee pressure, is pulling the
stencil off registration in the direction of the print stroke. I've seen that
happen even with a fairly new stencil when there has been to much squeegee
pressure set in the printer program...
I can just about bet it has something to do with either machine set-up, or a
loose stencil...and NOT the board.
-Steve Gregory-
> Ladies and Gentlemen,
>
> We are having a major problem with an assembly house with registering
> the solder paste to surface mount features prior to pick and place. They
> are claiming that the boards are growing/shrinking some 15-20 mils.
> We have done extensive measuring on unpopulated boards in-house
> and cannot see more than 3-5 mils misregistration. The panel size
> is approximately 14.00 x 16.00 inches, 20-24 mil pitch, and 15 BGA's
> throughout the panel. Overall thickness .080. Is it possible that the mesh
> screen that they are using can expand/contract over time? has anyone
> heard of this experienced this situation before. Any information would be
> greatly appreciated.
>
> Thanks
> Tony Steinke
> AIT-Atlanta
>
--part1_141.bfb2ba6.29d6045d_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><BODY BGCOLOR="#fff8e0"><FONT SIZE=2>Hi Tony!<BR>
<BR>
How old is the stencil? I think for it to stretch it would have to quite old and have been used to print thousands of boards...stainless steel (which is the standard) doesn't stretch that much...<BR>
<BR>
What it could be is that the tension of the stencil within the frame is not what it should be, and along with high squeegee pressure, is pulling the stencil off registration in the direction of the print stroke. I've seen that happen even with a fairly new stencil when there has been to much squeegee pressure set in the printer program...<BR>
<BR>
I can just about bet it has something to do with either machine set-up, or a loose stencil...and NOT the board.<BR>
<BR>
-Steve Gregory- <BR>
<BR>
<BR>
<BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Ladies and Gentlemen,</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
<BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">We are having a major problem with an assembly house with registering</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">the solder paste to surface mount features prior to pick and place. They</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">are claiming that the boards are growing/shrinking some 15-20 mils.</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">We have done extensive measuring on unpopulated boards in-house</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">and cannot see more than 3-5 mils misregistration. The panel size</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">is approximately 14.00 x 16.00 inches, 20-24 mil pitch, and 15 BGA's</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">throughout the panel. Overall thickness .080. Is it possible that the mesh</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">screen that they are using can expand/contract over time? has anyone</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">heard of this experienced this situation before. Any information would be</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">greatly appreciated.</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
<BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">Thanks</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">Tony Steinke</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">AIT-Atlanta</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</BLOCKQUOTE><BR>
</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #fff8e0" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0"><BR>
</FONT></HTML>
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Date: Fri, 29 Mar 2002 09:59:27 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Jindra, Larry" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Jindra, Larry" <[log in to unmask]>
Subject: Solder Ball Wrinkles
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
We have a lot of BGA packages from a custom package house with a "wrinkled" appearance to the ball surface, most pronounced on top of the ball, where they will interface with the PCB. These packages are prone to shorting.
Does anyone out there have an idea of what might cause that "wrinkled" appearance, and why it might make the package succeptible to shorting?
Larry Jindra
Mfg Engr Group Lead
TRW Radio Systems
[log in to unmask]
w) 858-592-3424
f) 858-592-3940
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Date: Fri, 29 Mar 2002 11:04:28 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Barry Gallegos <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Barry Gallegos <[log in to unmask]>
Subject: Re: solder paste registration
X-To: "Edward S. Wheeler" <[log in to unmask]>
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This sounds almost like the mesh that holds the
stencil in the frame is becoming weak and stretched
allowing for extensive movement of the stencil during
the printing operation. IMHO.
Barry.
-----Original Message-----
From: Edward S. Wheeler [mailto:[log in to unmask]]
Sent: Friday, March 29, 2002 9:48 AM
To: [log in to unmask]
Subject: Re: [TN] solder paste registration
We have only seen stretch on our stencils cause a problem when they are old
and very used. At this point it is best to purchase a new stencil, as it
will pay for itself with reduced defects almost immediately. It may be worth
while to see how the board is fixtured, as it can sometimes shift during the
print cycle from time to time and cause problems.
Hope some of this is useful.
Ed
At 10:48 AM 3/29/2002 -0800, you wrote:
Ladies and Gentlemen,
We are having a major problem with an assembly house with registering
the solder paste to surface mount features prior to pick and place. They
are claiming that the boards are growing/shrinking some 15-20 mils.
We have done extensive measuring on unpopulated boards in-house
and cannot see more than 3-5 mils misregistration. The panel size
is approximately 14.00 x 16.00 inches, 20-24 mil pitch, and 15 BGA's
throughout the panel. Overall thickness .080. Is it possible that the mesh
screen that they are using can expand/contract over time? has anyone
heard of this experienced this situation before. Any information would be
greatly appreciated.
Thanks
Tony Steinke
AIT-Atlanta
----------------------------------------------------------------------------
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<BODY>
<DIV><SPAN class=980580218-29032002><FONT face=Arial color=#0000ff size=2>This
sounds almost like the mesh that holds the</FONT></SPAN></DIV>
<DIV><SPAN class=980580218-29032002><FONT face=Arial color=#0000ff
size=2>stencil in the frame is becoming weak and stretched</FONT></SPAN></DIV>
<DIV><SPAN class=980580218-29032002><FONT face=Arial color=#0000ff
size=2>allowing for extensive movement of the stencil during</FONT></SPAN></DIV>
<DIV><SPAN class=980580218-29032002><FONT face=Arial color=#0000ff size=2>the
printing operation. IMHO.</FONT></SPAN></DIV>
<DIV><SPAN class=980580218-29032002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=980580218-29032002><FONT face=Arial color=#0000ff
size=2>Barry.</FONT></SPAN></DIV>
<BLOCKQUOTE>
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Edward S. Wheeler
[mailto:[log in to unmask]]<BR><B>Sent:</B> Friday, March 29, 2002 9:48
AM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> Re: [TN] solder paste
registration<BR><BR></FONT></DIV>We have only seen stretch on our stencils
cause a problem when they are old and very used. At this point it is best to
purchase a new stencil, as it will pay for itself with reduced defects almost
immediately. It may be worth while to see how the board is fixtured, as it can
sometimes shift during the print cycle from time to time and cause problems.
<BR><BR>Hope some of this is useful.<BR><BR>Ed<BR><BR><BR><BR><BR>At 10:48 AM
3/29/2002 -0800, you wrote:<BR>
<BLOCKQUOTE class=cite cite="" type="cite"><FONT face=arial size=2>Ladies
and Gentlemen,</FONT><BR> <BR><FONT face=arial size=2>We are having a
major problem with an assembly house with registering</FONT><BR><FONT
face=arial size=2>the solder paste to surface mount features prior to pick
and place. They</FONT><BR><FONT face=arial size=2>are claiming that the
boards are growing/shrinking some 15-20 mils.</FONT><BR><FONT face=arial
size=2>We have done extensive measuring on unpopulated boards
in-house</FONT><BR><FONT face=arial size=2>and cannot see more than 3-5 mils
misregistration. The panel size</FONT><BR><FONT face=arial size=2>is
approximately 14.00 x 16.00 inches, 20-24 mil pitch, and 15
BGA's</FONT><BR><FONT face=arial size=2>throughout the panel. Overall
thickness .080. Is it possible that the mesh</FONT><BR><FONT face=arial
size=2>screen that they are using can expand/contract over time? has
anyone</FONT><BR><FONT face=arial size=2>heard of this experienced this
situation before. Any information would be</FONT><BR><FONT face=arial
size=2>greatly appreciated.</FONT><BR> <BR><FONT face=arial
size=2>Thanks</FONT><BR><FONT face=arial size=2>Tony Steinke</FONT><BR><FONT
face=arial
size=2>AIT-Atlanta</FONT></BLOCKQUOTE><BR>---------------------------------------------------------------------------------
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Date: Fri, 29 Mar 2002 13:16:21 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Rudy Sedlak <[log in to unmask]>
Subject: COD/BOD
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A general inquiry.
Who/how many among our PCB Bare Board Fabricators are concerned over BOD/COD
of their waste water?
Are you doing special treatment, or making special choices in
chemistry/process, to deal with that issue?
Rudy Sedlak
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Date: Fri, 29 Mar 2002 13:22:03 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Solder Ball Wrinkles
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Hi Larry!
The "wrinkled" appearance is not all that unusual, and according to this file
below, is not a defect unless it is extreme. Go to:
http://www.cooksonsemi.com/pdfs/BGASolderBumpQual.pdf
The fact that you are experiencing a lot of shorts, IMHO points somewhere
else than wrinkled surfaces on the spheres...I would think if anything,
wrinkled surfaces of the spheres would cause voiding problems...
My 2-cents..
-Steve Gregory-
> We have a lot of BGA packages from a custom package house with a "wrinkled"
> appearance to the ball surface, most pronounced on top of the ball, where
> they will interface with the PCB. These packages are prone to shorting.
>
> Does anyone out there have an idea of what might cause that "wrinkled"
> appearance, and why it might make the package succeptible to shorting?
>
>
> Larry Jindra
> Mfg Engr Group Lead
> TRW Radio Systems
> [log in to unmask]
> w) 858-592-3424
> f) 858-592-3940
>
--part1_d0.24b669e7.29d60acb_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Larry!<BR>
<BR>
The "wrinkled" appearance is not all that unusual, and according to this file below, is not a defect unless it is extreme. Go to:<BR>
<BR>
http://www.cooksonsemi.com/pdfs/BGASolderBumpQual.pdf<BR>
<BR>
The fact that you are experiencing a lot of shorts, IMHO points somewhere else than wrinkled surfaces on the spheres...I would think if anything, wrinkled surfaces of the spheres would cause voiding problems...<BR>
<BR>
My 2-cents..<BR>
<BR>
-Steve Gregory-<BR>
<BR>
<BR>
<BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">We have a lot of BGA packages from a custom package house with a "wrinkled" appearance to the ball surface, most pronounced on top of the ball, where they will interface with the PCB. These packages are prone to shorting.<BR>
<BR>
Does anyone out there have an idea of what might cause that "wrinkled" appearance, and why it might make the package succeptible to shorting?<BR>
<BR>
<BR>
Larry Jindra<BR>
Mfg Engr Group Lead<BR>
TRW Radio Systems<BR>
[log in to unmask]<BR>
w) 858-592-3424<BR>
f) 858-592-3940<BR>
</BLOCKQUOTE><BR>
<BR>
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Date: Fri, 29 Mar 2002 13:37:06 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Edward S. Wheeler" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Edward S. Wheeler" <[log in to unmask]>
Subject: Re: Solder Ball Wrinkles
X-To: "Jindra, Larry" <[log in to unmask]>
In-Reply-To: <[log in to unmask] >
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; format=flowed
We have noticed that on BGA devices that undergo warp during the reflow
cycle (shadow moire results showed the parts would warp up at the ends,
then down, then up) can cause this if the joint is moving during the
transition back to solid. The joint looks similar to wrinkled tin foil.
When we have parts that don't warp with all of the same parameters, the
joint is smooth and shiny.
Our main failure with these warping parts has been a head in pillow open.
Ed
At 09:59 AM 3/29/2002 -0800, you wrote:
>We have a lot of BGA packages from a custom package house with a
>"wrinkled" appearance to the ball surface, most pronounced on top of the
>ball, where they will interface with the PCB. These packages are prone to
>shorting.
>
>Does anyone out there have an idea of what might cause that "wrinkled"
>appearance, and why it might make the package succeptible to shorting?
>
>
>Larry Jindra
>Mfg Engr Group Lead
>TRW Radio Systems
>[log in to unmask]
>w) 858-592-3424
>f) 858-592-3940
>
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Date: Fri, 29 Mar 2002 19:53:48 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"D.Terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "D.Terstegge" <[log in to unmask]>
Subject: Re: solder paste registration
X-To: tony steinke <[log in to unmask]>
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Perhaps the assembler is using only 2 fiducials on their printer ? Then =
the deviation can be partly due to the board, with the remainder =
resulting from the fact that a 2 fiducial cannot compensate for rotation =
in the machine.=20
Daan Terstegge
http://www.smtinfo.net
=20
----- Original Message -----=20
From: tony steinke=20
To: [log in to unmask]
Sent: Friday, March 29, 2002 9:15 PM
Subject: Re: [TN] solder paste registration
Hey Folks,
The solder paste is being applied with a stencil. Thanks for all the =
info.
Tony steinke
----- Original Message -----
From: Brian Ellis <[log in to unmask]>
To: TechNet E-Mail Forum. <[log in to unmask]>; tony steinke
<[log in to unmask]>
Sent: Friday, March 29, 2002 9:01 AM
Subject: Re: [TN] solder paste registration
> Tony
>
> You don't say what type of screen is being used. If it's a
> nylon/polyester one, then I'd say you're in deep trouble. If it's a
> stainless steel one, it can still stretch as the squeegee distorts =
it.
> You really should use a stencil.
>
> Brian
>
> > tony steinke wrote:
> >
> > Ladies and Gentlemen,
> >
> > We are having a major problem with an assembly house with =
registering
> > the solder paste to surface mount features prior to pick and =
place.
> > They
> > are claiming that the boards are growing/shrinking some 15-20 =
mils.
> > We have done extensive measuring on unpopulated boards in-house
> > and cannot see more than 3-5 mils misregistration. The panel size
> > is approximately 14.00 x 16.00 inches, 20-24 mil pitch, and 15 =
BGA's
> > throughout the panel. Overall thickness .080. Is it possible that =
the
> > mesh
> > screen that they are using can expand/contract over time? has =
anyone
> > heard of this experienced this situation before. Any information =
would
> > be
> > greatly appreciated.
> >
> > Thanks
> > Tony Steinke
> > AIT-Atlanta
=
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<BODY bgColor=3D#ffffff>
<DIV>Perhaps the assembler is using only 2 fiducials on their printer =
? =20
Then the deviation can be partly due to the board, with the remainder =
resulting=20
from the fact that a 2 fiducial cannot compensate for rotation in the=20
machine. </DIV>
<DIV> </DIV>
<DIV>Daan Terstegge</DIV>
<DIV><A href=3D"http://www.smtinfo.net">http://www.smtinfo.net</A></DIV>
<DIV> </DIV>
<BLOCKQUOTE=20
style=3D"PADDING-RIGHT: 0px; PADDING-LEFT: 5px; MARGIN-LEFT: 5px; =
BORDER-LEFT: #000000 2px solid; MARGIN-RIGHT: 0px">
<DIV style=3D"FONT: 10pt arial">----- Original Message ----- </DIV>
<DIV=20
style=3D"BACKGROUND: #e4e4e4; FONT: 10pt arial; font-color: =
black"><B>From:</B>=20
<A [log in to unmask] =
href=3D"mailto:[log in to unmask]">tony=20
steinke</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>To:</B> <A [log in to unmask]
href=3D"mailto:[log in to unmask]">[log in to unmask]</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>Sent:</B> Friday, March 29, 2002 =
9:15=20
PM</DIV>
<DIV style=3D"FONT: 10pt arial"><B>Subject:</B> Re: [TN] solder paste=20
registration</DIV>
<DIV><BR></DIV>Hey Folks,<BR>The solder paste is being applied with a =
stencil.=20
Thanks for all the info.<BR>Tony steinke<BR>----- Original Message=20
-----<BR>From: Brian Ellis <<A=20
=
href=3D"mailto:[log in to unmask]">[log in to unmask]</A>><BR>=
To:=20
TechNet E-Mail Forum. <<A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A>>; tony =
steinke<BR><<A=20
=
href=3D"mailto:[log in to unmask]">[log in to unmask]</A>>=
<BR>Sent:=20
Friday, March 29, 2002 9:01 AM<BR>Subject: Re: [TN] solder paste=20
registration<BR><BR><BR>> Tony<BR>><BR>> You don't say what =
type of=20
screen is being used. If it's a<BR>> nylon/polyester one, then I'd =
say=20
you're in deep trouble. If it's a<BR>> stainless steel one, it can =
still=20
stretch as the squeegee distorts it.<BR>> You really should use a=20
stencil.<BR>><BR>> Brian<BR>><BR>> > tony steinke=20
wrote:<BR>> ><BR>> > Ladies and Gentlemen,<BR>> =
><BR>>=20
> We are having a major problem with an assembly house with=20
registering<BR>> > the solder paste to surface mount features =
prior to=20
pick and place.<BR>> > They<BR>> > are claiming that the =
boards=20
are growing/shrinking some 15-20 mils.<BR>> > We have done =
extensive=20
measuring on unpopulated boards in-house<BR>> > and cannot see =
more than=20
3-5 mils misregistration. The panel size<BR>> > is approximately =
14.00 x=20
16.00 inches, 20-24 mil pitch, and 15 BGA's<BR>> > throughout =
the panel.=20
Overall thickness .080. Is it possible that the<BR>> > =
mesh<BR>> >=20
screen that they are using can expand/contract over time? has =
anyone<BR>>=20
> heard of this experienced this situation before. Any information=20
would<BR>> > be<BR>> > greatly appreciated.<BR>> =
><BR>>=20
> Thanks<BR>> > Tony Steinke<BR>> >=20
=
AIT-Atlanta<BR><BR>------------------------------------------------------=
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Mail List provided as a free service by IPC using LISTSERV 1.8d<BR>To=20
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Date: Fri, 29 Mar 2002 13:22:56 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: solder paste registration
X-To: [log in to unmask]
Ah ha ha ha,
Steve,
Agree it's most likely to do with the stencil and its surrounding retainer
or age of both. However, I've seen many times it WAS the board.
Earl Moon
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Date: Fri, 29 Mar 2002 13:41:24 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: solder paste registration
X-To: [log in to unmask]
Tony,
This is a subject always needing attention, in my not so humble opinion but
objective study and observation. As Daan said, fids can be off. This also
means other pads can be off on boards especially multiple ups. The Gerber is
one thing to a board going through all "normal" process and quite another to
stencils with very high dimensional stability.
Anyway, matching the stencil to the board pads/fids is easily done on the
printer. Also, printing a miylar over the panels before committing to
production works as well - ESD safe material of course.
Love those DEKS as you can press F2, I think, and have the rising table rise
so solder paste can be applied. At this time you can observe stencil to pad
registration so you only see metal instead of green as the board.
Hell, you folks all know this,
MoonMan
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Date: Fri, 29 Mar 2002 13:55:59 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jorge Santana <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jorge Santana <[log in to unmask]>
Subject: Re: solder paste registration
X-To: tony steinke <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
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Tony
This is easy to see in the screen printer machine, just load the board and
do the align without printing ( most of screen printers has this
capabilities ) , go into the machine and see if all stencil apertures are
aligned with the board pads, from there you have the final conclusion ...
Jorge Santana
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of tony steinke
Sent: Friday, March 29, 2002 12:49 PM
To: [log in to unmask]
Subject: [TN] solder paste registration
Ladies and Gentlemen,
We are having a major problem with an assembly house with registering
the solder paste to surface mount features prior to pick and place. They
are claiming that the boards are growing/shrinking some 15-20 mils.
We have done extensive measuring on unpopulated boards in-house
and cannot see more than 3-5 mils misregistration. The panel size
is approximately 14.00 x 16.00 inches, 20-24 mil pitch, and 15 BGA's
throughout the panel. Overall thickness .080. Is it possible that the mesh
screen that they are using can expand/contract over time? has anyone
heard of this experienced this situation before. Any information would be
greatly appreciated.
Thanks
Tony Steinke
AIT-Atlanta
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<BODY bgColor=3D#fff8e0>
<DIV><SPAN class=3D610225119-29032002><FONT face=3DArial color=3D#0000ff =
size=3D2> Tony</FONT></SPAN></DIV>
<DIV><SPAN class=3D610225119-29032002><FONT face=3DArial color=3D#0000ff =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D610225119-29032002><FONT face=3DArial color=3D#0000ff =
size=3D2> =20
This is easy to see in the screen printer machine, just load the board=20
and do the align without printing ( most of screen printers has =
this=20
capabilities ) , go into the machine and see if all stencil apertures =
are=20
aligned with the board pads, from there you have the final conclusion=20
...</FONT></SPAN></DIV>
<DIV><SPAN class=3D610225119-29032002><FONT face=3DArial color=3D#0000ff =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D610225119-29032002><FONT face=3DArial color=3D#0000ff =
size=3D2>Jorge=20
Santana</FONT></SPAN></DIV>
<DIV><SPAN class=3D610225119-29032002><FONT face=3DArial color=3D#0000ff =
size=3D2></FONT></SPAN> </DIV>
<BLOCKQUOTE dir=3Dltr style=3D"MARGIN-RIGHT: 0px">
<DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of </B>tony =
steinke<BR><B>Sent:</B>=20
Friday, March 29, 2002 12:49 PM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> [TN] solder paste=20
registration<BR><BR></FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Ladies and Gentlemen,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>We are having a major problem with an =
assembly=20
house with registering</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>the solder paste to surface mount =
features prior=20
to pick and place. They</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>are claiming that the boards are=20
growing/shrinking some 15-20 mils.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>We have done extensive measuring on =
unpopulated=20
boards in-house</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>and cannot see more than 3-5 mils=20
misregistration. The panel size</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>is approximately 14.00 x 16.00 =
inches, 20-24 mil=20
pitch, and 15 BGA's</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>throughout the panel. Overall =
thickness .080. Is=20
it possible that the mesh</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>screen that they are using can =
expand/contract=20
over time? has anyone</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>heard of this experienced this =
situation before.=20
Any information would be</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>greatly appreciated.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Thanks</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Tony Steinke</FONT></DIV>
<DIV><FONT face=3DArial =
size=3D2>AIT-Atlanta</FONT></DIV></BLOCKQUOTE></BODY></HTML>
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Date: Fri, 29 Mar 2002 15:31:09 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Underwater application
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I would recommend an acrylic as my first choice, probably coated twice.
Jon Moore
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Date: Fri, 29 Mar 2002 15:31:55 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Underwater application
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In a message dated 3/29/2002 12:35:04 PM US Eastern Standard Time,
[log in to unmask] writes:
<< i know, i know...here i go again with parylene. but it will work. >>
I agree Phil, but he did say cost was a factor.
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Date: Fri, 29 Mar 2002 15:49:02 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Afri Singh <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Afri Singh <[log in to unmask]>
Subject: Re: Tiny black spots on copper foil surface
MIME-Version: 1.0
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how about some dust or carbon from the scrubber -- drier section
Do you have filters on your drier ?
or pieces of rubber from the rollers breaking off
-----Original Message-----
From: Hinners Hans M Civ WRALC/LUGE [mailto:[log in to unmask]]
Sent: Friday, March 22, 2002 9:54 AM
To: [log in to unmask]
Subject: Re: [TN] Tiny black spots on copper foil surface
Or somebody sneezed.
You might try to recreate the spots by flicking some water on the panel.
It could also be algae growing in the tanks.
When I hear black spots on copper I think tarnish.
Hans
-----Original Message-----
From: JaMi Smith [mailto:[log in to unmask]]
Sent: Thursday, March 21, 2002 2:57 PM
To: [log in to unmask]
Subject: Re: [TN] Tiny black spots on copper foil surface
Shirley,
Sounds like it might be very very small pin holes in your resist that is
letting in a microscopic amount of etchant.
JaMi Smith
-----Original Message-----
From: Shirley Xiao [mailto:[log in to unmask]]
Sent: Wednesday, March 20, 2002 11:14 PM
To: [log in to unmask]
Subject: [TN] Tiny black spots on copper foil surface
Dear All:
We encountered a problem after develop, etch & strip.
Lots of tiny black spots were found on copper surface.
We are sure that these tiny black spots are not
oxidization.They can not be removed by acetone but is
removable by micro etch.Before get result by EDX
element analysis, I wish anyone have similar
experience can share some information with me.
__________________________________________________
Do You Yahoo!?
Yahoo! Movies - coverage of the 74th Academy Awards(r)
http://movies.yahoo.com/
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Date: Fri, 29 Mar 2002 16:13:06 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: Solder Ball Wrinkles
X-To: "Jindra, Larry" <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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As I read your message, we are not talking about BGAs that were mounted on
boards. These are the packages before they were installed? It this true?
Yes, I would be worried. Sound like something was wrong in the solder ball
attach process. I am not very familiar with commercial methods. Reballing
processes that produce wrinkled balls can be caused by excessive heat and
excessive convection.
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Jindra, Larry
> Sent: Friday, March 29, 2002 12:59 PM
> To: [log in to unmask]
> Subject: [TN] Solder Ball Wrinkles
>
>
> We have a lot of BGA packages from a custom package house with a
> "wrinkled" appearance to the ball surface, most pronounced on top
> of the ball, where they will interface with the PCB. These
> packages are prone to shorting.
>
> Does anyone out there have an idea of what might cause that
> "wrinkled" appearance, and why it might make the package
> succeptible to shorting?
>
>
> Larry Jindra
> Mfg Engr Group Lead
> TRW Radio Systems
> [log in to unmask]
> w) 858-592-3424
> f) 858-592-3940
>
> ------------------------------------------------------------------
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Date: Fri, 29 Mar 2002 16:35:47 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Chris Almeras <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Chris Almeras <[log in to unmask]>
Subject: Re: Underwater application
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Is there any other environmental issues this assembly faces besides the =
moisture?(I.E. temperature,vibration, etc....) If there are no other =
concerns, I would consider an acrylic, possibly Humiseal 1B73 or 1B31. =
We do have an assembly that is encapsulated with Shin-Etsu KE109E. The =
customer puts it through a test where it has to work while submerged for =
a certain amount of time during heavy vibration. It is not a real =
expensive option, but it is not as cheap as the acrylic option.
Chris Almeras
-----Original Message-----
From: Jorge Santana [mailto:[log in to unmask]]
Sent: Friday, March 29, 2002 12:06 PM
To: [log in to unmask]
Subject: [TN] Underwater application
Hi
We need found out a way to keep the board working in a underwater
environment, there is possibilities of occasional flood inside the box
enclosure and the board has to survive, the water came from rain.
Folks from automotive world " under hood applications" have this
experience since cars are subject to flood also.
What kind of material is used ? What recommended thickness ?
We are thinking about RTV Elastomeric Conformal Coating.
It is not necessary to say that the solution should be not expensive =
and
effective.
Thanks
Jorge Santana
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Date: Fri, 29 Mar 2002 14:19:24 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Jindra, Larry" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Jindra, Larry" <[log in to unmask]>
Subject: Re: Solder Ball Wrinkles
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
True, I was talking about appearance of the BGAs prior to mounting.
We just did a blind installation test with the same packages from an earlier lot that did not exhibit "wrinkles." The result show a significantly greater voiding joints from the "wrinkled" BGAs, given the same paste, place and reflow processing parameters. Given that the same things that cause voiding can cause shorting, we have a process problem that appears to be caused by a supplier process.
The packaging vendor claims the bad balls saw a normal process. I need to tell them we suspect they are .....
Larry Jindra
Mfg Engr Group Lead
TRW Radio Systems
[log in to unmask]
w) 858-592-3424
f) 858-592-3940
-----Original Message-----
From: Guy Ramsey [mailto:[log in to unmask]]
Sent: Friday, March 29, 2002 1:13 PM
To: TechNet E-Mail Forum.; Jindra, Larry
Subject: RE: [TN] Solder Ball Wrinkles
As I read your message, we are not talking about BGAs that were mounted on
boards. These are the packages before they were installed? It this true?
Yes, I would be worried. Sound like something was wrong in the solder ball
attach process. I am not very familiar with commercial methods. Reballing
processes that produce wrinkled balls can be caused by excessive heat and
excessive convection.
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Jindra, Larry
> Sent: Friday, March 29, 2002 12:59 PM
> To: [log in to unmask]
> Subject: [TN] Solder Ball Wrinkles
>
>
> We have a lot of BGA packages from a custom package house with a
> "wrinkled" appearance to the ball surface, most pronounced on top
> of the ball, where they will interface with the PCB. These
> packages are prone to shorting.
>
> Does anyone out there have an idea of what might cause that
> "wrinkled" appearance, and why it might make the package
> succeptible to shorting?
>
>
> Larry Jindra
> Mfg Engr Group Lead
> TRW Radio Systems
> [log in to unmask]
> w) 858-592-3424
> f) 858-592-3940
>
> ------------------------------------------------------------------
> ---------------
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> 847-509-9700 ext.5315
> ------------------------------------------------------------------
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>
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=========================================================================
Date: Fri, 29 Mar 2002 17:11:29 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: solder paste registration
X-To: [log in to unmask]
Right on Right on and as a plus, print a mylar on top of the pads and
determine if acceptable. What is it? - 25% misaligned for fine pitch and 35
for all else? Who has this answer? IPC? But it works well for most with a
little fudge factor but not without verification before commiting to
production of any amount.
MoonMan
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Date: Fri, 29 Mar 2002 15:26:11 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
JaMi Smith <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: JaMi Smith <[log in to unmask]>
Subject: Re: Blistering in PCBs - A possible answer
X-cc: [log in to unmask]
MIME-Version: 1.0
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Vinit and the group -
=20
I have seen this before -
=20
Apologies up front for the long post -
=20
I am assuming that we are talking about the last four photos at the
webpage stevezeva.homestead.com, which are labeled Bad Board, Bad Board
2, Bad Board 3, and Bad Board 4.
=20
If so then here is my take as relates to the "raised vias" shown in Bad
Board 2 and Bad Board 4, and this may be the key to understanding the
related problems.
=20
About 12 to 13 years ago, I came on board at Datatape., in Pasadena
California, as a Sr. Designer. Although my work background had been
primarily as a PCB Designer working my way up to become a Sr. Design
Engineer for TRW, at Datatape, I was hired into the Electrical
Engineering Department as a troubleshooter primarily because while not
degreed, I have a broad background in Electronics, and hence because of
by cross disciplines I could communicate not only to Engineering, but
also to folks in Design and Drafting , as well as those in
Manufacturing.
=20
My first crisis was an overdue Military Contract VME Style Backplane for
16 Cards with 3 96 Pin Connectors each, that was 11 layers at .238"
thick due to impedance requirements for ECL Logic.
=20
Yes, you read correctly, almost =BC inch.
=20
Well the first batch from the first PCB supplier in Monrovia California,
ended up with massive shorts of almost all of the holes, to almost all
of the supply lines and ground. To make a long story short, this was due
to the fab house using the same feeds and speeds and drill changes on
that board as they would have on a 1/8 inch thick board, which, needless
to say dulled the drills immediately and ended up snagging most if not
all of the internal pads and ripping them out, which in turn caused all
of the material in each hole to be ripped out also, leaving all (or
most) of the holes with a clean entry and exit (due to aluminum backing
sheets), but a large caveran inside each hole which exposed all of the
edges of the clearance holes in the 5 power and ground planes, and
plated everything into one massive short.
=20
Well I finally convinced the fab shop as to exactly what they had done
wrong and then had to convince them that they really could make the
boards properly after all, and I had them contact their Excellon Rep
(for help with drilling feeds and speeds and drill life for a =BC inch
board), and made some minor adjustments to hole sizes and allowed them
to remove unused pads from the internal layers. Then I just sat back and
waited for the next turn of the board. I new that we had failed when the
shop foreman failed to call me back after an ohmmeter check after final
etch, and when I called them I was told he had gone down the street
cursing and screaming to a local bar. This time the holes were
beautiful, but the layer to layer registration was off since they didn't
use pins and just threw the whole large stack up into the laminating
press with only a few "hot glue" spot bonds to hold everything together.
That's like an In 'n Out Double Double Hambuger with extra mayo, extra
cheese, extra tomato, and extra onions, when you try to mash it down to
get in into the wrapper, everything shifts!
=20
This left me to find someone who could make the boards properly and
quickly. I went to 2 different shops with the same order, one shop in
Huntington Beach California for 3 boards 1 week @ $13K each, and the
other shop in Florida for 3 boards 1 week @ $1K each. Major difference
in price, but Florida was a backup anyway, which I had located after we
contracted with the other guy, and we needed the boards done right three
weeks ago by then, so that was a small price for insurance.
=20
The supplier in Huntington Beach, who used an autoclave, delivered
perfect boards on time and went out and bought a new car off of that job
(or so he told me). However the supplier in Florida delivered 3 boards
that had all of the holes (small holes) and vias in the board raised and
looking exactly like the photos on the website, labeled "raised vias".
=20
This is what I found:
=20
The first thing that I noticed was that a surprising number of the holes
had some peculiar "black flakes" in them which you could see when
looking into the hole with a lupe. While I did not have any fancy "bore
scope" or other tool other than a lupe, to examine the hole with, I came
to the conclusion that these "flakes" were actually protruding from (or
stuck into) the wall of the PTH. It almost looked like there was a 2 mil
thick layer of graphite or carbon that was in the middle of the board
that hat chipped in some holes and left a flake protruding from the PTH
wall.
=20
My initial conclusion was that the boards were bad and I wanted to
reject them, but I had to either find a reason to reject them or eat the
$3K, which by then was a small piece of change anyway.
=20
I used an ohmmeter to check a few of the worst looking holes, but they
showed continuity. Nonetheless, I knew they were bad. I called the
Company who had done the Mil Continuity Certification, which was
different than the supplier, and he assured me that the boards were
checked and all passed, but that no, he did not remember any "raised
vias" as I had described them to him.
=20
That description, by the way was essentially this: When you held the
board up to a light source so that you could see the light reflected off
of the surface of the board, you could see that board surface
surrounding virtually each and every via was raised above the normal
flat surface of the board, and that the groups of 96 holes at each
connector location were also raised. It looked like a little island
sticking up out of a calm sea, and while I never measured the height of
the rise, it was visually very noticeable, similar to those shown in
photo Bare Board 2.
=20
Well, I didn't know what to do to prove that the boards were bad, since
I didn't want to pay for them I couldn't very well section one of the
boards and then try to send it back, and the test coupons had not been
properly masked so the top and bottom layers as well as all plating from
the holes had been etched away, and then they were separated from the
boards and so they did not exhibit any of the problems.
=20
I finally got some aluminum foil, Reynolds Wrap if I remember, and made
a large pad that I could hook to one of the test leads of the ohmmeter,
and use as a massive "contact" to contact all of the bottom pads on the
board in an area that I wanted to check. I then set about checking the
continuity of each and every hole of each connector (over 4600 holes),
as well as all of the vias (several hundred additional holes as vias). I
checked for continuity from the pad (annular ring) on the top side of
the hole to the pad on the bottom side of the hole, of each and every
hole. I wasn't doing a net list check, all I was doing was checking each
hole for top to bottom continuity.
=20
I was about to give up when I found my first hole with an "open", and
when I checked the hole with the lupe, I expected to see flakes, but saw
instead a beautiful hole, and couldn't even tell visually that there was
a break in the wall since it looked so smooth.
=20
I ultimately found that that board had a total of 8 holes that exhibited
an open from top to bottom. 4 of the holes were unused electrically
speaking, but the remaining 4 were active holes that were supposed to go
to other places, of which all were connected to the proper place by at
least one of the pads (either top or bottom (but not both)), but at
least one of the holes did occur in the middle of a net connection which
did in fact cause the net to be broken in the middle. This was enough to
reject the board for failure to exhibit the same continuity as the other
2 boards that it was checked against for the Mil Certification.
=20
I started asking questions of the Florida supplier and I finally came up
with what I believed to be the answer, and when I explained it to the
guys in Florida, they concurred with my evaluation, and although they
said they themselves would section the boards, they never got back to me
with any contradictory findings.
=20
The supplier in Florida took every precaution and was very careful every
step of the way, and in fact had produced perfect boards (with the
exception of the Test Coupons), right up to the very last step, which
was the only uncontrolled step in their entire process.
=20
After they had gone down the street to get the boards Mil Certified for
Continuity at another vendor, they gave them to their "touch up girl" to
do a very small amount of touch up of scratches and voids in the solder
mask before shipping. When she was finished with her touch up, she put
the boards into her uncontrolled oven which she only used to cure the
"touch up jobs".
=20
Well, my take on it was that the oven was hotter than it should have
been, and that the boards expanded very rapidly, and also expanded by a
large amount, such that every single small hole in the board had its
plated thru wall stretched so far that many of the walls actually broke
apart, some with a clean break, and some with a jagged break, and some,
probably most, just stretched.
=20
Next in the process, the boards were taken out of the oven and simply
allowed to cool by themselves in a rack. This is when the stretched and
broken hole and via walls now stood up in protest, and simply would not
return to their original dimensions. I believe that a major part of this
was due to the fact that when the holes with jagged breaks in their
walls tried to contract, the 2 halves of the barrel just mashed into
each other, which, among other things produced the little "black flakes"
that I saw in many of the holes, which were actually broken pieces of
the plated wall of the hole. The reason that most of them looked "black"
is that I was seeing the outer side of the hole wall.=20
=20
As it turned out, the 8 discontinuities that I found in the one board
that I tested, all exhibited exceptionally clean walls in the hole, and
I concluded that these 8 holes broke so cleanly that when the board
material in adjacent holes around them failed to return to the original
dimension, these 8 hole walls simply did not re-engage their
counterparts, and hence showed up as an open to the ohmmeter.
=20
While I am sure that there are some additional factors which lead to
this catastrophic damage to the board besides the massive thermal shock
and massive expansion of the board, I could only put my finger on one in
particular that I believe contributed to the problem. I believe that a
primary contributor was the "reduced reproducibility" ratio of the .238"
board thickness to the .039" dia hole used for the connectors, which I
am sure produced a very thin wall (barrel) in the middle of the hole,
and while I know that 039" is not a very small hole, it is comparable to
a .010" hole in a .060 board of today.
=20
I believe that my experience as described above will account for the
"raised vias" in the pictures on the website, which I believe were
caused by thermal expansion of the PC Board at some point in the final
manufacturing process, where the holes and vias were "stretched" so far
out of shape (dimensionally) that they refused to return to their
original "pre-expansion dimension".
=20
I would stress that I do not believe that the hole walls would have to
be stretched to the point of breakage as did happen in the case I
described above, so there may be no evidence of the "flakes" that I saw
in the holes of the above example. I believe that the holes could
stretch without breaking, especially if there was thicker plating than
experienced in my example above, and still refuse to return to their
original dimension, and therefore leave an otherwise perfect looking
wall behind with no signs of the thermal expansion other than being
raised.
=20
The one thing that I saw as a big problem in the whole episode as
described above that has scared the heck out of me ever since, and which
is why I will not allow a test coupon to be separated prior to delivery
of the board to me, is the fact that most of this type of damage occurs
to the board after all of its primary inspection, you know, the
continuity check, the QA inspection, and the visual inspection, since
touch up is usually the last thing that happens before it gets sent out
the door, and usually it is not even looked at by the person who did the
touch up once the board dried, which explains how an otherwise good
supplier can ship such a #4(&!\%* product. (pardon my ascii).
=20
I am very confident that this explains the "raised vias", and I am sure
that when this scenario is taken into account, it will go a long way
towards explaining the remaining problems with the boards.
=20
JaMi Smith
Optical Crossing Inc.
=20
=20
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]=20
Sent: Friday, March 29, 2002 8:19 AM
To: [log in to unmask]
Subject: Re: [TN] Blistering in PCBs
=20
Don and Everybody!
The pic's are now up! Go to: http://www.stevezeva.homestead.com
I gotta say, those are some UGLY boards!
-Steve Gregory-
Hey Earl
Where can I see these photos? Don't see them on Steve's site.
Don Vischulis
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Earl Moon
Sent: Friday, March 29, 2002 6:49 AM
To: [log in to unmask]
Subject: Re: [TN] Blistering in PCBs
Vinit,
Ok, here we go. Never seen nothin' like these before. Oh well, maybe
once
when I was a "young gun" process engineer at Xerox. That's another story
I'll not bore anyone with now.
Concerning the pics, it is obvious there is delam everywhere but maybe
the
edges. Vinitdelam3's discoloration also is delamination, not solder mask
related.
Someone else take shots at this and Vinit's supplier. This shop
shoundn't
exist unless they just lost it all on his boards ONE PING ONLY PLEASE.
A pleasure to serve Vinit. Don't often get to see how bad something can
be
besides a train wreck.
MoonMan
=20
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Date: Fri, 29 Mar 2002 17:36:17 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: Underwater application
X-To: Chris Almeras <[log in to unmask]>
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Cris,
NO to 1B31!! The Tg is about 15 degrees C and it is easily softened by hydrocarbons.
IB73 is some what better with a Tg around 43 degrees C but it will not with stand exposure to hydrocarbons.
The unit will be exposed "external" environmental conditions besides "dirty" water. The build up of these
contaminants will pose serious issues when combined with moisture.
Either you use Parylene or "seal" the product. Anything else will result in shortened product life.
The question is how long is the warranty period for this product???
David A. Douthit
Manager
LoCan LLC
Chris Almeras wrote:
> Is there any other environmental issues this assembly faces besides the moisture?(I.E. temperature,vibration, etc....) If there are no other concerns, I would consider an acrylic, possibly Humiseal 1B73 or 1B31. We do have an assembly that is encapsulated with Shin-Etsu KE109E. The customer puts it through a test where it has to work while submerged for a certain amount of time during heavy vibration. It is not a real expensive option, but it is not as cheap as the acrylic option.
>
> Chris Almeras
>
> -----Original Message-----
> From: Jorge Santana [mailto:[log in to unmask]]
> Sent: Friday, March 29, 2002 12:06 PM
> To: [log in to unmask]
> Subject: [TN] Underwater application
>
> Hi
>
> We need found out a way to keep the board working in a underwater
> environment, there is possibilities of occasional flood inside the box
> enclosure and the board has to survive, the water came from rain.
> Folks from automotive world " under hood applications" have this
> experience since cars are subject to flood also.
>
> What kind of material is used ? What recommended thickness ?
>
> We are thinking about RTV Elastomeric Conformal Coating.
> It is not necessary to say that the solution should be not expensive and
> effective.
>
> Thanks
> Jorge Santana
>
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Date: Fri, 29 Mar 2002 17:38:45 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: Underwater application
X-To: [log in to unmask]
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Jon,
Don't fall into the 'trying to save money no matter how much it costs' trap.
David a. Douthit
Manager
LoCan LLC
[log in to unmask] wrote:
> In a message dated 3/29/2002 12:35:04 PM US Eastern Standard Time,
> [log in to unmask] writes:
>
> << i know, i know...here i go again with parylene. but it will work. >>
>
> I agree Phil, but he did say cost was a factor.
>
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Date: Sat, 30 Mar 2002 00:38:16 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Naisbitt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Naisbitt <[log in to unmask]>
Subject: Re: Underwater application
X-To: Jorge Santana <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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Jorge
To my knowledge there is nothing that will do this job long-term.
You can try Paralene - Silicone - Acrylics - Urethanes etc., but underwater?
Not in my experience.
Occasional flood? What about the connector and other uncoated items? And
what quality the rain water - acid rain?
Better to have a drain hole in the box to let it out, then you can probably
successfully use any of the above as you prefer - but keeping in mind the
pro's and con's of each.
Regards Graham Naisbitt
[log in to unmask] <mailto:[log in to unmask]>
Concoat Limited
Alasan House, Albany Park
Camberley GU16 7PH - UK
www.concoat.co.uk <http://www.concoat.co.uk>
Phone: +44 1276 691100
Fax: +44 1276 691227
Mobile: +44 79 6858 2121
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Jorge Santana
> Sent: 29 March 2002 17:06
> To: [log in to unmask]
> Subject: [TN] Underwater application
>
>
> Hi
>
> We need found out a way to keep the board working in a underwater
> environment, there is possibilities of occasional flood inside the box
> enclosure and the board has to survive, the water came from rain.
> Folks from automotive world " under hood applications" have this
> experience since cars are subject to flood also.
>
> What kind of material is used ? What recommended thickness ?
>
> We are thinking about RTV Elastomeric Conformal Coating.
> It is not necessary to say that the solution should be not
> expensive and
> effective.
>
> Thanks
> Jorge Santana
>
> ------------------------------------------------------------------
> ---------------
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> 847-509-9700 ext.5315
> ------------------------------------------------------------------
> ---------------
>
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Date: Sat, 30 Mar 2002 10:07:31 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
don_well <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: don_well <[log in to unmask]>
Subject: Re: Measuring "No Clean" process quality
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Date: Sat, 30 Mar 2002 10:23:20 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
don_well <[log in to unmask]>
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From: don_well <[log in to unmask]>
Subject: BGA Inspection instrument
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Date: Sat, 30 Mar 2002 11:00:00 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
tony steinke <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: tony steinke <[log in to unmask]>
Subject: Re: solder paste registration
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To all,
Thanks everyone for the excellent responses pertaining to the solder =
paste
registration. The company had the stencil sent out for evaluation, and =
it
was discovered that it was in fact out by as much as .010 in the X =
axis(long direction). We have approximately 20-25 "local" fiducials on =
the board itself.
Anyway, I am off to Minot, ND Monday morning for a follow up. The high =
temp
there for Monday is a blistering 21 degrees. And to think I just put =
planted tomatoes
in Atlanta. Also I will be sure to show the engineers the Technet =
website.
Thanks again,
Tony Steinke
----- Original Message -----=20
From: D.Terstegge=20
To: TechNet E-Mail Forum. ; tony steinke=20
Sent: Friday, March 29, 2002 10:53 AM
Subject: Re: Re: [TN] solder paste registration
Perhaps the assembler is using only 2 fiducials on their printer ? =
Then the deviation can be partly due to the board, with the remainder =
resulting from the fact that a 2 fiducial cannot compensate for rotation =
in the machine.=20
Daan Terstegge
http://www.smtinfo.net
----- Original Message -----=20
From: tony steinke=20
To: [log in to unmask]
Sent: Friday, March 29, 2002 9:15 PM
Subject: Re: [TN] solder paste registration
Hey Folks,
The solder paste is being applied with a stencil. Thanks for all the =
info.
Tony steinke
----- Original Message -----
From: Brian Ellis <[log in to unmask]>
To: TechNet E-Mail Forum. <[log in to unmask]>; tony steinke
<[log in to unmask]>
Sent: Friday, March 29, 2002 9:01 AM
Subject: Re: [TN] solder paste registration
> Tony
>
> You don't say what type of screen is being used. If it's a
> nylon/polyester one, then I'd say you're in deep trouble. If it's =
a
> stainless steel one, it can still stretch as the squeegee distorts =
it.
> You really should use a stencil.
>
> Brian
>
> > tony steinke wrote:
> >
> > Ladies and Gentlemen,
> >
> > We are having a major problem with an assembly house with =
registering
> > the solder paste to surface mount features prior to pick and =
place.
> > They
> > are claiming that the boards are growing/shrinking some 15-20 =
mils.
> > We have done extensive measuring on unpopulated boards in-house
> > and cannot see more than 3-5 mils misregistration. The panel =
size
> > is approximately 14.00 x 16.00 inches, 20-24 mil pitch, and 15 =
BGA's
> > throughout the panel. Overall thickness .080. Is it possible =
that the
> > mesh
> > screen that they are using can expand/contract over time? has =
anyone
> > heard of this experienced this situation before. Any information =
would
> > be
> > greatly appreciated.
> >
> > Thanks
> > Tony Steinke
> > AIT-Atlanta
=
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<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>To all,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Thanks everyone for the excellent =
responses=20
pertaining to the solder paste</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>registration. The company had the =
stencil sent out=20
for evaluation, and it</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>was discovered that it was in fact out =
by as much=20
as .010 in the X axis(long direction). We have approximately 20-25 =
"local"=20
fiducials on the board itself.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Anyway, I am off to Minot, ND Monday =
morning for a=20
follow up. The high temp</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>there for Monday is a blistering 21 =
degrees. And to=20
think I just put planted tomatoes</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>in Atlanta. Also I will be sure to show =
the=20
engineers the Technet website.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Thanks again,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Tony Steinke</FONT></DIV>
<BLOCKQUOTE dir=3Dltr=20
style=3D"PADDING-RIGHT: 0px; PADDING-LEFT: 5px; MARGIN-LEFT: 5px; =
BORDER-LEFT: #000000 2px solid; MARGIN-RIGHT: 0px">
<DIV style=3D"FONT: 10pt arial">----- Original Message ----- </DIV>
<DIV=20
style=3D"BACKGROUND: #e4e4e4; FONT: 10pt arial; font-color: =
black"><B>From:</B>=20
<A [log in to unmask]
href=3D"mailto:[log in to unmask]">D.Terstegge</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>To:</B> <A [log in to unmask]
href=3D"mailto:[log in to unmask]">TechNet E-Mail Forum.</A> ; <A=20
[log in to unmask] =
href=3D"mailto:[log in to unmask]">tony=20
steinke</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>Sent:</B> Friday, March 29, 2002 =
10:53=20
AM</DIV>
<DIV style=3D"FONT: 10pt arial"><B>Subject:</B> Re: Re: [TN] solder =
paste=20
registration</DIV>
<DIV><BR></DIV>
<DIV>Perhaps the assembler is using only 2 fiducials on their printer =
? =20
Then the deviation can be partly due to the board, with the remainder=20
resulting from the fact that a 2 fiducial cannot compensate for =
rotation in=20
the machine. </DIV>
<DIV> </DIV>
<DIV>Daan Terstegge</DIV>
<DIV><A =
href=3D"http://www.smtinfo.net">http://www.smtinfo.net</A></DIV>
<DIV> </DIV>
<BLOCKQUOTE=20
style=3D"PADDING-RIGHT: 0px; PADDING-LEFT: 5px; MARGIN-LEFT: 5px; =
BORDER-LEFT: #000000 2px solid; MARGIN-RIGHT: 0px">
<DIV style=3D"FONT: 10pt arial">----- Original Message ----- </DIV>
<DIV=20
style=3D"BACKGROUND: #e4e4e4; FONT: 10pt arial; font-color: =
black"><B>From:</B>=20
<A [log in to unmask]
href=3D"mailto:[log in to unmask]">tony steinke</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>To:</B> <A =
[log in to unmask]
href=3D"mailto:[log in to unmask]">[log in to unmask]</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>Sent:</B> Friday, March 29, 2002 =
9:15=20
PM</DIV>
<DIV style=3D"FONT: 10pt arial"><B>Subject:</B> Re: [TN] solder =
paste=20
registration</DIV>
<DIV><BR></DIV>Hey Folks,<BR>The solder paste is being applied with =
a=20
stencil. Thanks for all the info.<BR>Tony steinke<BR>----- Original =
Message=20
-----<BR>From: Brian Ellis <<A=20
=
href=3D"mailto:[log in to unmask]">[log in to unmask]</A>><BR>=
To:=20
TechNet E-Mail Forum. <<A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]</A>>; tony=20
steinke<BR><<A=20
=
href=3D"mailto:[log in to unmask]">[log in to unmask]</A>>=
<BR>Sent:=20
Friday, March 29, 2002 9:01 AM<BR>Subject: Re: [TN] solder paste=20
registration<BR><BR><BR>> Tony<BR>><BR>> You don't say what =
type of=20
screen is being used. If it's a<BR>> nylon/polyester one, then =
I'd say=20
you're in deep trouble. If it's a<BR>> stainless steel one, it =
can still=20
stretch as the squeegee distorts it.<BR>> You really should use a =
stencil.<BR>><BR>> Brian<BR>><BR>> > tony steinke=20
wrote:<BR>> ><BR>> > Ladies and Gentlemen,<BR>> =
><BR>>=20
> We are having a major problem with an assembly house with=20
registering<BR>> > the solder paste to surface mount features =
prior to=20
pick and place.<BR>> > They<BR>> > are claiming that the =
boards=20
are growing/shrinking some 15-20 mils.<BR>> > We have done =
extensive=20
measuring on unpopulated boards in-house<BR>> > and cannot see =
more=20
than 3-5 mils misregistration. The panel size<BR>> > is =
approximately=20
14.00 x 16.00 inches, 20-24 mil pitch, and 15 BGA's<BR>> > =
throughout=20
the panel. Overall thickness .080. Is it possible that the<BR>> =
>=20
mesh<BR>> > screen that they are using can expand/contract =
over time?=20
has anyone<BR>> > heard of this experienced this situation =
before. Any=20
information would<BR>> > be<BR>> > greatly =
appreciated.<BR>>=20
><BR>> > Thanks<BR>> > Tony Steinke<BR>> >=20
=
AIT-Atlanta<BR><BR>------------------------------------------------------=
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Date: Sat, 30 Mar 2002 11:22:29 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Werner Engelmaier <[log in to unmask]>
Subject: Re: Flex circuit design guidelines
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Hi Jim,
Actually, IPC-2223 does not have the design guidelines for a flex circuit for
continued flexing; for that you need to go to IPC-D-330, Section 6.2.1.2
"Flexibility Considerations in the Design of Flexible Printed Wiring." Also,
IPC-TP-652 and IPC-TR-484 would be good references.
Factors that need to be considered are bend radius, distance from neutral
plane, ductility, tensile strength, modulus of elasticity.
Werner Engelmaier
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Date: Sat, 30 Mar 2002 17:51:21 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bogert <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bogert <[log in to unmask]>
Subject: White residue on LPI Solder Mask coated (and incompletely cured)
PWAs, Is it a technical concern?
MIME-Version: 1.0
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charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
3/30/002
Folks, we have an OEM who purchased FR-4 printed wiring boards from a =
MIL-P-55110 qualified board manufacturer. The OEM wave soldered the =
PWAs using HF1189A water washable, organic flux and cleaned the =
assemblies using DI water in an in-line cleaning process. Subsequent =
Omegameter 600 ionic cleanliness testing passed. However, almost all of =
the solder side of the PWAs exhibited white residue. Basically it looks =
like a water mark. While you can remove the residue using abrasion, such =
as by a pencil erasure, it comes back, even after several subsequent =
baking operatioins and additional in-line cleaning. The OEM sent out =
samples for outside chemical evaluation and found minute traces of =
carbon. The OEM traced the problem to incomplete curing of the LPI =
solder mask. The white residue only appears on the solder side of the =
PWA. There is no evidence of the residue on the component side of the =
assembly.
The OEM proposes that a sample assembly be sent out for SIR testing, and =
that if the test passes, they will request us to accept the condition as =
is. My concern is that over time in a humid environment, we may =
experience leakage current paths that cound cause operasting failures. =
The OEM has 20 PWAs that are part of the lot. However, only 6 =
experience this condition. It appears that I should reject all PWAs =
that show evidence of the white residue. I am concerned with the =
presence of carbon, even in trace amounts. The OEM noted that almost =
everything will show traces of carbon, so not to worry.
Bottom line is, is there any technical concern if the white residue is =
present? Any input on this topic wo\uld be appreciated.=20
------=_NextPart_000_0165_01C1D813.809967C0
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charset="iso-8859-1"
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<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4611.1300" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>3/30/002</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Folks, we have an OEM who purchased =
FR-4 printed=20
wiring boards from a MIL-P-55110 qualified board manufacturer. The =
OEM=20
wave soldered the PWAs using HF1189A water washable, organic flux =
and=20
cleaned the assemblies using DI water in an in-line cleaning =
process. =20
Subsequent Omegameter 600 ionic cleanliness testing passed. =
However,=20
almost all of the solder side of the PWAs exhibited white residue. =
Basically it looks like a water mark. While you can remove the =
residue=20
using abrasion, such as by a pencil erasure, it comes back, even =
after=20
several subsequent baking operatioins and additional in-line=20
cleaning. The OEM sent out samples for outside chemical =
evaluation=20
and found minute traces of carbon. The OEM traced the =
problem to=20
incomplete curing of the LPI solder mask. The white residue only =
appears=20
on the solder side of the PWA. There is no evidence of the residue =
on the=20
component side of the assembly.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>The OEM proposes that a sample assembly =
be sent out=20
for SIR testing, and that if the test passes, they will request us to =
accept the=20
condition as is. My concern is that over time in a humid =
environment,=20
we may experience leakage current paths that cound cause operasting =
failures. The OEM has 20 PWAs that are part of the lot. =
However,=20
only 6 experience this condition. It appears that I should =
reject all=20
PWAs that show evidence of the white residue. I am concerned with =
the=20
presence of carbon, even in trace amounts. The OEM noted that =
almost=20
everything will show traces of carbon, so not to worry.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Bottom line is, is there any technical =
concern if=20
the white residue is present? Any input on this topic wo\uld be=20
appreciated.</FONT> </DIV></BODY></HTML>
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Date: Sat, 30 Mar 2002 17:01:46 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: White residue on LPI Solder Mask coated (and
incompletelycured)PWAs, Is it a technical concern?
X-To: Bogert <[log in to unmask]>
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Bogart (luv the name!),
How long is the warranty period?
What sort of liability issues are possible?
If you are in "harsh" environments are you conformal coating the boards?
Won't the OEM pay for operational/functional testing in simulated
environments?
There is always a possibility of "leakage" currents and or
electrochemical migration.
Only operational/functional testing will inform you if the product will
work!
Are you the one who must "sign off" the release/ok to ship paper work?
(Whose neck is in the noose?)
David A. Douthit
Manager
LoCan LLC
Bogert wrote:
> 3/30/002 Folks, we have an OEM who purchased FR-4 printed wiring
> boards from a MIL-P-55110 qualified board manufacturer. The OEM wave
> soldered the PWAs using HF1189A water washable, organic flux and
> cleaned the assemblies using DI water in an in-line cleaning process.
> Subsequent Omegameter 600 ionic cleanliness testing passed. However,
> almost all of the solder side of the PWAs exhibited white residue.
> Basically it looks like a water mark. While you can remove the residue
> using abrasion, such as by a pencil erasure, it comes back, even after
> several subsequent baking operatioins and additional in-line
> cleaning. The OEM sent out samples for outside chemical evaluation
> and found minute traces of carbon. The OEM traced the problem to
> incomplete curing of the LPI solder mask. The white residue only
> appears on the solder side of the PWA. There is no evidence of the
> residue on the component side of the assembly. The OEM proposes that a
> sample assembly be sent out for SIR testing, and that if the test
> passes, they will request us to accept the condition as is. My
> concern is that over time in a humid environment, we may experience
> leakage current paths that cound cause operasting failures. The OEM
> has 20 PWAs that are part of the lot. However, only 6 experience this
> condition. It appears that I should reject all PWAs that show
> evidence of the white residue. I am concerned with the presence of
> carbon, even in trace amounts. The OEM noted that almost everything
> will show traces of carbon, so not to worry. Bottom line is, is there
> any technical concern if the white residue is present? Any input on
> this topic wo\uld be appreciated.
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<html>
<body bgcolor="#FFFFFF">
Bogart (luv the name!),
<p>How long is the warranty period?
<br>What sort of liability issues are possible?
<br>If you are in "harsh" environments are you conformal coating the boards?
<br>Won't the OEM pay for operational/functional testing in simulated environments?
<p>There is always a possibility of "leakage" currents and or electrochemical
migration.
<br>Only operational/functional testing will inform you if the product
will work!
<p>Are you the one who must "sign off" the release/ok to ship paper work?
<br>(Whose neck is in the noose?)
<p>David A. Douthit
<br>Manager
<br>LoCan LLC
<p>Bogert wrote:
<blockquote TYPE=CITE><style></style>
<font face="Arial"><font size=-1>3/30/002</font></font> <font face="Arial"><font size=-1>Folks,
we have an OEM who purchased FR-4 printed wiring boards from a MIL-P-55110
qualified board manufacturer. The OEM wave soldered the PWAs using
HF1189A water washable, organic flux and cleaned the assemblies using DI
water in an in-line cleaning process. Subsequent Omegameter 600 ionic
cleanliness testing passed. However, almost all of the solder side
of the PWAs exhibited white residue. Basically it looks like a water
mark. While you can remove the residue using abrasion, such as by a pencil
erasure, it comes back, even after several subsequent baking operatioins
and additional in-line cleaning. The OEM sent out samples for outside
chemical evaluation and found minute traces of carbon. The OEM traced
the problem to incomplete curing of the LPI solder mask. The white
residue only appears on the solder side of the PWA. There is no evidence
of the residue on the component side of the assembly.</font></font> <font face="Arial"><font size=-1>The
OEM proposes that a sample assembly be sent out for SIR testing, and that
if the test passes, they will request us to accept the condition as is.
My concern is that over time in a humid environment, we may experience
leakage current paths that cound cause operasting failures. The OEM
has 20 PWAs that are part of the lot. However, only 6 experience
this condition. It appears that I should reject all PWAs that show
evidence of the white residue. I am concerned with the presence of
carbon, even in trace amounts. The OEM noted that almost everything
will show traces of carbon, so not to worry.</font></font> <font face="Arial"><font size=-1>Bottom
line is, is there any technical concern if the white residue is present?
Any input on this topic wo\uld be appreciated.</font></font></blockquote>
</body>
</html>
--------------DFE1D64DE18DFB0B0EA98312--
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---------------------------------------------------------------------------------
=========================================================================
Date: Sun, 31 Mar 2002 10:15:11 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Edward Szpruch <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Edward Szpruch <[log in to unmask]>
Subject: Re: Blistering in PCBs
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Steve,
Really very ugly boards.
To my opinion the clue is on the first picture : blisters on =
non-drilled
area.It mean completly failure of the board.
You may call it "blisters".To my opinion this is delamination.
For sure reliability of those boards is zero.
Cross section of the should show it.
If I am right, the list of possible reasons is very long starting from =
raw
materials , pressing procedures , HASL procedures ending with soldering
foults.
Edward
Edward Szpruch
Eltek Ltd
P.O.Box 159 ; 49101 Petah Tikva Israel
Tel ++972 3 9395050 , Fax ++972 3 9309581
e-mail [log in to unmask]
> -----Original Message-----
> From: [log in to unmask] [SMTP:[log in to unmask]]
> Sent: =E5 =EE=F8=F5 29 2002 18:19
> To: [log in to unmask]
> Subject: Re: [TN] Blistering in PCBs
>=20
> Don and Everybody!
>=20
> The pic's are now up! Go to: http://www.stevezeva.homestead.com
>=20
> I gotta say, those are some UGLY boards!
>=20
> -Steve Gregory-
>=20
>=20
>=20
>=20
> Hey Earl
> =09
> Where can I see these photos? Don't see them on Steve's site.
> =09
> Don Vischulis
> =09
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Earl Moon
> Sent: Friday, March 29, 2002 6:49 AM
> To: [log in to unmask]
> Subject: Re: [TN] Blistering in PCBs
> =09
> =09
> Vinit,
> =09
> Ok, here we go. Never seen nothin' like these before. Oh well, maybe
> once
> when I was a "young gun" process engineer at Xerox. That's another
> story
> I'll not bore anyone with now.
> =09
> Concerning the pics, it is obvious there is delam everywhere but
> maybe the
> edges. Vinitdelam3's discoloration also is delamination, not solder
> mask
> related.
> =09
> Someone else take shots at this and Vinit's supplier. This shop
> shoundn't
> exist unless they just lost it all on his boards ONE PING ONLY
> PLEASE.
> =09
> A pleasure to serve Vinit. Don't often get to see how bad something
> can be
> besides a train wreck.
> =09
> MoonMan
> =09
>=20
>=20
>=20
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Date: Sun, 31 Mar 2002 11:21:17 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: White residue on LPI Solder Mask coated (and
incompletelycured)PWAs, Is it a technical concern?
X-To: Bogert <[log in to unmask]>
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If this were a hi-rel application, I would be very worried. An
improperly cured coating is potentially dangerous and I would want to
know more about what would appear to be an astoichiometric chemistry and
the free components.
The white "residue" is probably a very fine alumina added to the mask to
give it the desired rheological properties (and to reduce the cost). It
has a refractive index close to that of the mask resin, so is normally
invisible. When the mask surface is eroded by solubilisation in water or
by evaporation of an unreacted component, a small quantity will be laid
bare, becoming visible. If this is the case, the alumina itself is
harmless, but unreacted chemicals will always be present.
It would seem your board supplier is trying to weasel out of his
responsibility for producing faulty goods.
Without being certain, I thought that MIL-P-55110 went out of being
several years ago. Unfortunately, I was unable to check it as Assist is
offline just now. I suggest you check with
http://astimage.daps.dla.mil/quicksearch/ to find the current situation.
In any case, it was a specification for bare printed circuits, not a
qualification procedure for suppliers.
IMHO
Brian
> Bogert wrote:
>
> 3/30/002
>
> Folks, we have an OEM who purchased FR-4 printed wiring boards from a
> MIL-P-55110 qualified board manufacturer. The OEM wave soldered
> the PWAs using HF1189A water washable, organic flux and cleaned the
> assemblies using DI water in an in-line cleaning process. Subsequent
> Omegameter 600 ionic cleanliness testing passed. However, almost all
> of the solder side of the PWAs exhibited white residue. Basically it
> looks like a water mark. While you can remove the residue
> using abrasion, such as by a pencil erasure, it comes back, even after
> several subsequent baking operatioins and additional in-line
> cleaning. The OEM sent out samples for outside chemical evaluation
> and found minute traces of carbon. The OEM traced the problem to
> incomplete curing of the LPI solder mask. The white residue only
> appears on the solder side of the PWA. There is no evidence of the
> residue on the component side of the assembly.
>
> The OEM proposes that a sample assembly be sent out for SIR testing,
> and that if the test passes, they will request us to accept the
> condition as is. My concern is that over time in a humid environment,
> we may experience leakage current paths that cound cause operasting
> failures. The OEM has 20 PWAs that are part of the lot. However,
> only 6 experience this condition. It appears that I should reject all
> PWAs that show evidence of the white residue. I am concerned with the
> presence of carbon, even in trace amounts. The OEM noted that almost
> everything will show traces of carbon, so not to worry.
>
> Bottom line is, is there any technical concern if the white residue is
> present? Any input on this topic wo\uld be appreciated.
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Date: Mon, 1 Apr 2002 09:26:12 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
don_well <[log in to unmask]>
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From: don_well <[log in to unmask]>
Subject: Rework RF amplifier boards
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Date: Mon, 1 Apr 2002 13:57:01 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
fullname <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: fullname <[log in to unmask]>
Organization: DSO National Laboratories
Subject: Re: MIL-C-28809 Replacement/supersede
X-To: "Sauer, Steven T." <[log in to unmask]>
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Thanks Steve.
I have a few questions :
1. What then is classified as "standard" and what is "non-standard"?
2. Who is the Material Review Board (MRB)?
3. Since MIL-C-28809 no longer exist, are we allow to or can we develop an in-house workmanship, making
referral to an aboselete standard?
Regards - Wee Mei
"Sauer, Steven T." wrote:
> Hello Wee Mei,
> To my knowledge, the information that you are looking for does not exist in
> a replacement military specification nor other industry association
> documents.
> On one hand, the information contained in MIL-C-28809 was considered
> requirements for "standard" repair/modification. Repair and modifications
> that did not fall within these requirements, "non-standard", were turned
> over to a Material Review Board (MRB) and dependent on contractual
> requirements may have included customer review and approval/disapproval.
> With today's technology and the ever changing end use environments,
> "standard" repairs should be reviewed by a MRB for issues related to
> quality, performance, reliability and maintainability of the deliverable
> product. The guidance information contained in MIL-C-28809 can be used to
> develop criteria for use by a MRB or better yet, used to develop an in-house
> procedure for standard repairs that defines specifics for your products.
> IPC-7721 (supercedes IPC-R-700) is widely accepted and used for repair and
> modification of electronic assemblies, but it does not contain "maximum
> allowable" criteria.
>
> Steve Sauer
>
> -----Original Message-----
> From: fullname [mailto:[log in to unmask]]
> Understand that MIL-C-28809 has been cancelled. However, there are two
> tables indicates in this mil-spec on the max. number allowed permitted
> for plated-thorugh hole repair and circuit repair. Can someone point to
> me where else can I find similar tables for repair under IPC standards?
>
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