Hey Everybody! I've got Earls pictures up on my web page. Go to: http://www.stevezeva.homestead.com/ Yes, Earl I'm not only listening, but taking notes as well... -Steve Gregory- > Folks, > > I have been reviewing all the issues/problems that were faced by my host > company and its supplier ? before I arrived. I would like to share some for > comment as well as my observations, if you would be so kind. > > We have one board design using seven .8 mm ceramic CSP?s made by TI. The > first issue facing my company was cracking or separation of balls from the > device. I have reports from Rockwell, who did the F/A and from TI both > pointing to the failure mechanism as possible excessive IMC formation as in > the following without the photos, of course: > > Attached are four photos: > > CSP-1 shows multiple insertions into sockets. > CSP-2 shows x-section of stock unit > CSP-3 shows magnified x-section of stock unit. Ni/Sn intermetallic layer > appears thick. > CSP-4 shows x-section of device which broke off the PCB - clean break at the > intermetallic layer. > > Because of the multiple insertions into sockets, as evidenced by > indentations on the balls, it is considered that multiple thermal excursions > contributed to IMC growth. As the clean break occurred at the IMC interface, > again, this is thought to be the failure mechanism. This may be so, but > other things must be considered as well. > > This issue possibly was resolved with TI?s "prototype" parts and we?ve seen > no repeat of this occurrence. No reason is available to me, at least, > concerning the part?s improvement. No matter, there now exist other issues. > > I believe, as in a few comment trades, with others (Dave Fish for one), that > our assembler?s inexperience profiling and soldering these devices has been > responsible for poor quality/reliability solder joints. In their defense, > there aren?t/weren?t many suppliers with this experience. Simply, cold > solder joints probably contributed to unacceptability and complete failure > as received ? evidenced by the infamous "C" clamp. The ceramic portion of > the device is extremely massive compared to ball size and the ability to get > required heat to the solder medium and balls to effect acceptable solder > joints. This means, I believe based on past experience, the reflow profile > must be "maxed" out in terms of solder paste performance and joint > formation. I don?t think this was done. > > To add to the situation, the CTE mis-match of ceramic and PCB material > certainly has been known to ruin even good solder joints. This may account > to the failure at the IMC interface as well as at the board level. > Therefore, a "too thick" IMC layer probably is/was not the failure > mechanism, or was it? > > All solder pads have been re-evaluated and now definitely meet alignment and > size requirements. Stencil apertures are as specified. Solder paste now is > Kester?s 562R, solder volume is acceptable, surface solderability is as > required. What remains is developing a solder reflow profile that will > effect acceptable solder joints for the CSP?s as well as all other devices > on the board. > > I realize this should not be a big issue, but having had to go way back to > visit initial failures at the device ball interface, I have some concerns > about whoever builds our next lot of boards. Steve, are you listening. > > I would appreciate any comments concerning this small part of the picture. I > would appreciate anyone sharing experiences with what should be another BGA > success story but for what I have presented here. > > Thank you all much, > > Earl >