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Date: Wed, 30 Jan 2002 16:52:05 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Adam Seychell <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Adam Seychell <[log in to unmask]>
Subject: Re: pulse plating - without additives
Thanks everyone for your help. The article at
www.circuitree.com "Copper Plating of Electronic
Interconnects without Additives" was very helpful
indeed. By "additives" they are referring to
brighteners and levelers. The bath they described
contained polyethylene glycol.
This article lead me to find two more lnks.
http://www.pcfab.com/db_area/archive/2001/0103/taylor.html
And US patent 6,303,014, which describes the "additive
free" process in greater detail. However, they
also use a "supressor", such as polyethelene
glycol in combination with the chloride ion.
http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1
&u=/netahtml/srchnum.htm&r=1&f=G&l=50&s1='6,303,014'.WKU.&OS=PN/6,303,014&RS
=PN/6,303,014
In reply to Rudy Sedlak, I beginning to see that
the rectifier cannot be a total solution.
Adam Seychell
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Date: Wed, 30 Jan 2002 17:28:19 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Don Vischulis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Don Vischulis <[log in to unmask]>
Subject: Re: Laminate Blisters...
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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Steve:
I tend to agree with Mike's comment. You might give one of the blisters a
probe with a sharp Xacto blade to determine if it's soldermask or laminate.
Different set of causes for each.
Don Vischulis
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of [log in to unmask]
Sent: Wednesday, January 30, 2002 1:35 PM
To: [log in to unmask]
Subject: [TN] Laminate Blisters...
Hi all!
Got another strange one again (why me?). Ran 70 peices of a double-sided SMT
assembly. The board is a 6-layer FR4 board. PTH is hand-soldered.
Everything seemed to be going fine until the boards got to an inspector just
prior to test. I get paged to look at some blisters she said she was seeing.
I was pretty suprised because things were fine when they went through
surface mount.
I went to the inspector, and sure enough, this is what I saw. Go to:
http://www.stevezeva.homestead.com
They appear randomly at one of four plated mounting holes on the board, and
it's on random sides of the boards too...and it only happened on
19-assemblies. I can't find out when it happened. These mounting holes are
off away from anything that was hand soldered too...
Funny thing is they look like blisters, but the laminate isn't displaced
like you normally would see in a blister...to me, it's more like a sort of
delamination.
I didn't see anything like that during SMT processing, I mean you can't miss
something like that. But if it were due to excessive heat, I would expect to
see it on more assemblies. The same thing would apply if it were caused by
absorbed moisture wouldn't it? I would expect to see the problem on more
assemblies. The fabs are all the same date code by the way...
Anybody ever see something like this before?
-Steve Gregory-
------=_NextPart_000_001A_01C1A9B3.822D1FC0
Content-Type: text/html;
charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Dus-ascii">
<META content=3D"MSHTML 6.00.2712.300" name=3DGENERATOR></HEAD>
<BODY>
<DIV><SPAN class=3D741132623-30012002><FONT face=3DArial color=3D#0000ff =
size=3D2>Steve:</FONT></SPAN></DIV>
<DIV><SPAN class=3D741132623-30012002><FONT face=3DArial color=3D#0000ff =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D741132623-30012002><FONT face=3DArial color=3D#0000ff =
size=3D2>I tend=20
to agree with Mike's comment. You might give one of the blisters a =
probe=20
with a sharp Xacto blade to determine if it's soldermask or =
laminate. =20
Different set of causes for each.</FONT></SPAN></DIV>
<DIV><SPAN class=3D741132623-30012002><FONT face=3DArial color=3D#0000ff =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D741132623-30012002><FONT face=3DArial color=3D#0000ff =
size=3D2>Don=20
Vischulis</FONT></SPAN></DIV>
<DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of =
</B>[log in to unmask]<BR><B>Sent:</B>=20
Wednesday, January 30, 2002 1:35 PM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> [TN] Laminate=20
Blisters...<BR><BR></FONT></DIV><FONT face=3Darial,helvetica><FONT =
size=3D2>Hi all!=20
<BR><BR>Got another strange one again (why me?). Ran 70 peices of a =
double-sided=20
SMT assembly. The board is a 6-layer FR4 board. PTH is hand-soldered.=20
<BR><BR>Everything seemed to be going fine until the boards got to an =
inspector=20
just prior to test. I get paged to look at some blisters she said she =
was=20
seeing. I was pretty suprised because things were fine when they went =
through=20
surface mount. <BR><BR>I went to the inspector, and sure enough, this is =
what I=20
saw. Go to: <BR><BR>http://www.stevezeva.homestead.com <BR><BR>They =
appear=20
randomly at one of four plated mounting holes on the board, and it's on =
random=20
sides of the boards too...and it only happened on 19-assemblies. I can't =
find=20
out when it happened. These mounting holes are off away from anything =
that was=20
hand soldered too... <BR><BR>Funny thing is they look like blisters, but =
the=20
laminate isn't displaced like you normally would see in a blister...to =
me, it's=20
more like a sort of delamination. <BR><BR>I didn't see anything like =
that during=20
SMT processing, I mean you can't miss something like that. But if it =
were due to=20
excessive heat, I would expect to see it on more assemblies. The same =
thing=20
would apply if it were caused by absorbed moisture wouldn't it? I would =
expect=20
to see the problem on more assemblies. The fabs are all the same date =
code by=20
the way... <BR><BR>Anybody ever see something like this before? =
<BR><BR>-Steve=20
Gregory-</FONT> </FONT></BODY></HTML>
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Date: Wed, 30 Jan 2002 15:24:31 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mark Steele <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mark Steele <[log in to unmask]>
Subject: Re: ODB++
X-To: "[log in to unmask]" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi Seth,
I have heard this question before and haven't known how
to respond to it. So I have a question for you, if it
could be shown through real data that the board built
from gerber and the board built from ODB are the "same"
(within a certain tolerance) would you be willing to
generate both sets of data and send them out accordingly?
I assume you are comfortable with your system outputting
gerber, it's ODB that has to "prove" it can duplicate the
gerber.
Here's what I have in mind, an experiment. You asked the
question "The problem is how do you insure that both sets
of output data are identical in every way?" Maybe one way
to test that is to test the input and output capabilities
of Genesis/Enterprise.
Let's translate a set of gerber back and forth with ODB a
certain number of times (10?) and see how the result
compares to the "reference data" (first generation gerber).
They would have to pass two tests, 1, a netlist check of
course and 2, a layer by layer feature comparison. The
netlist check is absolute, it has to pass. The features
could not vary more than (1?) percent. The feature
variation test is something we would have to come up with.
Is 1% to small or to large?
Ideally the 10th generation ODB would match the 1st
generation gerber by some agreed upon amount and pass a
netlist compare of course.
I don't know how sound this hare-brained idea is, I thunk
it up driving to work... But I think your question is valid
and has to be answered in some way.
Who would do the testing and presenting of the results?
Would you trust Valor? Frontline? IPC? NEMI? Maybe Valor,
a designer and a fabricator at the very least. Heck, I
volunteer to play if that's what it takes to get more ODB.
Regards,
Mark Steele
CAM Automation Engineer
Toppan Electronics, Inc.
858.695.2222
[log in to unmask]
>-----Original Message-----
>From: Seth Goodman [mailto:[log in to unmask]]
>Sent: Monday, January 28, 2002 6:28 PM
>To: TechNet E-Mail Forum.; Mark Steele
>Subject: RE: [TN] ODB++
>
>
>Hi Mark,
>
>From the design engineer's perspective, supporting two
>different formats
>does create a problem. When you release a design to
>production, it is not
>supposed to be specific to one particular vendor (unless you
>have a captive
>fab shop and NEVER go outside). Unfortunately, not all fab
>shops support
>ODB++. If purchasing would be willing to limit themselves to
>fab shops that
>supported ODB++, that would be fine, but since that limits
>their options it
>is unlikely. So in order to be universal, we would have to
>generate both
>ODB++ and Gerber. This is easy to do but can create subtle
>problems that
>could take lots of time and money to run down. The problem is
>how do you
>insure that both sets of output data are identical in every
>way? While some
>programs allow you to import both data sets and compare, as a practical
>matter, assuring that they are identical is not possible.
>Since there will
>undoubtedly be subtle differences between the two, which one controls?
>Don't we also have to verify and validate both versions by
>building up both
>assemblies? And when problems inevitably arise between boards from two
>different vendors using different data files, who 'ya gonna
>call? Those
>dumb design engineers who created the problem, of course.
***stuff deleted*** (I would like to respond to that in another email.)
>
>Regards,
>
>Seth Goodman
>Goodman Associates, LLC
>tel 608.833.9933
>fax 608.833.9966
>
>
>> -----Original Message-----
>> From: TechNet [mailto:[log in to unmask]]On Behalf Of Mark Steele
>> Sent: Monday, January 28, 2002 4:09 PM
>> To: [log in to unmask]
>> Subject: Re: [TN] ODB++
>>
>>
>> Hi Paul,
>>
>>
>> I work for Toppan Electronics in San Diego, we are a
>> fab house.
>>
>> We strongly prefer ODB data. I tell our Sales people
>> to beg for it!
>>
>> For the past 2 years we have tracked type of data
>> (274D, 274X and ODB) and problems with that data such
>> as bad aperture lists, missing layers, incorrect
>> filename identification, etc, etc, etc.
>>
>> For example, for the last 226 jobs we have input we had
>> 41 issues with gerber, 0 for ODB. That's a lot of phone
>> calls and time spent just getting the data INTO our Genesis
>> system. We allocate 5 min to get the data and import an
>> ODB job, 30-40 for gerber (sometimes it takes hours for
>> gerber, that happens about once a month...)
>>
>> I realize not everyone uses Genesis as their CAM system, but
>> I would wager that a majority of the bigger fab houses do.
>>
>> So, yes, PLEASE generate ODB as a first choice and only send
>> out gerber if asked too...
>>
>> Of course that's just my opinion, I could be wrong...
>>
>>
>>
>> Mark Steele
>> CAM Automation Engineer
>> Toppan Electronics, Inc.
>> 858.695.2222
>> [log in to unmask]
>
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Date: Wed, 30 Jan 2002 16:47:29 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Crepeau, Phil" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crepeau, Phil" <[log in to unmask]>
Subject: Re: Blacklight Fixture
X-To: "Peralta, Kevin" <[log in to unmask]>
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hi,
in your backyard (upland) is a company called uvp (ne ultraviolet products). they make a unit called 'blak ray', model b-100a. it's been around at least since the early sixties.
phil
-----Original Message-----
From: PERALTA, Kevin (BREA) [mailto:[log in to unmask]]
Sent: Wednesday, January 30, 2002 1:40 PM
To: [log in to unmask]
Subject: [TN] Blacklight Fixture
Since we've moved to a new facility (w/ a beautiful view of the San Gabriel Mountain Range), we're in need of purchasing a new blacklight fixture for our new Conformal Coating Booth. It's not very long, but I was hoping to get some ideas for the best type of blacklight with a UV rating to put into place. Can anyone serve up some good suggestions? Thank you!
Kevin L. Peralta
TRW Aeronautical / Lucas Aerospace
------_=_NextPart_001_01C1A9F0.DC20D930
Content-Type: text/html;
charset="iso-8859-1"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
<TITLE>Blacklight Fixture</TITLE>
<META content="MSHTML 5.50.4134.600" name=GENERATOR></HEAD>
<BODY>
<DIV><SPAN class=220404400-31012002><FONT face=Arial color=#0000ff
size=2>hi,</FONT></SPAN></DIV>
<DIV><SPAN class=220404400-31012002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=220404400-31012002><FONT face=Arial color=#0000ff size=2>in
your backyard (upland) is a company called uvp (ne ultraviolet products).
they make a unit called 'blak ray', model b-100a. it's been around at
least since the early sixties.</FONT></SPAN></DIV>
<DIV><SPAN class=220404400-31012002><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=220404400-31012002><FONT face=Arial color=#0000ff
size=2>phil</FONT></SPAN></DIV>
<BLOCKQUOTE dir=ltr style="MARGIN-RIGHT: 0px">
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> PERALTA, Kevin (BREA)
[mailto:[log in to unmask]]<BR><B>Sent:</B> Wednesday, January 30, 2002
1:40 PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] Blacklight
Fixture<BR><BR></FONT></DIV>
<P><FONT face=Arial size=2>Since we've moved to a new facility (w/ a beautiful
view of the San Gabriel Mountain Range), we're in need of purchasing a new
blacklight fixture for our new Conformal Coating Booth. It's not very long,
but I was hoping to get some ideas for the best type of blacklight with a UV
rating to put into place. Can anyone serve up some good suggestions? Thank
you!</FONT></P>
<P><FONT face=Arial size=2>Kevin L. Peralta</FONT> <BR><FONT face=Arial
size=2>TRW Aeronautical / Lucas Aerospace</FONT> </P></BLOCKQUOTE></BODY></HTML>
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Date: Wed, 30 Jan 2002 16:36:20 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rick Thompson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rick Thompson <[log in to unmask]>
Organization: Ventura Electronics Assembly
Subject: ENIG Thickness Standard?
MIME-Version: 1.0
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Is there a standard for the plating thickness of the ENIG surface
finish? I've searched the archives and didn't find anything. Based on
a customer request we had increased the requirement for the electroless
nickel to 200u inches. A couple of our board vendors are telling me that
that is excessive and that anything over 100u inches is overkill. I've
seen references in the archives for anything from 120u inches to 200u
inches. What (if anything) is considered standard for this finish?
Thanks for your inputs.
Rick Thompson
Ventura Electronics Assembly
2655 Park Center Dr.
Simi Valley, CA 93065
+1 (805) 584-9858 x-304 voice
+1 (805) 584-1529 fax
[log in to unmask]
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=========================================================================
Date: Wed, 30 Jan 2002 22:00:04 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: AOI Stuff again...
MIME-Version: 1.0
Content-Type: text/plain; charset="US-ASCII"
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Hi all!
Bringing up the topic of AOI again. Read the Glenn Woodhouse summary (which I
think was GREAT by the way) that Daan reposted about the state of the
technology, had a fellow engineer that I work with attend a session at APEX
about AOI, and it seems that things may have become a bit cheaper, but as far
as using AOI for solder joint evaluation, there's still much to be desired...
The situation here is that there is some pressure from those above to get a
system in here that will be a fool-proof method to put a piece of equipment
in place that will eliminate the need for human inspection.
My take on it is that one focuses on making sure that the process is right
from the beginning, and then you don't need to spend a bunch of money on
automated inspection equipment, or depend on humans to inspect each and every
solder joint.
The reason I say that is because we are a low volume, high part number shop.
We may have ongoing business for years, but it maybe 10 assemblies a
month...what we consider high volume is a run of 250 assemblies per work
order...hehehe.
I just have the opinion that spending the big bucks for the AOI equipment
doesn't make a whole lot of sense in our situation...we'll be tweeking
programs during the run and probably won't have all the false calls, or
missed defects ironed-out by the time the work order is built...then a month
or two later on the same assembly, you go through the same drill again...
Any thoughts on this?
-Steve Gregory-
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Date: Thu, 31 Jan 2002 11:03:53 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: ENIG Thickness Standard?
X-To: Rick Thompson <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Rick,
I went through this pain a while ago, and got a lot of tremendous help from
Ingemar Hernefjord in particular. I believe there is no released standard
for ENIG, though there is an empirical spec IPC-4552. It does not contain a
lot of useful detail, though. I specify 5 microinches (0.12 microns) of
Gold over minimum 235 microinches (6 microns) Nickel for my boards, after
reading a number of studies and failure reports. In fact I was recommended
to use 250 microinches of Nickel, but this would have made our boards too
thick. The thicker gold layer minimises porosity and therefore oxidation to
the underlying Nickel layer.
Older thinking was for around 100 to 120 microinches Nickel, but studies by
Eriksson and others concluded that with the growth of gold flashing through
the Nickel from one side and Cu/Ni intermetallics on the other side of the
plating, that a thicker Nickel layer would offer the boards a longer
solderability shelf life and greater solder joint reliability.
Hope this helps a bit. Certainly, I haven't experienced any problems with
soldering or mounting of components on boards to this spec.
Peter
Rick Thompson
<rthompson@VENTURAELECTR To: [log in to unmask]
ONICS.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
Sent by: TechNet Aero/ST Group)
<[log in to unmask]> Subject: [TN] ENIG Thickness Standard?
01/31/02 08:36 AM
Please respond to
"TechNet E-Mail Forum.";
Please respond to Rick
Thompson
Is there a standard for the plating thickness of the ENIG surface
finish? I've searched the archives and didn't find anything. Based on
a customer request we had increased the requirement for the electroless
nickel to 200u inches. A couple of our board vendors are telling me that
that is excessive and that anything over 100u inches is overkill. I've
seen references in the archives for anything from 120u inches to 200u
inches. What (if anything) is considered standard for this finish?
Thanks for your inputs.
Rick Thompson
Ventura Electronics Assembly
2655 Park Center Dr.
Simi Valley, CA 93065
+1 (805) 584-9858 x-304 voice
+1 (805) 584-1529 fax
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Date: Wed, 30 Jan 2002 23:47:40 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Conformal Coating
MIME-Version: 1.0
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Not fond of stripping (either chemical or mechanical removal), both have
pros/cons. If the chemical is strong enough to remove a cured (overcured) UR
than its not doing the components or substrate any good either... It was just
food for thought - will look it up with EMPF.
Regards,
Mike Sewell
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<HTML><FONT FACE=arial,helvetica><FONT COLOR="#8080ff" SIZE=3 FAMILY="SERIF" FACE="Times New Roman" LANG="0"><B>Not fond of stripping (either chemical or mechanical removal), both have pros/cons. If the chemical is strong enough to remove a cured (overcured) UR than its not doing the components or substrate any good either... It was just food for thought - will look it up with EMPF. <BR>
<BR>
Regards,<BR>
Mike Sewell</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SERIF" FACE="Times New Roman" LANG="0"></B><BR>
</FONT></HTML>
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Date: Wed, 30 Jan 2002 23:48:39 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Conformal Coating
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Circuitectctr.com has a good guide on coating removal methods with info re:
each method and a preferred order.
http://www.circuittechctr.com/guides/2-3-1.htm
Regards,
Mike Sewell
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0"> <BR>
<BR>
<BR>
</FONT><FONT COLOR="#8080ff" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SERIF" FACE="Times New Roman Baltic" LANG="0"><B>Circuitectctr.com has a good guide on coating removal methods with info re: each method and a preferred order.<BR>
<BR>
http://www.circuittechctr.com/guides/2-3-1.htm<BR>
<BR>
Regards,<BR>
Mike Sewell</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SERIF" FACE="Times New Roman Baltic" LANG="0"></B><BR>
</FONT></HTML>
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Date: Thu, 31 Jan 2002 13:45:32 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Conformal Coating
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Unsubscribe.
Regards,
"TechNet
E-Mail Forum." To: [log in to unmask] AT Internet@ACPPSG
<[log in to unmask] cc: (bcc: Ken Fong/LU Plaza/HK/Astec)
RG> MikeSwll Subject: Re: [TN] Conformal Coating
01/31/02 01:23
PM
Circuitectctr.com has a good guide on coating removal methods with info re:
each method and a preferred order.
http://www.circuittechctr.com/guides/2-3-1.htm
Regards,
Mike Sewell
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0"> <BR>
<BR>
<BR>
</FONT><FONT COLOR="#8080ff" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SERIF" FACE="Times New Roman Baltic" LANG="0"><B>Circuitectctr.com has
a good guide on coating removal methods with info re: each method and a preferred order.<BR>
<BR>
http://www.circuittechctr.com/guides/2-3-1.htm<BR>
<BR>
Regards,<BR>
Mike Sewell</FONT><FONT COLOR="#000000" style="BACKGROUND-COLOR: #ffffff" SIZE=2 FAMILY="SERIF" FACE="Times New Roman Baltic" LANG="0"></B><BR>
</FONT></HTML>
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Date: Thu, 31 Jan 2002 14:09:29 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
kevinyeah <[log in to unmask]>
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From: kevinyeah <[log in to unmask]>
Subject: Re: Resin Recession
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Date: Thu, 31 Jan 2002 00:24:00 -0600
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Seth Goodman <[log in to unmask]>
Subject: Re: ODB++
X-To: Mark Steele <[log in to unmask]>
In-Reply-To: <B136A0C653FCD311ABA400508B60DAB19C4BB8@EXCHANGE>
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Hi Mark,
> I assume you are comfortable with your system outputting
> gerber, it's ODB that has to "prove" it can duplicate the
> gerber.
Thanks for bringing this up. I'm not suggesting that ODB++ needs to prove
itself, as its' market share among fab shops tells me that it does the job.
Given the choice, I would also opt for ODB++ as it can carry a lot more than
just bare board information. The problem I have is in archiving any data
object in more than one format for the reasons explained below.
> Here's what I have in mind, an experiment. You asked the
> question "The problem is how do you insure that both sets
> of output data are identical in every way?" Maybe one way
> to test that is to test the input and output capabilities
> of Genesis/Enterprise.
This will test, for one particular data set, the ability of the Valor tool
to translate back and forth between Gerber and ODB++ without accumulating
error. It really shows that their forward and reverse translators are
accurate inverses of each other. It doesn't show that the two data files
produce the same board. Even if we made a test to show that these two data
files were comparable, not very many designers use Valor tools to make their
output files. Instead, we typically use the data file generators built into
our CAD systems. If the CAD system doesn't produce ODB++ directly, and most
don't, then we use a third party tool (I use CAM350) to translate into
ODB++, either from the native CAD file or from Gerbers.
Even if the original CAD tool produced both output formats, the problem
remains. Producing an output file, either Gerber or ODB++, from a native
CAD database is a translation process. It is more difficult, though
fundamentally similar to translating Gerber into ODB++. In both cases, some
program looks at a series of data objects and translates them into another
series of data objects of a different format. That program is written by
human beings and therefore it has bugs. I have yet to own a piece of
bug-free software. The software that produces ODB++ is not the same as the
software that produces Gerber. It most likely has different bugs. My point
is that the two output files will not be exactly the same.
I know from experience that there are flaws in the Gerber data generators in
most CAD programs. The nastier ones are history but some subtle ones
remain. Similarly, different Gerber viewers can display the same data file
differently. Occasionally, I have to spend a lot of time working with a fab
shop because their Gerber viewers and my Gerber viewers show different
results from the same data. This is an unfortunate waste of both my time
and theirs, but it has to be done. Because we don't use the same brand and
version of software, it is unavoidable.
What I want to avoid is dealing with problems in ODB++ data in addition to
Gerber data. Also, consider that if ODB++ becomes the Gerber replacement,
there will be companies other than Valor writing software for it. That
means there will be some differences between how a Valor program and someone
else's program interprets the same ODB++ data. This may not come up very
often, but it will come up, especially when other vendors first start using
ODB++. Unless Valor achieves a 100% market share, we will all have to deal
with some subtle differences between vendors' software. This problem could
be lessened if an independent industry group produced a validation suite
that a program would have to pass to call itself ODB++ compliant.
I would be happy to support ODB++ as the single output format for any given
board. In fact, I would prefer almost any intelligent data format to
Gerber, which is truly a rotten old standard. But until my customers'
purchasing departments will accept ODB++ only, the only "universal" option
today is Gerber. Until ODB++ becomes as universally accepted by fab shops
as Gerber, or the fab shops start to give a big enough discount to offset
the extra costs of supporting two data formats, IMO most designers will opt
to stay with Gerber. If using ODB++ really saves the fab shops money, and
I'm sure it does, all they have to do is pass some of those savings on to
their customers who use it and it will become the de facto standard before
you know it.
Regards,
Seth Goodman
Goodman Associates, LLC
tel 608.833.9933
fax 608.833.9966
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=========================================================================
Date: Thu, 31 Jan 2002 09:15:53 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guenter Grossmann <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guenter Grossmann <[log in to unmask]>
Subject: Antw: [TN] Wave Solder/NoPb Question
Mime-Version: 1.0
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Dave
We run trials with folks from ERSA. Actually, due to their knowledge, =
erosion of the solderpot, the wave-nozzle, and the pump are considerable. =
However, new equipment seem to be produced lead-free save with coated =
stainless steel. It seems also as if it is possible to cover the parts in =
danger with a organic coating (paint) which can be done during the =
downtime when a service is done. The coating needs a refreshment every one =
or two years I heard though one line with that coating seems to run now =
three years in 24 hours shift without problems. What we also looked at are =
upgrade kits for older equipment. I am right now writing a cost- evaluation=
.
Guenter
.
EMPA
Swiss Federal Institute for Materials Testing and Research
Centre for Reliability
Dipl. Eng. Guenter Grossmann
8600 Duebendorf
Switzerland
Phone: xx41 1 823 4279
Fax : xx41 1823 4054
mail: [log in to unmask]
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Date: Thu, 31 Jan 2002 09:24:50 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Julian Coates <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Julian Coates <[log in to unmask]>
Subject: Re: ODB++
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Hi All,
I am from Valor, I should state that up front, but I would like to offer two
points for consideration:
1. In the mid-1980's the mainstream PCB manufacturers began to accept Gerber
(instead of film) into their tooling departments. In order to do this, they
had to make capital investments. These investments gave them a competitive
advantage, because they were able to cut costs overall, reduce lot-size due
to faster tooling cycles, and increase quality. Despite this, for many
years, the OEMs (their customers) continued to send the design to the
fabricator in two formats; Gerber, and film. The film was regarded as the
reference and ultimate specification of the design, but the fabricator could
use the Gerber if he so chose (those who could, did). What is going on now
between Gerber and ODB++ is basically the same, a transition of formats
which have uncertainties between them, and for each design somewhere down
the line somebody has to decide which format to believe in and work from. In
the case of Gerber, it took a few years for the average fabricator to have
unconditional confidence in the data rather than the film. These days, they
do not receive films at all, and they just work from the Gerber without a
second thought of what became of the film. In the case of ODB++, many
fabricators already have tools (as do the designers by the way) to compare
the graphics and netlist interconnect of the ODB++ versus the Gerber in an
automated fashion, reducing the risks substantially. The upside (as Mark
points out) is faster throughput and higher quality. The question is: who is
the beneficiary? The ultimate beneficiary of these gains is the consumer
(the designer), via the competitive business model of the
fabrication-outsourcing. From my observation, most fabricators do not
recover their actual tooling costs in the charges they make to the customers
anyway (they bury their tooling costs in their overheads), so it is probably
unrealistic to expect PCB fabricators to give tooling price-cuts to the
customers, since they are running their tooling operations at a loss
already. However, there are gains for the customer, albeit indirect: further
reduction in average delivery times, and higher quality over time; prices
are dropping anyway. To turn it around, if the designers continue to send
Gerber, the level of service received from the manufacturers could not
improve so fast as it can with a smarter interchange format.
2. Seth makes a good point about validation of ODB++ input and output
processors. Currently, ODB++ is not a formal standard, though we believe it
will be in good time (thanks to the industry-driven NEMI process). When the
formal standardization occurs, we hope that some independent
compliance-validation service will be offered by the standards-body. Just as
a side note, independent compliance-proving by an independent body never
happened (as far as I know) with Gerber RS274D, and RS274X never was a
standard anyway, the industry just went ahead and implemented the format
widely, though with considerable variation, as Seth points out. Between now
and formal standardisation of ODB++ or some further-developed version, Valor
offers a service of supporting third parties who implement ODB++, via its
3rd-party cooperation program, the "Open Systems Alliance". We do our best
to offer advice and support for interface testing to all organisations,
competitive or non-competitive, so that the format has the best chance of
practical implementation. Some 3rd-parties opt to stay away from this
service due to competitive reasons, which usually (in our view) results in
sub-standard implementation of the format, which is a pity. Those who join
get full support.
After many years of quasi-stability with Gerber, the industry is in
transition again. I do not sure that there is any clear way of accelerating
the shift to a new CAD/CAM format with price-breaks from the manufacturers
(fabrication or assembly), since they are all bleeding cash right now
anyway. The transition will happen steadily, and be driven top-down by more
subtle, but more powerful, factors such as time and quality.
I hope these comment contribute to the debate in a positive way, as
intended.
Julian Coates
Valor
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Seth Goodman
Sent: 31 January 2002 06:24
To: [log in to unmask]
Subject: Re: [TN] ODB++
Hi Mark,
> I assume you are comfortable with your system outputting
> gerber, it's ODB that has to "prove" it can duplicate the
> gerber.
Thanks for bringing this up. I'm not suggesting that ODB++ needs to prove
itself, as its' market share among fab shops tells me that it does the job.
Given the choice, I would also opt for ODB++ as it can carry a lot more than
just bare board information. The problem I have is in archiving any data
object in more than one format for the reasons explained below.
> Here's what I have in mind, an experiment. You asked the
> question "The problem is how do you insure that both sets
> of output data are identical in every way?" Maybe one way
> to test that is to test the input and output capabilities
> of Genesis/Enterprise.
This will test, for one particular data set, the ability of the Valor tool
to translate back and forth between Gerber and ODB++ without accumulating
error. It really shows that their forward and reverse translators are
accurate inverses of each other. It doesn't show that the two data files
produce the same board. Even if we made a test to show that these two data
files were comparable, not very many designers use Valor tools to make their
output files. Instead, we typically use the data file generators built into
our CAD systems. If the CAD system doesn't produce ODB++ directly, and most
don't, then we use a third party tool (I use CAM350) to translate into
ODB++, either from the native CAD file or from Gerbers.
Even if the original CAD tool produced both output formats, the problem
remains. Producing an output file, either Gerber or ODB++, from a native
CAD database is a translation process. It is more difficult, though
fundamentally similar to translating Gerber into ODB++. In both cases, some
program looks at a series of data objects and translates them into another
series of data objects of a different format. That program is written by
human beings and therefore it has bugs. I have yet to own a piece of
bug-free software. The software that produces ODB++ is not the same as the
software that produces Gerber. It most likely has different bugs. My point
is that the two output files will not be exactly the same.
I know from experience that there are flaws in the Gerber data generators in
most CAD programs. The nastier ones are history but some subtle ones
remain. Similarly, different Gerber viewers can display the same data file
differently. Occasionally, I have to spend a lot of time working with a fab
shop because their Gerber viewers and my Gerber viewers show different
results from the same data. This is an unfortunate waste of both my time
and theirs, but it has to be done. Because we don't use the same brand and
version of software, it is unavoidable.
What I want to avoid is dealing with problems in ODB++ data in addition to
Gerber data. Also, consider that if ODB++ becomes the Gerber replacement,
there will be companies other than Valor writing software for it. That
means there will be some differences between how a Valor program and someone
else's program interprets the same ODB++ data. This may not come up very
often, but it will come up, especially when other vendors first start using
ODB++. Unless Valor achieves a 100% market share, we will all have to deal
with some subtle differences between vendors' software. This problem could
be lessened if an independent industry group produced a validation suite
that a program would have to pass to call itself ODB++ compliant.
I would be happy to support ODB++ as the single output format for any given
board. In fact, I would prefer almost any intelligent data format to
Gerber, which is truly a rotten old standard. But until my customers'
purchasing departments will accept ODB++ only, the only "universal" option
today is Gerber. Until ODB++ becomes as universally accepted by fab shops
as Gerber, or the fab shops start to give a big enough discount to offset
the extra costs of supporting two data formats, IMO most designers will opt
to stay with Gerber. If using ODB++ really saves the fab shops money, and
I'm sure it does, all they have to do is pass some of those savings on to
their customers who use it and it will become the de facto standard before
you know it.
Regards,
Seth Goodman
Goodman Associates, LLC
tel 608.833.9933
fax 608.833.9966
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Date: Thu, 31 Jan 2002 05:40:32 -0600
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Seth Goodman <[log in to unmask]>
Subject: Re: ODB++
X-To: Julian Coates <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Hi Julian,
You make some very good points and I hope that ODB++, or something very much
like it eventually replaces Gerber. Your arguments aren't specific to
Valor, so that's not an issue at all. I'd like to mention a couple of areas
where we view things a little differently.
In comparing the previous transition from film to Gerber to the imminent
transition from Gerber to an intelligent format, the analogy is not as
strong as you imply. In the transition from film to Gerber, there were
rarely any differences between the two, at least once people learned how to
take care of their photoplotters. This is not surprising, since the early
photoplotters came from the same company that wrote the standard! Even so,
the engineering groups I ran during that period only archived one format of
data. When we changed over from film to Gerber, only the Gerbers were
archived. We added the additional process step, as did many groups back
then, of approving the film plots from the board vendor. This was not to
check for improper interpretation of the Gerber data by the photoplotter, it
was to check that the Gerber data represented the native CAD data properly.
For us, these approval films were really check plots that verified the
Gerber generator in the CAD software. Many board vendors required the
customer to approve the films before fabrication anyway. If I recall
correctly, it was a number of years before affordable Gerber viewers
appeared. After using those for a while, the vendors no longer required our
sign-off on films and we were confident enough to not require it either.
The coming transition is a bit more dicey. We're talking about changing
from a simple, dumb format to a complex hierarchical one. The complexity of
the software to generate and read this new format is much higher than for
Gerber. We can therefore expect more software problems than with the
previous transition. I would like to know what are the tools many designers
currently have, that you mentioned, to compare Gerber and ODB++. If they're
affordable, I'd like to try them out. Obviously the fabricators can do this
task but their software costs more than most CAD packages we use to design
the boards, so that is a barrier.
While we could also use high-end CAM software to improve our design quality
by eliminating slivers, acid traps, etc., the situation is the same as I
mentioned before: the board vendors already do this for us and are not
offering reduced prices if we take on that part of the job. The end-product
quality is the same, it's just a question of who does the work. Likewise,
they are not offering improved turnaround times. They are not even telling
us they are considering such policies. This is a very tough sell to top
management who want to know how much it will pay back and when.
Remember that when we switched from film to Gerber, many fabrication shops
bought their own photoplotters and quickly reduced or eliminated
photoplotting charges. The company I worked for at the time was able to
junk our photoplotter and darkroom, reclaim the space they occupied and put
the operator to better use as a PCB layout person. Similarly, when we
stopped requiring sign-off on films, our turnaround times improved
instantly. If an investment of time and money today won't lower our board
prices, shorten the turnaround time or improve quality, it would be more
accurate to call it a donation.
I'm still very much in favor of adopting an intelligent data format. But it
has to be driven by economics. The return has to be at least in the
foreseeable future. The fab shops are apparently not yet able to make it
profitable for us to make the change. Hopefully, that situation will
change.
Regards,
Seth Goodman
Goodman Associates, LLC
tel 608.833.9933
fax 608.833.9966
> -----Original Message-----
> From: Julian Coates [mailto:[log in to unmask]]
> Sent: Thursday, January 31, 2002 3:25 AM
> To: [log in to unmask]; [log in to unmask]
> Subject: RE: [TN] ODB++
>
>
> Hi All,
>
> I am from Valor, I should state that up front, but I would like
> to offer two
> points for consideration:
>
> 1. In the mid-1980's the mainstream PCB manufacturers began to
> accept Gerber
> (instead of film) into their tooling departments. In order to do
> this, they
> had to make capital investments. These investments gave them a competitive
> advantage, because they were able to cut costs overall, reduce
> lot-size due
> to faster tooling cycles, and increase quality. Despite this, for many
> years, the OEMs (their customers) continued to send the design to the
> fabricator in two formats; Gerber, and film. The film was regarded as the
> reference and ultimate specification of the design, but the
> fabricator could
> use the Gerber if he so chose (those who could, did). What is going on now
> between Gerber and ODB++ is basically the same, a transition of formats
> which have uncertainties between them, and for each design somewhere down
> the line somebody has to decide which format to believe in and
> work from. In
> the case of Gerber, it took a few years for the average fabricator to have
> unconditional confidence in the data rather than the film. These
> days, they
> do not receive films at all, and they just work from the Gerber without a
> second thought of what became of the film. In the case of ODB++, many
> fabricators already have tools (as do the designers by the way) to compare
> the graphics and netlist interconnect of the ODB++ versus the Gerber in an
> automated fashion, reducing the risks substantially. The upside (as Mark
> points out) is faster throughput and higher quality. The question
> is: who is
> the beneficiary? The ultimate beneficiary of these gains is the consumer
> (the designer), via the competitive business model of the
> fabrication-outsourcing. From my observation, most fabricators do not
> recover their actual tooling costs in the charges they make to
> the customers
> anyway (they bury their tooling costs in their overheads), so it
> is probably
> unrealistic to expect PCB fabricators to give tooling price-cuts to the
> customers, since they are running their tooling operations at a loss
> already. However, there are gains for the customer, albeit
> indirect: further
> reduction in average delivery times, and higher quality over time; prices
> are dropping anyway. To turn it around, if the designers continue to send
> Gerber, the level of service received from the manufacturers could not
> improve so fast as it can with a smarter interchange format.
>
> 2. Seth makes a good point about validation of ODB++ input and output
> processors. Currently, ODB++ is not a formal standard, though we
> believe it
> will be in good time (thanks to the industry-driven NEMI
> process). When the
> formal standardization occurs, we hope that some independent
> compliance-validation service will be offered by the
> standards-body. Just as
> a side note, independent compliance-proving by an independent body never
> happened (as far as I know) with Gerber RS274D, and RS274X never was a
> standard anyway, the industry just went ahead and implemented the format
> widely, though with considerable variation, as Seth points out.
> Between now
> and formal standardisation of ODB++ or some further-developed
> version, Valor
> offers a service of supporting third parties who implement ODB++, via its
> 3rd-party cooperation program, the "Open Systems Alliance". We do our best
> to offer advice and support for interface testing to all organisations,
> competitive or non-competitive, so that the format has the best chance of
> practical implementation. Some 3rd-parties opt to stay away from this
> service due to competitive reasons, which usually (in our view) results in
> sub-standard implementation of the format, which is a pity. Those who join
> get full support.
>
> After many years of quasi-stability with Gerber, the industry is in
> transition again. I do not sure that there is any clear way of
> accelerating
> the shift to a new CAD/CAM format with price-breaks from the manufacturers
> (fabrication or assembly), since they are all bleeding cash right now
> anyway. The transition will happen steadily, and be driven
> top-down by more
> subtle, but more powerful, factors such as time and quality.
>
> I hope these comment contribute to the debate in a positive way, as
> intended.
>
> Julian Coates
> Valor
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=========================================================================
Date: Thu, 31 Jan 2002 10:46:07 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Peter Swanson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Peter Swanson <[log in to unmask]>
Subject: Re: Conformal Coating
X-To: "[log in to unmask]" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Doug,
I believe that some suppliers of this kind of equipment have dealt
successfully with this issue (conductive media, ionisation, etc). See
http://www.ccrco.com, for example.
Regards,
Peter
--
=========================================================
Peter Swanson [log in to unmask]
INTERTRONICS http://www.intertronics.co.uk
INTERTRONICS is dedicated to providing quality material,
consumable and equipment solutions to the electronics
manufacturing and other technology based industries, with
the highest levels of technical support and customer
service.
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: 30 January 2002 21:27
To: [log in to unmask]
Subject: Re: [TN] Conformal Coating
Mike Sewell Suggests: Would microabrasive blasting of the coating be an
alternative to chemical stripping?
*Just be aware that microabrasive blasting generates a hell of a static
charge. Enough to kill a static sensitive component. I think the EMPF did
some work in microabrasion methods relative to ESD in the late 80s early
90s. Check with the librarian at www.empf.org.
Doug Pauls
Rockwell Collins
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Date: Thu, 31 Jan 2002 07:18:28 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: CERAMIC CSP'S and a MoonMan adventure out of the cave again
Folks,
I have been reviewing all the issues/problems that were faced by my host
company and its supplier ? before I arrived. I would like to share some for
comment as well as my observations, if you would be so kind.
We have one board design using seven .8 mm ceramic CSP?s made by TI. The
first issue facing my company was cracking or separation of balls from the
device. I have reports from Rockwell, who did the F/A and from TI both
pointing to the failure mechanism as possible excessive IMC formation as in
the following without the photos, of course:
Attached are four photos:
CSP-1 shows multiple insertions into sockets.
CSP-2 shows x-section of stock unit
CSP-3 shows magnified x-section of stock unit. Ni/Sn intermetallic layer
appears thick.
CSP-4 shows x-section of device which broke off the PCB - clean break at the
intermetallic layer.
Because of the multiple insertions into sockets, as evidenced by
indentations on the balls, it is considered that multiple thermal excursions
contributed to IMC growth. As the clean break occurred at the IMC interface,
again, this is thought to be the failure mechanism. This may be so, but
other things must be considered as well.
This issue possibly was resolved with TI?s "prototype" parts and we?ve seen
no repeat of this occurrence. No reason is available to me, at least,
concerning the part?s improvement. No matter, there now exist other issues.
I believe, as in a few comment trades, with others (Dave Fish for one), that
our assembler?s inexperience profiling and soldering these devices has been
responsible for poor quality/reliability solder joints. In their defense,
there aren?t/weren?t many suppliers with this experience. Simply, cold
solder joints probably contributed to unacceptability and complete failure
as received ? evidenced by the infamous "C" clamp. The ceramic portion of
the device is extremely massive compared to ball size and the ability to get
required heat to the solder medium and balls to effect acceptable solder
joints. This means, I believe based on past experience, the reflow profile
must be "maxed" out in terms of solder paste performance and joint
formation. I don?t think this was done.
To add to the situation, the CTE mis-match of ceramic and PCB material
certainly has been known to ruin even good solder joints. This may account
to the failure at the IMC interface as well as at the board level.
Therefore, a "too thick" IMC layer probably is/was not the failure
mechanism, or was it?
All solder pads have been re-evaluated and now definitely meet alignment and
size requirements. Stencil apertures are as specified. Solder paste now is
Kester?s 562R, solder volume is acceptable, surface solderability is as
required. What remains is developing a solder reflow profile that will
effect acceptable solder joints for the CSP?s as well as all other devices
on the board.
I realize this should not be a big issue, but having had to go way back to
visit initial failures at the device ball interface, I have some concerns
about whoever builds our next lot of boards. Steve, are you listening.
I would appreciate any comments concerning this small part of the picture. I
would appreciate anyone sharing experiences with what should be another BGA
success story but for what I have presented here.
Thank you all much,
Earl
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Date: Thu, 31 Jan 2002 08:34:11 -0500
Reply-To: "[log in to unmask]" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Gerard O'Brien <[log in to unmask]>
Organization: Photocircuits Corporation
Subject: Re: ENIG Thickness Standard?
X-To: "[log in to unmask]" <[log in to unmask]>
As co-chairman of the 4552 committee, I must take exception to your
comment" It does not contain a
lot of useful detail". For this specification extensive testing was
performed and data presented , paper appeared in the last issue of IPC
review as well as in the Orlando fall conference. The specification for
ENIG is 2 micro inches minimum Au at -4 sigma from the mean and 120 to
240 microinches for the nickel. As a point of note, I tested two days ago
samples from two of the five vendors that supplied samples for wetting
balance testing that were used to generate this specification. The samples
are now 14 months old (they have been lying around my office not protected)
and for the test we had them plated with 1 microinch of gold. THEY STILL
SOLDER AND PASS ALL WETTING BALANCE CRITERIA!!! The degree of porosity at 1
microinch is obviously greater than at 5 microinches however the protection
afforded the underlying nickel is still excellent, solderability testing
was with a ROL0 type flux per j-std 004.
It is intention of the 4552 committee to publish the total data set as a TR
report.
If anyone would like a copy of testing specifics or a copy of a specific
test data set - XRF , wetting balance, contact resistance , please feel
free to contact myself, George Milad -chairman of the committee or Tom
Newton at the IPC
Regards
Gerard O'Brien
Photocircuits Corp.
-----Original Message-----
From: [log in to unmask] [SMTP:[log in to unmask]]
Sent: Wednesday, January 30, 2002 10:04 PM
To: [log in to unmask]
Subject: Re: [TN] ENIG Thickness Standard?
Rick,
I went through this pain a while ago, and got a lot of tremendous help from
Ingemar Hernefjord in particular. I believe there is no released standard
for ENIG, though there is an empirical spec IPC-4552. It does not contain a
lot of useful detail, though. I specify 5 microinches (0.12 microns) of
Gold over minimum 235 microinches (6 microns) Nickel for my boards, after
reading a number of studies and failure reports. In fact I was recommended
to use 250 microinches of Nickel, but this would have made our boards too
thick. The thicker gold layer minimises porosity and therefore oxidation to
the underlying Nickel layer.
Older thinking was for around 100 to 120 microinches Nickel, but studies by
Eriksson and others concluded that with the growth of gold flashing through
the Nickel from one side and Cu/Ni intermetallics on the other side of the
plating, that a thicker Nickel layer would offer the boards a longer
solderability shelf life and greater solder joint reliability.
Hope this helps a bit. Certainly, I haven't experienced any problems with
soldering or mounting of components on boards to this spec.
Peter
Rick Thompson
<rthompson@VENTURAELECTR To: [log in to unmask]
ONICS.COM> cc: (bcc: DUNCAN
Peter/Asst Prin Engr/ST
Sent by: TechNet Aero/ST Group)
<[log in to unmask]> Subject: [TN] ENIG
Thickness Standard?
01/31/02 08:36 AM
Please respond to
"TechNet E-Mail Forum.";
Please respond to Rick
Thompson
Is there a standard for the plating thickness of the ENIG surface
finish? I've searched the archives and didn't find anything. Based on
a customer request we had increased the requirement for the electroless
nickel to 200u inches. A couple of our board vendors are telling me that
that is excessive and that anything over 100u inches is overkill. I've
seen references in the archives for anything from 120u inches to 200u
inches. What (if anything) is considered standard for this finish?
Thanks for your inputs.
Rick Thompson
Ventura Electronics Assembly
2655 Park Center Dr.
Simi Valley, CA 93065
+1 (805) 584-9858 x-304 voice
+1 (805) 584-1529 fax
[log in to unmask]
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Date: Thu, 31 Jan 2002 08:43:14 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marion A. Graybeal" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marion A. Graybeal" <[log in to unmask]>
Subject: Re: ENIG Thickness Standard?
X-To: Rick Thompson <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Rick,
The IPC spec for ENIG, which is near release, specifies 120-240
microinches of Ni and 2-4 microinches of Au.
Marion Graybeal
----- Original Message -----
From: Rick Thompson <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, January 30, 2002 7:36 PM
Subject: [TN] ENIG Thickness Standard?
> Is there a standard for the plating thickness of the ENIG surface
> finish? I've searched the archives and didn't find anything. Based on
> a customer request we had increased the requirement for the electroless
> nickel to 200u inches. A couple of our board vendors are telling me that
> that is excessive and that anything over 100u inches is overkill. I've
> seen references in the archives for anything from 120u inches to 200u
> inches. What (if anything) is considered standard for this finish?
>
> Thanks for your inputs.
>
>
> Rick Thompson
> Ventura Electronics Assembly
> 2655 Park Center Dr.
> Simi Valley, CA 93065
>
> +1 (805) 584-9858 x-304 voice
> +1 (805) 584-1529 fax
> [log in to unmask]
>
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Date: Thu, 31 Jan 2002 08:49:34 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: ODB++ ... or GenCAM?
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_a9.22238cfe.298aa56e_boundary"
--part1_a9.22238cfe.298aa56e_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
Good day to all,
It seems that IPC GenCAM is missing from this discussion. 25 years or so of
group effort to develop a generic industry standard sitting on the sidelines
in this dialog.
The following is taken from the forum sponsors website
"...Establishes the capability for a single ANSI STD datafile format to
transfer data to all disciplines in the PCB supply chain.
...Provides for complete transfer of test data and electrical test parameters.
...Can accommodate several BOM descriptions in a single data file.
...Brings your design into close contact with DFM issues."
Has anyone taken it for a lap? Is (are) there a reason(s) for its absence in
this dialog?
Best to all,
Joe
--part1_a9.22238cfe.298aa56e_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">Good day to all,
<BR>
<BR>It seems that IPC GenCAM is missing from this discussion. 25 years or so of group effort to develop a generic industry standard sitting on the sidelines in this dialog.
<BR>
<BR>The following is taken from the forum sponsors website
<BR>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Verdana" LANG="0">"...Establishes the capability for a single ANSI STD datafile format to transfer data to all disciplines in the PCB supply chain.
<BR>
<BR>...Provides for complete transfer of test data and electrical test parameters.
<BR>
<BR>...Can accommodate several BOM descriptions in a single data file.
<BR>
<BR>...Brings your design into close contact with DFM issues."
<BR>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">Has anyone taken it for a lap? Is (are) there a reason(s) for its absence in this dialog? </FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Verdana" LANG="0">
<BR>
<BR>Best to all,
<BR>Joe</FONT></HTML>
--part1_a9.22238cfe.298aa56e_boundary--
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Date: Thu, 31 Jan 2002 08:19:28 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: AOI Stuff again...
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I work for a CM with high mix low runs. We use an AOI right now. I find =
that one aspect of AOI that has really reduced labor was the first article =
process for component id and placement. We spend a lot of labor for the =
first board to confirm correct part and alignment from pick and place. We =
also do the same process if we use a Final Inspection. Having the machine =
to do this is much, much faster which gives a quicker set-up and run =
approvals. =20
As far as solder joints I agree the AOI leaves a lot to be desired. It =
does good with shorts but insufficient and no solders are dependent on =
device. Like a "J" lead or a QFP it just doesn't do well. But non =
solders on discretes are pretty good. =20
As with most equipment made to make our lives easier and less of us needed =
it has it's limitations but what it can do it does well. =20
Kathy=20
--=_CE93A691.9BFA979C
Content-Type: text/plain
Content-Disposition: attachment; filename="TEXT.htm"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=Content-Type content="text/html; charset=iso-8859-1">
<META content="MSHTML 6.00.2712.300" name=GENERATOR></HEAD>
<BODY style="MARGIN-TOP: 2px; FONT: 10pt MS Sans Serif; MARGIN-LEFT: 2px">
<DIV>I work for a CM with high mix low runs. We use an AOI right
now. I find that one aspect of AOI that has really reduced labor was the
first article process for component id and placement. We spend a lot of
labor for the first board to confirm correct part and alignment from pick and
place. We also do the same process if we use a Final Inspection.
Having the machine to do this is much, much faster which gives a quicker set-up
and run approvals. </DIV>
<DIV> </DIV>
<DIV>As far as solder joints I agree the AOI leaves a lot to be desired.
It does good with shorts but insufficient and no solders are dependent on
device. Like a "J" lead or a QFP it just doesn't do well. But non
solders on discretes are pretty good. </DIV>
<DIV> </DIV>
<DIV>As with most equipment made to make our lives easier and less of us needed
it has it's limitations but what it can do it does well. </DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
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Date: Thu, 31 Jan 2002 08:27:18 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jason Gregory <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jason Gregory <[log in to unmask]>
Subject: Re: AOI Stuff again...
X-To: [log in to unmask]
Mime-Version: 1.0
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Aaaaah Steve,
I believe you're in the same boat I was in around two years ago. We were =
building assemblies (down-hole, oilfield & class 3 medical (implantable)) =
and we were having major quality concerns. Products were going out the =
door missing components, being damaged from rework, etc. and it would've =
been a saving grace to have AOI capabilities. Alas, it was not to be. We =
didn't have the money for such elaborate systems. Any way, I don't know =
how to answer your question. You either use your available human eyes or =
buy a machine and hope it can pay for itself. You can also request from =
customers for "golden boards", fully populated, to use for programming =
prior to build. If you need leads on good systems, here's a few:
Agilent (MVT) - Agilent bought MVT and is making a real nice system. Don't =
know much about it, just know MVT had a good system, just not enough cash =
to improve and market it broadly.
Cyberoptics - Don't know much about it. Only that it can configured either =
as a paste inspection machine or post-reflow AOI.
Orbotech - We had a few in Alabama and they're very nice, just a tad =
difficult to program.
Or you can do like me and get an Agilent 5DX and have fun immersing =
yourself in the complex task of programming (it dang sure ain't cost-effect=
ive for your needs, though).
Hope this helps
Jason Gregory
Software Specialist=20
Sanmina-SCI - Tech Center Austin
15508 Bratton Lane
Austin, Tx. 78728
(512)246-5648
[log in to unmask]
>>> [log in to unmask] 01/30/02 09:00PM >>>
Hi all!
Bringing up the topic of AOI again. Read the Glenn Woodhouse summary =
(which I
think was GREAT by the way) that Daan reposted about the state of the
technology, had a fellow engineer that I work with attend a session at =
APEX
about AOI, and it seems that things may have become a bit cheaper, but as =
far
as using AOI for solder joint evaluation, there's still much to be =
desired...
The situation here is that there is some pressure from those above to get =
a
system in here that will be a fool-proof method to put a piece of =
equipment
in place that will eliminate the need for human inspection.
My take on it is that one focuses on making sure that the process is right
from the beginning, and then you don't need to spend a bunch of money on
automated inspection equipment, or depend on humans to inspect each and =
every
solder joint.
The reason I say that is because we are a low volume, high part number =
shop.
We may have ongoing business for years, but it maybe 10 assemblies a
month...what we consider high volume is a run of 250 assemblies per work
order...hehehe.
I just have the opinion that spending the big bucks for the AOI equipment
doesn't make a whole lot of sense in our situation...we'll be tweeking
programs during the run and probably won't have all the false calls, or
missed defects ironed-out by the time the work order is built...then a =
month
or two later on the same assembly, you go through the same drill again...
Any thoughts on this?
-Steve Gregory-
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Date: Thu, 31 Jan 2002 08:36:50 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: ENIG Thickness Standard?
MIME-Version: 1.0
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Good Morning TechNet! Rick, I have a very different perspective on ENIG
than Peter so here is some food for thought. There is a specification for
ENIG - IPC-4552 - which is in final ballot and should be release in the
March/May timeframe. I recommend getting a copy. It's my opinion that the
specification is quite useful considering there is no other specification
available for industry use. The ASTM B488 specification is not a workable
solution for electronics applications. There was a great deal of committee
discussion on the electroless nickel plating thickness. The nickel
thickness is very much viewed as application specific, for example, RF
designers desire minimal thickness (30-50 uinches) as opposed to connecting
applications which use 200 uinches. Rockwell Collins is successfully using
2-5 uninches for the immersion gold thickness and 50-150 uinches for the
electroless nickel thickness in avionics applications and we intend on
using the IPC-4552 specification in our documentation. Additionally, 50
uinches of electroless nickel is very adequate as a diffusion barrier as
both the nickel/copper and nickel/gold phase diagrams demonstrate a wide
range of immiscibility The only instances I have seen a 50 uinch
electroless nickel thickness not be adequate was for pwbs which were
subjected to repetitive thermal excursions (e.g. lots of rework, or 4
reflow passes). Using an immersion gold thickness of 6 uinches will not
guarantee you solderability - the 4552 committee demonstrated that (by
conducting testing) that 2 uinches of immersion gold can be steam
conditioned and still provide expected solderability coverage. Teaming with
your ENIG vendor, understanding their plating process control practices and
requiring some level of solderability testing is the best way of insuring
solderability. Good Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
[log in to unmask]@ipc.org> on 01/30/2002 09:03:53 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to [log in to unmask]
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: Re: [TN] ENIG Thickness Standard?
Rick,
I went through this pain a while ago, and got a lot of tremendous help from
Ingemar Hernefjord in particular. I believe there is no released standard
for ENIG, though there is an empirical spec IPC-4552. It does not contain a
lot of useful detail, though. I specify 5 microinches (0.12 microns) of
Gold over minimum 235 microinches (6 microns) Nickel for my boards, after
reading a number of studies and failure reports. In fact I was recommended
to use 250 microinches of Nickel, but this would have made our boards too
thick. The thicker gold layer minimises porosity and therefore oxidation to
the underlying Nickel layer.
Older thinking was for around 100 to 120 microinches Nickel, but studies by
Eriksson and others concluded that with the growth of gold flashing through
the Nickel from one side and Cu/Ni intermetallics on the other side of the
plating, that a thicker Nickel layer would offer the boards a longer
solderability shelf life and greater solder joint reliability.
Hope this helps a bit. Certainly, I haven't experienced any problems with
soldering or mounting of components on boards to this spec.
Peter
Rick Thompson
<rthompson@VENTURAELECTR To: [log in to unmask]
ONICS.COM> cc: (bcc: DUNCAN
Peter/Asst Prin Engr/ST
Sent by: TechNet Aero/ST Group)
<[log in to unmask]> Subject: [TN] ENIG
Thickness Standard?
01/31/02 08:36 AM
Please respond to
"TechNet E-Mail Forum.";
Please respond to Rick
Thompson
Is there a standard for the plating thickness of the ENIG surface
finish? I've searched the archives and didn't find anything. Based on
a customer request we had increased the requirement for the electroless
nickel to 200u inches. A couple of our board vendors are telling me that
that is excessive and that anything over 100u inches is overkill. I've
seen references in the archives for anything from 120u inches to 200u
inches. What (if anything) is considered standard for this finish?
Thanks for your inputs.
Rick Thompson
Ventura Electronics Assembly
2655 Park Center Dr.
Simi Valley, CA 93065
+1 (805) 584-9858 x-304 voice
+1 (805) 584-1529 fax
[log in to unmask]
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Date: Thu, 31 Jan 2002 08:49:20 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Antw: [TN] Wave Solder/NoPb Question
X-To: [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset="us-ascii"
Hi Guenter! Great information! One additional question - do you know if
the molten tin attack is more severe on base stainless steel alloys such as
the 301-304 alloy series or are the microalloyed 316/321/347 alloy series
equally attacked? Also, I have always made the assumption that titanium
with its tough natural oxide would be pretty immune to molten tin attack
but don't have any experience or data to back that up. I know that some of
the equipment vendors use titanium in the wave equipment but haven't seen
any information of molten tin attack.
Dave
Guenter Grossmann <[log in to unmask]>@ipc.org> on 01/31/2002
02:15:53 AM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to Guenter Grossmann <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: [TN] Antw: [TN] Wave Solder/NoPb Question
Dave
We run trials with folks from ERSA. Actually, due to their knowledge,
erosion of the solderpot, the wave-nozzle, and the pump are considerable.
However, new equipment seem to be produced lead-free save with coated
stainless steel. It seems also as if it is possible to cover the parts in
danger with a organic coating (paint) which can be done during the downtime
when a service is done. The coating needs a refreshment every one or two
years I heard though one line with that coating seems to run now three
years in 24 hours shift without problems. What we also looked at are
upgrade kits for older equipment. I am right now writing a cost-
evaluation.
Guenter
.
EMPA
Swiss Federal Institute for Materials Testing and Research
Centre for Reliability
Dipl. Eng. Guenter Grossmann
8600 Duebendorf
Switzerland
Phone: xx41 1 823 4279
Fax : xx41 1823 4054
mail: [log in to unmask]
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Date: Thu, 31 Jan 2002 15:13:43 -0000
Reply-To: Dougal Stewart <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dougal Stewart <[log in to unmask]>
Subject: Re: pulse plating - without additives
X-To: Adam Seychell <[log in to unmask]>
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I don't know whether this is a cynical remark (as if), but none of the
chemistry suppliers have ever promoted pulse plating with copper without
additives. In all the years I have had experience with acid copper pulse
plating (and Exacta led the way) it has been notable that simpler forms of
plating chemistry (ie with carrier and brightener, but NO leveller) worked
best. I have had long discussions with Jack Josefowicz from Tyco on the
subject, and I would suggest that he would be an authority on whether it is
possible.
Dougal Stewart
email: [log in to unmask]
phone: +44 1896 822204
mob: +44 7984 629667
----- Original Message -----
From: "Adam Seychell" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, January 30, 2002 8:09 AM
Subject: [TN] pulse plating - without additives
> Hello platers. I am hoping someone here can share a few words
> of wisdom about reverse pulse plating. I'm having difficulty
> finding detailed information on the subject, as my local university
> library showed to carry almost nothing. It seems that the
> literature on reverse pulse plating is bound to research papers
> only (which I latter learned can be quite costly and time
> consuming to obtain). What I like to know is a method of plating
> "standard" printed circuit boards in acid copper bath *without*
> the use of additives. Pulse plating without additives has been
> done or so I've been told, however most documents I have
> read only talk about baths containing additives.
>
> Normally, a pure DC in acid copper (200 g/l H2SO4, 20 g/l Cu)
> would produce a rough and grainy deposit, especially when
> thickness' become high ( >35 um). The problem is aggravated by
> increasing current density. Even at current densities of
> 0.5A/dm2 the deposits still remain unacceptable. This is
> something I have observed through experimentation.
>
> A test panel was plated using reverse pulse technique to see
> what effect it had compared to DC plating at an equivalent
> average current density. Not having a proper pulse plating power
> supply I constructed my own basic one, using standard DC supply
> and an electronic circuit to periodically reverse the output. The
> parameters of the plating were:
>
> forward time = 5 ms
> reverse time = 1.7 ms
> forward & reverse current densities = 3 A/dm2
> average current density = 1.5 A/dm2
>
> The pulse plating deposits were only slightly improved over DC
> plating. A rough and crystalline surface was clearly visible under a
> 40X microscope. This does not sound promising and I am hoping
> this is due to incorrect characteristics of the current pulse. Most
> reverse pulse plating systems tend to use forward/reverse current
> ratios of around 3, forward times of 10~20ms and reverse times
> 1~2ms. Is important for the current reverse pulse to be short and
> high ?
>
> If anyone could guide me to right path I'd be greatly thankful. If
> there is no such thing as additive free copper plating for PC
> fabrication then kindly let me know as this could save me lot of
> time doing what others have already attempted.
>
> regards,
>
> Adam Seychell.
>
> --------------------------------------------------------------------------
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Date: Thu, 31 Jan 2002 07:19:31 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rick Thompson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rick Thompson <[log in to unmask]>
Organization: Ventura Electronics Assembly
Subject: Re: AOI Stuff again...
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Steve,
We've been using AOI in a similar environment for about 18 months. While
there is a somewhat constant 'tweaking' effort adjusting for part and
vendor changes, we still have found it more efficient than simply doing
visual inspection. Stepping through and adjusting for false calls and
changes is still significantly faster than visual inspection as well as
being more consistent. Yes, process control is the obvious way to go,
but stuff happens <g>. We've seen a significant decrease in customer
return rates since putting it in place. With the data collection, it
also allows us to pinpoint specific problem areas and address them on
the line, thus improving overall yield.
That said, it did not allow us to eliminate an inspector. For one thing,
you need someone to run the machine and maintain programs. There's also
the defect classes that aren't readily detectable in AOI. Solder
inspection is still a very 'iffy' area in my opinion. Despite
manufacturer's claims, I haven't seen any solder inspection that's
really effective. I know there are some vector based systems that
supposedly increase the ability to define and inspect solder joints but
there are so many areas that are difficult or impossible to view
adequately that solder inspection with the AOI systems I've seen is a
hit or miss proposition. What we have found is that certain types of
solder inspection is useful for verifying product. The main thing is
that it has allowed our inspectors to concentrate on the areas that
aren't inspectable with AOI, like through-hole parts, connectors, etc.
Regards,
Rick Thompson
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of [log in to unmask]
Sent: Wednesday, January 30, 2002 7:00 PM
To: [log in to unmask]
Subject: [TN] AOI Stuff again...
Hi all!
Bringing up the topic of AOI again. Read the Glenn Woodhouse summary
(which I think was GREAT by the way) that Daan reposted about the state
of the technology, had a fellow engineer that I work with attend a
session at APEX about AOI, and it seems that things may have become a
bit cheaper, but as far as using AOI for solder joint evaluation,
there's still much to be desired...
The situation here is that there is some pressure from those above to
get a system in here that will be a fool-proof method to put a piece of
equipment in place that will eliminate the need for human inspection.
My take on it is that one focuses on making sure that the process is
right from the beginning, and then you don't need to spend a bunch of
money on automated inspection equipment, or depend on humans to inspect
each and every solder joint.
The reason I say that is because we are a low volume, high part number
shop. We may have ongoing business for years, but it maybe 10 assemblies
a month...what we consider high volume is a run of 250 assemblies per
work order...hehehe.
I just have the opinion that spending the big bucks for the AOI
equipment doesn't make a whole lot of sense in our situation...we'll be
tweeking programs during the run and probably won't have all the false
calls, or missed defects ironed-out by the time the work order is
built...then a month or two later on the same assembly, you go through
the same drill again...
Any thoughts on this?
-Steve Gregory-
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Date: Thu, 31 Jan 2002 08:35:06 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Denis Lefebvre <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Denis Lefebvre <[log in to unmask]>
Subject: Re: ODB++ or GenCAM or IPC-350?
X-To: [log in to unmask]
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From a designers point of view:
Even before the advent of GENCAM was IPC's effort with IPC-350. In fact,
that is where CAM350 got it's name. The original intent of that application
was to output the "new" industry standard data format, IPC-350. This later
gave way to GENCAM which has now stepped aside (or- been pushed aside) for
ODB++.
The impetus to develop an industry standard data exchange format has been
around for over a decade.
So, what is standing the way? EDA software companies!
Imagine the convenience designers would experience if there was a data
format that could be easily exchanged between design platforms! Good God,
could this have any effect on market share? I think not.. but I believe
that is the fear held by the EDA vendors. It will surely be a cold day when
a standard data format will be supported by vendors of PCB design
applications. I am convinced this function will continue to be relegated to
applications that are in the CAM arena and will remain a post-processing
function for the designer.
The objectives Joe listed below were shared by the IPC-350 effort as well.
Denis Lefebvre, C.I.D.
Senior PCB Designer
Finisar Corporation
(408)542-3832
http://www.finisar.com
At 08:49 AM 1/31/2002 -0500, you wrote:
>Good day to all,
>
>It seems that IPC GenCAM is missing from this discussion. 25 years or so
>of group effort to develop a generic industry standard sitting on the
>sidelines in this dialog.
>
>The following is taken from the forum sponsors website
>
>"...Establishes the capability for a single ANSI STD datafile format to
>transfer data to all disciplines in the PCB supply chain.
>
>...Provides for complete transfer of test data and electrical test
>parameters.
>
>...Can accommodate several BOM descriptions in a single data file.
>
>...Brings your design into close contact with DFM issues."
>
>Has anyone taken it for a lap? Is (are) there a reason(s) for its absence
>in this dialog?
>
>Best to all,
>Joe
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Content-Type: text/html; charset="us-ascii"
<html>
From a designers point of view:<br><br>
Even before the advent of GENCAM was IPC's effort with IPC-350. In fact,
that is where CAM350 got it's name. The original intent of that
application was to output the "new" industry standard data
format, IPC-350. This later gave way to GENCAM which has now stepped
aside (or- been pushed aside) for ODB++. <br><br>
The impetus to develop an industry standard data exchange format has been
around for over a decade. <br><br>
So, what is standing the way? EDA software companies! <br><br>
Imagine the convenience designers would experience if there was a data
format that could be easily exchanged between design platforms! Good God,
could this have any effect on market share? I think not.. but I believe
that is the fear held by the EDA vendors. It will surely be a cold day
when a standard data format will be supported by vendors of PCB design
applications. I am convinced this function will continue to be relegated
to applications that are in the CAM arena and will remain a
post-processing function for the designer. <br><br>
The objectives Joe listed below were shared by the IPC-350 effort as
well.<br><br>
<font face="arial">Denis Lefebvre, C.I.D.<br>
Senior PCB Designer<br>
Finisar Corporation<br>
(408)542-3832<br>
<a href="http://www.finisar.com/" eudora="autourl">http://www.finisar.com<br><br>
</a></font>At 08:49 AM 1/31/2002 -0500, you wrote:<br>
<blockquote type=cite class=cite cite><font face="Arial, Helvetica" size=2>Good
day to all, <br><br>
It seems that IPC GenCAM is missing from this discussion. 25 years or so
of group effort to develop a generic industry standard sitting on the
sidelines in this dialog. <br><br>
The following is taken from the forum sponsors website <br><br>
</font>"...Establishes the capability for a single ANSI STD datafile
format to transfer data to all disciplines in the PCB supply chain.
<br><br>
...Provides for complete transfer of test data and electrical test
parameters. <br><br>
...Can accommodate several BOM descriptions in a single data file.
<br><br>
...Brings your design into close contact with DFM issues."
<br><br>
<font face="Arial, Helvetica" size=2>Has anyone taken it for a lap? Is
(are) there a reason(s) for its absence in this dialog? </font>
<br><br>
Best to all, <br>
Joe<font face="arial"> </font></blockquote></html>
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Date: Thu, 31 Jan 2002 08:19:56 -0800
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Ahne Oosterhof <[log in to unmask]>
Subject: Re: ODB++
X-cc: Jim <[log in to unmask]>
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Yikes, sorry, wrong button pushed and there went an unfinished
-mail ------------
Following is a more finished one:
I have been trying to follow the development of new data standards in this
industry. I have listened to the various interested parties make very
interesting claims about the goodness of their products. But at the moment I
hope that the GenCAM type effort is going to win. Even though I have no
reason to wish that Gerber would go away.
The nice things about Gerber are that it is a very simple standard and I can
read and understand the file. Therefore I can check the content of a file
and fix problems with the data. And I have not yet come across images that
cannot be represented by Gerber data.
The unpleasant things that have happened with Gerber is, that there are
always software designers who can and will "improve" things. And now their
"Gerber-like" output cannot be read by input devices that fully comply with
the Gerber Standard.
Then there are software engineers who design input devices and decide that
certain features and rules in the standard are superfluous and exclude those
from their package. The result is of course that their product at times does
not show results that were in the original fully complying data.
With more complex data standards it is hard to believe that these problems
are going away or are going to be easier to deal with. And the reason that I
lean towards GenCAM is that the effort to develop that standard includes
compliance checkers to help users determine that their output or input files
do indeed comply with the standard. The data format is readable so it is
easier to check what is inside the file and there is intent to assure that
all future versions are backwards compatible. So when I store data I don't
have to store interpreters to go with that specific data.
Next question: when is it going to be ready and is it going to be accepted
widely?
And of course a disadvantage of these new all-encompassing data files is
that I only need the layers that have the information needed to make a
stencil and I don't need (and I really don't want) 25Mbyte of data,
including the information on what parts to buy where and how to build and
test the board. We already have received files that include the little note:
Please destroy files after delivery of stencil !!!
Have fun,
Ahne.
A-Laser, Inc.
* I assume you are comfortable with your system outputting gerber, ---
I would also opt for ODB++ as it can carry a lot more than just bare board
information. ---
The problem I have is in archiving any data object in more than one
ormat ---
how do you insure that both sets of output data are identical in every
way? ---
If the CAD system doesn't produce ODB++ directly, and most don't ----
we use a third party tool (I use CAM350) to translate into ODB++, either
from the native CAD file or from Gerbers. ---
Producing an output file, either Gerber or ODB++, from a native CAD database
is a translation process. ---
I have yet to own a piece of bug-free software. ---
I know from experience that there are flaws in the Gerber data generators in
most CAD programs. ---
Similarly, different Gerber viewers can display the same data file
differently. ---
if an independent industry group produced a validation suite that a program
would have to pass to call itself ODB++ compliant. ---
Gerber, which is truly a rotten old standard. ---
Until ODB++ becomes as universally accepted by fab shops as Gerber ---
Regards,
From Seth Goodman's e-mail.
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Date: Thu, 31 Jan 2002 10:54:24 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jeff Ferry <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jeff Ferry <[log in to unmask]>
Subject: BGA Rework Using Paste vs. No Paste
Fellow TechNetters,
We nearly always apply solder paste to the circuit board when we replace
BGA components during rework. Yet, after speaking with a handfull of BGA
equipment companies at APEX, seems like they all recommend using flux only
vs. paste, unless the circuit board is used in a high rel application.
What do ya'all do/recommend for BAG rework? Can you point me to any
studies/reports on the subject?
Thanks,
Jeff Ferry
CEO
Circuit Technology Center, Inc.
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Date: Thu, 31 Jan 2002 12:08:48 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: CERAMIC CSP'S and a MoonMan adventure out of the cave again
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Hey Everybody!
I've got Earls pictures up on my web page. Go to:
http://www.stevezeva.homestead.com/
Yes, Earl I'm not only listening, but taking notes as well...
-Steve Gregory-
> Folks,
>
> I have been reviewing all the issues/problems that were faced by my host
> company and its supplier ? before I arrived. I would like to share some for
> comment as well as my observations, if you would be so kind.
>
> We have one board design using seven .8 mm ceramic CSP?s made by TI. The
> first issue facing my company was cracking or separation of balls from the
> device. I have reports from Rockwell, who did the F/A and from TI both
> pointing to the failure mechanism as possible excessive IMC formation as in
> the following without the photos, of course:
>
> Attached are four photos:
>
> CSP-1 shows multiple insertions into sockets.
> CSP-2 shows x-section of stock unit
> CSP-3 shows magnified x-section of stock unit. Ni/Sn intermetallic layer
> appears thick.
> CSP-4 shows x-section of device which broke off the PCB - clean break at the
> intermetallic layer.
>
> Because of the multiple insertions into sockets, as evidenced by
> indentations on the balls, it is considered that multiple thermal excursions
> contributed to IMC growth. As the clean break occurred at the IMC interface,
> again, this is thought to be the failure mechanism. This may be so, but
> other things must be considered as well.
>
> This issue possibly was resolved with TI?s "prototype" parts and we?ve seen
> no repeat of this occurrence. No reason is available to me, at least,
> concerning the part?s improvement. No matter, there now exist other issues.
>
> I believe, as in a few comment trades, with others (Dave Fish for one), that
> our assembler?s inexperience profiling and soldering these devices has been
> responsible for poor quality/reliability solder joints. In their defense,
> there aren?t/weren?t many suppliers with this experience. Simply, cold
> solder joints probably contributed to unacceptability and complete failure
> as received ? evidenced by the infamous "C" clamp. The ceramic portion of
> the device is extremely massive compared to ball size and the ability to get
> required heat to the solder medium and balls to effect acceptable solder
> joints. This means, I believe based on past experience, the reflow profile
> must be "maxed" out in terms of solder paste performance and joint
> formation. I don?t think this was done.
>
> To add to the situation, the CTE mis-match of ceramic and PCB material
> certainly has been known to ruin even good solder joints. This may account
> to the failure at the IMC interface as well as at the board level.
> Therefore, a "too thick" IMC layer probably is/was not the failure
> mechanism, or was it?
>
> All solder pads have been re-evaluated and now definitely meet alignment and
> size requirements. Stencil apertures are as specified. Solder paste now is
> Kester?s 562R, solder volume is acceptable, surface solderability is as
> required. What remains is developing a solder reflow profile that will
> effect acceptable solder joints for the CSP?s as well as all other devices
> on the board.
>
> I realize this should not be a big issue, but having had to go way back to
> visit initial failures at the device ball interface, I have some concerns
> about whoever builds our next lot of boards. Steve, are you listening.
>
> I would appreciate any comments concerning this small part of the picture. I
> would appreciate anyone sharing experiences with what should be another BGA
> success story but for what I have presented here.
>
> Thank you all much,
>
> Earl
>
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hey Everybody!
<BR>
<BR>I've got Earls pictures up on my web page. Go to:
<BR>
<BR>http://www.stevezeva.homestead.com/
<BR>
<BR>Yes, Earl I'm not only listening, but taking notes as well...
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Folks,
<BR>
<BR>I have been reviewing all the issues/problems that were faced by my host
<BR>company and its supplier ? before I arrived. I would like to share some for
<BR>comment as well as my observations, if you would be so kind.
<BR>
<BR>We have one board design using seven .8 mm ceramic CSP?s made by TI. The
<BR>first issue facing my company was cracking or separation of balls from the
<BR>device. I have reports from Rockwell, who did the F/A and from TI both
<BR>pointing to the failure mechanism as possible excessive IMC formation as in
<BR>the following without the photos, of course:
<BR>
<BR>Attached are four photos:
<BR>
<BR>CSP-1 shows multiple insertions into sockets.
<BR>CSP-2 shows x-section of stock unit
<BR>CSP-3 shows magnified x-section of stock unit. Ni/Sn intermetallic layer
<BR>appears thick.
<BR>CSP-4 shows x-section of device which broke off the PCB - clean break at the
<BR>intermetallic layer.
<BR>
<BR>Because of the multiple insertions into sockets, as evidenced by
<BR>indentations on the balls, it is considered that multiple thermal excursions
<BR>contributed to IMC growth. As the clean break occurred at the IMC interface,
<BR>again, this is thought to be the failure mechanism. This may be so, but
<BR>other things must be considered as well.
<BR>
<BR>This issue possibly was resolved with TI?s "prototype" parts and we?ve seen
<BR>no repeat of this occurrence. No reason is available to me, at least,
<BR>concerning the part?s improvement. No matter, there now exist other issues.
<BR>
<BR>I believe, as in a few comment trades, with others (Dave Fish for one), that
<BR>our assembler?s inexperience profiling and soldering these devices has been
<BR>responsible for poor quality/reliability solder joints. In their defense,
<BR>there aren?t/weren?t many suppliers with this experience. Simply, cold
<BR>solder joints probably contributed to unacceptability and complete failure
<BR>as received ? evidenced by the infamous "C" clamp. The ceramic portion of
<BR>the device is extremely massive compared to ball size and the ability to get
<BR>required heat to the solder medium and balls to effect acceptable solder
<BR>joints. This means, I believe based on past experience, the reflow profile
<BR>must be "maxed" out in terms of solder paste performance and joint
<BR>formation. I don?t think this was done.
<BR>
<BR>To add to the situation, the CTE mis-match of ceramic and PCB material
<BR>certainly has been known to ruin even good solder joints. This may account
<BR>to the failure at the IMC interface as well as at the board level.
<BR>Therefore, a "too thick" IMC layer probably is/was not the failure
<BR>mechanism, or was it?
<BR>
<BR>All solder pads have been re-evaluated and now definitely meet alignment and
<BR>size requirements. Stencil apertures are as specified. Solder paste now is
<BR>Kester?s 562R, solder volume is acceptable, surface solderability is as
<BR>required. What remains is developing a solder reflow profile that will
<BR>effect acceptable solder joints for the CSP?s as well as all other devices
<BR>on the board.
<BR>
<BR>I realize this should not be a big issue, but having had to go way back to
<BR>visit initial failures at the device ball interface, I have some concerns
<BR>about whoever builds our next lot of boards. Steve, are you listening.
<BR>
<BR>I would appreciate any comments concerning this small part of the picture. I
<BR>would appreciate anyone sharing experiences with what should be another BGA
<BR>success story but for what I have presented here.
<BR>
<BR>Thank you all much,
<BR>
<BR>Earl
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
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Date: Thu, 31 Jan 2002 11:12:20 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: CERAMIC CSP'S and a MoonMan adventure out of the cave again
X-To: [log in to unmask]
Thanks for the posting of the dirty pictures. Nasty is more like it. Even
got old Werner's interest as he asked me to send them directly to him. Hell,
I sent the whole report. Can't wait to get the facts.
Also, one of our key players is using about 60 of these little muthas on a
board. Kerry McMullin is sending a profile later. Can't wait to see that as
well.
This IS turning out to be an adventure. I do love this stuff.
Earl
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Date: Thu, 31 Jan 2002 11:15:24 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: BGA Rework Using Paste vs. No Paste
X-To: Jeff Ferry <[log in to unmask]>
Jeff,
It's the only way to go. I've been designing, placing, reflowing and
reworking BGA's for nearly 8 years now. It took me five minutes to make the
discovery and, as I've said far too often, I'd use flux only on initial
production if feasible.
Regards and respect,
Earl Moon
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Date: Thu, 31 Jan 2002 09:22:10 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ed Popielarski <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ed Popielarski <[log in to unmask]>
Subject: Re: Flux residue with a no-clean process, BGA Reballing
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_0019_01C1AA38.C2A26E40"
This is a multi-part message in MIME format.
------=_NextPart_000_0019_01C1AA38.C2A26E40
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Hi all,
I've found this thread to be very interesting and informative, but would =
like to present a "different twist" to the subject:
I have a client using our Reballing system to recondition all sorts of =
BGA and uBGA for re-use after de-soldering. They are currently using a =
water soluble paste and cleaning with DI, however the residual absorbed =
moisture presents a concern, so the devices are baked after cleaning. =
This increases turnaround time, so they are considering moving to a =
no-clean process.=20
My opinion is that there will be residues and they could possibly be =
incompatible with subsequent platforms utilized by the end user, as well =
as creating aesthetic impact. Cleaning alternatives for no-clean fluxes =
rival the more aggressive (therefore more forgiving) water solubles, so =
the benefit is lost if cleaned.
Any and all opinions, theories, suggestions and experiences are =
welcomed!
=20
Regards,
Ed Popielarski
QTA Machine
10 Mc Laren, Ste D
Irvine, Ca. 92618
Phone:949-581-6601
Fax: 949-581-2448
Cel: 949-337-2578
WWW.QTA.NET
------=_NextPart_000_0019_01C1AA38.C2A26E40
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4807.2300" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Hi all,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>I've found this thread to be very =
interesting and=20
informative, but would like to present a "different twist" to the=20
subject:</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>I have a client using our Reballing =
system to=20
recondition all sorts of BGA and uBGA for re-use after de-soldering. =
They are=20
currently using a water soluble paste and cleaning with DI, however the =
residual=20
absorbed moisture presents a concern, so the devices are baked after =
cleaning.=20
This increases turnaround time, so they are considering moving to a =
no-clean=20
process. </FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>My opinion is that there will be =
residues and=20
they could possibly be incompatible with subsequent platforms utilized =
by the=20
end user, as well as creating aesthetic impact. Cleaning =
alternatives for=20
no-clean fluxes rival the more aggressive (therefore more forgiving) =
water=20
solubles, so the benefit is lost if cleaned.</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Any and all opinions, theories, =
suggestions and=20
experiences are welcomed!</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Regards,</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Ed Popielarski<BR>QTA Machine<BR>10 Mc =
Laren, Ste=20
D<BR>Irvine, Ca. 92618</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2>Phone:949-581-6601<BR>Fax: =
949-581-2448<BR>Cel:=20
949-337-2578</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial size=3D2><A=20
href=3D"http://www.QTA.NET">WWW.QTA.NET</A></FONT></DIV></BODY></HTML>
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Date: Thu, 31 Jan 2002 12:22:19 -0500
Reply-To: Mark Charlton <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mark Charlton <[log in to unmask]>
Organization: MSI of Central Florida, Inc.
Subject: Re: BGA Rework Using Paste vs. No Paste
X-To: Jeff Ferry <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Jeff,
My "rule of thumb" is plastic BGA's with eutectic balls - I use stick flux
only. For ceramic BGA's with non-eutectic or "hard" balls, I must use a
microscreen and apply solder paste.
Mark
----- Original Message -----
From: "Jeff Ferry" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, January 31, 2002 11:54 AM
Subject: BGA Rework Using Paste vs. No Paste
> Fellow TechNetters,
>
> We nearly always apply solder paste to the circuit board when we replace
> BGA components during rework. Yet, after speaking with a handfull of BGA
> equipment companies at APEX, seems like they all recommend using flux only
> vs. paste, unless the circuit board is used in a high rel application.
>
> What do ya'all do/recommend for BAG rework? Can you point me to any
> studies/reports on the subject?
>
> Thanks,
>
> Jeff Ferry
> CEO
> Circuit Technology Center, Inc.
>
> --------------------------------------------------------------------------
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> --------------------------------------------------------------------------
-------
>
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Date: Thu, 31 Jan 2002 12:27:43 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: ODB++
X-To: [log in to unmask]
MIME-Version: 1.0
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It has been an interesting dialogue thus far with many interesting issues
raised.
Going back over the years, we have witnessed many data transfer schemes that
have served many purposes. Gerber has served very well for what it was
original intended to do. As our designs become more complex and demand more
complex fabrication, assembly and testing processes and techniques, we find
ourselves looking for the next generation data transfer vehicle.
In the 1970s IPC created the IPC-D-350 data format to address a more
intelligent transfer of fabrication data. It included hole, outline and other
important information. IPC even established a certification system to ensure
that the data coming from many sources complied to the format rules and would
not generate errors upon read-in. No, the industry did not embrace it as
expected. Why? For several reasons, reasons that are very applicable to this
current discussion.
First, a number of fabricators offered severe discounts to customers sending
350 data. The discounts were applied against the tooling charges, not the
actual fabrication costs of the board. Hmmmm, tooling charges are in the
range of $400 - $500. Even if the fabricators gave the tooling away for free,
it would take an awful lot of orders to justify the cost of the CAD output
software. You see, it has never been in the best interest for a CAD software
supplier to permit intelligent data output. lest the user wish to switch his
CAD software to another supplier. Therefore, some of the CAD suppliers placed
exorbitant fees on the 350 output software. Not doing the user community
justice at all. Therefore, when the designer requested the software update
from his management, he was told that the amount saved was not cost
justified.
Second, fabricators realized several savings when using intelligent data
files. They saved by eliminating a number of data files that invariably
conflicted with each other. It took manpower and time to resolve these
differences before a job could proceed into fabrication. So, fabricators
provided discounts on tooling and requested these intelligent files from
their customers. In some cases insisted upon it only to be told by their
customers "if you can't do the job with what we send you, we'll find someone
who can." Faced with this choice and since the fabricator was comfortable
with the evils of Gerber, he accepted the Gerber files.
Today, with intelligent data such as ODB++ and IPC's GenCAM we are facing the
same issues. Yes, IPC has again provided a compliance test module to verify
the output/input of GenCAM data. Yes, some of the output software is being
offered for free. Yes, companies are offering tooling discounts for
intelligent data files. And yes many companies are using either of the two
formats. Will either format take 100% market share? No! The fact remains that
there will be followers of both formats, followers of new formats, and then a
large group that will do nothing but sit around and wait for who knows what
to happen.
Regards,
Gary Ferrari
Executive Director
IPC Designers Council
860-350-9300
fax 413-771-5386
--part1_81.16de019b.298ad88f_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">It has been an interesting dialogue thus far with many interesting issues raised.<BR>
<BR>
Going back over the years, we have witnessed many data transfer schemes that have served many purposes. Gerber has served very well for what it was original intended to do. As our designs become more complex and demand more complex fabrication, assembly and testing processes and techniques, we find ourselves looking for the next generation data transfer vehicle.<BR>
<BR>
In the 1970s IPC created the IPC-D-350 data format to address a more intelligent transfer of fabrication data. It included hole, outline and other important information. IPC even established a certification system to ensure that the data coming from many sources complied to the format rules and would not generate errors upon read-in. No, the industry did not embrace it as expected. Why? For several reasons, reasons that are very applicable to this current discussion. <BR>
<BR>
First, a number of fabricators offered severe discounts to customers sending 350 data. The discounts were applied against the tooling charges, not the actual fabrication costs of the board. Hmmmm, tooling charges are in the range of $400 - $500. Even if the fabricators gave the tooling away for free, it would take an awful lot of orders to justify the cost of the CAD output software. You see, it has never been in the best interest for a CAD software supplier to permit intelligent data output. lest the user wish to switch his CAD software to another supplier. Therefore, some of the CAD suppliers placed exorbitant fees on the 350 output software. Not doing the user community justice at all. Therefore, when the designer requested the software update from his management, he was told that the amount saved was not cost justified. <BR>
<BR>
Second, fabricators realized several savings when using intelligent data files. They saved by eliminating a number of data files that invariably conflicted with each other. It took manpower and time to resolve these differences before a job could proceed into fabrication. So, fabricators provided discounts on tooling and requested these intelligent files from their customers. In some cases insisted upon it only to be told by their customers "if you can't do the job with what we send you, we'll find someone who can." Faced with this choice and since the fabricator was comfortable with the evils of Gerber, he accepted the Gerber files.<BR>
<BR>
Today, with intelligent data such as ODB++ and IPC's GenCAM we are facing the same issues. Yes, IPC has again provided a compliance test module to verify the output/input of GenCAM data. Yes, some of the output software is being offered for free. Yes, companies are offering tooling discounts for intelligent data files. And yes many companies are using either of the two formats. Will either format take 100% market share? No! The fact remains that there will be followers of both formats, followers of new formats, and then a large group that will do nothing but sit around and wait for who knows what to happen.<BR>
<BR>
</FONT><FONT COLOR="#0000ff" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SCRIPT" FACE="Comic Sans MS" LANG="0">Regards,<BR>
<BR>
Gary Ferrari<BR>
Executive Director<BR>
IPC Designers Council<BR>
860-350-9300<BR>
fax 413-771-5386</FONT></HTML>
--part1_81.16de019b.298ad88f_boundary--
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Date: Thu, 31 Jan 2002 10:36:13 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Dave Pahlas <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dave Pahlas <[log in to unmask]>
Subject: PCB Hole Diameters for Gold Press-fit
MIME-Version: 1.0
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Hello All,
I am working with a customer to determine the optimal finished hole diameter
for press-fit connectors into a Gold finish PCB. The supplier's data sheet
for the connector specifies .024"+/-.002" HASL plated holes. We have learned
from experience that the connector insertion success rate is greatly
improved when using a slightly larger hole on a gold finish PCB since it is
less compliant with the connector pins than the soft HASL.
So far, the supplier has not given a recommendation on a diameter for gold,
so I am looking for other industry standards to validate our findings.
Any ideas would be greatly appreciated.
Thanks, Dave
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Date: Thu, 31 Jan 2002 11:37:38 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jason Gregory <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jason Gregory <[log in to unmask]>
Subject: Re: BGA Rework Using Paste vs. No Paste
X-To: [log in to unmask]
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
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Jeff,
It is my opinion that pasting the board enhances wetting and a superior =
joint.
Jason Gregory
Software Specialist=20
Sanmina-SCI - Tech Center Austin
15508 Bratton Lane
Austin, Tx. 78728
(512)246-5648
[log in to unmask]
>>> [log in to unmask] 01/31/02 10:54AM >>>
Fellow TechNetters,
We nearly always apply solder paste to the circuit board when we replace
BGA components during rework. Yet, after speaking with a handfull of BGA
equipment companies at APEX, seems like they all recommend using flux only
vs. paste, unless the circuit board is used in a high rel application.
What do ya'all do/recommend for BAG rework? Can you point me to any
studies/reports on the subject?
Thanks,
Jeff Ferry
CEO
Circuit Technology Center, Inc.
---------------------------------------------------------------------------=
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additional
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ext.5315
---------------------------------------------------------------------------=
------
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Date: Thu, 31 Jan 2002 11:35:53 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: BGA Rework Using Paste vs. No Paste
X-To: [log in to unmask]
Mark,
I shouldn't have, but I just assumed eutectic. Shame on the moonman.
I tried the stick stuff, but couldn't get the compliance microstenciled
paste flux gives. It just reaches up and grabs the balls even when
coplanarity isn't perfect.
MoonMan
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Date: Thu, 31 Jan 2002 11:41:27 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: ODB++
X-To: [log in to unmask]
Gary,
Outstanding!
I'm a big fan of ODB because I'm a big fan of Valor. Please understand, I'm
not a sales representative. I just can't do in any other CAM package that
which I can do in Valor.
That's all I've got as it just gets the job done. Don't know what tomorrow
will bring but I ain't sittin' on it or waitin' for it.
Enjoy,
MoonMan
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Date: Thu, 31 Jan 2002 12:44:04 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McMullen, Kerry" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McMullen, Kerry" <[log in to unmask]>
Subject: Re: BGA Rework Using Paste vs. No Paste
X-To: Jeff Ferry <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi Jeff,
For our eutectic PBGA's, we only flux (no clean). Have only done about 50
or so over the past year with very good (97% yield) results.
Have not seen any studies or papers. Just worked closely with our CM to
create the profile for each type of BGA. We use Air-Vac.
Kerry
-----Original Message-----
From: Jeff Ferry [mailto:[log in to unmask]]
Sent: Thursday, January 31, 2002 11:54 AM
To: [log in to unmask]
Subject: [TN] BGA Rework Using Paste vs. No Paste
Fellow TechNetters,
We nearly always apply solder paste to the circuit board when we replace
BGA components during rework. Yet, after speaking with a handfull of BGA
equipment companies at APEX, seems like they all recommend using flux only
vs. paste, unless the circuit board is used in a high rel application.
What do ya'all do/recommend for BAG rework? Can you point me to any
studies/reports on the subject?
Thanks,
Jeff Ferry
CEO
Circuit Technology Center, Inc.
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Date: Thu, 31 Jan 2002 17:53:00 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Naisbitt <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Naisbitt <[log in to unmask]>
Subject: Re: Conformal Coating
X-To: "Marsico, James" <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
Jim
Having kicked this around here, the general consensus is that you do NOT
ship the product.
Without knowing the exact coating material, nor your end product, we could
not say how the "overcooked / oxidised" coating will behave. We would figure
that its moisture and chemical resistance might be improved but, its
potentially less flexible nature might over-stress components.
As to removing it, I think that a chemical stripper would probably be safer
but it will have to be done very carefully by hand, a little at a time. I
could not comment upon its effect on components and understand why your
customer would be unhappy with this. This is a space product, and the cost
of launch, much less manufacture, would probably demand that you re-make the
product - it might give all the data acquisition to the Aliens on planet
Tharg.
Sorry, but I don't think we can give you an acceptable alternative. Best of
luck.
Regards Graham Naisbitt
[log in to unmask] <mailto:[log in to unmask]>
Concoat Limited
Alasan House, Albany Park
Camberley GU16 7PH - UK
www.concoat.co.uk <http://www.concoat.co.uk>
Phone: +44 1276 691100
Fax: +44 1276 691227
Mobile: +44 79 6858 2121
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Marsico, James
> Sent: 30 January 2002 18:39
> To: [log in to unmask]
> Subject: Re: [TN] Conformal Coating
>
>
> The coating supplier's technical staff stated that the discoloration was
> probably due to oxidation of the double bond of the molecules. He also
> stated, as you, that the material may have become somewhat harder due to
> further cross linking.
>
> I don't think that moisture permeability is an issue, but what is
> a concern
> is if the modulus increased which might affect chip component reliability,
> if coating was actually under some ceramic or glass components. In your
> opinion, would additional cross linking, oxidation, reversion or being at
> 150C for 2 hours cause the modulus to increase?
>
> As far as stripping the coating, we crossed this path once before and our
> customer will not allow us to use any chemical stripping solution
> to remove
> polyurethane coating. They don't know how it will affect components,
> boards, etc.
>
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
>
> -----Original Message-----
> From: Graham Naisbitt [SMTP:[log in to unmask]]
> Sent: Wednesday, January 30, 2002 11:37 AM
> To: [log in to unmask]
> Subject: Re: [TN] Conformal Coating
>
> Jim
>
> I know this is a late posting, because I have only just come back
> on-line
> however, what you have encountered is reversion.
>
> The UR materials tend to discolour when exposed to high
> temperatures, but
> this does not generally affect their subsequent performance - if
> anything it
> might improve it because you have ensured a full x-link of the
> polymer -
> fully reacted.
>
> The discoloration may however, be an unacceptable visual condition
> to your
> customer, depending upon their inspection criteria.
>
> Whatever, it will be possible to remove and re-coat if you desire.
>
> You mention that this is a space application, therefore this
> material will
> probably have excellent outgassing characteristics and I can only
> think of 1
> or 2 UR space (NASA / ESA) approved coatings. I am surprised that
> you have
> this reversion, what did their technical staff advise? I
> would like
> to know
> for my own record.
>
> Regards Graham Naisbitt
>
> [log in to unmask]
> <mailto:[log in to unmask]>
>
> Concoat Limited
> Alasan House, Albany Park
> Camberley GU16 7PH - UK
>
> www.concoat.co.uk <http://www.concoat.co.uk>
>
> Phone: +44 1276 691100
> Fax: +44 1276 691227
> Mobile: +44 79 6858 2121
>
>
> > -----Original Message-----
> > From: TechNet [mailto:[log in to unmask]]On Behalf Of David Douthit
> > Sent: 29 January 2002 00:49
> > To: [log in to unmask]
> > Subject: Re: [TN] Conformal Coating
> >
> >
> > Jim,
> >
> > You have chemically altered the polymer. It will no longer
> > perform it's designed function.
> >
> > David A. Douthit
> > Manager
> > LoCan LLC
> >
> > "Marsico, James" wrote:
> >
> > > Help! Emergency!
> > >
> > > We have a completed assembly (top assembly with many boards,
> > hybrids, etc.)
> > > ready for shipment to our customer (space product). The last
> > operation was
> > > to ink mark a S/N. The ink is cured at 150 F for 2
> hours. The
> > assembly was
> > > put in an oven at 150 C for two hours. After hours of
> > reviewing all of the
> > > materials and bill of material, component by component
> (component data,
> > > supplier phone calls, etc.), the only item that is not rated
> > for 150 C is
> > > the polyurethane conformal coating, which turned yellow/brown
> > in color. Can
> > > anyone explain what actually happened to the coating and if it
> > can be used
> > > as is?
> > >
> > > Thanks,
> > >
> > > Jim Marsico
> > > Senior Engineer
> > > Production Engineering
> > > EDO Electronics Systems Group
> > > [log in to unmask] <mailto:[log in to unmask]>
> > > 631-595-5879
> > >
> > >
> >
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Date: Thu, 31 Jan 2002 10:04:31 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Dan R. Johnson" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dan R. Johnson" <[log in to unmask]>
Subject: Re: ODB++
X-To: Mark Steele <[log in to unmask]>
MIME-version: 1.0
Content-type: text/plain; charset=iso-8859-1
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Just a thought, wouldn't the gerber be absolute too? Just compare data
rather than the image. I seem to recall an old OS that had a command called
"compare".
Dan
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Date: Thu, 31 Jan 2002 11:58:06 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: MoonCaveMan cleaning out the cave. Lot's of free stuff.
Yes friends,
The MoonCaveMan has reached a limit. He is making an offer as none other
before. As a kind and giving, though a bit rough around the edges (much like
some of my current solder joints) kinda guy, he's cleaned out his cave and
now is making available a bunch of manufacturing operations procedures.
Some of the stuff is not so good, but most of it ain't too bad. All
procedures, including moisture, stencil printing, rework, wave soldering,
placement, reflow, and a bunch more are photo documents dating way back to
the present.
If Seth still allows, I'm going to place them all on his FTP site within my
folder.
My users may log into ftp.GoodmanAssociates.com anonymously. They will see a
directory called "Earl's files" that contain all your stuff. They can then
download to their heart's content.
Happy hunting,
MoonCaveMan
Oh yes, I'll complete the transfer tomorrow so you might want to wait a day
or so.
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Date: Thu, 31 Jan 2002 13:26:37 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Bev Christian <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bev Christian <[log in to unmask]>
Subject: Water Drop Test
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Technetters,
Do any of you have the instructions for the water drop test handy? If so,
could you post it, please. Thanks.
Bev Christian
Research in Motion
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Date: Thu, 31 Jan 2002 10:58:49 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: BGA Rework Using Paste vs. No Paste
X-To: Jeff Ferry <[log in to unmask]>
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Jeff,
We have been working and reworking BGA and Micro BGA for quite sometime.
This is a requirement in a prorotye environment. We tried using micro
stencil when we first attempt to replace the BGAs and found out that using
micro stencil was not a good method. We then tried using no-clean tacky
past fux and applied to both the BGA and the PWB substrates. This process
has been adopted in our process and has been working well for us. Here are
some great benefit of using flux paste only.
- No micro stencil cost.
- No cleaning is needed (No-clean flux).
- No aligning equipment is needed, since we can place the BGA into its
footprints without worry about smearing the solder paste, and if the
hand alignment if off ( no more than 50%), the liquid tension of the
reflowed solder balls will pull it back.
- Save time and money. ( stencil cost, cleaning, and aligning).
If the solder balls on the BGA are made of non-eutectic, solder paste is
required.
Tuan Bui
Conexant Systems Inc.
Prototype Process Dev. Eng.
Jeff Ferry
<jferry@CIRCUITTE To: [log in to unmask]
CHCTR.COM> cc:
Sent by: TechNet Subject: [TN] BGA Rework Using Paste vs.
<[log in to unmask]> No Paste
01/31/02 08:54 AM
Please respond to
"TechNet E-Mail
Forum."; Please
respond to Jeff
Ferry
Fellow TechNetters,
We nearly always apply solder paste to the circuit board when we replace
BGA components during rework. Yet, after speaking with a handfull of BGA
equipment companies at APEX, seems like they all recommend using flux only
vs. paste, unless the circuit board is used in a high rel application.
What do ya'all do/recommend for BAG rework? Can you point me to any
studies/reports on the subject?
Thanks,
Jeff Ferry
CEO
Circuit Technology Center, Inc.
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Date: Thu, 31 Jan 2002 11:00:23 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rick Thompson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rick Thompson <[log in to unmask]>
Organization: Ventura Electronics Assembly
Subject: Re: ENIG Thickness Standard?
X-To: [log in to unmask]
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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Dave,
Thanks for the feedback. I did get some specifics on IPC-4552 proposed
recommendations from the committee co-chair that we're going to put in
our requirements.
Regards,
Rick Thompson
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of
[log in to unmask]
Sent: Thursday, January 31, 2002 6:37 AM
To: [log in to unmask]
Subject: Re: [TN] ENIG Thickness Standard?
Good Morning TechNet! Rick, I have a very different perspective on ENIG
than Peter so here is some food for thought. There is a specification
for ENIG - IPC-4552 - which is in final ballot and should be release in
the March/May timeframe. I recommend getting a copy. It's my opinion
that the specification is quite useful considering there is no other
specification available for industry use. The ASTM B488 specification is
not a workable solution for electronics applications. There was a great
deal of committee discussion on the electroless nickel plating
thickness. The nickel thickness is very much viewed as application
specific, for example, RF designers desire minimal thickness (30-50
uinches) as opposed to connecting applications which use 200 uinches.
Rockwell Collins is successfully using 2-5 uninches for the immersion
gold thickness and 50-150 uinches for the electroless nickel thickness
in avionics applications and we intend on using the IPC-4552
specification in our documentation. Additionally, 50 uinches of
electroless nickel is very adequate as a diffusion barrier as both the
nickel/copper and nickel/gold phase diagrams demonstrate a wide range of
immiscibility The only instances I have seen a 50 uinch electroless
nickel thickness not be adequate was for pwbs which were subjected to
repetitive thermal excursions (e.g. lots of rework, or 4 reflow passes).
Using an immersion gold thickness of 6 uinches will not guarantee you
solderability - the 4552 committee demonstrated that (by conducting
testing) that 2 uinches of immersion gold can be steam conditioned and
still provide expected solderability coverage. Teaming with your ENIG
vendor, understanding their plating process control practices and
requiring some level of solderability testing is the best way of
insuring solderability. Good Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
[log in to unmask]@ipc.org> on 01/30/2002 09:03:53 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please
respond
to [log in to unmask]
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: Re: [TN] ENIG Thickness Standard?
Rick,
I went through this pain a while ago, and got a lot of tremendous help
from Ingemar Hernefjord in particular. I believe there is no released
standard for ENIG, though there is an empirical spec IPC-4552. It does
not contain a lot of useful detail, though. I specify 5 microinches
(0.12 microns) of Gold over minimum 235 microinches (6 microns) Nickel
for my boards, after reading a number of studies and failure reports. In
fact I was recommended to use 250 microinches of Nickel, but this would
have made our boards too thick. The thicker gold layer minimises
porosity and therefore oxidation to the underlying Nickel layer.
Older thinking was for around 100 to 120 microinches Nickel, but studies
by Eriksson and others concluded that with the growth of gold flashing
through the Nickel from one side and Cu/Ni intermetallics on the other
side of the plating, that a thicker Nickel layer would offer the boards
a longer solderability shelf life and greater solder joint reliability.
Hope this helps a bit. Certainly, I haven't experienced any problems
with soldering or mounting of components on boards to this spec.
Peter
Rick Thompson
<rthompson@VENTURAELECTR To:
[log in to unmask]
ONICS.COM> cc: (bcc: DUNCAN
Peter/Asst Prin Engr/ST
Sent by: TechNet Aero/ST Group)
<[log in to unmask]> Subject: [TN]
ENIG
Thickness Standard?
01/31/02 08:36 AM
Please respond to
"TechNet E-Mail Forum.";
Please respond to Rick
Thompson
Is there a standard for the plating thickness of the ENIG surface
finish? I've searched the archives and didn't find anything. Based on
a customer request we had increased the requirement for the electroless
nickel to 200u inches. A couple of our board vendors are telling me that
that is excessive and that anything over 100u inches is overkill. I've
seen references in the archives for anything from 120u inches to 200u
inches. What (if anything) is considered standard for this finish?
Thanks for your inputs.
Rick Thompson
Ventura Electronics Assembly
2655 Park Center Dr.
Simi Valley, CA 93065
+1 (805) 584-9858 x-304 voice
+1 (805) 584-1529 fax
[log in to unmask]
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Date: Thu, 31 Jan 2002 14:10:39 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Collins <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Collins <[log in to unmask]>
Subject: Re: ODB++
X-To: [log in to unmask]
Mime-Version: 1.0
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Ahne
The last one is a good point! We do contract manufacturing of military =
products. Currently when I need a stencil all I'm sending out is the =
paste layer gerber file, and the aperture report. I'd be nervous sending =
the full design data out, and I'm sure my customer would be unhappy. =
Either we would have to get vendors cleared for security purposes, or we =
would have to manipulate the data here - which I'd rather avoid doing. =
Being able to easily send just a layer of the data is very handy.
This is true for many parts of build - getting pwb's made, stencils, wave =
soldering fixtures, test fixtures... yikes!
regards
Graham Collins
Process Engineer,=20
Northrop Grumman
Atlantic Facility of Litton Systems Canada
(902) 873-2000 ext 6215
>>> Ahne Oosterhof <[log in to unmask]> 01/31/02 12:19PM >>>
Yikes, sorry, wrong button pushed and there went an unfinished
-mail ------------
Following is a more finished one:
I have been trying to follow the development of new data standards in this
industry. I have listened to the various interested parties make very
interesting claims about the goodness of their products. But at the moment =
I
hope that the GenCAM type effort is going to win. Even though I have no
reason to wish that Gerber would go away.
The nice things about Gerber are that it is a very simple standard and I =
can
read and understand the file. Therefore I can check the content of a file
and fix problems with the data. And I have not yet come across images that
cannot be represented by Gerber data.
The unpleasant things that have happened with Gerber is, that there are
always software designers who can and will "improve" things. And now their
"Gerber-like" output cannot be read by input devices that fully comply =
with
the Gerber Standard.
Then there are software engineers who design input devices and decide that
certain features and rules in the standard are superfluous and exclude =
those
from their package. The result is of course that their product at times =
does
not show results that were in the original fully complying data.
With more complex data standards it is hard to believe that these problems
are going away or are going to be easier to deal with. And the reason that =
I
lean towards GenCAM is that the effort to develop that standard includes
compliance checkers to help users determine that their output or input =
files
do indeed comply with the standard. The data format is readable so it is
easier to check what is inside the file and there is intent to assure that
all future versions are backwards compatible. So when I store data I don't
have to store interpreters to go with that specific data.
Next question: when is it going to be ready and is it going to be accepted
widely?
And of course a disadvantage of these new all-encompassing data files is
that I only need the layers that have the information needed to make a
stencil and I don't need (and I really don't want) 25Mbyte of data,
including the information on what parts to buy where and how to build and
test the board. We already have received files that include the little =
note:
Please destroy files after delivery of stencil !!!
Have fun,
Ahne.
A-Laser, Inc.
* I assume you are comfortable with your system outputting gerber, ---
I would also opt for ODB++ as it can carry a lot more than just bare board
information. ---
The problem I have is in archiving any data object in more than one
ormat ---
how do you insure that both sets of output data are identical in every
way? ---
If the CAD system doesn't produce ODB++ directly, and most don't ----
we use a third party tool (I use CAM350) to translate into ODB++, either
from the native CAD file or from Gerbers. ---
Producing an output file, either Gerber or ODB++, from a native CAD =
database
is a translation process. ---
I have yet to own a piece of bug-free software. ---
I know from experience that there are flaws in the Gerber data generators =
in
most CAD programs. ---
Similarly, different Gerber viewers can display the same data file
differently. ---
if an independent industry group produced a validation suite that a =
program
would have to pass to call itself ODB++ compliant. ---
Gerber, which is truly a rotten old standard. ---
Until ODB++ becomes as universally accepted by fab shops as Gerber ---
Regards,
From Seth Goodman's e-mail.
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Date: Thu, 31 Jan 2002 14:19:24 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Graham Collins <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Collins <[log in to unmask]>
Subject: Re: Flux residue with a no-clean process, BGA Reballing
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Ed
If they do change to no-clean, please give me a name so I know who not to =
use!!! :-)
Seriously, I'd have some serious issues with this. There is no way they =
can know what the end use of the part is - unless they ask each time and =
tailor the process to fit. So someone might end up with a big hidden =
problem. Potentially the end user has a no-clean residue in an application=
that won't tolerate it, or they process the board with a wash and they =
end up with a mystery residue (as has been discussed on TechNet previously)=
.
I have to ask though, can they process them fast enough that they aren't =
worried about moisture from the air? =20
Doesn't sound like a great plan to me...
regards
Graham Collins
Process Engineer,=20
Northrop Grumman
Atlantic Facility of Litton Systems Canada
(902) 873-2000 ext 6215
>>> [log in to unmask] 01/31/02 01:22PM >>>
Hi all,
I've found this thread to be very interesting and informative, but would =
like to present a "different twist" to the subject:
I have a client using our Reballing system to recondition all sorts of BGA =
and uBGA for re-use after de-soldering. They are currently using a water =
soluble paste and cleaning with DI, however the residual absorbed moisture =
presents a concern, so the devices are baked after cleaning. This =
increases turnaround time, so they are considering moving to a no-clean =
process.=20
My opinion is that there will be residues and they could possibly be =
incompatible with subsequent platforms utilized by the end user, as well =
as creating aesthetic impact. Cleaning alternatives for no-clean fluxes =
rival the more aggressive (therefore more forgiving) water solubles, so =
the benefit is lost if cleaned.
Any and all opinions, theories, suggestions and experiences are welcomed!
=20
Regards,
Ed Popielarski
QTA Machine
10 Mc Laren, Ste D
Irvine, Ca. 92618
Phone:949-581-6601
Fax: 949-581-2448
Cel: 949-337-2578
www.QTA.NET
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Date: Thu, 31 Jan 2002 11:21:05 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Chad Haima <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Chad Haima <[log in to unmask]>
Subject: Solder Pallet Material Test
MIME-Version: 1.0
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Hello all,
We're in the process of evaluating a new solder pallet material and was
wondering if someone out there had a wave machine we could basically "rent"
for a 4-6 month period. Any correspondence would be appreciated.
Chad Haima
National Sales Manager
S.P. Precision International, Ltd.
1-800-PALLETT
http://www.spprecision.com/
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Date: Thu, 31 Jan 2002 14:56:39 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Flux residue with a no-clean process, BGA Reballing
MIME-Version: 1.0
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Ed
In answer to your question, yes the benefit can be lost if the component is
cleaned. We have worked with clients that have experienced problems with BGA
components that were balled using a low solids no clean flux. These units
were assembled with water-soluble solderpaste and cleaned in an aqueous
inline system. The low solids no clean residue absorbed the activators and
moisture from the assembly process and created a corrosion cell on finished
assemblies. I would recommend that good cleaning and drying process for the
components that will be subjected to aqueous cleaning of water-soluble
solderpaste.
We found that Ion Chromatography analysis corresponded well to the electrical
performance testing (failures had high chloride levels).
Terry Munson
CSL Inc.
P 765-457-8095
F 765-457-9033
<A HREF="www.Residues.com">www.Residues.com</A>
<< have a client using our Reballing system to recondition all sorts of BGA
and uBGA for re-use after de-soldering. They are currently using a water
soluble paste and cleaning with DI, however the residual absorbed moisture
presents a concern, so the devices are baked after cleaning. This increases
turnaround time, so they are considering moving to a no-clean process.
My opinion is that there will be residues and they could possibly be
incompatible with subsequent platforms utilized by the end user, as well as
creating aesthetic impact. Cleaning alternatives for no-clean fluxes rival
the more aggressive (therefore more forgiving) water solubles, so the benefit
is lost if cleaned.
Ed
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Date: Thu, 31 Jan 2002 13:59:32 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jeff Ferry <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jeff Ferry <[log in to unmask]>
Subject: Re: BGA Rework Using Paste vs. No Paste
Thanks for the replies (see below) to my original posting (see below).
Seems like several of you are having good luck using flux only vs. solder
paste during BGA rework. The thing I wonder about is the reliability of
reworked BGA solder joints. I thought that proper BGA solder joint volume
was based on the original BGA ball combined with the solder added during
the solder paste screen printing process. Thus, what effect does solder
volume and solder joint height have on the reliability of a BGA solder
joints for plastic BGA components?
Thanks again,
Jeff Ferry
CEO
Circuit Technology Center, Inc.
Some Replies to prior posting included:
---------------------------
My "rule of thumb" is plastic BGA's with eutectic balls - I use stick flux
only. For ceramic BGA's with non-eutectic or "hard" balls, I must use a
microscreen and apply solder paste.
Mark
---------------------------
For our eutectic PBGA's, we only flux (no clean). Have only done about 50
or so over the past year with very good (97% yield) results.
Have not seen any studies or papers. Just worked closely with our CM to
create the profile for each type of BGA. We use Air-Vac.
Kerry
---------------------------
It's the only way to go. I've been designing, placing, reflowing and
reworking BGA's for nearly 8 years now. It took me five minutes to make the
discovery and, as I've said far too often, I'd use flux only on initial
production if feasible.
Regards and respect,
Earl Moon
---------------------------
We have been working and reworking BGA and Micro BGA for quite sometime.
This is a requirement in a prorotye environment. We tried using micro
stencil when we first attempt to replace the BGAs and found out that using
micro stencil was not a good method. We then tried using no-clean tacky
past fux and applied to both the BGA and the PWB substrates. This process
has been adopted in our process and has been working well for us. Here are
some great benefit of using flux paste only.
- No micro stencil cost.
- No cleaning is needed (No-clean flux).
- No aligning equipment is needed, since we can place the BGA into its
footprints without worry about smearing the solder paste, and if the
hand alignment if off ( no more than 50%), the liquid tension of the
reflowed solder balls will pull it back.
- Save time and money. ( stencil cost, cleaning, and aligning).
If the solder balls on the BGA are made of non-eutectic, solder paste is
required.
Tuan Bui
Conexant Systems Inc.
Prototype Process Dev. Eng.
---------------------------
It is my opinion that pasting the board enhances wetting and a superior
joint.
Jason Gregory
---------------------------
On Thu, 31 Jan 2002 10:54:24 -0600, Jeff Ferry <[log in to unmask]>
wrote:
>Fellow TechNetters,
>
>We nearly always apply solder paste to the circuit board when we replace
>BGA components during rework. Yet, after speaking with a handfull of BGA
>equipment companies at APEX, seems like they all recommend using flux only
>vs. paste, unless the circuit board is used in a high rel application.
>
>What do ya'all do/recommend for BAG rework? Can you point me to any
>studies/reports on the subject?
>
>Thanks,
>
>Jeff Ferry
>CEO
>Circuit Technology Center, Inc.
>
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Date: Thu, 31 Jan 2002 14:24:16 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: BGA Rework Using Paste vs. No Paste
X-To: Jeff Ferry <[log in to unmask]>
Jeff,
I know how busy you must be but we (me, Werner, Dave Fisherman, et al.) have
discussed this at some length over time but most recently as well. This is
one of those times where I didn't get my ass kicked too badly.
It all comes down to more isn't necessarily better.
Enjoy,
Earl
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Date: Fri, 1 Feb 2002 07:52:34 +1100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Colin Weber <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Colin Weber <[log in to unmask]>
Subject: Graphics Cards
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; format=flowed
Folks,
I know this isn't exactly PCB design but as CAD users I though someone
might be able to share their knowledge.
I am after any experiences with running a dual video card or two individual
cards for dual monitor arrangements under MS Windows 2000.
In particular, I'd like to know what the card(s) are and what cost,
success/failure, perhaps even what CAD packages you run. Also, any
success with OpenGL over the two monitors, 2D & 3D/performance.
Finally, another issue, anyone who runs a 17" to 20" flat panel LCD screen
and how they like/dislike it.
Regards,
Colin Weber
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Date: Thu, 31 Jan 2002 16:17:37 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: ODB++
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_37.220d0629.298b0e71_boundary"
--part1_37.220d0629.298b0e71_boundary
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Content-Transfer-Encoding: 7bit
Graham,
Formats are formats. The implementor of the output software usually provides
an interface that allows one to select the proper output information. I do
know that the GenCAM data format permits the selection of any specific data
set that is desired to be output.
Regards,
Gary Ferrari
Executive Director
IPC Designers Council
860-350-9300
fax 413-771-5386
--part1_37.220d0629.298b0e71_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">Graham,<BR>
<BR>
Formats are formats. The implementor of the output software usually provides an interface that allows one to select the proper output information. I do know that the GenCAM data format permits the selection of any specific data set that is desired to be output.<BR>
<BR>
</FONT><FONT COLOR="#0000ff" style="BACKGROUND-COLOR: #ffffff" SIZE=3 FAMILY="SCRIPT" FACE="Comic Sans MS" LANG="0">Regards,<BR>
<BR>
Gary Ferrari<BR>
Executive Director<BR>
IPC Designers Council<BR>
860-350-9300<BR>
fax 413-771-5386</FONT></HTML>
--part1_37.220d0629.298b0e71_boundary--
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Date: Thu, 31 Jan 2002 15:34:25 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Graphics Cards
X-To: [log in to unmask]
I have had great success with Matrox dual head products up to and including
the "latest" 450 series. There is other product available for "serious" CAD
users but at much higher cost and maybe not such good performance. You may
need a "higher" end card.
I use a ViewSonic 17" flat panel monitor with great results as well. I
really liked the Silicon Graphics stuff but for Silicon Graphics the company
and all its problems.
MoonMan
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Date: Thu, 31 Jan 2002 13:38:57 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mark Steele <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mark Steele <[log in to unmask]>
Subject: Re: ODB++
X-To: "Dan R. Johnson" <[log in to unmask]>
MIME-Version: 1.0
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Hi Dan,
I'm sure the pads and lines would be identical in both. I was
just thinking of the complex apertures that we sometimes get
in gerber 274X might not be a 100% one-to-one match with the
surfaces that we would end up with ODB++. I don't know that
they would be different but I do think there would be some
kind of difference, but hopefully a very small one.
I guess the question is what kind or tolerance are we going to
have to be considered 'different'. A difference of .000001
doesn't seem to qualify since we could never see it or even
measure it.
Mark
>From: Dan R. Johnson [mailto:[log in to unmask]]
>Sent: Thursday, January 31, 2002 10:05 AM
>To: TechNet E-Mail Forum.; Mark Steele
>Subject: Re: Re: [TN] ODB++
>
>
>Just a thought, wouldn't the gerber be absolute too? Just compare data
>rather than the image. I seem to recall an old OS that had a
>command called
>"compare".
>Dan
>
>
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Date: Thu, 31 Jan 2002 14:08:02 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rick Thompson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rick Thompson <[log in to unmask]>
Organization: Ventura Electronics Assembly
Subject: Re: BGA Rework Using Paste vs. No Paste
X-To: Jeff Ferry <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
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Jeff,
No studies to cite, but in our admittedly informal internal testing
we've found consistently better yields using paste rather than flux for
BGA replacements. Some of this may be due to the condition of pcb and
pads on the boards after removal but we really haven't studied it in
detail.
Rick Thompson
Ventura Electronics Assembly
2655 Park Center Dr.
Simi Valley, CA 93065
+1 (805) 584-9858 x-304 voice
+1 (805) 584-1529 fax
[log in to unmask]
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Jeff Ferry
Sent: Thursday, January 31, 2002 8:54 AM
To: [log in to unmask]
Subject: [TN] BGA Rework Using Paste vs. No Paste
Fellow TechNetters,
We nearly always apply solder paste to the circuit board when we replace
BGA components during rework. Yet, after speaking with a handfull of BGA
equipment companies at APEX, seems like they all recommend using flux
only vs. paste, unless the circuit board is used in a high rel
application.
What do ya'all do/recommend for BAG rework? Can you point me to any
studies/reports on the subject?
Thanks,
Jeff Ferry
CEO
Circuit Technology Center, Inc.
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Date: Thu, 31 Jan 2002 15:19:42 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"PHC L.L." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "PHC L.L." <[log in to unmask]>
Subject: PCB Cross-sectional analysis service
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Anyone knows where I can get PCB cross-sectional
analysis service?? with reasonal price?
Thanks
__________________________________________________
Do You Yahoo!?
Great stuff seeking new owners in Yahoo! Auctions!
http://auctions.yahoo.com
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Date: Thu, 31 Jan 2002 17:29:22 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Earl Moon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: PCB Cross-sectional analysis service
X-To: [log in to unmask]
Robisan Labs in Indiana - where else. Susan Mansilla. She and the lab owe me
now for some very cost effective sections.
Susan, where are they? Also, give this kind person some direction.
Earl
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Date: Thu, 31 Jan 2002 18:33:26 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Leland Woodall <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Leland Woodall <[log in to unmask]>
Subject: Looking for Dr. Kantesh Doss
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Can anyone assist me in contacting Dr. Kantesh Doss? I understand he was
working on a PWB cleaning standard for IPC.
I believe he left Siemens Energy and Automation in Johnson City, TN, to go
to work with Nokia in TX, but I haven't spoken with him since.
Thanks for the info,
Leland Woodall
Keihin Carolina System Technology, Inc.
Tarboro, NC
252-212-1565, ext. 2865
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Date: Thu, 31 Jan 2002 16:36:49 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: PCB Cross-sectional analysis service
X-To: [log in to unmask]
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Try these two places:
http://www.aciusa.org
http://www.solderingtech.com/
-----Original Message-----
From: PHC L.L. [mailto:[log in to unmask]]
Sent: Thursday, January 31, 2002 4:20 PM
To: [log in to unmask]
Subject: [TN] PCB Cross-sectional analysis service
Anyone knows where I can get PCB cross-sectional
analysis service?? with reasonal price?
Thanks
__________________________________________________
Do You Yahoo!?
Great stuff seeking new owners in Yahoo! Auctions!
http://auctions.yahoo.com
----------------------------------------------------------------------------
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Date: Thu, 31 Jan 2002 17:53:48 -0600
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Seth Goodman <[log in to unmask]>
Subject: Re: ODB++
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Content-Type: multipart/alternative;
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This is a multi-part message in MIME format.
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Gary,
Thanks so much for adding the GenCAM part of the story. Here are a couple
of questions concerning the points you made:
> Today, with intelligent data such as ODB++ and IPC's GenCAM we are facing
the same issues.
> Yes, IPC has again provided a compliance test module to verify the
output/input of GenCAM data.
> Yes, some of the output software is being offered for free. Yes, companies
are offering tooling
> discounts for intelligent data files. And yes many companies are using
either of the two formats.
Could you pass on information as to who is offering free output software?
Also, I would like to know about fabrication shops that offer discounts for
use of intelligent tooling. When you say many companies are using either
format, are you talking about fabrication shops?
> Will either format take 100% market share? No! The fact remains that there
will be followers of
> both formats, followers of new formats, and then a large group that will
do nothing but sit around
> and wait for who knows what to happen.
This is the real tragedy. Right now, all fabrication shops accept Gerber,
as far as I know. The more different intelligent formats we standardize,
the more expensive and complicated the software for the fab shops will
become since they will be forced to deal with multiple formats. That will
eat up much or all of the possible savings the smart format was intended to
provide. Consider that a CAM engineer at the fab shop will have to be
conversant in each format as well as be familiar with the bugs, tricks and
workarounds for each format on his/her importing software. IMHO, one new
format would be a boon to the industry, while several new formats would be a
drain on resources. In that case, we may be better off turning RS-274X into
a real standard and create a validation suite for it. I can't believe I
just suggested that in public, but it's better than dealing with a Tower of
Babel due to multiple standards.
Another issue that I've heard bandied about is the possible merging of
ODB++ and GenCAM. Can't recall where I heard this, but it is an interesting
idea. Is this rumor correct and if so, what is the status of that effort?
We can look at the personal computer industry and see examples of how single
and multiple standard solutions fared. In the early 1980's, IBM released
the workings of the ISA bus. Though their information was not totally
complete and there was no validation mechanism that I remember, it wasn't
too hard to fill in the blanks and it became the de facto standard for about
10 years. Even after the initial period of heavy use, motherboard and
software vendors were compelled to provide backward compatibility for this
standard. Toward the end of the useful life of the ISA bus, it became a
bottleneck for increased performance and there was a huge amount of pressure
to come up with an alternative. A number of companies extended the ISA
architecture and released the EISA standard. About the same time, the
industry formed the VESA consortium and came up with an architecture that
gave better access to the processor local bus. Also around the same time,
IBM released the MicroChannel Architecture because, well, they were IBM.
Despite their technical superiority to ISA, none of these solutions lasted
more than a couple of years.
Enter the PCI special interest group who took the best of MicroChannel, VESA
and EISA and came up with an extensible bus architecture that served the
industry well up through the present. By the time it is superceded, the PCI
bus will have been useful for about 10 years. If you look at the period
when ISA, EISA, VESA and MicroChannel coexisted, progress in the industry
was stymied by the multiple standards. Both hardware and software companies
were hamstrung and tried to hedge their bets by producing the same product
on multiple bus platforms. In contrast, during both the stable ISA years
and the stable PCI years, technical advancements and total sales took off.
Everyone could work efficiently as there was a single hardware platform and
the market for every product was larger due to the single standard. The
software situation was not as good because a single company controlled the
de facto standard. This is not inherently bad, but due to their mindset and
the lack of broader industry control, they made frequent, undocumented
changes to their interfaces and tools that made software development a very
expensive endeavor. Those with limited resources were slowed to a crawl or
eliminated.
There's a lot we can learn from this.
1) It is to our mutual advantage to select a single standard, even if it is
not optimal. Having several similar competing solutions will slow down
industry progress. IMHO, we will do better with a single mediocre standard
than several more advanced but competing approaches.
2) It is dangerous to have a single company in a position to control the
standard. If their market share is great enough, they could, like
Microsoft, participate in industry standards efforts and sign off on the
results (i.e. HTML, Java), then go ahead and violate the standard so
competing products were not interoperable. If the standards were not
controlled by a couple of players who had large competitive axes to grind,
this probably wouldn't have happened. This is not meant as a criticism of
Valor and does not discourage ODB++ from becoming the new standard. It does
have implications as to how the new standard should be managed.
Regards,
Seth Goodman
Goodman Associates, LLC
tel 608.833.9933
fax 608.833.9966
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<META http-equiv=3DContent-Type content=3D"text/html; =
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<BODY>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D729443522-31012002>Gary,</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D729443522-31012002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D729443522-31012002>Thanks =
so much for=20
adding the GenCAM part of the story. Here are a couple of =
questions=20
concerning the points you made:</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN=20
class=3D729443522-31012002></SPAN></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D729443522-31012002>> =
Today, with=20
intelligent data such as ODB++ and IPC's GenCAM we are facing the same=20
issues.</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D729443522-31012002>> =
Yes, IPC has=20
again provided a compliance test module to verify the output/input of =
GenCAM=20
data.</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D729443522-31012002>> =
Yes, some of=20
the output software is being offered for free. Yes, companies are =
offering=20
tooling</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2><SPAN class=3D729443522-31012002>> =
discounts for=20
intelligent data files. And yes many companies are using either of the =
two=20
formats.</SPAN></FONT></DIV>
<BLOCKQUOTE dir=3Dltr style=3D"MARGIN-RIGHT: 0px">
<DIV><FONT face=3DArial size=3D2><SPAN =
class=3D729443522-31012002>Could you pass on=20
information as to who is offering free output software? Also, I =
would=20
like to know about fabrication shops that offer discounts for use of=20
intelligent tooling. When you say many companies are using =
either=20
format, are you talking about fabrication=20
shops?</SPAN></FONT></DIV></BLOCKQUOTE>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN =
class=3D729443522-31012002>> Will=20
either format take 100% market share? No! The fact remains that there =
will be=20
followers of</SPAN></FONT></DIV>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN =
class=3D729443522-31012002>> both=20
formats, followers of new formats, and then a large group that will do =
nothing=20
but sit around</SPAN></FONT></DIV>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN=20
class=3D729443522-31012002>> and wait for who knows what to=20
happen.</SPAN></FONT></DIV>
<BLOCKQUOTE dir=3Dltr style=3D"MARGIN-RIGHT: 0px">
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN =
class=3D729443522-31012002>This is=20
the real tragedy. Right now, all fabrication shops accept =
Gerber, as far=20
as I know. The more different intelligent formats we =
standardize, the=20
more expensive and complicated the software for the fab shops will =
become=20
since they will be forced to deal with multiple formats. That =
will eat=20
up much or all of the possible savings the smart format was =
intended to=20
provide. Consider that a CAM engineer at the fab shop will have =
to be=20
conversant in each format as well as be familiar with the bugs, tricks =
and=20
workarounds for each format on his/her importing software. IMHO, =
one new=20
format would be a boon to the industry, while several new formats =
would be a=20
drain on resources. In that case, we may be better off turning =
RS-274X=20
into a real standard and create a validation suite for it. I =
can't=20
believe I just suggested that in public, but it's better than dealing =
with a=20
Tower of Babel due to multiple standards.</SPAN></FONT></DIV>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN=20
class=3D729443522-31012002></SPAN></FONT> </DIV>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN=20
class=3D729443522-31012002></SPAN></FONT><FONT face=3DArial =
size=3D2><SPAN=20
class=3D729443522-31012002>Another issue that I've heard bandied about =
is the=20
possible merging of ODB++ and GenCAM. Can't recall where I heard =
this,=20
but it is an interesting idea. Is this rumor correct and if so, =
what is=20
the status of that effort?</SPAN></FONT></DIV></BLOCKQUOTE>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN=20
class=3D729443522-31012002></SPAN></FONT> </DIV>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN =
class=3D729443522-31012002>We can look=20
at the personal computer industry and see examples of how single and =
multiple=20
standard solutions fared. In the early 1980's, IBM released the =
workings=20
of the ISA bus. Though their information was not totally complete =
and=20
there was no validation mechanism that I remember, it wasn't too hard to =
fill in=20
the blanks and it became the de facto standard for about 10 years. =
Even=20
after the initial period of heavy use, motherboard and software vendors =
were=20
compelled to provide backward compatibility for this standard. =
Toward the=20
end of the useful life of the ISA bus, it became a bottleneck for =
increased=20
performance and there was a huge amount of pressure to come up with an=20
alternative. A number of companies extended the ISA architecture =
and=20
released the EISA standard. About the same time, the industry =
formed the=20
VESA consortium and came up with an architecture that gave better access =
to the=20
processor local bus. Also around the same time, IBM released the=20
MicroChannel Architecture because, well, they were IBM. Despite =
their=20
technical superiority to ISA, none of these solutions lasted more than a =
couple=20
of years.</SPAN></FONT></DIV>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN=20
class=3D729443522-31012002></SPAN></FONT> </DIV>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN =
class=3D729443522-31012002>Enter the=20
PCI special interest group who took the best of MicroChannel, VESA and =
EISA=20
and came up with an extensible bus architecture that served the =
industry=20
well up through the present. By the time it is superceded, the PCI =
bus=20
will have been useful for about 10 years. If you look at the =
period when=20
ISA, EISA, VESA and MicroChannel coexisted, progress in the industry was =
stymied=20
by the multiple standards. Both hardware and software companies =
were=20
hamstrung and tried to hedge their bets by producing the same =
product on=20
multiple bus platforms. In contrast, during both the stable ISA =
years and=20
the stable PCI years, technical advancements and total sales took=20
off. Everyone could work efficiently as there was a single =
hardware=20
platform and the market for every product was larger due to the =
single=20
standard. The software situation was not as good because a single =
company=20
controlled the de facto standard. This is not inherently bad, but =
due to=20
their mindset and the lack of broader industry control, they made =
frequent,=20
undocumented changes to their interfaces and tools that made =
software=20
development a very expensive endeavor. Those with limited =
resources were=20
slowed to a crawl or eliminated.</SPAN></FONT></DIV>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN=20
class=3D729443522-31012002></SPAN></FONT> </DIV>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN =
class=3D729443522-31012002>There's a=20
lot we can learn from this.</SPAN></FONT></DIV>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN=20
class=3D729443522-31012002></SPAN></FONT> </DIV>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN=20
class=3D729443522-31012002>1) <STRONG><EM>It is to our mutual =
advantage to=20
select a single standard, even if it is not optimal.</EM></STRONG> =
Having=20
several similar competing solutions will slow down industry =
progress. =20
IMHO, we will do better with a single mediocre standard than several =
more=20
advanced but competing approaches.</SPAN></FONT></DIV>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN=20
class=3D729443522-31012002></SPAN></FONT> </DIV>
<DIV dir=3Dltr><FONT face=3DArial size=3D2><SPAN=20
class=3D729443522-31012002>2) <STRONG><EM>It is dangerous to have a =
single=20
company in a position to control the standard.</EM></STRONG> If =
their=20
market share is great enough, they could, like Microsoft, participate in =
industry standards efforts and sign off on the results (i.e. HTML, =
Java),=20
then go ahead and violate the standard so competing products were not=20
interoperable. If the standards were not controlled by a couple of =
players=20
who had large competitive axes to grind, this probably wouldn't have=20
happened. This is not meant as a criticism of Valor and does not=20
discourage ODB++ from becoming the new standard. It does have =
implications as to how the new standard should be =
managed.</SPAN></FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Regards,<BR><BR>Seth Goodman<BR>Goodman =
Associates,=20
LLC<BR>tel 608.833.9933<BR>fax =
608.833.9966<BR></FONT></DIV></BODY></HTML>
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Date: Thu, 31 Jan 2002 19:13:04 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: PCB Cross-sectional analysis service
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I recommend you try Soldering Technology International in Madison
(Huntsville), Alabama. Tel: 256-461-9191.
This is the home of the infamous Jim Raby.
Phil Zarrow
ITM Consulting
Durham, NH USA
www.ITMConsulting.org
T: (603) 868-1754
F: (603) 868-3623
EM:[log in to unmask]
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>I recommend you try Soldering Technology International in Madison (Huntsville), Alabama. Tel: 256-461-9191.<BR>
This is the home of the infamous Jim Raby.<BR>
<BR>
Phil Zarrow<BR>
<BR>
<B>ITM Consulting <BR>
Durham, NH USA<BR>
www.ITMConsulting.org<BR>
T: (603) 868-1754<BR>
F: (603) 868-3623<BR>
EM:[log in to unmask]</B></FONT></HTML>
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Date: Thu, 31 Jan 2002 19:28:04 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Dupont CB100 VIA Plug and Delamination
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
We have been having a problem with Dupont silver CB100 VIA Plug. The
boards are 12 layer, .062", FR4, Nickel/Gold plated.
We have a BGA pattern with VIA in hole. The VIAs are filled with CB100 VIA
plug and then the board is plated.
The VIAs are .010 causing an aspect ratio of 6.2:1. We are seeing after
solder reflow, inner layer delamination in the area of the
VIA filled BGA patterns. Has anyone seen this before? Does anyone use a
similar construction and had success? There are a few
theories flying around but I wanted to ask the IPC community for any
insight. Thank you in advance.
Best Regards,
Mike Forrester
Sr. Manufacturing Engineer
[log in to unmask]
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Date: Sun, 27 Jan 2002 23:39:40 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: ENVIRONMENT AND TERMITES
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In a message dated 01/27/2002 9:58:11 AM Eastern Standard Time,
[log in to unmask] writes:
> Termites were, before the rain forests were destroyed, by far the largest
> methane gas producers on this planet. Maybe they are still.
>
>
Did I miss the news that the rain forests were gone? Funny, I read last year
that the founder of the Sierra Club did a fly over and proclaimed that they
were at least 90% in tact.....?? Guess I better start paying more attention.
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<HTML><FONT FACE=arial,helvetica><FONT COLOR="#060000" SIZE=3 FAMILY="SERIF" FACE="Times New Roman" LANG="0">In a message dated 01/27/2002 9:58:11 AM Eastern Standard Time, [log in to unmask] writes:
<BR>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Termites were, before the rain forests were destroyed, by far the largest
<BR>methane gas producers on this planet. Maybe they are still.
<BR>
<BR></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#060000" SIZE=3 FAMILY="SERIF" FACE="Times New Roman" LANG="0">
<BR>Did I miss the news that the rain forests were gone? Funny, I read last year that the founder of the Sierra Club did a fly over and proclaimed that they were at least 90% in tact.....?? Guess I better start paying more attention.</FONT></HTML>
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Date: Fri, 1 Feb 2002 13:28:02 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: BGA Rework Using Paste vs. No Paste
X-To: Jeff Ferry <[log in to unmask]>
MIME-Version: 1.0
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Can't give much of an insight from experience, but I know that PBGA's
solder beautifully simply using flux. Paste is used to mount them during
initial assembly, simply because all the other components require it and
it's difficult to just flux the BGA's alone.
For re-work, though, you can concentrate on the BGA alone. You don't need
mini stencils and little squeegees - you just remove the old component,
clean up the site with a solder sucker (don't use wicks), apply flux to the
component contacts, place and reflow. The experts (Atmel/Thomson) tell me
it works a treat and have it written up as a guideline.
It doesn't work for CBGA's, which have 90/10 solder balls that don't melt
during reflow. These do require solder paste to replace them.
Peter
Jeff Ferry
<jferry@CIRCUITTE To: [log in to unmask]
CHCTR.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
Sent by: TechNet Aero/ST Group)
<[log in to unmask]> Subject: [TN] BGA Rework Using Paste vs. No
Paste
02/01/02 12:54 AM
Please respond to
"TechNet E-Mail
Forum."; Please
respond to Jeff
Ferry
Fellow TechNetters,
We nearly always apply solder paste to the circuit board when we replace
BGA components during rework. Yet, after speaking with a handfull of BGA
equipment companies at APEX, seems like they all recommend using flux only
vs. paste, unless the circuit board is used in a high rel application.
What do ya'all do/recommend for BAG rework? Can you point me to any
studies/reports on the subject?
Thanks,
Jeff Ferry
CEO
Circuit Technology Center, Inc.
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