Hi Lou!

Capping I believe, is going back as a secondary step, and using the via image
only, then "capping" the vias with something like a SR1000 mask. Works fine
for sealing off the vias, but sometimes causes problems with stenciling
solderpaste if done on the topside of the PCB. If you do "capping" do it on
the bottomside...

-Steve Gregory-


> Mike, just a few minutes ago as I was looking over my new copy of IPC-7095,
> "Design and Assembly Process Implementation for BGAs", I noticed on page 30
> there is a statement "Most photoimageable wet film masks will not even tent
> 0.35 mm via holes because it is difficult to cure polymer in via holes".
> We have been having trouble at ICT from untented, unplugged vias.  The
> board designer is helping us out now.  We have one board with 0.028" vias
> that is worst.  By the way, I did a quick calculation that suggested if the
> vias were 0.020", the pull-down force at ICT would be increased by a factor
> of 6 over the 0.028" version.
>
> Here's a question for TechNetters in general, in the same vein, that may
> help Mike and me.  Page 31 of 7095 refers to Tenting and Capping.  What is
> capping?  7095 says "Via capping is the preferred method since tenting
> reliability is dependent on the finished hole size".  Never heard of it
> before, and although I'm not an old timer by TechNet standards, I've been
> around a few days.  Thanks for assitance.   Lou Hart
>