Hi Technetters,
I wish to present you a dilemma we are facing while ordering complex boards.
Most of the boards we order are considered "High reliability" and we specify them to comply with IPC-6012, Class3. The boards are all polyimide, rigid multilayer boards.
Recently, while ordering a complex board we faced a serious dilemma:
The board is still a rigid, polyimide multilayer, about 1mm thick and contains blind via holes. Naturally, it has also fine lines on the outerlayers.
As you may already suspect, the combination of fine lines + blind via holes is an uneasy one since the blind holes are made through sequential lamination (many plating steps----> thick plating on outerlayer--->difficulty to produce fine lines). We don't order laser drilled microvia holes from various reasons, some of them related to long term reliability.

When looking carefully into the 6012, one sees that the requirements are different for the various hole types -
Through hole must be at least 25 micron for Class 3.
Blind via    must be at least 25 micron for Class 3.
Burried via  must be at least 15 micron for Class 3.
Microvia     must be at least 10 micron for Class 3 (O.K, I know it's not in the 6012 but I have also the 6016).

Now, my question is: Why ???

What is the difference between burried via and blind via (we specify our blind vias to be 100% filled with resin) that it is allowed to have only 15 microns of PTH?
What is the difference between a  0.004" (drill size) blind via over a 0.006" or 0.004" core (produced through sequential lamination and is resin filled) and a 0.004" microvia?
Where would you draw the line? Does the aspect ratio of the hole play any role in the decision?

You see, I need to specify Good, High reliability boards but I wonder maybe some of these requirements add nothing to the reliability of the board but makes it much more difficult to make and maybe even less reliable.

You, who specify, build and assemble printed circuit boards, have you had this dilemma? What do you think should we specify?

Thank you,
Ervin Weisz
Process Engineer



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