Peter, I'm probably out of my league here, but the board house may be able to compensate somewhat with "etch compensation", adding copper width where the most etching will take place. If you know you're going to lose 2 or 3 mils [.05-.08mm] per side in the final etch, add on copper before the lam/drill/plate processes to get what you want. Check with your supplier to see if this would work. I know this doesn't help you with this board now, but may fix future problems. Time for Tums...(or Rolaids, Ativan, Guinness, etc.). Roger M. Stoops, C.I.D., PCB Designer [log in to unmask] Trimble Engineering and Construction Division 5475 Kellenburger Rd. Dayton, OH 45424-1099 USA Ph: +01 937.233.8921 or +01 937.233.4574 ext 288 Fax: +01 937.233.7511 "<Peter George To: [log in to unmask] Duncan>" cc: Sent by: Subject: Re: [TN] Over-etch TechNet <[log in to unmask] ORG> 11/16/01 03:04 AM Please respond to "TechNet E-Mail Forum." Hi, Rudy, The boards are ENIG finished, the ENIG plating being carried out post-solder-mask, which must be after final copper etch, so No, there is no other metal in the area, unless my understanding of the plating/etching sequence is all wrong. My understanding (faulty or otherwise) of what the fab house has done, is that they laminate, drill and plate the layers with the first suite of blind vias, then laminate, drill and plate for the second suite of blind vias, then again for the 3rd suite until everything is stacked up, pressed, drilled and plated for the through-holes. I haven't quite been able to make sense of it all yet, but I think what I'm being told is that the plating becomes "stepped" somehow. I have 3 sets of blind vias from each outer surface (for ease of argument), making 4 plating sessions on each side by the time the through-hole group is done. The first areas to be drilled and plated are therefore plated 4 times, while the last areas to be drilled are only plated once, with the groups in between getting their proportional share of multiple plating. Thus at final etch, there is, I am told, a compromise to be reached - how to achieve the correct widths and spacings on the heavily plated areas without over-etching the lightly-plated areas. In my simple way, I would have expected the entire board surface to have an even plating thickness, however thick, but seemingly not. The compromise hasn't worked for the number of blind via groups featured in this board, and I need to try to find out how to address a solution without solely relying on what our fab house tells me. In my entire life, I never had to worry about the processes involved in fabricating PCB's - only that components could be soldered to them, that they passed test and proved to be reliable in the field. I only ever worked with good boards - the ones that passed in-coming inspection - in an assembly environment, so my experience of board design and PCB fab is limited to the past 8 or 9 months, in a company that has no previous convictions for designing this type of board, so it's a case of the blind leading the blind to a certain extent. Any further help in this area would be greatly appreciated. Best regards Peter Duncan "<Rudy Sedlak>" To: [log in to unmask] Sent by: cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST TechNet Aero/ST Group) <[log in to unmask] Subject: Re: [TN] Over-etch ORG> 11/16/01 02:13 PM Please respond to "TechNet E-Mail Forum." Peter: I am not sure if I fully understand the process you are using....so I am going to ask a dumb question, that may shed some light on the issue... Is there, anywhere in electrical contact with Copper being etched any other metal excepting Tin? This sort of thing, selective over-etch, is classically seen when there is some other metal, (Nickel, Gold, or???) than Tin in electrical contact with the over-etched Copper, and also in contact with the etchant. And if I am completely out in space with this question, please forgive the intrusion. Rudy Sedlak --------------------------------------------------------------------------------- Technet Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt delivery of Technet send the following message: SET Technet NOMAIL Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 --------------------------------------------------------------------------------- [This e-mail is confidential and may also be privileged. If you are not the intended recipient, please delete it and notify us immediately; you should not copy or use it for any purpose, nor disclose its contents to any other person. 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