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Date: Mon, 16 Jul 2001 10:08:56 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Crepeau, Phil" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crepeau, Phil" <[log in to unmask]>
Subject: Re: Recommendations for developing a mold
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
hi,
i think the suggestions for adding a draft angle to the walls of the mold are what you need. i'd also suggest that stay with an aluminum mold and get the inside of the mold teflon coated. your parts will come out without any release on them. also you might think about cutting slots at the seam of the mold so that you can get something like a screwdriver in there to help pry the pieces of the mold apart.
phil
-----Original Message-----
From: Kasprzak, Bill (sys) USX [mailto:[log in to unmask]]
Sent: Monday, July 16, 2001 8:51 AM
To: [log in to unmask]
Subject: [TN] Recommendations for developing a mold
Hello all,
I am involved with a project that requires that I encapsulate a pc board in
mold so that when completed, it will be a ring with an ID of 1.37" and an OD
of 1.64". The ring will be .13" thick and .35" tall. There will be six, 28
AWG wires exiting the finished potted assembly. The potting compound will be
Emerson & Cumings 2651-40 with Catalyst 11.
I have a basic 3 piece mold that works OK, but the pieces only
reflect what the final product should look like. It takes a little work to
get the mold apart even though mold release is used. The cure for the
potting is 8 - 16 hours at 180 deg F
What I'm looking for is any tricks and hints that should be incorporated
into the mold design that would facilitate easy processing. What I mean is
to make it easier to pour the material, easy to assemble into the mold, easy
to take apart, etc. etc. Right now the whole process just seems to be crude
and messy. Maybe, that's just the nature of the beast.
Any and all responses appreciated. Thanks.
Bill Kasprzak
Moog Inc., Electronic Assembly Engineering
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Date: Mon, 29 Oct 2001 17:56:33 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: Re: Text Comparing Editor
X-To: [log in to unmask]
MIME-Version: 1.0 (Generated by NET-TEL Mailguard SMTP version 4.0.0.22)
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Hi Shahed,
I don't get the idea of editing graphical files with a text-editor, but =
anyway, I suggest you visit http://www.nisnevich.com/examdiff/examdiff.htm =
and download the freeware version of ExamDiff. It does an excellent job =
comparing text-files.
There's also a shareware version available, with some extra features, in =
case you need them.
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
>>> Safavi-Bayat Shahed <[log in to unmask]> 10/29 4:57 pm >>>
Hi All,
Does anyone know about a software or utility that allows you to compare
two or more text files? I need to edit a DXF file and is necessary to
compare it with
an original file.
I thank you in advance,
Shahed
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Date: Mon, 16 Jul 2001 17:00:53 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Phil Nutting <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Nutting <[log in to unmask]>
Subject: Re: Cleaning No-Clean
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Alan,
Alpha 205R is what we used to use before we switched to Alpha Lonco 373 (an
OA flux). We also got the white residue. Our solutions was to change the
entire supply of flux in the machine. Essentially this was a complete
cleaning if the fluxing system. We also used small dams on the front of the
boards. These would build up a layer of white guck that was like soap stone
in feel. Cleaning this white residue off the boards was almost impossible.
Alcohol didn't want to touch it. Scrubbing and buffing only made the
assemblers tired and frustrated.
Any chance of changing some of the flux or washing system or better yet
both?
Phil Nutting
Manufacturing Engineer
Kaiser Systems, Inc.
-----Original Message-----
From: Alan Kreplick [mailto:[log in to unmask]]
Sent: Monday, July 16, 2001 4:41 PM
To: [log in to unmask]
Subject: [TN] Cleaning No-Clean
Hello Technet,
Looking for recommendations on how to remove the white residue left from a
no-clean (Alpha 205R) rework process (mini-wave rework station) on a bunch
of boards, both in-house and out in the field.
The boards - single-sided pth - were wave soldered using Cobar no-clean
flux. The boards have several aqueous incompatible components on them, so
cleaning the already built boards in an in-line or batch di-water system
with or without a saponifier is not an option (maybe a consideration for
new boards if the aqueous compatible parts are put on after wave).
Thanks in advance for the responses,
Al Kreplick
Sr. Mfg. Eng.
Teraydne, Inc.
500 Riverpark Drive
North Reading, MA 01864
Tel: 978-370-1726
Fax: 734-661-5352
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Date: Thu, 9 Aug 2001 14:15:06 -0400
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Tim Jensen <[log in to unmask]>
Subject: Re: VIAS in pads...
In-Reply-To: <F50E145240DBD311A2FC00D0B72CE8BC011E5273@SALEXSMBX1>
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Gary brings up a very good point regarding various via-in-pad technologies.
The microvia technology has proven to be much more difficult than the vias
that pass completely through the board. My experience is related to
soldering and have worked with various customers using both technologies, I
can provide the following insight on each:
Through hole via-in-pad: The biggest problem that I have run into with this
technology has been related to solder paste volume. Since the solder will
wet down into the via, it is necessary to print a large deposit of paste.
In addition, solder paste is half flux(by volume) and the resultant solder
joint volume will be half of the paste deposit (another reason to print more
paste). I have had a number of situations where people have taped off or
masked the bottom side of the via to keep the paste from flowing out the
bottom side. This typically creates some of the same problems seen with the
microvia technology(see below), so I would avoid sealing the bottom side of
the via. The opening at the bottom of the via provides an addition path for
the volatile components of the solder paste to escape the molten solder.
Microvia-in-pad: Voiding is the primary problem that I have seen here and
typically people are seeing a very large void right in the middle of the
solder joint. In the process, you print solder paste over a small opening.
Air becomes entrapped underneath the solder paste printed and many people
theorize that it is this entrapped air that is causing the void. However,
our work has shown that this is probably not the case. It is more likely
the entrapped volatiles from the solder paste(although I often say that "the
paste is never the problem," in this case it seems that the paste could be
the problem). As the flux is cleaning the surface to promote wetting, it
produces volatiles through this fluxing reaction. The more difficult a
surface is to wet to, the more volatiles that are produced from the flux.
Since the microvia openings are quite small, it is possible that the plating
of the via walls isn't that great. In addition, as the constituents of the
flux go from a liquid to a vapor, their volume can increase up to 100x.
I am no chemist, so I hope that my comments are clear. Again, this is just
what we have seen from a solder paste supplier's perspective. This is a
very interesting topic to me and any additional comments would be great!
As this is my first posting to TechNet, I would like to add one comment to a
particular member of the Ontario, Canada contingent(Since I don't want to
mention names, we will call him Bev). You thought it would never happen,
but the central NY engineer is finally among your ranks!!!
Regards,
Tim Jensen
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Erickson, Gary
Sent: Thursday, August 09, 2001 9:34 AM
To: [log in to unmask]
Subject: Re: [TN] VIAS in pads...
Ken:
Are you talking about Microvia ( single or multi-tier ) or Thru hole "via in
pad" ??
GaryE
-----Original Message-----
From: Ken Patel [mailto:[log in to unmask]]
Sent: Wednesday, August 08, 2001 2:53 PM
To: [log in to unmask]
Subject: [TN] VIAS in pads...
Assemblers,
How robust is the VIA in the pad technology now? Can someone share the
process of handling board that has vias in pads?
Most of our boards have VIAS in the pads and there is no way out.
re,
Ken Patel
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Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD W3 HTML//EN">
<HTML>
<HEAD>
<META content=3D"text/html; charset=3Diso-8859-1" =
http-equiv=3DContent-Type><TITLE>RE: [TN] VIAS in pads...</TITLE>
<META content=3D'"MSHTML 4.72.3110.7"' name=3DGENERATOR>
</HEAD>
<BODY>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2>Gary=20
brings up a very good point regarding various via-in-pad=20
technologies.</FONT></SPAN></DIV>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2>The=20
microvia technology has proven to be much more difficult than the vias =
that pass=20
completely through the board. My experience is related to =
soldering and=20
have worked with various customers using both technologies, I can =
provide the=20
following insight on each:</FONT></SPAN></DIV>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2>Through hole via-in-pad: The biggest problem that I have run =
into with=20
this technology has been related to solder paste volume. Since the =
solder=20
will wet down into the via, it is necessary to print a large deposit of=20
paste. In addition, solder paste is half flux(by volume) and the =
resultant=20
solder joint volume will be half of the paste deposit (another reason to =
print=20
more paste). I have had a number of situations where people have =
taped off=20
or masked the bottom side of the via to keep the paste from flowing out =
the=20
bottom side. This typically creates some of the same problems seen =
with=20
the microvia technology(see below), so I would avoid sealing the bottom =
side of=20
the via. The opening at the bottom of the via provides an addition =
path=20
for the volatile components of the solder paste to escape the molten=20
solder.</FONT></SPAN></DIV>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2>Microvia-in-pad: Voiding is the primary problem that I have =
seen here and=20
typically people are seeing a very large void right in the middle of the =
solder=20
joint. In the process, you print solder paste over a small =
opening. =20
Air becomes entrapped underneath the solder paste printed and many =
people=20
theorize that it is this entrapped air that is causing the void. =
However,=20
our work has shown that this is probably not the case. It is more =
likely=20
the entrapped volatiles from the solder paste(although I often say that=20
"the paste is never the problem," in this case it seems that =
the paste=20
could be the problem). As the flux is cleaning the surface to =
promote=20
wetting, it produces volatiles through this fluxing reaction. The =
more=20
difficult a surface is to wet to, the more volatiles that are produced =
from the=20
flux. Since the microvia openings are quite small, it is possible =
that the=20
plating of the via walls isn't that great. In addition, as the=20
constituents of the flux go from a liquid to a vapor, their volume can =
increase=20
up to 100x. </FONT></SPAN></DIV>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2>I am=20
no chemist, so I hope that my comments are clear. Again, this is =
just what=20
we have seen from a solder paste supplier's perspective. This is a =
very=20
interesting topic to me and any additional comments would be=20
great!</FONT></SPAN></DIV>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2>As=20
this is my first posting to TechNet, I would like to add one comment to =
a=20
particular member of the Ontario, Canada contingent(Since I don't want =
to=20
mention names, we will call him Bev). You thought it would never =
happen,=20
but the central NY engineer is finally among your =
ranks!!!</FONT></SPAN></DIV>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2>Regards,</FONT></SPAN></DIV>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D750301214-09082001><FONT color=3D#0000ff face=3DArial =
size=3D2>Tim=20
Jensen</FONT></SPAN></DIV>
<DIV class=3DOutlookMessageHeader><FONT face=3D"Times New Roman"=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of</B> Erickson, =
Gary<BR><B>Sent:</B>=20
Thursday, August 09, 2001 9:34 AM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> Re: [TN] VIAS in =
pads...<BR><BR></FONT></DIV>
<P><FONT size=3D2>Ken: </FONT><BR><FONT size=3D2>Are you =
talking about=20
Microvia ( single or multi-tier ) or Thru hole "via in pad" =
??</FONT>=20
</P>
<P><FONT size=3D2>GaryE</FONT> </P>
<P><FONT size=3D2>-----Original Message-----</FONT> <BR><FONT =
size=3D2>From: Ken=20
Patel [<A =
href=3D"mailto:[log in to unmask]">mailto:[log in to unmask]</A>]</FONT>=20
<BR><FONT size=3D2>Sent: Wednesday, August 08, 2001 2:53 PM</FONT> =
<BR><FONT=20
size=3D2>To: [log in to unmask]</FONT> <BR><FONT size=3D2>Subject: [TN] =
VIAS in=20
pads...</FONT> </P><BR>
<P><FONT size=3D2>Assemblers,</FONT> <BR><FONT size=3D2>How robust is =
the VIA in the=20
pad technology now? Can someone share the</FONT> <BR><FONT =
size=3D2>process of=20
handling board that has vias in pads?</FONT> </P>
<P><FONT size=3D2>Most of our boards have VIAS in the pads and there is =
no way=20
out.</FONT> </P>
<P><FONT size=3D2>re,</FONT> <BR><FONT size=3D2>Ken Patel</FONT> </P>
<P><FONT=20
size=3D2>----------------------------------------------------------------=
-----------------</FONT>=20
<BR><FONT size=3D2>Technet Mail List provided as a free service by IPC =
using=20
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Date: Mon, 16 Jul 2001 17:10:50 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Recommendations for developing a mold
MIME-Version: 1.0
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Slots are a great idea, just be sure your slots are not around the cavity
area.
With aluminum one slip prying apart and the mold is damaged.
KW
Advantage Tool & Microweld
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Slots are a great idea, just be sure your slots are not around the cavity
<BR>area.
<BR>With aluminum one slip prying apart and the mold is damaged.
<BR>
<BR>KW
<BR>Advantage Tool & Microweld</FONT></HTML>
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Date: Mon, 16 Jul 2001 16:40:34 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Alan Kreplick <[log in to unmask]>
Subject: Cleaning No-Clean
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hello Technet,
Looking for recommendations on how to remove the white residue left from a
no-clean (Alpha 205R) rework process (mini-wave rework station) on a bunch
of boards, both in-house and out in the field.
The boards - single-sided pth - were wave soldered using Cobar no-clean
flux. The boards have several aqueous incompatible components on them, so
cleaning the already built boards in an in-line or batch di-water system
with or without a saponifier is not an option (maybe a consideration for
new boards if the aqueous compatible parts are put on after wave).
Thanks in advance for the responses,
Al Kreplick
Sr. Mfg. Eng.
Teraydne, Inc.
500 Riverpark Drive
North Reading, MA 01864
Tel: 978-370-1726
Fax: 734-661-5352
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Date: Thu, 9 Aug 2001 12:31:57 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Susana Anaya <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Susana Anaya <[log in to unmask]>
Subject: Re: Capacitor 0603 vs 0402...why not networks and arrays?
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
Content-Type: multipart/alternative;
boundary="=====================_220019651==_.ALT"
--=====================_220019651==_.ALT
Content-Type: text/plain; charset="us-ascii"; format=flowed
Hi, the lurker comes out of the shadows here to ask all you wise ones
what's up with availablity for lower volumes. I ask because the reps that
have been suggesting them to me and haven't said a word about this (and I
am one of those not looking for thousands monthly)....sanaya.
At 08:45 AM 8/9/01 -0700, Greg Scott wrote:
>Steve,
>
>Our materials and component Engineers encourage us NOT to use chip
>resistor networks
>but we do use alot of capacitor arrays. The reason Is availability unless
>you buy by the thousands monthly.
>
>Greg Scott
>Cray Inc.
>
>"Stephen R. Gregory" wrote:
>>Hi Glenn!
>>
>>I've read the responses you've received to your question (they've all been
>>good), and want to ask another question...
>>
>>I assume the reason to use smaller passive components, is to reduce the real
>>estate needed by these components. My question is; why isn't there more use
>>of chip resistor networks and capacitor arrays?
>>
>>To me, it seems obvious that the use of these components will reduce real
>>estate, but I don't see them being used as often as they could be...maybe
>>I'm
>>not aware of the electrical characteristics or something else, but I wonder
>>why they aren't used more often in designs that are tight for space than
>>what
>>I've seen so far...
>>
>>Can anybody shed some light on this?
>>
>>-Steve Gregory-
>>
>>
>>>Hi all,
>>> I'm brainstorming on risks and benefits of 0603 caps vs 0402 caps.
>>>If the cap value, voltage rating, dielectric material, terminations, and
>>>use conditions are the same, would one be better than the other? My
>>>thoughts are it would be a wash or at least not significant. Here's what I
>>>have so far:
>>>Benefits of 0402 vs 0603:
>>>Smaller size reduces thermal stress/strain on solder joints from CTE or
>>>board flexing.
>>>Smaller size uses less real estate on board
>>>Risks of 0402 vs 0603:
>>>Equipment may have difficulty placing
>>>Thinner dielectric spacing to achieve same capacitance, cap higher failure
>>>rate
>>>Smaller size, cracks easier to develop
>>>Higher risk of tombstoning
>>> What do you all think? I'm sure I missed something, maybe even
>>>wrong on some of the above.
>>>Thanks,
>>>Glenn
>>
>>
--=====================_220019651==_.ALT
Content-Type: text/html; charset="us-ascii"
<html>
Hi, the lurker comes out of the shadows here to ask all you wise ones
what's up with availablity for lower volumes. I ask because the reps that
have been suggesting them to me and haven't said a word about this (and I
am one of those not looking for thousands monthly)....sanaya.<br>
<br>
<br>
At 08:45 AM 8/9/01 -0700, Greg Scott wrote:<br>
<blockquote type=cite cite>Steve, <br>
<br>
Our materials and component Engineers encourage us NOT to use
<font face="arial" size=2>chip resistor networks</font> <br>
<font face="arial" size=2>but we do use alot of capacitor arrays.
The reason Is availability unless you buy by the thousands
monthly.</font> <br>
<br>
<font face="arial" size=2>Greg Scott</font> <br>
<font face="arial" size=2>Cray Inc.</font> <br>
<br>
"Stephen R. Gregory" wrote: <br>
<blockquote type=cite cite><font face="arial" size=2>Hi Glenn!</font>
<br>
<br>
<font face="arial" size=2>I've read the responses you've received to your question (they've all been</font> <br>
<font face="arial" size=2>good), and want to ask another question...</font> <br>
<br>
<font face="arial" size=2>I assume the reason to use smaller passive components, is to reduce the real</font> <br>
<font face="arial" size=2>estate needed by these components. My question is; why isn't there more use</font> <br>
<font face="arial" size=2>of chip resistor networks and capacitor arrays?</font> <br>
<br>
<font face="arial" size=2>To me, it seems obvious that the use of these components will reduce real</font> <br>
<font face="arial" size=2>estate, but I don't see them being used as often as they could be...maybe I'm</font> <br>
<font face="arial" size=2>not aware of the electrical characteristics or something else, but I wonder</font> <br>
<font face="arial" size=2>why they aren't used more often in designs that are tight for space than what</font> <br>
<font face="arial" size=2>I've seen so far...</font> <br>
<br>
<font face="arial" size=2>Can anybody shed some light on this?</font> <br>
<br>
<font face="arial" size=2>-Steve Gregory-</font> <br>
<br>
<br>
<blockquote type=cite cite><font face="arial" size=2>Hi all,</font> <br>
<font face="arial" size=2> I'm brainstorming on risks and benefits of 0603 caps vs 0402 caps.</font> <br>
<font face="arial" size=2>If the cap value, voltage rating, dielectric material, terminations, and</font> <br>
<font face="arial" size=2>use conditions are the same, would one be better than the other? My</font> <br>
<font face="arial" size=2>thoughts are it would be a wash or at least not significant. Here's what I</font> <br>
<font face="arial" size=2>have so far:</font> <br>
<font face="arial" size=2><b>Benefits of 0402 vs 0603:</b></font> <br>
<font face="arial" size=2>Smaller size reduces thermal stress/strain on solder joints from CTE or</font> <br>
<font face="arial" size=2>board flexing.</font> <br>
<font face="arial" size=2>Smaller size uses less real estate on board</font> <br>
<font face="arial" size=2><b>Risks of 0402 vs 0603:</b></font> <br>
<font face="arial" size=2>Equipment may have difficulty placing</font> <br>
<font face="arial" size=2>Thinner dielectric spacing to achieve same capacitance, cap higher failure</font> <br>
<font face="arial" size=2>rate</font> <br>
<font face="arial" size=2>Smaller size, cracks easier to develop</font> <br>
<font face="arial" size=2>Higher risk of tombstoning</font> <br>
<font face="arial" size=2> What do you all think? I'm sure I missed something, maybe even</font> <br>
<font face="arial" size=2>wrong on some of the above.</font> <br>
<font face="arial" size=2>Thanks,</font> <br>
<font face="arial" size=2>Glenn</font></blockquote><br>
</blockquote></blockquote></html>
--=====================_220019651==_.ALT--
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Date: Thu, 9 Aug 2001 17:17:16 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rick Thompson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rick Thompson <[log in to unmask]>
Subject: Re: Gold/Paste
In-Reply-To: <71417DD0BB76D311B68300104B8FDEE820E9C6@SUPERVISOR>
MIME-Version: 1.0
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Rick,
If it's really gold plating, our experience has been that you will
definitely get a 'grayish' dull finish due to dissolution of the gold into
the solder. The bigger concern should probably be the brittleness of the
joint due to the tin/gold intermetallics that are formed. While immersion
gold may exhibit some of this behavior, the fact that it's an extremely thin
layer should minimize the 'dulling' visual effects you see. If you really
have immersion gold boards it might be wise to check the thickness of the
gold if you're seeing significant dulling.
Regards,
Rick Thompson
Ventura Electronics Assembly
2655 Park Center Dr.
Simi Valley, CA 93065
+1 (805) 584-9858 x-304 voice
+1 (805) 584-1529 fax
[log in to unmask]
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Rick Howieson
Sent: Thursday, August 09, 2001 1:53 PM
To: [log in to unmask]
Subject: [TN] Gold/Paste
We are seeing cloudy/grayish smt solder joints on boards with immersion gold
or soft body gold plating. Is this common???
Thanks,
Rick
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Date: Mon, 16 Jul 2001 18:44:49 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Patel <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Patel <[log in to unmask]>
Organization: interWAVE Communications, Inc.
Subject: Header pin (single pin/post)
MIME-Version: 1.0
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Hi all,
Looking for a single pin header to solder between two boards which are
.400 mils apart and .062" thick. Any suggestion?
re,
Ken patel
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Date: Mon, 16 Jul 2001 15:45:52 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Ellsworth D. Berkowitz" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Ellsworth D. Berkowitz" <[log in to unmask]>
Subject: Re: ICT Test Points
Factors to consider are the number of test points required by this design,
size of the card, probe types, etc.
We had a design with close to 2000 test points on a 9"X11" card. Our
standard test point is 40 mils; for this product test signed-up for 30 mil
pads due to "lack of space". We had significant contact-related problems;
i.e., probe not hitting the pad, on virtually every ICT cycle. The fixture
was reworked to ensure tooling pin accuracy, in addition, a "funnel plate"
was added for increased probe precision. While much improved,
contact-related false failures were still evident. Our resident statistics
expert calculated that, with 2000 30 mil test points, the probability for a
false contact failure was one out of two ICT cycles, taking into
consideration tolerances on board fab, ICT fixture, etc. With 40 mil pads,
the probability for success is virtually 100% (in this particular case).
New designs since use 40 mil pads; JTAG is used on dense boards to eliminate
test points.
I'm not a test engineer, but learned alot about ICT probing dynamics from
this episode. Your board size, style and quantity of test points will
significantly influence success with 25 mil pads. A small board with few
25 mil test points is likely to succeed when coupled with a quality ICT
fixture.
I like to see the TE's shooting at the biggest target, it keeps the first
pass yields high!
Ellsworth D. Berkowitz, P.E.
NPI/Production Engineering
Paradyne Networks Inc.
"The opinions expressed above are solely those of the writer and do not
necessarily reflect the views of Paradyne Networks Inc."
On Mon, 16 Jul 2001 09:14:27 -0400, Michael Forrester
<[log in to unmask]> wrote:
>Does anyone have any statistics on ICT reliability based on test point
size?
>What I am looking for
>is information on what am I giving up, other than cost, by going from a
.035
>test pad to a .025 test pad.
>Is there a reliability curve based on test point size? Any help would be
>appreciated. Thank you.
>
>Best Regards,
>
>Michael Forrester
>LeCroy Corp.
>
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Date: Mon, 30 Jul 2001 15:35:52 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mar DeJoya <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mar DeJoya <[log in to unmask]>
Subject: Re: Line width and space
In-Reply-To: <[log in to unmask]>
MIME-version: 1.0
Content-type: text/plain; charset=iso-8859-1
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Hello,
Try to get a hold of IPC-2221 specs (Generic Standards on Printed Board
Design). Page 38 gives you 3 graphs showing conductor thicknesses, widths
for internal & external layers and their current carrying capacity. Page 39
will show you minimum spacing requirements between conductors at various
voltages.
Hope this helps.
Mar de Joya, C.I.D.
Bustronic Corp.
Fremont, CA 94538
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Ruby Hazen
Sent: Monday, July 30, 2001 10:32 AM
To: [log in to unmask]
Subject: [TN] Line width and space
Hello:
Could someone tell me the guidelines and/or standards about trace line width
and space in PCB? Thanks.
R.H.
_________________________________________________________________
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Date: Mon, 16 Jul 2001 21:56:10 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: Header pin (single pin/post)
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_a6.16c0f542.2884f53a_boundary"
--part1_a6.16c0f542.2884f53a_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
In a message dated 7/16/2001 8:46:43 PM Central Daylight Time, [log in to unmask]
writes:
> Hi all,
> Looking for a single pin header to solder between two boards which are
> .400 mils apart and .062" thick. Any suggestion?
>
> re,
> Ken patel
>
SMT on one side, PTH on the other? Might have a solution...lemme get back to
work tomorrow....
-Steve Gregory-
--part1_a6.16c0f542.2884f53a_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>In a message dated 7/16/2001 8:46:43 PM Central Daylight Time, [log in to unmask]
<BR>writes:
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Hi all,
<BR>Looking for a single pin header to solder between two boards which are
<BR>.400 mils apart and .062" thick. Any suggestion?
<BR>
<BR>re,
<BR>Ken patel
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR>SMT on one side, PTH on the other? Might have a solution...lemme get back to
<BR>work tomorrow....
<BR>
<BR>-Steve Gregory-</FONT></HTML>
--part1_a6.16c0f542.2884f53a_boundary--
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Date: Fri, 10 Aug 2001 11:52:29 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Steve Telgen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Steve Telgen <[log in to unmask]>
Subject: Material specification
MIME-Version: 1.0
Content-Type: text/plain; charset="Windows-1252"
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Hi, everyone,
Does anyone know what 7781 E glass is? It's supposed to be a type of
fiberglass material for PCBs.
TIA
Steve Telgen
IGK Industries
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Date: Tue, 17 Jul 2001 15:00:42 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "<Peter George Duncan>" <[log in to unmask]>
Subject: Re: Lead protrusion
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hi, Neda,
We only ever had a batch production unit and leads were hand clinched. All
you need is a pair of flat nosed pliers, sometimes called "duck-billed"
pliers. They have flat faces and a rounded nose and are ideal for most
component leads except those on connectors. We still used them for
connectors, but a bit more force was required to clinch the leads, and we
only half clinched the corner pins just to hold them. They are pretty cheap
and normally a standard electronic workshop tool. Then a small pair of wire
cutters were used to trim the leads to length prior to soldering.
Pete Duncan
Neda Thrash
<nthrash@PEAV To: [log in to unmask]
EY.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST Aero/ST Group)
Sent by: Subject: Re: [TN] Lead protrusion
TechNet
<[log in to unmask]
ORG>
07/16/01
10:05 PM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
Neda Thrash
I beg your pardon for my jumping in the middle here but this is of interest
to me since I am currently looking for the best tool for clinching/cutting.
Any suggestions? I need hand tools for approximately 200 operators.
TIA.
>>> [log in to unmask] 07/15/01 08:20PM >>>
A long time ago, we once had a cutter for cropping leads after wave solder,
but it was peculiarly unreliable in its consistency. The blades would go
blunt very quickly and make a dreadful job of cutting leads cleanly. When
the lead is cut almost through, the weight of the lead and the pressure of
the cutter tended to break rather than cut the final part leaving rather a
rag or a smear. We gave up using the machine eventually and took to hand
cropping, but the shock of the 'snap' as the cutters through each lead
cannot have been very good for the joints.
The kindest way to treat the solder joints is to preform and trim the leads
so that they are soldered only once and require no cropping at all. We
found that many components habitually rode up in the solder wave to the
extent that minimum protrusion wasn't always achieved and rework had to be
performed. The test jig we had then couldn't handle clinched leads, though
that is the best way to go - preform, insert, clinch (half or full), trim,
solder.
Be careful cutting the leads of any components with a glass-to-metal seal -
they really don't like too much shock, so hand-cutting should be avoided.
Pete Duncan
"Pelchat,
Janice" To: [log in to unmask]
<JANICE.PELCHAT@ cc: (bcc: DUNCAN Peter/Asst
Prin Engr/ST Aero/ST Group)
BENCH.COM> Subject: Re: [TN] Lead
protrusion
Sent by: TechNet
<[log in to unmask]
>
07/13/01 06:53
PM
Please respond
to "TechNet
E-Mail Forum.";
Please respond
to "Pelchat,
Janice"
Where I worked before, the wave solder machine had an inline cutter that
worked with the machine.
Solder, inline cut (Circular saw on its side basically), resolder, out the
other end. No manual cutting allowed.
Jan Pelchat
Benchmark Electronics
> -----Original Message-----
> From: Dorothy M. Lush [SMTP:[log in to unmask]]
> Sent: Thursday, July 12, 2001 7:32 PM
> To: [log in to unmask]
> Subject: Re: [TN] Lead protrusion
>
> Peter,
> Bill is right about the need to avoid trimming leads after solderwave.
The
> thicker the lead and/or cheaper the cutter the more likely there will be
a
> cracked solder joint. IPC class-2 says that this cracked solder joint
does
> not need to be remelted and class-3 says it does. Class-2 recommends
> 60-100
> mils lead length unless otherwise specified by the customer. If you are
> building to Class-2 and you don't want a possible lab or field failure
> because of a cracked solder joint then think and plan ahead to avoid
> having
> to trim. The thinking and planning includes the final assembly the PCA
> will
> be in. For instance, clearance for slot cards to slid in and out.
> Connector
> leads under a front panel even with an insulation strip can cut through
> the
> insulation eventually fail. I had a customer who wanted me to trim 70
mil
> plus diameter pins to 30 mils on the off the shelf power supply instead
of
> ordering the right length leads. They would have to be machined to do
that
> which can lead to other defects.
> Dorothy Lush
>
> > ----------
> > From: Kasprzak, Bill (sys) USX[SMTP:[log in to unmask]]
> > Reply To: TechNet E-Mail Forum.;Kasprzak, Bill (sys) USX
> > Sent: Thursday, July 12, 2001 12:58 PM
> > To: [log in to unmask]
> > Subject: Re: Lead protrusion
> >
> > Peter:
> >
> > Personally, I like .090", but typically I have to hold between .040 and
> > .060. In my mind, I think you would like to install parts with the
> correct
> > lead length prior to wavesoldering. Avoid having to trim after
soldering
> > is
> > always a good idea.
> >
> > Bill Kasprzak
> > Moog Inc., Electronic Assembly Engineering
> >
> >
> > > -----Original Message-----
> > > From: PL [SMTP:[log in to unmask]]
> > > Sent: Thursday, July 12, 2001 2:26 AM
> > > To: [log in to unmask]
> > > Subject: [TN] Lead protrusion
> > >
> > > Hello,
> > >
> > > Does anyone know what is the standard used for prepping
> > > the leads for through-hole boards?
> > >
> > > What are the critical parameters one should consider
> > > when determining the amount of trimming on the leads?
> > >
> > > Rgds,
> > > Peter
> > >
> > >
> > > _________________________________________________________
> > > Do You Yahoo!?
> > > Get your free @yahoo.com address at http://mail.yahoo.com
> > >
> > >
> >
>
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Date: Mon, 30 Jul 2001 14:20:29 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Jana L. Carraway" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Jana L. Carraway" <[log in to unmask]>
Subject: Graphics products
In-Reply-To: <2C3A3BE59D91D411AF3B00508BE3FBDC8B1204@EMSS09M10>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Greetings TechNetters,
Would you guys have phone numbers for a few graphic arts products companies
like Bishop Graphics, etc.
Thank you for your help,
Jana Carraway
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=========================================================================
Date: Mon, 29 Oct 2001 17:13:58 -0000
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Mike Fenner <[log in to unmask]>
Subject: Re: Blasts from the past?!??
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_002E_01C1609D.19740390"
This is a multi-part message in MIME format.
------=_NextPart_000_002E_01C1609D.19740390
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
As in "Good morning, I'm completely operational and all my circuits are
functioning perfectly" ??
[HAL in 2001, just before it topped the crew]
Best regards
Mike
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of McGlaughlin, Jeffrey A
Sent: Monday, October 29, 2001 4:53 PM
To: [log in to unmask]
Subject: Re: [TN] Blasts from the past?!??
Yeah, but the system says it is working correctly!?!
Jeffrey
[log in to unmask]
4-7582
-----Original Message-----
From: Stephen R. Gregory [mailto:[log in to unmask]]
Sent: Monday, October 29, 2001 11:37 AM
To: [log in to unmask]
Subject: [TN] Blasts from the past?!??
Did any of you just get some replys to some postings that were from back
in July?
I did...got about 3 or 4 of them.....strange....
-Steve Gregory-
------=_NextPart_000_002E_01C1609D.19740390
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.00.3103.1000" name=3DGENERATOR></HEAD>
<BODY>
<DIV><FONT color=3D#0000ff><FONT face=3DArial><SPAN =
class=3D781410517-29102001>As in=20
"Good morning, I'm completely operational and all my circuits are =
functioning=20
perfectly</SPAN><SPAN class=3D781410517-29102001>" =20
??</SPAN></FONT></FONT></DIV>
<DIV><FONT color=3D#0000ff><FONT face=3DArial><SPAN=20
class=3D781410517-29102001></SPAN></FONT></FONT> </DIV>
<DIV><FONT color=3D#0000ff><FONT face=3DArial><SPAN =
class=3D781410517-29102001>[HAL in=20
2</SPAN><SPAN class=3D781410517-29102001>001, just before it =
topped the=20
crew]</SPAN></FONT></FONT></DIV>
<DIV><FONT color=3D#0000ff><FONT face=3DArial><SPAN=20
class=3D781410517-29102001></SPAN></FONT></FONT> </DIV>
<DIV><FONT color=3D#0000ff><FONT face=3DArial><SPAN=20
class=3D781410517-29102001></SPAN>Best regards</FONT></FONT> </DIV>
<P><FONT color=3D#0000ff face=3DArial>Mike </FONT></P>
<P><FONT face=3DTahoma size=3D2>-----Original =
Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of </B>McGlaughlin, Jeffrey=20
A<BR><B>Sent:</B> Monday, October 29, 2001 4:53 PM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> Re: [TN] Blasts from the =
past?!??<BR><BR></P>
<BLOCKQUOTE style=3D"MARGIN-RIGHT: 0px"></FONT>
<DIV><SPAN class=3D265585216-29102001><FONT color=3D#0000ff>Yeah, but =
the system=20
says it is working correctly!?!</FONT></SPAN></DIV>
<DIV> </DIV>
<P><I><FONT color=3D#008080 face=3D"Comic Sans MS" =
size=3D5>Jeffrey</FONT></I>=20
<BR><FONT face=3DArial>[log in to unmask]</FONT> <BR><FONT=20
face=3DArial>4-7582</FONT> </P>
<BLOCKQUOTE>
<DIV align=3Dleft class=3DOutlookMessageHeader dir=3Dltr><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> Stephen R. =
Gregory=20
[mailto:[log in to unmask]]<BR><B>Sent:</B> Monday, October 29, 2001 =
11:37=20
AM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] Blasts from =
the=20
past?!??<BR><BR></FONT></DIV><FONT face=3Darial,helvetica><FONT =
size=3D2>Did any=20
of you just get some replys to some postings that were from back in =
July?=20
<BR><BR>I did...got about 3 or 4 of them.....strange.... =
<BR><BR>-Steve=20
Gregory-</FONT> </FONT></BLOCKQUOTE></BLOCKQUOTE></BODY></HTML>
------=_NextPart_000_002E_01C1609D.19740390--
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Date: Fri, 10 Aug 2001 17:09:24 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: Solder conditions
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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I'm seeing this the same way as Kathy Kuhlow. But, if this board has heavy
internal layers and is preheated enough to get good top side solder fillets,
the solder may still be molten when it comes out of the end of the machine.
Are we looking at disturbed joints here?
Guy Ramsey
Senior Lab Technician / Instructor
E-Mail: [log in to unmask] <mailto:[log in to unmask]>
Ph: (610) 362-1200 x107
Fax: (610) 362-1290
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Kathy Bergman
Sent: Friday, August 10, 2001 2:00 PM
To: [log in to unmask]
Subject: [TN] Solder conditions
I am looking to get some help in identifying the causes of certain post wave
solder conditions. In particular, a "cracked ice" effect in which the very
surface of the solder looks like a thin layer of it has been cracked in the
way that ice would crack. Another one is lumpy solder, as if the solder had
dirt in it. (I know it doesn't). I am a board manufacturer with just a
minimum of assembly knowledge.
I am unable to post a good picture of the conditions at this time. I
am wondering if there are some on line resources I can tap into, to see some
visual examples of these and other conditions.
Also, what would be a normal wave profile for a board such as this: .093
thick FR4, through hole technology, approx. 6x11, .025 to .195 sized holes,
HASL finish. Please include any prebake information.
I apprectiate in advance any help I can get.
Kathy Bergman
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Date: Tue, 17 Jul 2001 11:16:03 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Cleaning No-Clean
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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Al,
In my opinion, prevention is the ONLY cure! I believe that any
palliative removal of your residues will only cause much more harm than
good. If you have components that will not withstand water, there is
every chance they won't like any cleaning solvent, either. Even if you
find a compatible solvent, the best you can hope for, judging from your
description, is to spread your gudge in a thinner layer over a wider
surface area, so that it is less visible. However, no guarantee can be
offered about the reliability of the result. It will probably be better
to leave the boards, as is, warts and all.
It is never a very good idea to use one type of "no-clean" flux on top
of the residues of another: you have no control whatsoever of the
chemistry. At least, try the same flux for both operations.
Brian
Alan Kreplick wrote:
>
> Hello Technet,
>
> Looking for recommendations on how to remove the white residue left from a
> no-clean (Alpha 205R) rework process (mini-wave rework station) on a bunch
> of boards, both in-house and out in the field.
>
> The boards - single-sided pth - were wave soldered using Cobar no-clean
> flux. The boards have several aqueous incompatible components on them, so
> cleaning the already built boards in an in-line or batch di-water system
> with or without a saponifier is not an option (maybe a consideration for
> new boards if the aqueous compatible parts are put on after wave).
>
> Thanks in advance for the responses,
>
> Al Kreplick
> Sr. Mfg. Eng.
> Teraydne, Inc.
> 500 Riverpark Drive
> North Reading, MA 01864
> Tel: 978-370-1726
> Fax: 734-661-5352
>
> ---------------------------------------------------------------------------------
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Date: Tue, 17 Jul 2001 14:52:36 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "<Peter George Duncan>" <[log in to unmask]>
Subject: Re: ICT Test Points
MIME-Version: 1.0
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It rather depends on which ICT machine you are using. We are going to use
an HP machine whose preferred pad size is 0.050" with 0.075" spacing and a
clearance area around that for access by the test probes. We argued the pad
size down to 0.035" to maximise board real estate, but the main danger of
going any lower than that size is false error readings.
If the pads are too small or too close together, or both, there is a risk
of the probes not contacting properly and returning open or even short
circuit failures where none actually exist. Check with your ICT test
machine manufacturer and/or your test jig vendor and make sure from them
that you understand why the smaller pad sizes could be a problem and what
it would mean to you in terms of false readings.
It may be that you can go to smaller pads, but the downside could be
greatly increased jig costs owing to the greater precision required of the
jig and of the probes. You will also find that tight tolerence probes have
to be replaced more often as they can tolerate less wear before replacement
than a less stringent requirement.
Hope this helps.
Pete Duncan
Michael Forrester
<michael.forrester@L To: [log in to unmask]
ECROY.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST Aero/ST Group)
Sent by: TechNet Subject: [TN] ICT Test Points
<[log in to unmask]>
07/16/01 09:14 PM
Please respond to
"TechNet E-Mail
Forum."; Please
respond to Michael
Forrester
Does anyone have any statistics on ICT reliability based on test point
size?
What I am looking for
is information on what am I giving up, other than cost, by going from a
.035
test pad to a .025 test pad.
Is there a reliability curve based on test point size? Any help would be
appreciated. Thank you.
Best Regards,
Michael Forrester
LeCroy Corp.
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Date: Fri, 10 Aug 2001 22:21:15 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jack Bryant <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jack Bryant <[log in to unmask]>
Subject: Assembly Inspection/verification.
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TechNet,
Has anyone tried to use templates or overlays at the end of a machine =
process or the end of a progressive line as a quick check for polarity =
or component orientations? If so what type of materials did you make =
your overlays from? Were they conductive for ESD? Where did you have =
your templates made? Can a board house make these from Gerber data? =
Stencil shop? I would appreciate your comments. Thanks.
J. Bryant
------=_NextPart_000_005D_01C121EA.C51D9A40
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charset="iso-8859-1"
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<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>TechNet,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Has anyone tried to use templates or =
overlays at=20
the end of a machine process or the end of a progressive line as a =
quick=20
check for polarity or component orientations? If so what type of =
materials did=20
you make your overlays from? Were they conductive for ESD? Where did you =
have=20
your templates made? Can a board house make these from Gerber data? =
Stencil=20
shop? I would appreciate your comments. Thanks.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>J. Bryant</FONT></DIV></BODY></HTML>
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Date: Tue, 17 Jul 2001 18:07:17 +0900
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Gilbert Min <[log in to unmask]>
Subject: Vent Hole
MIME-Version: 1.0
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Hello Every Technetters.
I was informed by our customer which is about vent hole at the BGA
substrates?
What is the vent hole's function?
Why make some vent hole at the BGA substrates?
Please give me more idea.
Thanks
Best regards
SIMMTECH.CO.,Ltd.
Quality & Reliability Assurance Team / Gilbert Min.
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Date: Mon, 29 Oct 2001 11:26:05 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Tostevin, Bruce" <[log in to unmask]>
Subject: Re: Looking for Industrial X-ray machine
MIME-Version: 1.0
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Phil,
If you're checking out machines with a joystick or similarly controlled
movable table (X - Y axis), make sure that the motion control features
permit accurate scanning under the highest magnification. Under low mag
conditions, a stage with too much acceleration, jerkiness or too coarse an
increment can still look OK. When the image is highly magnified, those
faults become incredibly frustrating because you do not have precise enough
control over the table to pass smoothly from one point to another along your
specimen. Even though a system may have a "FAST / SLOW" feature, try it
out!
Bruce Tostevin
Benchmark Electronics
Hudson,NH
> ----Original Message-----
> From: Phil Nutting [SMTP:[log in to unmask]]
> Sent: Friday, October 26, 2001 10:38 AM
> To: [log in to unmask]
> Subject: [TN] Looking for Industrial X-ray machine
>
> As a follow on topic to the encapsulating voids, we periodically have
> the need for a system to x-ray failed potted assemblies to determine the
> cause of failure. Sometimes this can be accomplished by sawing the unit
> in half, but sometimes we need to look inside without destroying the
> item. We could build a system, but a recent sanity check suggested that
> by buying an industrial unit it would come with all the necessary
> guards, precautions and certifications that a home made unit might not.
>
> Our sample size is usually no larger than a 6 inch cube. Naturally
> tomorrow someone will need to x-ray something larger than a six inch
> cube so a little flexibility would be nice.
>
> I'm interested in knowing what is out there, what is good and bad and
> relative cost.
>
> I can be contacted offline at [log in to unmask] or
> 978-922-9300.
>
> Thanks in advance,
>
> Phil Nutting
>
> --------------------------------------------------------------------------
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Date: Thu, 9 Aug 2001 16:11:25 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Erickson, Gary" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Erickson, Gary" <[log in to unmask]>
Subject: Re: VIAS in pads...
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All:
Just to push this a little further (I'm interested in this
response), does a finish of HASL present less issues with wetting
and outgassing of the solder paste volatiles to the uVias, say
versus a finish of OSP or ENIG ??
If what you say is true, then will the wetting of the uVia walls
during HASL eliminate or reduce the tendency of
entrapment of gases (or air) during BGA assembly ??
Regards,
Gary Erickson
-----Original Message-----
From: Tim Jensen [mailto:[log in to unmask]]
Sent: Thursday, August 09, 2001 2:15 PM
To: [log in to unmask]
Subject: Re: [TN] VIAS in pads...
Gary brings up a very good point regarding various via-in-pad technologies.
The microvia technology has proven to be much more difficult than the vias
that pass completely through the board. My experience is related to
soldering and have worked with various customers using both technologies, I
can provide the following insight on each:
Through hole via-in-pad: The biggest problem that I have run into with this
technology has been related to solder paste volume. Since the solder will
wet down into the via, it is necessary to print a large deposit of paste.
In addition, solder paste is half flux(by volume) and the resultant solder
joint volume will be half of the paste deposit (another reason to print more
paste). I have had a number of situations where people have taped off or
masked the bottom side of the via to keep the paste from flowing out the
bottom side. This typically creates some of the same problems seen with the
microvia technology(see below), so I would avoid sealing the bottom side of
the via. The opening at the bottom of the via provides an addition path for
the volatile components of the solder paste to escape the molten solder.
Microvia-in-pad: Voiding is the primary problem that I have seen here and
typically people are seeing a very large void right in the middle of the
solder joint. In the process, you print solder paste over a small opening.
Air becomes entrapped underneath the solder paste printed and many people
theorize that it is this entrapped air that is causing the void. However,
our work has shown that this is probably not the case. It is more likely
the entrapped volatiles from the solder paste(although I often say that "the
paste is never the problem," in this case it seems that the paste could be
the problem). As the flux is cleaning the surface to promote wetting, it
produces volatiles through this fluxing reaction. The more difficult a
surface is to wet to, the more volatiles that are produced from the flux.
Since the microvia openings are quite small, it is possible that the plating
of the via walls isn't that great. In addition, as the constituents of the
flux go from a liquid to a vapor, their volume can increase up to 100x.
I am no chemist, so I hope that my comments are clear. Again, this is just
what we have seen from a solder paste supplier's perspective. This is a
very interesting topic to me and any additional comments would be great!
As this is my first posting to TechNet, I would like to add one comment to a
particular member of the Ontario, Canada contingent(Since I don't want to
mention names, we will call him Bev). You thought it would never happen,
but the central NY engineer is finally among your ranks!!!
Regards,
Tim Jensen
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Erickson, Gary
Sent: Thursday, August 09, 2001 9:34 AM
To: [log in to unmask]
Subject: Re: [TN] VIAS in pads...
Ken:
Are you talking about Microvia ( single or multi-tier ) or Thru hole "via in
pad" ??
GaryE
-----Original Message-----
From: Ken Patel [ mailto:[log in to unmask] <mailto:[log in to unmask]> ]
Sent: Wednesday, August 08, 2001 2:53 PM
To: [log in to unmask]
Subject: [TN] VIAS in pads...
Assemblers,
How robust is the VIA in the pad technology now? Can someone share the
process of handling board that has vias in pads?
Most of our boards have VIAS in the pads and there is no way out.
re,
Ken Patel
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<TITLE>RE: [TN] VIAS in pads...</TITLE>
<META content="MSHTML 5.00.2614.3500" name=GENERATOR></HEAD>
<BODY>
<DIV><FONT color=#008080 face="Calisto MT" size=2><SPAN
class=220574919-09082001>
All:</SPAN></FONT></DIV>
<DIV><FONT color=#008080 face="Calisto MT" size=2><SPAN
class=220574919-09082001></SPAN></FONT> </DIV>
<DIV><FONT color=#008080 face="Calisto MT" size=2><SPAN
class=220574919-09082001>
Just to push this a little further (I'm interested in this response), does a
finish of HASL present less issues with wetting</SPAN></FONT></DIV>
<DIV><FONT color=#008080 face="Calisto MT" size=2><SPAN
class=220574919-09082001>
and outgassing of the solder paste volatiles to the uVias, say versus a finish
of OSP or ENIG ?? </SPAN></FONT></DIV>
<DIV><FONT color=#008080 face="Calisto MT" size=2><SPAN
class=220574919-09082001></SPAN></FONT> </DIV>
<DIV><FONT color=#008080 face="Calisto MT" size=2><SPAN
class=220574919-09082001>
If what you say is true, </SPAN></FONT><FONT color=#008080
face="Calisto MT" size=2><SPAN class=220574919-09082001>then will the wetting of
the uVia walls during HASL eliminate or reduce the tendency of
</SPAN></FONT></DIV>
<DIV><FONT color=#008080 face="Calisto MT" size=2><SPAN
class=220574919-09082001>
entrapment of gases (or air) </SPAN></FONT><FONT color=#008080
face="Calisto MT" size=2><SPAN class=220574919-09082001>during BGA assembly
??</SPAN></FONT></DIV>
<DIV> </DIV>
<DIV><FONT color=#008080 face="Calisto MT" size=2><SPAN
class=220574919-09082001>
Regards,</SPAN></FONT></DIV>
<DIV><FONT color=#008080 face="Calisto MT" size=2><SPAN
class=220574919-09082001></SPAN></FONT> </DIV>
<DIV><FONT color=#008080 face="Calisto MT" size=2><SPAN
class=220574919-09082001>
Gary Erickson</SPAN></FONT></DIV>
<BLOCKQUOTE style="MARGIN-RIGHT: 0px">
<DIV align=left class=OutlookMessageHeader dir=ltr><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Tim Jensen
[mailto:[log in to unmask]]<BR><B>Sent:</B> Thursday, August 09, 2001 2:15
PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> Re: [TN] VIAS in
pads...<BR><BR></DIV></FONT>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial size=2>Gary
brings up a very good point regarding various via-in-pad
technologies.</FONT></SPAN></DIV>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial size=2>The
microvia technology has proven to be much more difficult than the vias that
pass completely through the board. My experience is related to soldering
and have worked with various customers using both technologies, I can provide
the following insight on each:</FONT></SPAN></DIV>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial
size=2>Through hole via-in-pad: The biggest problem that I have run into with
this technology has been related to solder paste volume. Since the
solder will wet down into the via, it is necessary to print a large deposit of
paste. In addition, solder paste is half flux(by volume) and the
resultant solder joint volume will be half of the paste deposit (another
reason to print more paste). I have had a number of situations where
people have taped off or masked the bottom side of the via to keep the paste
from flowing out the bottom side. This typically creates some of the
same problems seen with the microvia technology(see below), so I would avoid
sealing the bottom side of the via. The opening at the bottom of the via
provides an addition path for the volatile components of the solder paste to
escape the molten solder.</FONT></SPAN></DIV>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial
size=2>Microvia-in-pad: Voiding is the primary problem that I have seen here
and typically people are seeing a very large void right in the middle of the
solder joint. In the process, you print solder paste over a small
opening. Air becomes entrapped underneath the solder paste printed and
many people theorize that it is this entrapped air that is causing the
void. However, our work has shown that this is probably not the
case. It is more likely the entrapped volatiles from the solder
paste(although I often say that "the paste is never the problem," in this case
it seems that the paste could be the problem). As the flux is cleaning
the surface to promote wetting, it produces volatiles through this fluxing
reaction. The more difficult a surface is to wet to, the more volatiles
that are produced from the flux. Since the microvia openings are quite
small, it is possible that the plating of the via walls isn't that
great. In addition, as the constituents of the flux go from a liquid to
a vapor, their volume can increase up to 100x. </FONT></SPAN></DIV>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial size=2>I am
no chemist, so I hope that my comments are clear. Again, this is just
what we have seen from a solder paste supplier's perspective. This is a
very interesting topic to me and any additional comments would be
great!</FONT></SPAN></DIV>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial size=2>As
this is my first posting to TechNet, I would like to add one comment to a
particular member of the Ontario, Canada contingent(Since I don't want to
mention names, we will call him Bev). You thought it would never happen,
but the central NY engineer is finally among your ranks!!!</FONT></SPAN></DIV>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial
size=2>Regards,</FONT></SPAN></DIV>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=750301214-09082001><FONT color=#0000ff face=Arial size=2>Tim
Jensen</FONT></SPAN></DIV>
<DIV class=OutlookMessageHeader><FONT face="Times New Roman"
size=2>-----Original Message-----<BR><B>From:</B> TechNet
[mailto:[log in to unmask]]<B>On Behalf Of</B> Erickson, Gary<BR><B>Sent:</B>
Thursday, August 09, 2001 9:34 AM<BR><B>To:</B>
[log in to unmask]<BR><B>Subject:</B> Re: [TN] VIAS in
pads...<BR><BR></FONT></DIV>
<P><FONT size=2>Ken: </FONT><BR><FONT size=2>Are you talking about
Microvia ( single or multi-tier ) or Thru hole "via in pad" ??</FONT> </P>
<P><FONT size=2>GaryE</FONT> </P>
<P><FONT size=2>-----Original Message-----</FONT> <BR><FONT size=2>From: Ken
Patel [<A href="mailto:[log in to unmask]">mailto:[log in to unmask]</A>]</FONT>
<BR><FONT size=2>Sent: Wednesday, August 08, 2001 2:53 PM</FONT> <BR><FONT
size=2>To: [log in to unmask]</FONT> <BR><FONT size=2>Subject: [TN] VIAS in
pads...</FONT> </P><BR>
<P><FONT size=2>Assemblers,</FONT> <BR><FONT size=2>How robust is the VIA in
the pad technology now? Can someone share the</FONT> <BR><FONT size=2>process
of handling board that has vias in pads?</FONT> </P>
<P><FONT size=2>Most of our boards have VIAS in the pads and there is no way
out.</FONT> </P>
<P><FONT size=2>re,</FONT> <BR><FONT size=2>Ken Patel</FONT> </P>
<P><FONT
size=2>---------------------------------------------------------------------------------</FONT>
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Date: Mon, 29 Oct 2001 12:25:52 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Graham Collins <[log in to unmask]>
Subject: Re: Blasts from the past?!??
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
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Maybe it's Jack running a "best of TechNet" retrospective... there was =
frost on the car this morning so it's too cold here to contemplate Graham =
Naisbitt's "work naked" bonus, but it was good for a second laugh.
regards
Graham Collins
Process Engineer,=20
Northrop Grumman
Atlantic Facility of Litton Systems Canada
(902) 873-2000 ext 6215
>>> [log in to unmask] 10/29/01 12:36PM >>>
Did any of you just get some replys to some postings that were from back =
in
July?
I did...got about 3 or 4 of them.....strange....
-Steve Gregory-
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Date: Thu, 9 Aug 2001 16:05:24 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Marsico, James" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: ESD smocks in high temperature and humidity level
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Our policy is that ESD smocks are optional during the summer months. =
Keep
in mind that some companies don't use smocks at all!
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>=20
631-595-5879
-----Original Message-----
From: Bissonnette, Jean-Francois [SMTP:[log in to unmask]]
Sent: Thursday, August 09, 2001 11:29 AM
To: [log in to unmask]
Subject: [TN] ESD smocks in high temperature and humidity
level
Hi techneters
=20
Would it be considered risky to permit shop floor employees to work
without
ESD smocks if the humidity level is around 50%?
=20
Problem is that the temperature is very high (35 dec celcius) and
working with
the smock is a real torture.
=20
I hesitate before giving the my opinion on this. I know that the
higher the humidity=20
the lower the risk of having ESD problems. But is 50% enough???
=20
Jean-Fran=E7ois Bissonnette
Contr=F4le de la Qualit=E9, =C9lectronique
Quality Control, Electronics
Vapor Canada Inc.
10655 Henri-Bourassa O.
St-Laurent, Qc
H4S 1A1
(514) 335-4200 Ext: 2021
=20
WABTEC CORPORATION CONFIDENTIALITY NOTE
The content contained in this e-mail transmission is legally
privileged and confidential information intended only for the use of =
the
individual or entity named herein. If the reader of this transmission =
is not
the intended recipient, you are hereby notified that any dissemination,
distribution, or copying of this transmission is strictly prohibited.
=09
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Date: Sat, 11 Aug 2001 17:14:54 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Colin W.T. McVean" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Colin W.T. McVean" <[log in to unmask]>
Subject: consideration the results of any
MIME-Version: 1.0
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Omissions, ambiguities, or conflicts are resolved with the customer before contract acceptance and performance. 4.4.7 Design Output Design output is documented and expressed in terms that are verified and validated against design input requirements. Design Process Management is responsible for the correct translation of all design requirements into specifications and drawings so the designs may be verified and validated (proven to meet input or intended requirements).
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Date: Tue, 17 Jul 2001 07:47:31 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Kasprzak, Bill (sys) USX" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Kasprzak, Bill (sys) USX" <[log in to unmask]>
Subject: Re: Recommendations for developing a mold
MIME-Version: 1.0
Content-Type: text/plain
Thanks go out to Phil N., Mike, Bill, Hans and Phil C for the tips on mold
development. I will certainly incorporate draft angles and slots in the mold
to facilitate extraction of the part. I will also look into a flexible
material for the actual mold itself.
I must say that it is really neat to have over 1200 consultants at your
fingertips willing to help out with any assembly problem. The technet
network is to be commended for its rapid response and expert advice. Thanks
again to all who responded to my post.
Bill Kasprzak
Moog Inc., Electronic Assembly Engineering
> -----Original Message-----
> From: Crepeau, Phil [SMTP:[log in to unmask]]
> Sent: Monday, July 16, 2001 1:09 PM
> To: [log in to unmask]
> Subject: Re: [TN] Recommendations for developing a mold
>
> hi,
>
> i think the suggestions for adding a draft angle to the walls of the mold
> are what you need. i'd also suggest that stay with an aluminum mold and
> get the inside of the mold teflon coated. your parts will come out
> without any release on them. also you might think about cutting slots at
> the seam of the mold so that you can get something like a screwdriver in
> there to help pry the pieces of the mold apart.
>
> phil
>
>
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Date: Tue, 31 Jul 2001 05:56:36 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
cmcmahon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: cmcmahon <[log in to unmask]>
Subject: Company, Inc.
MIME-Version: 1.0
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Company Client PO# Part Number Rev Release# Description Contact Quantity Tooling Plotting Size/Layers Layers Unit Cost Testing Turnaround Special Features Shipping Method Total Cost Delivery Date Notes: Boards Tested? Yes / No Reorder? Yes / No Rev? Old / New / / / / / / FedX UPS Ground Other .
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Date: Mon, 29 Oct 2001 12:51:43 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Steve Telgen <[log in to unmask]>
Subject: Re: Blasts from the past?!??
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_0017_01C16078.7702D1A0"
This is a multi-part message in MIME format.
------=_NextPart_000_0017_01C16078.7702D1A0
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
I got them too. (Of course, now I'm generating this, which I'll get back
next February). :-{)
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Stephen R. Gregory
Sent: Monday, October 29, 2001 11:37
To: [log in to unmask]
Subject: [TN] Blasts from the past?!??
Did any of you just get some replys to some postings that were from back
in July?
I did...got about 3 or 4 of them.....strange....
-Steve Gregory-
------=_NextPart_000_0017_01C16078.7702D1A0
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.00.2614.3500" name=3DGENERATOR></HEAD>
<BODY>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN =
class=3D230215017-29102001>I got=20
them too. (Of course, now I'm generating this, which I'll get back =
next=20
February). :-{)</SPAN></FONT></DIV>
<BLOCKQUOTE>
<DIV align=3Dleft class=3DOutlookMessageHeader dir=3Dltr><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of </B>Stephen R. =
Gregory<BR><B>Sent:</B>=20
Monday, October 29, 2001 11:37<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> [TN] Blasts from the=20
past?!??<BR><BR></DIV></FONT><FONT face=3Darial,helvetica><FONT =
size=3D2>Did any=20
of you just get some replys to some postings that were from back in =
July?=20
<BR><BR>I did...got about 3 or 4 of them.....strange.... =
<BR><BR>-Steve=20
Gregory-</FONT> </FONT></BLOCKQUOTE></BODY></HTML>
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Date: Thu, 9 Aug 2001 16:18:31 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Roger M. Stoops" <[log in to unmask]>
Subject: Re: Capacitor 0603 vs 0402...why not networks and arrays?
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
It seems only a few values are readily available in networks and arrays;
you have to do your homework in advance and make sure stock is available
someplace. Stock for these parts is hard to come by in domestic U.S
market.
We are using networks and arrays on medium/high volume products, and where
we use many of a few values on low volume products.
Ex: One product, estimated yearly build of 500, uses 38 cap arrays and 57
resistor ntwks, and we try to use these same values on other products. We
use un-imaginative values, too, in order to get parts (such as 1K, 10K,
100K, 0.1uF, 0.001uF) and find as many good vendors as possible.
Stock is getting better as time goes by.
My 2 cents worth.
Roger M. Stoops, C.I.D., PCB Designer
Trimble
Engineering and Construction Division
Susana Anaya
<sanaya@QUALC To: [log in to unmask]
OMM.COM> cc:
Sent by: Subject: Re: [TN] Capacitor 0603 vs 0402...why not networks and
TechNet arrays?
<[log in to unmask]
ORG>
08/09/01
03:31 PM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
Susana Anaya
Hi, the lurker comes out of the shadows here to ask all you wise ones
what's up with availablity for lower volumes. I ask because the reps that
have been suggesting them to me and haven't said a word about this (and I
am one of those not looking for thousands monthly)....sanaya.
At 08:45 AM 8/9/01 -0700, Greg Scott wrote:
Steve,
Our materials and component Engineers encourage us NOT to use chip
resistor networks
but we do use alot of capacitor arrays. The reason Is availability
unless you buy by the thousands monthly.
Greg Scott
Cray Inc.
"Stephen R. Gregory" wrote:
Hi Glenn!
I've read the responses you've received to your question (they've
all been
good), and want to ask another question...
I assume the reason to use smaller passive components, is to
reduce the real
estate needed by these components. My question is; why isn't
there more use
of chip resistor networks and capacitor arrays?
To me, it seems obvious that the use of these components will
reduce real
estate, but I don't see them being used as often as they could
be...maybe I'm
not aware of the electrical characteristics or something else,
but I wonder
why they aren't used more often in designs that are tight for
space than what
I've seen so far...
Can anybody shed some light on this?
-Steve Gregory-
Hi all,
I'm brainstorming on risks and benefits of 0603 caps
vs 0402 caps.
If the cap value, voltage rating, dielectric material,
terminations, and
use conditions are the same, would one be better than the
other? My
thoughts are it would be a wash or at least not significant.
Here's what I
have so far:
Benefits of 0402 vs 0603:
Smaller size reduces thermal stress/strain on solder joints
from CTE or
board flexing.
Smaller size uses less real estate on board
Risks of 0402 vs 0603:
Equipment may have difficulty placing
Thinner dielectric spacing to achieve same capacitance, cap
higher failure
rate
Smaller size, cracks easier to develop
Higher risk of tombstoning
What do you all think? I'm sure I missed something,
maybe even
wrong on some of the above.
Thanks,
Glenn
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Date: Tue, 31 Jul 2001 07:44:30 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
cmcmahon <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: cmcmahon <[log in to unmask]>
Subject: !"#$
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Date: Mon, 29 Oct 2001 12:59:55 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Kasprzak, Bill (sys) USX" <[log in to unmask]>
Subject: Re: Blasts from the past?!??
MIME-Version: 1.0
Content-Type: text/plain
This is wierd. I just received notification that a post that I wrote in July
was sucessfully distributed. I did not resend this post. I'll assume that
the system has gone nuts. Somebody will figure it out.
Bill Kasprzak
Moog Inc., Electronic Assembly Engineering
> -----Original Message-----
> From: McGlaughlin, Jeffrey A [SMTP:[log in to unmask]]
> Sent: Monday, October 29, 2001 11:53 AM
> To: [log in to unmask]
> Subject: Re: [TN] Blasts from the past?!??
>
> Yeah, but the system says it is working correctly!?!
>
>
> Jeffrey
> [log in to unmask]
> 4-7582
>
> -----Original Message-----
> From: Stephen R. Gregory [mailto:[log in to unmask]]
> Sent: Monday, October 29, 2001 11:37 AM
> To: [log in to unmask]
> Subject: [TN] Blasts from the past?!??
>
>
> Did any of you just get some replys to some postings that were from
> back in July?
>
> I did...got about 3 or 4 of them.....strange....
>
> -Steve Gregory-
>
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Date: Mon, 30 Jul 2001 08:50:14 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "<Peter George Duncan>" <[log in to unmask]>
Subject: Re: Clearance area around holes
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Daan,
The sizes you quote are not especially small, nor is the difference between
them. I'm not totally clear from your description what you are meaning,
but, (converting to my old-fashioned language), do you have 12 mil diameter
holes going through 24 mils diameter exclusion zones in the copper planes?
Unless your Fab House's registration accuracy is very bad, you will have a
nominal 6 mils all-round clearance and in practice, shouldn't have less
than 3 to 4 mils clearance. Is this OK electrically if your small
clearances are, for example, at layers with high power? It should not be a
difficult job for a decent Fab House to make this board for you, though.
Pete Duncan
"d. terstegge"
<[log in to unmask] To: [log in to unmask]
GROUP.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST Aero/ST Group)
Sent by: TechNet Subject: [TN] Clearance area around holes
<[log in to unmask]>
07/27/01 04:37 PM
Please respond to
"TechNet E-Mail Forum.";
Please respond to "d.
terstegge"
Hi Technet,
Here's a question for the bare board experts out there:
One of our pcb-suppliers had rejects on a complete batch of our boards
because the clearance between the via's and the surrounding copperplane was
so small that it resulted in short circuits.
The holes were designed 0.3 mm (finished hole size) and the openings in the
copperplane were 0.6 mm, leaving only a small clearance area. The board
measures about 20*15 cm.
What do you think, is a board like this manufacturable for a decent board
shop, or is it really that difficult? Could you give me a typical value
for the minimum clearance around the finished-hole that board vendors need
?
Best regards,
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
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Date: Tue, 31 Jul 2001 11:10:34 -0400
Reply-To: Mark Charlton <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mark Charlton <[log in to unmask]>
Organization: MSI of Central Florida, Inc.
Subject: Vibratory base feeders
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_001A_01C119B1.6B37A840"
This is a multi-part message in MIME format.
------=_NextPart_000_001A_01C119B1.6B37A840
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Fellow Technetters,
=20
I am looking for suggestions how to present "stick" parts to my pick =
and
place machines. These vibratory-base feeders have been troublesome for
years and was wondering what other solutions are available. I know I'm
not the only user struggling with this technology so any assistance or
alternatives will be welcome.
=20
Mark
=20
------=_NextPart_000_001A_01C119B1.6B37A840
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META content=3D"MSHTML 5.50.4207.2601" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Fellow Technetters,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>I am looking =
for suggestions how=20
to present "stick" parts to my pick and place machines. =
These=20
vibratory-base feeders have been troublesome for years and was =
wondering what=20
other solutions are available. I know I'm not the only user=20
struggling with this technology so any assistance or alternatives will =
be=20
welcome.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Mark</FONT></DIV>
<DIV> </DIV></BODY></HTML>
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Date: Mon, 30 Jul 2001 10:31:58 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "<Peter George Duncan>" <[log in to unmask]>
Subject: Re: Rejected posting to [log in to unmask]
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hi, Steve,
Yeah, I got one of these ListServer messages the other day and didn't
understand it either. I corrected a typo and resent it, and it was accepted
OK. Hasn't happened again since, so maybe just a visiting gremlin in the
works.
What a fantastic iceberg picture! I'm using it as my PC wallpaper -
symbolic of how much we don't know compared with how much we do, and it's
only the clear days that show this.
Pete Duncan
"Stephen R.
Gregory" To: [log in to unmask]
<SteveZeva@AO cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST Aero/ST Group)
L.COM> Subject: [TN] Rejected posting to [log in to unmask]
Sent by:
TechNet
<[log in to unmask]
ORG>
07/28/01
12:12 AM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
SteveZeva
I just got this email from the Listserver:
Your message is being returned to you unprocessed because it appears to
have
already been distributed to the TechNet list. That is, a message with
identical
text (but possibly with different mail headers) has been posted to the
list
recently, either by you or by someone else.
Has anyone else gotten this? What's really weird, is that the message was
referring to a reply I made 4-days ago to the list...strange.
Anyways, it's Friday...YAY! I gotta neat picture up on my web page that is
pretty cool...literally. It's of an iceberg. You'll see why the Titanic
sank!
You'll also be able really understand the saying; "It's just the tip of the
iceburg".
The photo came from a Rig Manager for Global Marine Drilling in St. Johns,
Newfoundland. They actually have to divert the path of these things away
from
the rig by towing them with ships.
In this particular case the water was calm & the sun was almost directly
overhead so that the diver was able to get into the water and click this
pic.
Clear water huh? They estimated the weight of this behemoth at over
300,000,000 tons!
http://stevezeva.homestead.com/index.html
-Steve Gregory-
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Date: Tue, 31 Jul 2001 21:14:06 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Fish <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Fish <[log in to unmask]>
Subject: Re: Graphics products
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Bishop Graphics Westlake Village, CA is no longer in business. They
sold-out to ChartPak 800-628-1910
----- Original Message -----
From: "Jana L. Carraway" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Monday, July 30, 2001 2:20 PM
Subject: [TN] Graphics products
> Greetings TechNetters,
>
> Would you guys have phone numbers for a few graphic arts products
companies
> like Bishop Graphics, etc.
> Thank you for your help,
> Jana Carraway
>
> --------------------------------------------------------------------------
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> --------------------------------------------------------------------------
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>
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Date: Mon, 29 Oct 2001 13:13:57 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: Company, Inc.
X-To: cmcmahon <[log in to unmask]>
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
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Serious delay in the y2k bug.
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of cmcmahon
> Sent: Tuesday, July 31, 2001 8:57 AM
> To: [log in to unmask]
> Subject: [TN] Company, Inc.
>
>
> Company Client
> PO# Part Number Rev
> Release# Description
> Contact Quantity
> Tooling Plotting Size/Layers
> Layers Unit Cost Testing
> Turnaround Special Features
> Shipping Method Total Cost
> Delivery Date Notes: Boards Tested?
> Yes / No Reorder? Yes / No
> Rev?
> Old / New / / / / /
> / FedX UPS Ground Other .
>
> ------------------------------------------------------------------
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> ------------------------------------------------------------------
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Date: Mon, 29 Oct 2001 13:17:28 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Nutting <[log in to unmask]>
Subject: Re: Assembly Inspection/verification.
MIME-Version: 1.0
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Jack,
=20
We are running in the dark ages and have created inspection overlays by
hand using either Nomex or Acetate film.
=20
Phil Nutting
-----Original Message-----
From: Jack Bryant [mailto:[log in to unmask]]
Sent: Friday, August 10, 2001 10:21 PM
To: [log in to unmask]
Subject: [TN] Assembly Inspection/verification.
TechNet,
=20
Has anyone tried to use templates or overlays at the end of a machine
process or the end of a progressive line as a quick check for polarity
or component orientations? If so what type of materials did you make
your overlays from? Were they conductive for ESD? Where did you have
your templates made? Can a board house make these from Gerber data?
Stencil shop? I would appreciate your comments. Thanks.
=20
J. Bryant
------_=_NextPart_001_01C160A5.F7CB4A10
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charset="iso-8859-1"
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4522.1800" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><SPAN class=3D317151618-29102001><FONT face=3DArial color=3D#0000ff =
size=3D2>Jack,</FONT></SPAN></DIV>
<DIV><SPAN class=3D317151618-29102001><FONT face=3DArial color=3D#0000ff =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D317151618-29102001><FONT face=3DArial color=3D#0000ff =
size=3D2>We are=20
running in the dark ages and have created inspection overlays by hand =
using=20
either Nomex or Acetate film.</FONT></SPAN></DIV>
<DIV><SPAN class=3D317151618-29102001><FONT face=3DArial color=3D#0000ff =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D317151618-29102001><FONT face=3DArial color=3D#0000ff =
size=3D2>Phil=20
Nutting</FONT></SPAN></DIV>
<BLOCKQUOTE dir=3Dltr style=3D"MARGIN-RIGHT: 0px">
<DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> Jack Bryant=20
[mailto:[log in to unmask]]<BR><B>Sent:</B> Friday, August 10, 2001 =
10:21=20
PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] Assembly=20
Inspection/verification.<BR><BR></FONT></DIV>
<DIV><FONT face=3DArial size=3D2>TechNet,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>Has anyone tried to use templates or =
overlays at=20
the end of a machine process or the end of a progressive line as =
a quick=20
check for polarity or component orientations? If so what type of =
materials did=20
you make your overlays from? Were they conductive for ESD? Where did =
you have=20
your templates made? Can a board house make these from Gerber data? =
Stencil=20
shop? I would appreciate your comments. Thanks.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT> </DIV>
<DIV><FONT face=3DArial size=3D2>J. =
Bryant</FONT></DIV></BLOCKQUOTE></BODY></HTML>
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Date: Thu, 9 Aug 2001 13:55:26 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Patel <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Patel <[log in to unmask]>
Organization: interWAVE Communications, Inc.
Subject: Re: VIAS in pads...
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Through hole vias. I am looking for problem resolution at assembly level
and not fab level.
re,
Ken Patel
"Erickson, Gary" wrote:
> Part 1.1Type: Plain Text (text/plain)
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Date: Thu, 9 Aug 2001 14:53:19 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rick Howieson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rick Howieson <[log in to unmask]>
Subject: Gold/Paste
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
We are seeing cloudy/grayish smt solder joints on boards with immersion gold
or soft body gold plating. Is this common???
Thanks,
Rick
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Date: Thu, 9 Aug 2001 16:12:32 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mason Hu <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mason Hu <[log in to unmask]>
Subject: Re: Microvia in BGA pad
Have you looked into IPC-6016?
Mason
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Date: Tue, 17 Jul 2001 14:15:10 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Geoff Layhe <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Geoff Layhe <[log in to unmask]>
Subject: Re: Impedance Discrepency
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Paul,
I don't think 5 plies of 7628 in 0.35" is the reason for the difference. 5 x
7628 calculates to a dielectric constant of 4.84. I just ran a quick manual
calculation using Er 4.84 and got the almost the same results as your Polar
(65.2 ohms.
Assuming track width and dielectric spacings are OK the only way to get an
impedance of 72 is by using an Er of 3.9. You aren't using BT Epoxy are you.
Is the 72 Ohms measured on a test coupon or on a track in the board. Could
there be an something in the circuit affecting the results?
Geoff Layhe
www.Lamar-uk.co.uk
-----Original Message-----
From: tech [mailto:[log in to unmask]]
Sent: 17 July 2001 13:33
To: [log in to unmask]
Subject: [TN] Impedance Discrepency
I have a 6 layer design with layers 2 and 5 being planes and 3 and 4
signals. In this particular case , due to overall thickness and outer
layer impedance requirements we have .010 from the planes to the signals
and .035 between the signals. 1 Oz. copper and finished lines at .006.
My impedance software ( Polar CITS25) is giving a number of 65.02 ohms
but the actual results we're getting are all at the 72+ ohm range.We do
many impedance designs and have not seen a discrepency like this. The
.035 dielectric between the signals is 5 pieces of 7628 which is an
unusually high amount of prepreg for us and the .010 from planes to
signals are cores. All 140Tg FR4. Can the high thickness (resin content)
of prepreg be creating the problem ? Sections on the coupons are very
close to design so we don't appear to have a process issue.
Any input appreciated.
Paul Greene
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Date: Mon, 30 Jul 2001 07:42:07 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mary Jane Chism <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mary Jane Chism <[log in to unmask]>
Subject: Re: ESD mat material...
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----_=_NextPart_001_01C118F5.0ADD3D50"
This message is in MIME format. Since your mail reader does not understand
this format, some or all of this message may not be legible.
------_=_NextPart_001_01C118F5.0ADD3D50
Content-Type: text/plain;
charset="iso-8859-1"
Steve,
Here is the company name, location, phone number, and contact of where we
order our matting. Hope this helps.
Bennett & Bennett
Contact: John Denny
Phone number: 937-879-3144
Springfield, OH
Mary Jane Chism/Technical Trainer
-----Original Message-----
From: Stephen R. Gregory [mailto:[log in to unmask]]
Sent: Friday, July 27, 2001 1:10 PM
To: [log in to unmask]
Subject: [TN] ESD mat material...
Hi everyone!
Does anybody know a vendor that sells ESD mat material by the roll? I used
to
have
one, but I've misplaced the business card I had, and I can't remember who it
was (senility creeping in...hehehe).
Oh by the way, I just found out that iceburg picture is a fake...go to:
http://www.snopes2.com/spoons/photos/iceberg.htm
Sure looked cool though...I need something cool here. It's been over
100-degrees here for more than a week...
-Steve Gregory-
------_=_NextPart_001_01C118F5.0ADD3D50
Content-Type: text/html;
charset="iso-8859-1"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
<META content="MSHTML 5.00.2614.3500" name=GENERATOR></HEAD>
<BODY>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN
class=200183912-30072001>Steve,</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN class=200183912-30072001>Here
is the company name, location, phone number, and contact of where we order our
matting. Hope this helps.</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN
class=200183912-30072001></SPAN></FONT> </DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN
class=200183912-30072001>Bennett & Bennett</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN
class=200183912-30072001>Contact: John Denny</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN class=200183912-30072001>Phone
number: 937-879-3144</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN
class=200183912-30072001>Springfield, OH</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN
class=200183912-30072001></SPAN></FONT> </DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN class=200183912-30072001>Mary
Jane Chism/Technical Trainer</SPAN></FONT></DIV>
<DIV> </DIV>
<BLOCKQUOTE>
<DIV class=OutlookMessageHeader><FONT face="Times New Roman"
size=2>-----Original Message-----<BR><B>From:</B> Stephen R. Gregory
[mailto:[log in to unmask]]<BR><B>Sent:</B> Friday, July 27, 2001 1:10
PM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] ESD mat
material...<BR><BR></DIV></FONT><FONT face=arial,helvetica><FONT size=2>Hi
everyone! <BR><BR>Does anybody know a vendor that sells ESD mat material by
the roll? I used to <BR>have <BR>one, but I've misplaced the business card I
had, and I can't remember who it <BR>was (senility creeping in...hehehe).
<BR><BR>Oh by the way, I just found out that iceburg picture is a fake...go
to: <BR><BR>http://www.snopes2.com/spoons/photos/iceberg.htm <BR><BR>Sure
looked cool though...I need something cool here. It's been over
<BR>100-degrees here for more than a week... <BR><BR>-Steve Gregory-</FONT>
</FONT></BLOCKQUOTE></BODY></HTML>
------_=_NextPart_001_01C118F5.0ADD3D50--
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Date: Tue, 17 Jul 2001 10:22:24 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"McGlaughlin, Jeffrey A" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "McGlaughlin, Jeffrey A" <[log in to unmask]>
Subject: Re: Impedance Discrepency
MIME-version: 1.0
Content-type: text/plain; charset="iso-8859-1"
The problem may be the assumed dielectric constant of the FR4 prepreg
material. FR4 has a dielectric constant that changes with respect to
frequency, making it necessary to find the effective Er for impedance
calculations, not the base Er. These calculations appear in several of
Richard Hartley's presentations on high speed design. These presentations
should be in the proceedings for either PCB Design conference from last year
if you have them (if not let me know and I will try to find my copy). I have
found that based on these calculations the Er of FR4 *can* vary from around
4.2-5.0 when using "garden variety" material. When doing boards where the
controlled impedance is critical I have found it to be a good idea to
include not only a stack-up but a list of assumed values and the calculator
used. This allows fabricator to make the necessary adjustments to my data to
meet the critical values, based on their processes.
Good Luck,
Jeffrey A. McGlaughlin, C.I.D.
Sr. PCB Designer
Battelle Memorial Institute
Columbus Ohio
[log in to unmask]
-----Original Message-----
From: tech [mailto:[log in to unmask]]
Sent: Tuesday, July 17, 2001 8:33 AM
To: [log in to unmask]
Subject: [TN] Impedance Discrepency
I have a 6 layer design with layers 2 and 5 being planes and 3 and 4
signals. In this particular case , due to overall thickness and outer
layer impedance requirements we have .010 from the planes to the signals
and .035 between the signals. 1 Oz. copper and finished lines at .006.
My impedance software ( Polar CITS25) is giving a number of 65.02 ohms
but the actual results we're getting are all at the 72+ ohm range.We do
many impedance designs and have not seen a discrepency like this. The
.035 dielectric between the signals is 5 pieces of 7628 which is an
unusually high amount of prepreg for us and the .010 from planes to
signals are cores. All 140Tg FR4. Can the high thickness (resin content)
of prepreg be creating the problem ? Sections on the coupons are very
close to design so we don't appear to have a process issue.
Any input appreciated.
Paul Greene
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Date: Tue, 17 Jul 2001 11:55:12 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Anderson, Greg (IndSys, GEFanuc, NA)" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Anderson, Greg (IndSys, GEFanuc, NA)" <[log in to unmask]>
Subject: Re: Weave Exposure...
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Steve,
I've seen images like this long ago. . . caused then by rework of solder
mask. Most things that strip solder mask also do a number on the "butter
coat". Shows up first at the thinner "knuckle" of the glass weave.
Greg Anderson
Senior Advanced Manufacturing Engineer
GE Fanuc Automation
Charlottesville, VA 22911
Phone: 804-978-5181
FAX: 804-978-5898
e-mail: [log in to unmask]
-----Original Message-----
From: Stephen R. Gregory [mailto:[log in to unmask]]
Sent: Tuesday, July 17, 2001 9:56 AM
To: [log in to unmask]
Subject: [TN] Weave Exposure...
Hi Everyone!
I've got some boards in here that has what I believe to be weave exposure,
and I think it's bad enough to reject the boards. Go to:
http://stevezeva.homestead.com/index.html
and tell me what you think. What causes something like that?
-Steve Gregory-
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Date: Tue, 17 Jul 2001 08:59:09 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Chuck Brummer <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Chuck Brummer <[log in to unmask]>
Subject: Re: Weave Exposure...
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="------------70333D477D0298624D186420"
--------------70333D477D0298624D186420
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Steve,
Wow, great shot of the glass fibers. What did you do with the resin?
The resin must have been there before but not very much maybe. Looks
like fairly heavy glass too, which usually has a lower resin content,
here you have the glass exposed over the knuckles. Might have removed
the epoxy mechanically or chemically.
Chuck Brummer
"Stephen R. Gregory" wrote:
> Hi Everyone!
>
> I've got some boards in here that has what I believe to be weave
> exposure,
> and I think it's bad enough to reject the boards. Go to:
>
> http://stevezeva.homestead.com/index.html
>
> and tell me what you think. What causes something like that?
>
> -Steve Gregory-
--------------70333D477D0298624D186420
Content-Type: text/html; charset=us-ascii
Content-Transfer-Encoding: 7bit
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>
Steve,
<br>Wow, great shot of the glass fibers. What did you do with the
resin? The resin must have been there before but not very much maybe.
Looks like fairly heavy glass too, which usually has a lower resin content,
here you have the glass exposed over the knuckles. Might have removed
the epoxy mechanically or chemically.
<br>Chuck Brummer
<p>"Stephen R. Gregory" wrote:
<blockquote TYPE=CITE><font face="arial,helvetica"><font size=-1>Hi Everyone!</font></font>
<p><font face="arial,helvetica"><font size=-1>I've got some boards in here
that has what I believe to be weave exposure,</font></font>
<br><font face="arial,helvetica"><font size=-1>and I think it's bad enough
to reject the boards. Go to:</font></font>
<p><font face="arial,helvetica"><font size=-1><A HREF="http://stevezeva.homestead.com/index.html">http://stevezeva.homestead.com/index.html</A></font></font>
<p><font face="arial,helvetica"><font size=-1>and tell me what you think.
What causes something like that?</font></font>
<p><font face="arial,helvetica"><font size=-1>-Steve Gregory-</font></font></blockquote>
</html>
--------------70333D477D0298624D186420--
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Date: Tue, 17 Jul 2001 12:08:32 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jim Francey <[log in to unmask]>
Subject: Re: Weave Exposure...
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_1e.18a3273b.2885bd00_boundary"
--part1_1e.18a3273b.2885bd00_boundary
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Content-Transfer-Encoding: 7bit
"excessive brushing before solder mask application" and or rework? I'd ask
the question.
What's the base material? (looks like bt-epoxy or polyimide - or cooked
epoxy!)............Jim
In a message dated 17/07/2001 4:26:10 PM GMT Daylight Time,
[log in to unmask] writes:
> Very impressive picture indeed.As Susan suggests,we will use your picture
> for training.
> My first guess will be excessive brushing before solder mask application
> Edward
>
>
--part1_1e.18a3273b.2885bd00_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>"excessive brushing before solder mask application" and or <U>rework</U>? I'd ask
<BR>the question.
<BR>
<BR>What's the base material? (looks like bt-epoxy or polyimide - or cooked
<BR>epoxy!)............Jim
<BR>
<BR>In a message dated 17/07/2001 4:26:10 PM GMT Daylight Time,
<BR>[log in to unmask] writes:
<BR>
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Very impressive picture indeed.As Susan suggests,we will use your picture
<BR>for training.
<BR>My first guess will be excessive brushing before solder mask application
<BR>Edward
<BR>
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
--part1_1e.18a3273b.2885bd00_boundary--
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Date: Mon, 30 Jul 2001 13:49:36 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Cathy Killen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Cathy Killen <[log in to unmask]>
Subject: Just a few Questions
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hope someone can help.
Why is an 'iconic' wash required and is it required in a no-clean process?
Can a no-clean process achieve the desired standards, if not what is the
best way to achieve the standards?
Cathy Killen
Training Instructor
[log in to unmask] <mailto:[log in to unmask]>
An Oasis of Training Excellence
* 028 38314305
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Date: Mon, 30 Jul 2001 09:32:21 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Flex delamination?
MIME-Version: 1.0
Content-Type: multipart/alternative;
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--part1_d2.a0aee16.2896bbe5_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
Hi Everyone!
Still hot as Hades, here...looks like we're looking at +100-degree days all
this week!
They did an interesting thing on one of the local news station here to
illustrate how hot it gets inside a car, and why it's really crazy to leave
kids or pets inside cars when it gets this hot...they actually baked cookies
inside a car!!! Enough of that...
Daan's asked me to post a picture for him up on our web site. Go to:
http://stevezeva.homestead.com/index.html
I've got a picture of a flex-rigid board with a greenish spot on the
copperplane, under the coverlayer. I would like to know what this is, and if
it we should reject it or not.
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
--part1_d2.a0aee16.2896bbe5_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Everyone!
<BR>
<BR>Still hot as Hades, here...looks like we're looking at +100-degree days all
<BR>this week!
<BR>They did an interesting thing on one of the local news station here to
<BR>illustrate how hot it gets inside a car, and why it's really crazy to leave
<BR>kids or pets inside cars when it gets this hot...they actually baked cookies
<BR>inside a car!!! Enough of that...
<BR>
<BR>Daan's asked me to post a picture for him up on our web site. Go to:
<BR>
<BR>http://stevezeva.homestead.com/index.html
<BR>
<BR>I've got a picture of a flex-rigid board with a greenish spot on the
<BR>copperplane, under the coverlayer. I would like to know what this is, and if
<BR>it we should reject it or not.
<BR>
<BR>Daan Terstegge
<BR>SMT Centre
<BR>Thales Communications
<BR>Unclassified mail
<BR>Personal Website: http://www.smtinfo.net
<BR></FONT></HTML>
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Date: Mon, 30 Jul 2001 15:47:00 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"d. terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: Re: Flex delamination?
MIME-Version: 1.0 (Generated by NET-TEL Mailguard SMTP version 4.0.0.22)
Content-Type: text/plain; charset=US-ASCII
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Thanks Steve,
Here's some extra info about the picture:
Before my destructive experiments with removing the coverlayer (always a =
pleasure! ) this discoloration showed through as dark spots, some about 1 =
cm diameter. The material still looked flat, unlike most delaminations =
that I've seen, and that's why I'm not sure if this really is a delaminatio=
n. After cutting the flex with scissors I found out that at these spots =
there is very bad adhesion between copperplane and coverlayer.=20
Although the copper has a greenish color, it looks smooth and shiny. This =
was already somewhat visible before assembly, but it became worse during =
reflow soldering.
Daan
>>> <[log in to unmask]> 07/30 3:32 pm >>>
Hi Everyone!
Still hot as Hades, here...looks like we're looking at +100-degree days =
all=20
this week!
They did an interesting thing on one of the local news station here to=20
illustrate how hot it gets inside a car, and why it's really crazy to =
leave=20
kids or pets inside cars when it gets this hot...they actually baked =
cookies=20
inside a car!!! Enough of that...
Daan's asked me to post a picture for him up on our web site. Go to:
http://stevezeva.homestead.com/index.html=20
I've got a picture of a flex-rigid board with a greenish spot on the=20
copperplane, under the coverlayer. I would like to know what this is, and =
if=20
it we should reject it or not.
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net=20
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Date: Thu, 9 Aug 2001 15:59:05 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Dorothy M. Lush" <[log in to unmask]>
Subject: Re: Gold/Paste
MIME-Version: 1.0
Content-Type: text/plain
Also is this a double-sided board and are the solder joints in question on
the first pass side only or both sides (if a double-sided board)? The first
pass side can look great after 1st reflow but if it goes through a slow cool
on the 2nd reflow can get some extraordinary crystal growth depending on the
solder paste and it looks dull. What solder paste are you using and is the
questionable solder appearance random or at certain components?
Dorothy Lush
Manufacturing Engineer
> ----------
> From: Andrew Hoggan[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;Andrew Hoggan
> Sent: Thursday, August 09, 2001 3:21 PM
> To: [log in to unmask]
> Subject: Re: Gold/Paste
>
> Hi Rick,
>
> could be;
>
> a) oxide on the joint
>
> b) change in the composition of the original solder through elemental
> contamination from your plating (pad/component) during reflow giving
> differential freezing, resulting in a change in the surface appearance
>
> c) the solder you've been supplied with is 'out of spec' (do you have a
> spec?) and is freezing differentially
>
> d) all of the above
>
> e) none of the above
>
> Best regards,
>
> Andrew Hoggan
> BBA Associates Ltd
> www.bba-associates.com
>
>
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Rick Howieson
> Sent: 09 August 2001 21:53
> To: [log in to unmask]
> Subject: [TN] Gold/Paste
>
>
> We are seeing cloudy/grayish smt solder joints on boards with immersion
> gold
> or soft body gold plating. Is this common???
> Thanks,
> Rick
>
> --------------------------------------------------------------------------
> --
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Date: Thu, 9 Aug 2001 16:27:35 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Patel <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Patel <[log in to unmask]>
Organization: interWAVE Communications, Inc.
Subject: Re: VIAS in pads...
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
Greg,
Can you clarify the following...
(1) What do you mean by 170 mils area - Are you referring as a length or area? I think you are
saying square mils here.
(2) Do you mean via towards the heel and not toe on chip parts?
(3) No solder mask on via pad on other side, the non-SMT pad side.
re,
Ken Patel
Greg Scott wrote:
> We have had great success with vias in pads, by establishing some rules.
> NO vias in following component's pads.
> 0603 and smaller, components of any style where the pad has an area of less than 170
> mils.
> No gull wing pin style ICs.
> Also we tend to place via on chip parts off center of pad towards center of part.
> Also we capture the bottom side (none solder side) of via with solder mask, solder mask
> opening should be only large enough to clear drill (with some tolerance)
>
> hope this helps.
> Greg Scott
> Cray Inc.
>
> "Sklenar Vit (RBAU-BK/MGE4)" wrote:
>
> > We had this design and did not like it despite of fact it saved a lot of PBB
> > space. Problem was , especially for small chip packages ( 0603) that volume
> > of vias barrel is comparable to volume of solder joint and this vias was
> > "steeling" solder from solder joint accidentally ( during wave soldering).
> > Result - insufficient or even missing solder joint.
> >
> > We do not have this layout design anymore ..
> >
> > Regards
> >
> > Vit Sklenar MGE4VS
> > T: (61 3)9541 7734 F: (61 3) 9541 3909
> > e-mail work: [log in to unmask]
> > e-mail home: [log in to unmask]
> > > Robert Bosch (Aust) ,
> > 1555 cnr.Centre and McNaugton Road,
> > > Clayton , VIC 3169, Australia
> > >
> > >
> > > -----Original Message-----
> > > From: Ken Patel [SMTP:[log in to unmask]]
> > > Sent: Thursday, August 09, 2001 4:53 AM
> > > To: [log in to unmask]
> > > Subject: [TN] VIAS in pads...
> > >
> > > Assemblers,
> > > How robust is the VIA in the pad technology now? Can someone share the
> > > process of handling board that has vias in pads?
> > >
> > > Most of our boards have VIAS in the pads and there is no way out.
> > >
> > > re,
> > > Ken Patel
> > >
> > > --------------------------------------------------------------------------
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> > > ext.5315
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>
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=========================================================================
Date: Thu, 9 Aug 2001 22:02:21 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Werner Engelmaier <[log in to unmask]>
Subject: Re: [LF] Eutectic alloys?????
MIME-Version: 1.0
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
Hi Lee,
In a message dated 08/09/2001 14:53:17, [log in to unmask] writes:
>Werner Engelmaier,
>I'm not familiar with the work of Roger Wild concerning SnPb Solders.
>What did he do? Are there any technical publications available?
>I'm curious. Any help you can provide would be greatly appreciated.
>Thanks
>Lee Whiteman
Roger Wild's now classical work characterized the temperature- and
time-dependency of the creep-fatigue of Sn/Pb solders. The characterization
was enough to allow the development of the Engelmaier-Wild solder
creep-fatigue model that is widely used in the industry, which enables one
to relate the results of proper accelerated testing (as per IPC-SM-785) to
product reliability (IPC-D-279).
You can his work at: R. N. Wild, "1974 IRAD Study - Fatigue Properties of
Solder Joints," IBM Report No. M45-74-002, Contract No. IBM 4A69, 5 January
1975, among others.
Werner Engelmaier
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Date: Mon, 30 Jul 2001 09:23:59 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Pelchat, Janice" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Pelchat, Janice" <[log in to unmask]>
Subject: Re:
MIME-Version: 1.0
Content-Type: text/plain
We use an Ersascope for peripheral inspection and Hewlett Packard 5DX
laminography for soldered BGA inspection (takes X-rays in slices so to
speak).
Both are quite costly as routine inspection tools (time consumption,
programming, etc) but are invaluable for referee decisions.
Janice Pelchat
Benchmark Electronics
> -----Original Message-----
> From: Mark Ross [SMTP:[log in to unmask]]
> Sent: Monday, July 30, 2001 9:56 AM
> To: [log in to unmask]
> Subject: [TN]
>
> We have a BGA we need to inspect. However, the kicker is that
> directly below the BGA there is a socket adapter and we have tried
> XRAY and it fails miserably.
>
> Does anyone out there inspect UNDER a BGA once it is soldered in place
> with a boroscope or fiber optic camera? Thanks.
>
> Mark Ross
> PCB Designer
> Accurate Technologies
>
> --------------------------------------------------------------------------
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> --------------------------------------------------------------------------
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Date: Fri, 10 Aug 2001 12:01:09 +0900
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Young Hwan Ju <[log in to unmask]>
Subject: Expiration date for soft gold surface plating
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
HI, technetters
I am writing again to ask you for getting information about expiration date
for soft Ni/Au finished BGA.
As you know, there are several surface plating methods such as HASL,
preflux. moreover each method has different expiration date.
I wonder the expiration date of soft Ni/Au finished BGA. ( thickness is
5/0.5um).
Pls let me have any kind of information or instruction.
Regards
Jay Ju
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Date: Mon, 30 Jul 2001 18:08:39 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Edward Szpruch <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Edward Szpruch <[log in to unmask]>
Subject: Re: Flex delamination?
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Daan,
Only after your second mail I took a look on the right spot...
You wrote,that adhesion on those spots is bad and going worst after
soldering, so this is clear delamination.The point is,if the problem is =
only
on those spots,or after reflow is expanding.
You should ask a lot of questions the manufacturer of those =
boards,since a
lot depends how the board is build.Those spots might be results of
drops,that attacked oxide treatment ( it seems,that copperplane is =
treated
in this way. If coverlay is based on acrylic adhesive,this might be =
epoxy
dust,that was not cured during coverlay lamination stage,which is done =
in
lower temp. compared to epoxy cycle.This can be also the original
antioxidation layer applied on the raw flexible material . Another =
point to
discuss with the manufacturer of the rigid-flex - what are the chances =
to
have it in rigid area ( it might be inside,but you can not see it due =
to
stack of rigid layers with big land areas inside) etc...
Good luck=20
Edward
Edward Szpruch
Eltek , Manager of Process Engineering
P.O.Box 159 ; 49101 Petah Tikva Israel
Tel ++972 3 9395050 , Fax ++972 3 9309581
e-mail [log in to unmask]
> -----Original Message-----
> From: d. terstegge [SMTP:[log in to unmask]]
> Sent: =E1 =E9=E5=EC=E9 30 2001 15:47
> To: [log in to unmask]
> Subject: Re: [TN] Flex delamination?
>=20
> Thanks Steve,
>=20
> Here's some extra info about the picture:
>=20
> Before my destructive experiments with removing the coverlayer =
(always a
> pleasure! ) this discoloration showed through as dark spots, some =
about 1
> cm diameter. The material still looked flat, unlike most =
delaminations
> that I've seen, and that's why I'm not sure if this really is a
> delamination. After cutting the flex with scissors I found out that =
at
> these spots there is very bad adhesion between copperplane and =
coverlayer.
>=20
> Although the copper has a greenish color, it looks smooth and shiny. =
This
> was already somewhat visible before assembly, but it became worse =
during
> reflow soldering.
>=20
> Daan
>=20
> >>> <[log in to unmask]> 07/30 3:32 pm >>>
> Hi Everyone!
>=20
> Still hot as Hades, here...looks like we're looking at +100-degree =
days
> all=20
> this week!
> They did an interesting thing on one of the local news station here =
to=20
> illustrate how hot it gets inside a car, and why it's really crazy to
> leave=20
> kids or pets inside cars when it gets this hot...they actually baked
> cookies=20
> inside a car!!! Enough of that...
>=20
> Daan's asked me to post a picture for him up on our web site. Go to:
>=20
> http://stevezeva.homestead.com/index.html=20
>=20
> I've got a picture of a flex-rigid board with a greenish spot on the=20
> copperplane, under the coverlayer. I would like to know what this is, =
and
> if=20
> it we should reject it or not.
>=20
> Daan Terstegge
> SMT Centre
> Thales Communications
> Unclassified mail
> Personal Website: http://www.smtinfo.net=20
>=20
> =
------------------------------------------------------------------------=
--
> -------
> Technet Mail List provided as a free service by IPC using LISTSERV =
1.8d
> To unsubscribe, send a message to [log in to unmask] with following =
text in
> the BODY (NOT the subject field): SIGNOFF Technet
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SET
> Technet NOMAIL
> Search previous postings at: www.ipc.org > On-Line Resources & =
Databases >
> E-mail Archives
> Please visit IPC web site (http://www.ipc.org/html/forum.htm) for
> additional
> information, or contact Keach Sasamori at [log in to unmask] or =
847-509-9700
> ext.5315
> =
------------------------------------------------------------------------=
--
> -------
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Date: Mon, 30 Jul 2001 08:33:16 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Whittaker, Dewey E. (AZ75)" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Whittaker, Dewey E. (AZ75)" <[log in to unmask]>
Subject: Re: Just a few Questions
MIME-Version: 1.0
Content-Type: text/plain
Cathy,
Because a few of the "icons" of the industry(Doug Pauls,etc.) tell you to.
Unless you have a Freudian sense of humor,which can be attributed to
drinking too much Mountain Dew(Doug Pauls,etc.),I believe you meant to say
ionic wash.
There are many reasons to clean an assembly,besides just removing flux or
it's postreflow by-products.Knowing the end use enviroment,whether it is to
be conformally coated,as well as many other factors will determine whether
you need to clean after a no-clean process.If you would to talk to me
off-line give me a call.
Doug Pauls is also an excellent source of information.
Dewey (602-436-2766)
> -----Original Message-----
> From: Cathy Killen [SMTP:[log in to unmask]]
> Sent: Monday, July 30, 2001 5:50 AM
> To: [log in to unmask]
> Subject: [TN] Just a few Questions
>
> Hope someone can help.
> Why is an 'iconic' wash required and is it required in a no-clean process?
> Can a no-clean process achieve the desired standards, if not what is the
> best way to achieve the standards?
> Cathy Killen
> Training Instructor
> [log in to unmask] <mailto:[log in to unmask]>
> An Oasis of Training Excellence
> * 028 38314305
>
>
>
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Date: Mon, 30 Jul 2001 23:55:38 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Werner Engelmaier <[log in to unmask]>
Subject: Re: Ceramic BGA's on FR4,any thermal coefficient problems
MIME-Version: 1.0
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
In a message dated 07/26/2001 14:14:26, [log in to unmask] writes:
>Has there been any studies completed to prove or disprove thermal
>coefficient problems between ceramic BGA's mounted on FR4 causing long term
>reliability problems of the BGA balls (solder ball separating from PWB) over
>commercial and industrial temperature ranges?
>Commercial temp range: 0O C to +70 O C.
>Industrial temp range: -40 O C to + 80 O C.
Of course!
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 904-437-8747, Fax: 904-437-8737
E-mail: [log in to unmask], Website: www.engelmaier.com
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Date: Mon, 30 Jul 2001 10:32:04 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ruby Hazen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ruby Hazen <[log in to unmask]>
Subject: Line width and space
Mime-Version: 1.0
Content-Type: text/plain; format=flowed
Hello:
Could someone tell me the guidelines and/or standards about trace line width
and space in PCB? Thanks.
R.H.
_________________________________________________________________
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Date: Fri, 10 Aug 2001 14:59:59 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Eric Dawson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Eric Dawson <[log in to unmask]>
Subject: Re: SMT Pads
MIME-Version: 1.0
Content-Type: text/plain
Hi,
I have used both same size pads and different size pads for reflow/wave
soldering and have come to the conclusion that slightly longer pads (0.5 mm)
show advantages on wave soldering compared to reflow.
This is because taller components tend to shield the footprint from the chip
wave which can lead to skipped or open joints. The longer pads help to
capture the solder and lead it into the joint.
If you are wave soldering in-line gull wing devices, then orientate them so
that each footprint/lead goes through the solder wave one after the other.
This will prevent shielding one side of the device. Extra pads at the output
end, known as 'solder thieves' will aid drainage of the molten solder and
help prevent shorts. Orientation of these devices on the reflow side is not
an issue.
My experience also says that reflow soldering inherently gives lower defect
levels so I try to design wave soldering out of the equation. Double sided
reflow and pin in hole reflow help here.
Regards
Eric Dawson
> -----Original Message-----
> From: Cathy Killen [SMTP:[log in to unmask]]
> Sent: 10 August 2001 13:48
> To: [log in to unmask]
> Subject: [TN] SMT Pads
>
> Hi,
> Is there a difference in SMT pad/land size at the design stage if the PCB
> is
> to be reflowed or wave soldered?
> Cathy Killen
> Training Instructor
> [log in to unmask] <mailto:[log in to unmask]>
> An Oasis of Training Excellence
> * 028 38314305
>
> --------------------------------------------------------------------------
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Date: Mon, 30 Jul 2001 11:41:14 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ken Patel <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Patel <[log in to unmask]>
Organization: interWAVE Communications, Inc.
Subject: DIN connector & Hardware & Labor cost...
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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Guys,
Question related to cost savings..
We are currently using DIN connectors which require screws, nuts and
washers for protection against the solder joints cracking due
insertions BUT how about using the connectors with metal twist that hold
down connectors to the board that way we can eliminate the hardware
cost?
Anyone suggestions? Has anyone seen a problem with connectors with
twists?
re,
Ken Patel
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Date: Mon, 30 Jul 2001 13:37:26 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Just a few Questions
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Because a few of the "icons" of the industry(Doug Pauls,etc.) tell you to.
Unless you have a Freudian sense of humor,which can be attributed to
drinking too much Mountain Dew(Doug Pauls,etc.),I believe you meant to say
ionic wash.
There are many reasons to clean an assembly,besides just removing flux or
it's postreflow by-products.Knowing the end use enviroment,whether it is to
be conformally coated,as well as many other factors will determine whether
you need to clean after a no-clean process.If you would to talk to me
off-line give me a call.
Doug Pauls is also an excellent source of information.
**Oh, hell. Now I have to buy Dewey another beer at IPC. "Industry
Icon?". That means when you click on me, I crash and give you the blank
look of the Blue Screen of Death. Any time someone mentions my name three
times in an e-mail, I turn into a large Norwegian rat for 1 day. Thanks a
lot, Dewey.
The way I read the original question, I don't know if Cathy was referring
to the final rinsing, a general cleaning, or to the ROSE/SEC cleanliness
test.
I don't disagree with any of the former commenters, but the issue of
cleaning and cleanliness can be a complex one. If you have an assembly
process which incorporates cleaning, then you have the opportunity to
remove residues. If you have a no-clean assembly process, you must
determine, in advance, if the constituent parts (boards and components) are
clean enough to avoid electrochemical failures. How clean is clean enough?
A very difficult question to answer and can only be done on a case by case
basis in my opinion.
I would recommend that you get the following documents to assist in your
education on the matter:
IPC-TP-1115: SELECTION AND IMPLEMENTATION STRATEGY FOR A LOW-RESIDUE
NO-CLEAN PROCESS. This document discusses all the factors that an
assembler has to consider, cleanliness being a big one, when switching to
no-clean assembly methods.
IPC-HDBK-001: This document is a companion to J-STD-001. I was the editor
or writer for sections 4 (Fluxes) and 8 (Cleaning and Cleanliness). It
goes into the various cleanliness tests and cleaning in general. I
understand that a similar document is being initiated as a companion to
IPC-A-610.
EMPF Report RR0013: An In-Depth Look at Ionic Cleanliness Testers. This
may also be available as an IPC technical paper. If not, the paper is
available from www.empf.org. The paper discusses ROSE/SEC testers and why
they should be used ONLY for process control and not product acceptance.
I authored a column for Circuits Assembly Magazine
(www.circuitsassembly.com) called Process Rx for a number of years, with
topics including cleaning and cleanliness testing. You can check their
archives or the Library section of CSL (www.residues.com) for copies.
I wrote two articles for the October and November 2000 IPC Review on bare
board cleanliness specifications and assembly cleanliness specifications in
general.
Jack Brous, often considered the father of the Omegameter, wrote a paper
that outlined the origins of the ROSE test and how it can and can't be
used. IPC should have it as a technical paper. If not, I have it around
here somewhere.
If that is not enough to put you to sleep, I wrote another few documents
called the Layman's Guide to MIL-STD-2000A and the Layman's Guide to
J-STD-001B. They cover the aspects of cleaning and qualifying the process.
Well, that should be enough for a start. Let me know if I can help some
more.
Doug Pauls
Rockwell Collins
Industry Court Jester
(Now where did I put that Mountain Dew.....)
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Date: Mon, 30 Jul 2001 14:14:16 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mark Orlowski <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mark Orlowski <[log in to unmask]>
Subject: German Inspection Jig/Support
Has anybody located a U.S. distributor of Wolfgang's "Kugeltisch"
inspection jig? It sounds like an elegant solution to a common problem. I
must have one! Thanks in advance.
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Date: Tue, 17 Jul 2001 23:37:55 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Just a question...
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_da.92def0f.28865e93_boundary"
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Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
I've gotta off-the-wall question...am I the only one that faces the stuff
that I post about, or am I the only one that posts about the problems I see?
Just curious...
It seems like I have a "black-cloud" following me...if that's the case, maybe
I should persue a different profession....hehehe.
Anyways, do any of you see the same stuff that I do? Does this stuff go with
the territory? Kinda think it does, but nobody whines like I do...hehehe.
Thanks....
-Steve Gregory-
--part1_da.92def0f.28865e93_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>I've gotta off-the-wall question...am I the only one that faces the stuff
<BR>that I post about, or am I the only one that posts about the problems I see?
<BR>Just curious...
<BR>
<BR>It seems like I have a "black-cloud" following me...if that's the case, maybe
<BR>I should persue a different profession....hehehe.
<BR>
<BR>Anyways, do any of you see the same stuff that I do? Does this stuff go with
<BR>the territory? Kinda think it does, but nobody whines like I do...hehehe.
<BR>
<BR>Thanks....
<BR>
<BR>-Steve Gregory-</FONT></HTML>
--part1_da.92def0f.28865e93_boundary--
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Date: Mon, 30 Jul 2001 12:39:52 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Thorup, John" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Thorup, John" <[log in to unmask]>
Subject: Re: German Inspection Jig/Support
MIME-Version: 1.0
Content-Type: text/plain
I'll bet most of us have one of these lurking in some dusty corner already.
A little ingenuity and one of those ball and socket pan/tilt assemblies that
used to come with computer monitors could be the ticket. I know I have one
here somewhere...where did I last see that thing?
John Thorup
> -----Original Message-----
> From: Mark Orlowski [SMTP:[log in to unmask]]
> Sent: Monday, July 30, 2001 12:14 PM
> To: [log in to unmask]
> Subject: [TN] German Inspection Jig/Support
>
> Has anybody located a U.S. distributor of Wolfgang's "Kugeltisch"
> inspection jig? It sounds like an elegant solution to a common problem.
> I
> must have one! Thanks in advance.
>
> --------------------------------------------------------------------------
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Date: Fri, 10 Aug 2001 10:24:05 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Greg Scott <[log in to unmask]>
Organization: Cray Inc
Subject: Re: VIAS in pads...
MIME-Version: 1.0
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Hi Ken,
1. Yes, square area. Basically no IC pins, no sot23s, but most discrete components are OK.
2. Yes via towards heel.
3. Soldermask defined pad (donut) leaving plated hole clear of soldermask for venting during
solder reflow.
If you had .010 mil plated via hole with .030 mil pad (non-smt side) then the soldermask
opening would be .016 dia. (non-smt side)
I just notify assembly house that there is vias in solder pads so they can compensate on
solder stencil.
I stay very consistent on which components get the vias in pads so they can count on a
certain aperture Dcode for the
solder paste stencil. This way they can compensate by dcode and not search for XY
locations.
Greg Scott
Cray Inc.
----------------------------------------------------
Ken Patel wrote:
> Greg,
> Can you clarify the following...
> (1) What do you mean by 170 mils area - Are you referring as a length or area? I think you are
> saying square mils here.
> (2) Do you mean via towards the heel and not toe on chip parts?
> (3) No solder mask on via pad on other side, the non-SMT pad side.
>
> re,
> Ken Patellast pick:
>
> Greg Scott wrote:
>
> > We have had great success with vias in pads, by establishing some rules.
> > NO vias in following component's pads.
> > 0603 and smaller, components of any style where the pad has an area of less than 170
> > mils.
> > No gull wing pin style ICs.
> > Also we tend to place via on chip parts off center of pad towards center of part.
> > Also we capture the bottom side (none solder side) of via with solder mask, solder mask
> > opening should be only large enough to clear drill (with some tolerance)
> >
> > hope this helps.
> > Greg Scott
> > Cray Inc.
> >
> > "Sklenar Vit (RBAU-BK/MGE4)" wrote:
> >
> > > We had this design and did not like it despite of fact it saved a lot of PBB
> > > space. Problem was , especially for small chip packages ( 0603) that volume
> > > of vias barrel is comparable to volume of solder joint and this vias was
> > > "steeling" solder from solder joint accidentally ( during wave soldering).
> > > Result - insufficient or even missing solder joint.
> > >
> > > We do not have this layout design anymore ..
> > >
> > > Regards
> > >
> > > Vit Sklenar MGE4VS
> > > T: (61 3)9541 7734 F: (61 3) 9541 3909
> > > e-mail work: [log in to unmask]
> > > e-mail home: [log in to unmask]
> > > > Robert Bosch (Aust) ,
> > > 1555 cnr.Centre and McNaugton Road,
> > > > Clayton , VIC 3169, Australia
> > > >
> > > >
> > > > -----Original Message-----
> > > > From: Ken Patel [SMTP:[log in to unmask]]
> > > > Sent: Thursday, August 09, 2001 4:53 AM
> > > > To: [log in to unmask]
> > > > Subject: [TN] VIAS in pads...
> > > >
> > > > Assemblers,
> > > > How robust is the VIA in the pad technology now? Can someone share the
> > > > process of handling board that has vias in pads?
> > > >
> > > > Most of our boards have VIAS in the pads and there is no way out.
> > > >
> > > > re,
> > > > Ken Patel
> > > >
> > > > --------------------------------------------------------------------------
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Date: Fri, 10 Aug 2001 11:12:17 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Dorothy M. Lush" <[log in to unmask]>
Subject: Re: Solder conditions
MIME-Version: 1.0
Content-Type: text/plain
Sounds like amoung other things you have a solder fluxer problem, I.E you
aren't getting any because the nozzle is clogged, not moving and/or maybe
the the fluxer was not purged when the solderwave process changed from
aqueous to no-clean or vice versa and you have mixed fluxes.
Dorothy
> ----------
> From: Kathy Bergman[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;Kathy Bergman
> Sent: Friday, August 10, 2001 10:59 AM
> To: [log in to unmask]
> Subject: Solder conditions
>
> I am looking to get some help in identifying the causes of certain post
> wave
> solder conditions. In particular, a "cracked ice" effect in which the very
> surface of the solder looks like a thin layer of it has been cracked in
> the
> way that ice would crack. Another one is lumpy solder, as if the solder
> had
> dirt in it. (I know it doesn't). I am a board manufacturer with just a
> minimum of assembly knowledge.
> I am unable to post a good picture of the conditions at this time. I
> am wondering if there are some on line resources I can tap into, to see
> some
> visual examples of these and other conditions.
> Also, what would be a normal wave profile for a board such as this: .093
> thick FR4, through hole technology, approx. 6x11, .025 to .195 sized
> holes,
> HASL finish. Please include any prebake information.
> I apprectiate in advance any help I can get.
> Kathy Bergman
>
> --------------------------------------------------------------------------
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Date: Mon, 30 Jul 2001 13:44:37 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Dorothy M. Lush" <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain
What are you inspecting for. Normally XRAY inspection is for bridging and
not much else. HP's 5DX machine will XRAY your BGA on any side of the PCA.
Dorothy
> ----------
> From: Mark Ross[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;[log in to unmask]
> Sent: Monday, July 30, 2001 6:56 AM
> To: [log in to unmask]
>
> We have a BGA we need to inspect. However, the kicker is that
> directly below the BGA there is a socket adapter and we have tried
> XRAY and it fails miserably.
>
> Does anyone out there inspect UNDER a BGA once it is soldered in place
> with a boroscope or fiber optic camera? Thanks.
>
> Mark Ross
> PCB Designer
> Accurate Technologies
>
> --------------------------------------------------------------------------
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>
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Date: Mon, 30 Jul 2001 17:02:35 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Hiteshew, Michael" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Hiteshew, Michael" <[log in to unmask]>
Subject: Re: Clearance area around holes
MIME-version: 1.0
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Pete,
I'd have to disagree. I think Daan's board barely meets Level C
(reduced producibility) standards according to IPC-2221, Section 9.0.
Daan requires a 0.3mm (12 mil) diameter finished hole. Add to that
** at least ** 0.2mm (8 mils) of fabrication allowance. That leaves
0.1mm (4 mils) left - that's 0.05mm (2 mils) of clearance between
the barrel and the surrounding copper that needs to be etched in a
production environment. That would be very tough to do under highly
controlled experimental conditions!
In my humble opinion, that board was bound from the start to be a
problem once it got to production.
Michael Hiteshew
Lockheed Martin NE&SS Marine Systems
410-682-1259
-----Original Message-----
From: <Peter George Duncan> [mailto:[log in to unmask]]
Sent: Sunday, July 29, 2001 8:50 PM
To: [log in to unmask]
Subject: Re: [TN] Clearance area around holes
Daan,
The sizes you quote are not especially small, nor is the difference between
them. I'm not totally clear from your description what you are meaning,
but, (converting to my old-fashioned language), do you have 12 mil diameter
holes going through 24 mils diameter exclusion zones in the copper planes?
Unless your Fab House's registration accuracy is very bad, you will have a
nominal 6 mils all-round clearance and in practice, shouldn't have less
than 3 to 4 mils clearance. Is this OK electrically if your small
clearances are, for example, at layers with high power? It should not be a
difficult job for a decent Fab House to make this board for you, though.
Pete Duncan
----------------------------------------------------------------------------
---
Hi Technet,
Here's a question for the bare board experts out there:
One of our pcb-suppliers had rejects on a complete batch of our boards
because the clearance between the via's and the surrounding copperplane was
so small that it resulted in short circuits.
The holes were designed 0.3 mm (finished hole size) and the openings in the
copperplane were 0.6 mm, leaving only a small clearance area. The board
measures about 20*15 cm.
What do you think, is a board like this manufacturable for a decent board
shop, or is it really that difficult? Could you give me a typical value
for the minimum clearance around the finished-hole that board vendors need
?
Best regards,
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
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Date: Wed, 18 Jul 2001 07:42:05 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Kasprzak, Bill (sys) USX" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Kasprzak, Bill (sys) USX" <[log in to unmask]>
Subject: Re: Just a question...
MIME-Version: 1.0
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Steve:
Speaking for myself, I only consult the 'net when either I'm at ground zero,
such as my recent post on developing a mold for potting, or when I've
exhausted all of my own possible solutions to problems. I also will not post
because you really hate to abuse the system by posting every little thing
that comes up.
However, you Steve, are legendary on this 'net, therefore you can post
whatever and whenever you need to. Besides, you have a way of turning
problems into sources of entertainment. All of my problems pale in
comparison.
Seriously, from a manufacturing standpoint, what we do here is not really
cutting edge stuff. Very conservative designs with approved suppliers with
rather long lead times and long cycle times. SOS if you know what I mean.
Bill Kasprzak
Moog Inc., Electronic Assembly Engineering
> -----Original Message-----
> From: Stephen R. Gregory [SMTP:[log in to unmask]]
> Sent: Tuesday, July 17, 2001 11:38 PM
> To: [log in to unmask]
> Subject: [TN] Just a question...
>
> I've gotta off-the-wall question...am I the only one that faces the stuff
> that I post about, or am I the only one that posts about the problems I
> see?
> Just curious...
>
> It seems like I have a "black-cloud" following me...if that's the case,
> maybe
> I should persue a different profession....hehehe.
>
> Anyways, do any of you see the same stuff that I do? Does this stuff go
> with
> the territory? Kinda think it does, but nobody whines like I do...hehehe.
>
> Thanks....
>
> -Steve Gregory-
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Date: Fri, 10 Aug 2001 13:31:09 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: NTC: Just a thanks about BGA/ X-ray question posted earlier
Mime-Version: 1.0
Content-Type: multipart/mixed; boundary="=_6A302865.15741895"
This is a MIME message. If you are reading this text, you may want to
consider changing to a mail reader or gateway that understands how to
properly handle MIME multipart messages.
--=_6A302865.15741895
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: quoted-printable
Content-Disposition: inline
You guys are the greatest resource. I appreciate all of the response from =
a post I had made earlier this week. I received a lot of good responses. =
Surprisingly we also posted the same question to smta and only received 3 =
responses. I had that many in 1 hour from technet. =20
Have a great weekend, finally some heat relief......
Kathy=20
--=_6A302865.15741895
Content-Type: text/plain
Content-Disposition: attachment; filename="TEXT.htm"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META content="text/html; charset=iso-8859-1" http-equiv=Content-Type>
<META content="MSHTML 5.00.2919.6307" name=GENERATOR></HEAD>
<BODY style="FONT: 10pt Haettenschweiler; MARGIN-LEFT: 2px; MARGIN-TOP: 2px">
<DIV>You guys are the greatest resource. I appreciate all of the response
from a post I had made earlier this week. I received a lot of good
responses. Surprisingly we also posted the same question to smta and only
received 3 responses. I had that many in 1 hour from technet. </DIV>
<DIV> </DIV>
<DIV>Have a great weekend, finally some heat relief......</DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
--=_6A302865.15741895--
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Date: Wed, 18 Jul 2001 07:36:52 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jason Gregory <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jason Gregory <[log in to unmask]>
Subject: Re: Just a question...
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Steve, I concur.....
You ARE the greatest thing since sliced bread.=20
Jason Gregory
Software Specialist - NPI Group
SCI Systems/Plant 2
13000 S. Memorial Pkwy.
Huntsville, AL. 35803
(256) 882-4107 x3728
[log in to unmask]
>>> [log in to unmask] 07/17/01 10:37PM >>>
I've gotta off-the-wall question...am I the only one that faces the stuff
that I post about, or am I the only one that posts about the problems I =
see?
Just curious...
It seems like I have a "black-cloud" following me...if that's the case, =
maybe
I should persue a different profession....hehehe.
Anyways, do any of you see the same stuff that I do? Does this stuff go =
with
the territory? Kinda think it does, but nobody whines like I do...hehehe.
Thanks....
-Steve Gregory-
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Date: Wed, 18 Jul 2001 10:54:03 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mark Hargreaves <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mark Hargreaves <[log in to unmask]>
Subject: HASL thickness spec
MIME-Version: 1.0
Content-Type: text/plain
Is there an IPC spec regarding the thickness (or flatness) of HASL solder
coating? I don't see it referenced in IPC 6012 or IPC-A-600.
Thanks,
Mark Hargreaves
EMDS, Inc
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Date: Wed, 18 Jul 2001 17:30:58 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"d. terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: Re: HASL thickness spec
MIME-Version: 1.0 (Generated by NET-TEL Mailguard SMTP version 4.0.0.22)
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Hi Mark,
As far as I know this is not specified in IPC-specs, but some very usefull =
documentation about the HASL-proces and thickness-specifications for a =
"capable process" can be found at http://people.ne.mediaone.net/sgoodell/ch=
apter30/ch30.html
It's a complete chapter of the "Printed Circuits Materials Handbook".=20
Best regards,
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
>>> Mark Hargreaves <[log in to unmask]> 07/18 4:54 pm >>>
Is there an IPC spec regarding the thickness (or flatness) of HASL solder
coating? I don't see it referenced in IPC 6012 or IPC-A-600.
Thanks,
Mark Hargreaves
EMDS, Inc
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Date: Wed, 18 Jul 2001 08:36:06 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Dorothy M. Lush" <[log in to unmask]>
Subject: Re: Rework of 0201 components
MIME-Version: 1.0
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Julien,
I heard from someone that a solder iron tweezer was good. Two separate
solder tips will not work. The part is and the land pads are too small.
Exactly what process a person would use I do not know. For instance, would
it work to be putting solder down, placing the part and remelting, or
putting solder on one pad then heating and placing the part and filling in
the other pad. It is tough to rework 0402's and 0201's because both the part
size and the layout that is recommended now adays. If you are working on a
RF circuit there is evidence, though acceptable per IPC specs, that flux
residue and the reworked solder joint will "detune" the assembly.
I have been trying to figure out how to remove/wick/suck solder off these
tiny land pads that are so closely spaced and not take the pad too. Is there
equipment that can doo this delicate process or will boards have to be
tossed each time?
Dorothy Lush
> ----------
> From: Julien Bouchard[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;Julien Bouchard
> Sent: Wednesday, July 18, 2001 7:31 AM
> To: [log in to unmask]
> Subject: Rework of 0201 components
>
> Hi everybody,
> We will soon start to use 0201 component for some tests. The
> placement and
> the print seem to be ok, but we still have some interogation about the
> rework of theses components. They are really difficult to handle and to
> solder. Anybody have some advice for the reworks of these so much littles
> components ??? Thank you.
>
> Julien Bouchard
>
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>
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Date: Wed, 18 Jul 2001 11:39:07 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Vandendolder, Ron" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Vandendolder, Ron" <[log in to unmask]>
Subject: Re: diamond impregnated hard gold
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Richter Precision in East Petersburg PA does a Chemical Vapor Deposited
(CVD) hard carbon treatment. It may not meet your specs, but calling them
may give you a lead to someone who might.
Good Luck,
Ron VandenDolder
Telaxis Communications
SouthDeerfield, MA
413-665-8551
-----Original Message-----
From: Paul Linehan [mailto:[log in to unmask]]
Sent: Wednesday, July 18, 2001 10:26 AM
To: [log in to unmask]
Subject: [TN] diamond impregnated hard gold
Hi,
We have a customer requirement for diamond impregnated hard gold plating.
Is this an available technology?
Paul Linehan
Nashua Circuits
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Date: Wed, 18 Jul 2001 12:24:07 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: White residue from conformal coating
Mime-Version: 1.0
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What causes white residues after conformal coating? The coating is an =
acrylic and after the first coat there appears to be a white residue and =
after the 24 hour cure the coating appears very dull and still has some of =
the white residues. The residues almost look like water flux residue but =
it isn't. The supplier that the coating was purchased from says it is =
strictly humidity related and only a cosmetic issue. There is no visible =
loss of adhesion. The solder mask is a LPI matte finish. Can this be =
part of the problem? =20
--=_98C2FB58.E382EE56
Content-Type: text/plain
Content-Disposition: attachment; filename="TEXT.htm"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META content="text/html; charset=iso-8859-1" http-equiv=Content-Type>
<META content="MSHTML 5.00.2614.3500" name=GENERATOR></HEAD>
<BODY
style="FONT: 10pt Haettenschweiler; MARGIN-LEFT: 2px; MARGIN-TOP: 2px">What
causes white residues after conformal coating? The coating is an acrylic
and after the first coat there appears to be a white residue and after the 24
hour cure the coating appears very dull and still has some of the white
residues. The residues almost look like water flux residue but it
isn't. The supplier that the coating was purchased from says it is
strictly humidity related and only a cosmetic issue. There is no visible
loss of adhesion. The solder mask is a LPI matte finish. Can this be
part of the problem? </BODY></HTML>
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Date: Wed, 18 Jul 2001 14:32:09 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
John Fahey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: John Fahey <[log in to unmask]>
Subject: EIA 481-2
Folks,
I do not have a copy of this EIA 481-2 standard, but can anyone tell me if
this spec contains information in relation to STANDARD quantities per reel.
i.e: If I order a reel of 44 pin QFP's from a supplier who adheres to EIA
481-2, does this require them to put a particular amount of components on
the reel, or is this up to the individual supplier/customer?
Thanks for your help,
John
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Date: Fri, 10 Aug 2001 15:25:23 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Susana Anaya <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Susana Anaya <[log in to unmask]>
Subject: Re: Material specification (7781 E-glass)
In-Reply-To: <000001c121b4$7e34bd60$4200a8c0@stelgen>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; format=flowed
Ok, my turn to try and give back here...(thanks to all who replied to my
question about availablity of cap arrays). 7781 E-glass means E=
Electrical. E-glass is an aluminosilicate glass. 7781 = the yarn style
(yarn, warp x fill and weight). "7781" just refers to the yarn style, not
the finished material and sizes available or application. In your
comparison shopping for "7781 E-glass" for PCB use you want to look for
resin-compatibility as this varies from mfgr. to mfgr. depending on how the
material is processed. Before weaving the yarn is sized with a binder or
coating to maintain strand integrity and protect the fibers during the
weaving process. After weaving the fabric is "desized" to permit adhesion
between the glass fiber and chrome or silane finishing agents. Finally, the
fabric is finished to give desired resin compatibility. There are
conventional processed E-glass PCB yarns (usually with an oily starch) and
there are some with newer coatings available now that are supposed to help
eliminate heat cleaning ( a problem with the oil starch used for "sizing"),
improve hydrolytic stability and increase overall laminate strength and
stiffness among other things. Take a look at websites for Owens Corning,
PPG Industries, Nippon among others for more info.
-eom-
At 11:52 AM 8/10/01 -0400, Steve Telgen wrote:
>Hi, everyone,
>Does anyone know what 7781 E glass is? It's supposed to be a type of
>fiberglass material for PCBs.
>TIA
>Steve Telgen
>IGK Industries
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Date: Wed, 18 Jul 2001 13:02:12 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: White residue from conformal coating
MIME-Version: 1.0
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Kathy,
I would argue against the "only a cosmetic issue" statement. The moisute (if this is the cause) takes up space in the polymer coating and will be a path for more moisture and contaminants to permiate to the surface.
Because you are spending time and money to coat the boards it is obvious you are expecting them to be exposed to harsh conditions. These residues/gaps in the coating material will reduce the protective ability of the coating.
What is the RH in the coating room?
David A. Douthit
Manager
LoCan LLC
Kathy Kuhlow wrote:
> What causes white residues after conformal coating? The coating is an acrylic and after the first coat there appears to be a white residue and after the 24 hour cure the coating appears very dull and still has some of the white residues. The residues almost look like water flux residue but it isn't. The supplier that the coating was purchased from says it is strictly humidity related and only a cosmetic issue. There is no visible loss of adhesion. The solder mask is a LPI matte finish. Can this be part of the problem?
>
> ------------------------------------------------------------------------
>
> TEXT.htmName: TEXT.htm
> Type: Plain Text (text/plain)
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Date: Mon, 30 Jul 2001 18:33:56 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Brad Saunders <[log in to unmask]>
Subject: Re: Clearance area around holes
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_bb.119cdc30.28973ad4_boundary"
--part1_bb.119cdc30.28973ad4_boundary
Content-Type: text/plain; charset="ISO-8859-1"
Content-Transfer-Encoding: quoted-printable
Hello All;
Relative to plane clearance diameter, fine pitch and micro BGA pad sizes of=20
.019 inch and below narrowly allow for .004 spacing and .004 inch trace=20
width. =A0The plated through hole is tangent to edge of pad and potentially=20
"break-out". =A0In the .8mm BGA exercise we need to maximize the copper plan=
e=20
web and also have producibilty. =A0Based on the ,019 pad is a challenging=20
diameter; the clearance is moreso. =A0Tangency and or break out in the=20
clearance is a short and scrap. =A0One must calculate, in a true positional=20
format, worst case location of drilled hole and add minimum dielectric=20
spacing requirement. =A0This is also a good time to add "cheap insurance" to=
=20
obtain a solid producible board. =A0Keep in mind that it is not unusual to s=
ee=20
upwards of 40% plane layers. To date the pressing question is: what is the=20
drilled hole diameter. =A0It will hover in the 10/1 aspect ratio (drill to n=
on=20
plated nominal thickness). =A0Realistic applications are 16 layer .059 thick=
,=20
18-22 layer .093, 24+ layer in over .200 thick. =A0I say "to date" due to=20
registration of layers being as or more critical to success rather than=20
"just" the aspect ratio. =A0This explains Laser Direct Imaging, wet resist,=20=
and=20
the like. =A0
I recomend .004 min web; leading to .0275 clearance, direct hit in place of=20
thermals, and a non defined finished hole diameter (naturally within reason)=
.=20
=A0The hole diameter needs to be a function of .001 inch min wall thickness=20
verses a pin gauge or crossectional exam for diameter.
Well, Daan =A0"what I think" is .3mm(.0118) PTH within .6mm(.0236) clearance=
is=20
.1mm(.004) to small of a clearance. =A0In today's "micropackaging" mils coun=
t.=20
Boston's Coretec Brad
--part1_bb.119cdc30.28973ad4_boundary
Content-Type: text/html; charset="ISO-8859-1"
Content-Transfer-Encoding: quoted-printable
<HTML><FONT FACE=3Darial,helvetica><FONT SIZE=3D2 FAMILY=3D"SANSSERIF" FACE=
=3D"Arial" LANG=3D"0">Hello All;
<BR>
<BR></FONT><FONT COLOR=3D"#000000" SIZE=3D2 FAMILY=3D"SANSSERIF" FACE=3D"Ce=
ntury Gothic" LANG=3D"0">Relative to plane clearance diameter, fine pitch an=
d micro BGA pad sizes of=20
<BR>.019 inch and below narrowly allow for .004 spacing and .004 inch trace=20
<BR>width. =A0The plated through hole is tangent to edge of pad and potentia=
lly=20
<BR>"break-out". =A0In the .8mm BGA exercise we need to maximize the copper=20=
plane=20
<BR>web and also have producibilty. =A0Based on the ,019 pad is a challengin=
g=20
<BR>diameter; the clearance is moreso. =A0Tangency and or break out in the=20
<BR>clearance is a short and scrap. =A0One must calculate, in a true positio=
nal=20
<BR>format, worst case location of drilled hole and add minimum dielectric=20
<BR>spacing requirement. =A0This is also a good time to add "cheap insurance=
" to=20
<BR>obtain a solid producible board. =A0Keep in mind that it is not unusual=20=
to see=20
<BR>upwards of 40% plane layers. To date the pressing question is: what is t=
he=20
<BR>drilled hole diameter. =A0It will hover in the 10/1 aspect ratio (drill=20=
to non=20
<BR>plated nominal thickness). =A0Realistic applications are 16 layer .059 t=
hick,=20
<BR>18-22 layer .093, 24+ layer in over .200 thick. =A0I say "to date" due t=
o=20
<BR>registration of layers being as or more critical to success rather than=20
<BR>"just" the aspect ratio. =A0This explains Laser Direct Imaging, wet resi=
st, and=20
<BR>the like. =A0
<BR>I recomend .004 min web; leading to .0275 clearance, direct hit in place=
of=20
<BR>thermals, and a non defined finished hole diameter (naturally within rea=
son).=20
<BR>=A0The hole diameter needs to be a function of .001 inch min wall thickn=
ess=20
<BR>verses a pin gauge or crossectional exam for diameter.
<BR>Well, Daan =A0"<I>what I think</I>" is .3mm(.0118) PTH within .6mm(.0236=
) clearance is=20
<BR>.1mm(.004) to small of a clearance. =A0In today's "micropackaging" mils=20=
count.</FONT><FONT COLOR=3D"#ff0000" SIZE=3D2 FAMILY=3D"SANSSERIF" FACE=3D"=
Century Gothic" LANG=3D"0">=20
<BR>
<BR></FONT><FONT COLOR=3D"#000000" SIZE=3D2 FAMILY=3D"SANSSERIF" FACE=3D"Ce=
ntury Gothic" LANG=3D"0">Boston's Coretec Brad</FONT></HTML>
--part1_bb.119cdc30.28973ad4_boundary--
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Date: Mon, 30 Jul 2001 15:21:47 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ruby Hazen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ruby Hazen <[log in to unmask]>
Subject: RE: Line width and space
Mime-Version: 1.0
Content-Type: text/plain; format=flowed
Hi, Dorothy:
These are power lines. The voltage between them is about 180V. Please let me
know if you have any other questions. Thanks.
R.H.
>From: [log in to unmask]
>To: [log in to unmask]
>Subject: RE: Line width and space
>Date: Mon, 30 Jul 2001 14:22:35 -0700
>
>Ruby could you tell everyone what your application is? Power? RF? Digital?
>PTH? Industrial? Medical? It all makes a difference.
>
>Dorothy
>
> > ----------
> > From: Ruby Hazen[SMTP:[log in to unmask]]
> > Reply To: TechNet E-Mail Forum.;Ruby Hazen
> > Sent: Monday, July 30, 2001 10:32 AM
> > To: [log in to unmask]
> > Subject: Line width and space
> >
> > Hello:
> >
> > Could someone tell me the guidelines and/or standards about trace line
> > width
> > and space in PCB? Thanks.
> >
> > R.H.
> >
> > _________________________________________________________________
> > Get your FREE download of MSN Explorer at
>http://explorer.msn.com/intl.asp
> >
> >
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Date: Tue, 31 Jul 2001 09:17:27 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Cathy Killen <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Cathy Killen <[log in to unmask]>
Subject: Encapsulated Ions
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Apologies for 'Iconic' instead of ionic. I wish it was because of the
mountain dew.
I have another question:
How do you carry out a non-destructive test in a no-clean process. Ions are
encapsulated as part of the process, surely methods used in the standards
will release the ions and then fail the test?
Cathy Killen
Training Instructor
[log in to unmask] <mailto:[log in to unmask]>
An Oasis of Training Excellence
* 028 38314305
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Date: Wed, 18 Jul 2001 16:09:29 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jason Gregory <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jason Gregory <[log in to unmask]>
Subject: Re: Just a question...
Mime-Version: 1.0
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Steve,
No Katana.....NO NO NO. Go for the gusto....maybe a Huyabusa 1300 or a =
ZX-12 Ninja.
Jason Gregory
Software Specialist - NPI Group
SCI Systems/Plant 2
13000 S. Memorial Pkwy.
Huntsville, AL. 35803
(256) 882-4107 x3728
[log in to unmask]
>>> David Ricketts <[log in to unmask]> 07/18/01 03:40PM =
>>>
Steve, maybe you just need a new Suzuki Katana (although I prefer my
Corvette) to outrace that "black cloud".
David Ricketts
Pertek Engineering
Voice: 949-475-4485
Fax: 949-475-4493
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Stephen R. Gregory
Sent: Tuesday, July 17, 2001 8:38 PM
To: [log in to unmask]
Subject: [TN] Just a question...
I've gotta off-the-wall question...am I the only one that faces the stuff
that I post about, or am I the only one that posts about the problems I =
see?
Just curious...
It seems like I have a "black-cloud" following me...if that's the case,
maybe
I should persue a different profession....hehehe.
Anyways, do any of you see the same stuff that I do? Does this stuff go =
with
the territory? Kinda think it does, but nobody whines like I do...hehehe.
Thanks....
-Steve Gregory-
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Date: Wed, 18 Jul 2001 16:10:35 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: White residue from conformal coating
Mime-Version: 1.0
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Hans,=20
It appears to be in the coating. On the uncoated boards there are no =
visible residues, fingerprints, etc. And it is very hot and humid today =
and yesterday (dew point low to mid 70's).=20
Kathy=20
>>> [log in to unmask] 07/18/01 12:53PM >>>
Kathy,
Is the white residue in the coating or on the assemblies surface?
It's probably moisture related as has been discussed recently.
Do you dry the assemblies prior to coating?
Hans
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Process Engineer
Toppan Electronics, Inc.
770 Miramar Road
San Diego, CA 92126
(858) 695 - 2222 ext. 241
(858) 695 - 6823 fax
[log in to unmask]
-----Original Message-----
From: Kathy Kuhlow [mailto:[log in to unmask]]
Sent: Wednesday, July 18, 2001 10:24 AM
To: [log in to unmask]
Subject: [TN] White residue from conformal coating
What causes white residues after conformal coating? The coating is an
acrylic and after the first coat there appears to be a white residue and
after the 24 hour cure the coating appears very dull and still has some of
the white residues. The residues almost look like water flux residue but =
it
isn't. The supplier that the coating was purchased from says it is =
strictly
humidity related and only a cosmetic issue. There is no visible loss of
adhesion. The solder mask is a LPI matte finish. Can this be part of the
problem?
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Date: Tue, 31 Jul 2001 10:27:54 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Brian Ellis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Just a few Questions
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Dang it, Doug, you filled your Omega Meter with it.
Brian
[log in to unmask] wrote:
>
> Because a few of the "icons" of the industry(Doug Pauls,etc.) tell you to.
> Unless you have a Freudian sense of humor,which can be attributed to
> drinking too much Mountain Dew(Doug Pauls,etc.),I believe you meant to say
> ionic wash.
> There are many reasons to clean an assembly,besides just removing flux or
> it's postreflow by-products.Knowing the end use enviroment,whether it is to
> be conformally coated,as well as many other factors will determine whether
> you need to clean after a no-clean process.If you would to talk to me
> off-line give me a call.
> Doug Pauls is also an excellent source of information.
>
> **Oh, hell. Now I have to buy Dewey another beer at IPC. "Industry
> Icon?". That means when you click on me, I crash and give you the blank
> look of the Blue Screen of Death. Any time someone mentions my name three
> times in an e-mail, I turn into a large Norwegian rat for 1 day. Thanks a
> lot, Dewey.
>
> The way I read the original question, I don't know if Cathy was referring
> to the final rinsing, a general cleaning, or to the ROSE/SEC cleanliness
> test.
>
> I don't disagree with any of the former commenters, but the issue of
> cleaning and cleanliness can be a complex one. If you have an assembly
> process which incorporates cleaning, then you have the opportunity to
> remove residues. If you have a no-clean assembly process, you must
> determine, in advance, if the constituent parts (boards and components) are
> clean enough to avoid electrochemical failures. How clean is clean enough?
> A very difficult question to answer and can only be done on a case by case
> basis in my opinion.
>
> I would recommend that you get the following documents to assist in your
> education on the matter:
>
> IPC-TP-1115: SELECTION AND IMPLEMENTATION STRATEGY FOR A LOW-RESIDUE
> NO-CLEAN PROCESS. This document discusses all the factors that an
> assembler has to consider, cleanliness being a big one, when switching to
> no-clean assembly methods.
>
> IPC-HDBK-001: This document is a companion to J-STD-001. I was the editor
> or writer for sections 4 (Fluxes) and 8 (Cleaning and Cleanliness). It
> goes into the various cleanliness tests and cleaning in general. I
> understand that a similar document is being initiated as a companion to
> IPC-A-610.
>
> EMPF Report RR0013: An In-Depth Look at Ionic Cleanliness Testers. This
> may also be available as an IPC technical paper. If not, the paper is
> available from www.empf.org. The paper discusses ROSE/SEC testers and why
> they should be used ONLY for process control and not product acceptance.
>
> I authored a column for Circuits Assembly Magazine
> (www.circuitsassembly.com) called Process Rx for a number of years, with
> topics including cleaning and cleanliness testing. You can check their
> archives or the Library section of CSL (www.residues.com) for copies.
>
> I wrote two articles for the October and November 2000 IPC Review on bare
> board cleanliness specifications and assembly cleanliness specifications in
> general.
>
> Jack Brous, often considered the father of the Omegameter, wrote a paper
> that outlined the origins of the ROSE test and how it can and can't be
> used. IPC should have it as a technical paper. If not, I have it around
> here somewhere.
>
> If that is not enough to put you to sleep, I wrote another few documents
> called the Layman's Guide to MIL-STD-2000A and the Layman's Guide to
> J-STD-001B. They cover the aspects of cleaning and qualifying the process.
>
> Well, that should be enough for a start. Let me know if I can help some
> more.
>
> Doug Pauls
> Rockwell Collins
> Industry Court Jester
>
> (Now where did I put that Mountain Dew.....)
>
> ---------------------------------------------------------------------------------
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Date: Wed, 18 Jul 2001 17:40:39 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jim Francey <[log in to unmask]>
Subject: Re: diamond impregnated hard gold
MIME-Version: 1.0
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boundary="part1_73.10343d94.28875c57_boundary"
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Diamond grit can be co-deposited with electroplating - normally with Nickel
to make specialist cutting tools (e.g for glass). If it's for some kind of
wiper application (e.g slip-rings) then there's other solutions.
JF
In a message dated 18/07/2001 3:42:11 PM GMT Daylight Time, [log in to unmask]
writes:
> Hi,
>
> We have a customer requirement for diamond impregnated hard gold plating.
> Is this an available technology?
>
> Paul Linehan
> Nashua Circuits
>
>
--part1_73.10343d94.28875c57_boundary
Content-Type: text/html; charset="US-ASCII"
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Diamond grit can be co-deposited with electroplating - normally with Nickel
<BR>to make specialist cutting tools (e.g for glass). If it's for some kind of
<BR>wiper application (e.g slip-rings) then there's other solutions.
<BR>
<BR>JF
<BR>
<BR>
<BR>
<BR>In a message dated 18/07/2001 3:42:11 PM GMT Daylight Time, [log in to unmask]
<BR>writes:
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Hi,
<BR>
<BR>We have a customer requirement for diamond impregnated hard gold plating.
<BR>Is this an available technology?
<BR>
<BR>Paul Linehan
<BR>Nashua Circuits
<BR>
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
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Date: Wed, 18 Jul 2001 18:10:54 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Mike Sewell <[log in to unmask]>
Subject: Re: Just a question...
MIME-Version: 1.0
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Black cloud? I think you've been having so much fun here you'd go insane at a
more mundane job...hehehe
Mike Sewell
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Black cloud? I think you've been having so much fun here you'd go insane at a
<BR>more mundane job...hehehe
<BR>
<BR>
<BR>Mike Sewell
<BR></FONT></HTML>
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Date: Tue, 31 Jul 2001 07:55:55 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Kasprzak, Bill (sys) USX" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Kasprzak, Bill (sys) USX" <[log in to unmask]>
Subject: Re: Fluxes
MIME-Version: 1.0
Content-Type: text/plain
Ray:
One key factor in selecting an OA (water soluble) flux is whether the
material is alcohol based or water based. During a qualification test that I
ran years ago to qualify us for J-Std-001A, we selected a material which was
a water based material. We ran some initial test runs using our typical
solder profiles. When the circuit boards reached the wave, there was still
enough moisture left on the boards from the flux. This resulted in a
splattering effect similar to water in a hot frying pan except in this case,
solder balls were evrywhere from the splattering effect! Making a long story
short, I was finally able to correct for the situation but it took a while
for me to accept and break the solder process paradigms.
So if selecting an OA flux, and you want the make the process transition
virtually seamless from RMA, select an alcohol based OA flux.
By the way, you can never eliminate RMA. Do not solder stranded wires using
OA flux!! Corrosive residues will be trapped under wire insulation resulting
in broken wires at the wrong time.
Bill Kasprzak
Moog Inc., Electronic Assembly Engineering
> -----Original Message-----
> From: Golembiewski, Ray [SMTP:[log in to unmask]]
> Sent: Friday, July 27, 2001 9:13 AM
> To: [log in to unmask]
> Subject: [TN] Fluxes
>
> I am looking for data analysis between a water soluble flux, and
> an RMA. What are the major effects each has on a PCB. What do I have to
> know before I make a switch from RMA to water soluble. If you might be
> able to direct me to a link, or send me some information it would be
> greatly appreciated. Thanks again,
>
> Ray Golembiewski C.I.D.
> IPC Certified Interconnect Designer
> Manufacturing Test Engineer
> Projects Unlimited, Inc.
> (937) 918-2200
>
> --------------------------------------------------------------------------
> -------
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Date: Tue, 31 Jul 2001 07:26:59 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: High aspect ratio via qualification
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Steve,
The problem that you describe sounds vaguely familiar. Whilst at CSL, we
examined a problem with open circuits in high aspect ration vias, under
BGAs, on about the thickness of board you describe. The client had solder
mask that plugged the vias on the wave solder side of the board. The mask
went on before gold plating. Consequently, the sulfuric acid from the gold
plating remained in the vias and cause circumferential cracking in the
barrels of the holes. The client had not had a problem with the vias until
they dropped under 13 mil diameter. With vias larger than 13 mil, there
was enough opening for water rinsing to get down in the vias. With vias
smaller than 13 mils, the surface tension of the water prevented it from
getting down into the via. Imagine trying to clean out a capillary tube
and you get the general idea. I wrote about this in Circuits Assembly
magazine. The articles were in the Process Rx columns titled "It Cracks Me
Up" and "Sulfates in Vias: The Rest Of The Story". I can furnish them if
you desire, or you can probably get them from the CSL web site
www.residues.com.
I would say that you have to microsection to find out what is really going
on with the vias.
Doug Pauls
Rockwell Collins
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Date: Wed, 18 Jul 2001 17:59:25 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Taheri, Kamran" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Taheri, Kamran" <[log in to unmask]>
Subject: Re: Just a question...
MIME-Version: 1.0
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Katana? Ninja? Come on people. Are you trying to help this guy out or what?
Steve, what you need is a Yamaha R1 to take care of that black cloud.
-----Original Message-----
From: Jason Gregory [mailto:[log in to unmask]]
Sent: Wednesday, July 18, 2001 4:09 PM
To: [log in to unmask]
Subject: Re: [TN] Just a question...
Steve,
No Katana.....NO NO NO. Go for the gusto....maybe a Huyabusa 1300 or a ZX-12
Ninja.
Jason Gregory
Software Specialist - NPI Group
SCI Systems/Plant 2
13000 S. Memorial Pkwy.
Huntsville, AL. 35803
(256) 882-4107 x3728
[log in to unmask]
>>> David Ricketts <[log in to unmask]> 07/18/01 03:40PM
>>>
Steve, maybe you just need a new Suzuki Katana (although I prefer my
Corvette) to outrace that "black cloud".
David Ricketts
Pertek Engineering
Voice: 949-475-4485
Fax: 949-475-4493
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Stephen R. Gregory
Sent: Tuesday, July 17, 2001 8:38 PM
To: [log in to unmask]
Subject: [TN] Just a question...
I've gotta off-the-wall question...am I the only one that faces the stuff
that I post about, or am I the only one that posts about the problems I see?
Just curious...
It seems like I have a "black-cloud" following me...if that's the case,
maybe
I should persue a different profession....hehehe.
Anyways, do any of you see the same stuff that I do? Does this stuff go with
the territory? Kinda think it does, but nobody whines like I do...hehehe.
Thanks....
-Steve Gregory-
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Date: Wed, 18 Jul 2001 16:24:18 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Galang, Jerry" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Galang, Jerry" <[log in to unmask]>
Subject: Re: Just a question...
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
mellow out folks,
get the karma going
(read HARLEY) cruise thru life
no clouds around you then!
ok, back to the technical stuff.
RF is magic
I need a wand ;)
Jerry Galang
PCB Designer
Xircom Inc. an Intel company
805.376.6684
-----Original Message-----
From: Taheri, Kamran [mailto:[log in to unmask]]
Sent: Wednesday, July 18, 2001 3:59 PM
To: [log in to unmask]
Subject: Re: [TN] Just a question...
Katana? Ninja? Come on people. Are you trying to help this guy out or what?
Steve, what you need is a Yamaha R1 to take care of that black cloud.
-----Original Message-----
From: Jason Gregory [mailto:[log in to unmask]]
Sent: Wednesday, July 18, 2001 4:09 PM
To: [log in to unmask]
Subject: Re: [TN] Just a question...
Steve,
No Katana.....NO NO NO. Go for the gusto....maybe a Huyabusa 1300 or a ZX-12
Ninja.
Jason Gregory
Software Specialist - NPI Group
SCI Systems/Plant 2
13000 S. Memorial Pkwy.
Huntsville, AL. 35803
(256) 882-4107 x3728
[log in to unmask]
>>> David Ricketts <[log in to unmask]> 07/18/01 03:40PM
>>>
Steve, maybe you just need a new Suzuki Katana (although I prefer my
Corvette) to outrace that "black cloud".
David Ricketts
Pertek Engineering
Voice: 949-475-4485
Fax: 949-475-4493
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Stephen R. Gregory
Sent: Tuesday, July 17, 2001 8:38 PM
To: [log in to unmask]
Subject: [TN] Just a question...
I've gotta off-the-wall question...am I the only one that faces the stuff
that I post about, or am I the only one that posts about the problems I see?
Just curious...
It seems like I have a "black-cloud" following me...if that's the case,
maybe
I should persue a different profession....hehehe.
Anyways, do any of you see the same stuff that I do? Does this stuff go with
the territory? Kinda think it does, but nobody whines like I do...hehehe.
Thanks....
-Steve Gregory-
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Date: Sat, 11 Aug 2001 09:05:00 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Richard Hamilton <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Richard Hamilton <[log in to unmask]>
Subject: Re: Assembly Inspection/verification.
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
Content-Type: multipart/alternative;
boundary="=====================_1982497==_.ALT"
--=====================_1982497==_.ALT
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J,
Yes that was done in a past llife.
We used a black rubber type overlay which was cut out in house for the
parts in the last immediate process. I can't say for sure they were or were
not ESD sensitive. Pretty useful and simple.
Hope this helps.
Richard
At 10:21 PM 8/10/01 -0400, you wrote:
>TechNet,
>
>Has anyone tried to use templates or overlays at the end of a machine
>process or the end of a progressive line as a quick check for polarity or
>component orientations? If so what type of materials did you make your
>overlays from? Were they conductive for ESD? Where did you have your
>templates made? Can a board house make these from Gerber data? Stencil
>shop? I would appreciate your comments. Thanks.
>
>J. Bryant
--=====================_1982497==_.ALT
Content-Type: text/html; charset="us-ascii"
<html>
J,<br>
<br>
Yes that was done in a past llife.<br>
<br>
We used a black rubber type overlay which was cut out in house for the
parts in the last immediate process. I can't say for sure they were or
were not ESD sensitive. Pretty useful and simple.<br>
<br>
Hope this helps.<br>
<br>
Richard<br>
<br>
At 10:21 PM 8/10/01 -0400, you wrote:<br>
<font face="arial" size=2><blockquote type=cite cite>TechNet,</font><br>
<br>
<font face="arial" size=2>Has anyone tried to use templates or overlays
at the end of a machine process or the end of a progressive line as a
quick check for polarity or component orientations? If so what type of
materials did you make your overlays from? Were they conductive for ESD?
Where did you have your templates made? Can a board house make these from
Gerber data? Stencil shop? I would appreciate your comments.
Thanks.</font><br>
<br>
<font face="arial" size=2>J. Bryant</font></blockquote></html>
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Date: Tue, 31 Jul 2001 07:56:17 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Encapsulated Ions
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How do you carry out a non-destructive test in a no-clean process. Ions are
encapsulated as part of the process, surely methods used in the standards
will release the ions and then fail the test?
*Cathy, Andrew Hoggan had some good answers and I will add to what he said.
If you do a suitable extraction-based test, and by suitable I mean the
right composition of solvents, time, and temperature, then you WILL get
ions. Either from the surface residues from the assembly process, or ions
leached out the base materials. Examples are chloride (present in all
epoxies), bromide (present in most flame retardant laminates), carbonate
(from many solder masks), etc. I don't consider the existing ROSE/SEC
tests to be suitable, since the times are short (10 minutes), the
temperatures relatively benign (45C max) and it is not ion specific.
The key to evaluating ROSE/SEC or any extraction-based test is to
understand what your signal means. For far too long, people have looked at
the value of 10 (suitably modified per machine) as the divider between
"good" and "bad" and never understood what the response was telling them.
When manufacturers started shifting to no-clean assembly processes, they
did not understand that the low solids flux residues dissolve in
isopropanol/water and become electrically conductive when they do so.
People used to seeing 4-5 now saw 40-50 and, to put it Biblically, there
was much wailing and gnashing of teeth. They did not understand what the
signal was telling them. That is why I prefer ion chromatography as a tool
for analyzing ions. People have been using it now for over 10 years to
help determine if the ions they see are good ions or bad ions. (Every time
I say that I think of Glinda, the Good Witch of the North in the Wizard of
Oz asking if Dorothy was a good witch or a bad witch. Where was I?)
Any time that you have a cleanliness test, whether ROSE or ion
chromatography, you have to determine several things: (1) is the test
repeatable, (2) am I seeing good residues or bad residues, and (3) how
clean is clean enough for my product in my end use application. As my
friend John Sohn puts it "the company has to do the hard work".
You can use an Omegameter type instrument on a process, provided you throw
out any preconcieved notions of what is good and bad and form your own
process control limits. You can analyze by ion chromatography, but you
have to do correlations with either field failures or accelerated life
testing in humid conditions to determine what ions are present and how
robust your assembly is to various ions.
Overall, do not look to IPC specifications to tell you what "clean" or
"dirty" is; you won't really find it. There are no more golden numbers.
No one size fits all figure. We could do that when we all manufactured
with RMAs and Freon cleaning, but there is far too much diversity in
products and materials to do that now. The best that you can hope for is
guidance from IPC on how a company should do the "hard work" to determine
their own limits. What limits are good for Rockwell Collins may not be
good for you. Clean enough for RF work might not be clean enough for
biomedical.
This is an issue that one of my task groups is working on (Bare Board
Cleanliness). I think we have good tools for measuring bare board
cleanliness, but now we have to define a protocol for how a manufacturer
might determine how clean their boards need to be for their product. A
tough task.
Well, now that my fingers are warmed up.....
Doug Pauls
Rockwell Collins
Court Jester to Jack Crawford
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Date: Wed, 18 Jul 2001 19:52:52 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: Just a question...
MIME-Version: 1.0
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Hehehe...have to agree with you Kamran, the R1 is one hellava bike. But while
I'm dreaming, I think I'd go for a Ducati 996S...IF I had a spare $22,000
laying around.
Mmmmmmmm...996cc "L" twin, 112 hp engine...trestle-style chrome moly tube
frame...carbon fiber fairing...upside down Ohlin forks...4-piston, 4-pad
Brembo brakes...titanium exhaust, aluminum mufflers...436 lbs
wet...mmmmmmm...(oh geeze, I drooled all over myself!) hehehe
-Steve Gregory-
> Katana? Ninja? Come on people. Are you trying to help this guy out or what?
> Steve, what you need is a Yamaha R1 to take care of that black cloud.
>
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hehehe...have to agree with you Kamran, the R1 is one hellava bike. But while
<BR>I'm dreaming, I think I'd go for a Ducati 996S...IF I had a spare $22,000
<BR>laying around.
<BR>
<BR>Mmmmmmmm...996cc "L" twin, 112 hp engine...trestle-style chrome moly tube
<BR>frame...carbon fiber fairing...upside down Ohlin forks...4-piston, 4-pad
<BR>Brembo brakes...titanium exhaust, aluminum mufflers...436 lbs
<BR>wet...mmmmmmm...(oh geeze, I drooled all over myself!) hehehe
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Katana? Ninja? Come on people. Are you trying to help this guy out or what?
<BR>Steve, what you need is a Yamaha R1 to take care of that black cloud.
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
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Date: Tue, 31 Jul 2001 08:52:58 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Scott Kauling <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Scott Kauling <[log in to unmask]>
Organization: Tri-onics, Inc.
Subject: Re: End-of-Line SMT inspection ... need 10x magnification ...
We are using the Super Vision from Vision Technology. It ranges from 7X to
140X using a camera to display on a monitor. Their website is
www.govti.com.
Scott Kauling
Tri-onics Inc.
Highland, IL
-----Original Message-----
From: Chris Murphy [SMTP:[log in to unmask]]
Sent: Monday, July 30, 2001 6:09 PM
To: [log in to unmask]
Subject: Re: [TN] End-of-Line SMT inspection ... need 10x magnification ...
Hi Tony,
just a comment on the Mantis which may or may not be useful to you. They
are great tools - easy to use, easy on the eyes, and with a good field
of view at lower magnifications. However we find that at 10X
magnification the lack of rigidity of the arm can become a problem, as
the image doesnt tend to stay still. So if the majority of your
inspection has to be done at this magnification, you might have to
consider going to the next level of equipment - I think that they call
it the Cobra or something.
The Mantis can also double up as a radar scope / photon torpedo tracker
thingy. I have seen them in use on the bridge of the Starship
Enterprise on Star Trek - The Next Generation. The cheapskates couldnt
be bothered making their own props.
Regards,
Chris Murphy
"PERALTA, Kevin (BREA)" wrote:
>
>
> In California, WASSCO is one place that distributes MANTIS from Vision
> Eng. (1-800-492-7726) But, ye being in Ireland may be a reach.
>
> Kevin L. Peralta
> Senior Quality Systems Analyst
> TRW Aeronautical / Lucas Aerospace
>
> -----Original Message-----
> From: Tony Conlon [mailto:[log in to unmask]]
> Sent: Friday, July 27, 2001 4:54 AM
> To: [log in to unmask]
> Subject: [TN] End-of-Line SMT inspection ... need 10x magnification
> ...
>
> Folks,
> A question for ye ...
>
> At end-of-line inspection of SMT assemblies ... what equipment are ye
> using?
>
> Our spec. requires that we inspect to 10x magnification for 100%
> product
> ... to do this we 'have' to use a stereo microscope with adjustable
>
> magnification 8x to 40x.
> Problems: Tiresome for operator; impractical to do 100% because of
> conflicts with thru-put.
> What we need is more or less an 'eye-piece' (similar to a bench-top
>
> magnifier) with 10x. We can have our microscopes for back-up if and
> when
> necessary. We have seen some equipment from 'Vision Engineering'
> ... the
> Mantis product is similar to what we are looking for.
> Who supplied this product to you?
>
> For the guys whom I've bcc:'d ... this is an unusual mail for ye to
> receive
> from me ... none the less, suggestions welcome.
> Many thanks,
>
> **************************************
> Tony Conlon
>
> SMT Process Engineer
> PNY Technologies Ireland Ltd.,
> Ballivor,
> Co. Meath.
> Fax: +353 (0)405 67301
> **************************************
>
>
>
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--------
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> 847-509-9700 ext.5315
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>
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<< File: ATT00007.html >>
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Date: Wed, 18 Jul 2001 21:26:39 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Thanks for the replies!
MIME-Version: 1.0
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Hi Everyone!
I just want to say thanks for all the kind replies! I do want to let everyone
know that I post things that are pretty generic with all of us. There's
things I can't talk about due to it being proprietary, but I am pretty aware
of what I can talk about, and what I can't.
I think there's more than a few of us that are in that category...especially
if you're a contract manufacturer. You build partnerships with your customers
that you must establish a trust with, and must follow through with, that goes
without saying.
I will ask a question of a situation that I'm faced with sometimes even when
I can find stuff in the archives, only because what was in the archives is
past knowledge, not saying that past knowledge isn't still valid, but maybe,
just maybe, something new has been learned...
I haven't been doing this stuff very long, I've only been in the industry
since I got out of the Navy in 1987 (there's those out there that consider me
a kid)...and it's changed so much since then. Every year there are new
revelations. Maybe that's why I stay in this profession (like Mike Sewell
says, I would probably get bored doing anything else...) things change so
rapidly, and all of us are challenged to do things better and faster, all the
while, the whole scope of things are evolving...
I'm just glad that I've been lucky enough to be a part of a group such as
this. Maybe next Apex, I won't fall asleep in my hotel room, and can meet
some of you face-to-face, and shake some hands...
Thanks!
-Steve Gregory-
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Content-Type: text/html; charset="US-ASCII"
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Everyone!
<BR>
<BR>I just want to say thanks for all the kind replies! I do want to let everyone
<BR>know that I post things that are pretty generic with all of us. There's
<BR>things I can't talk about due to it being proprietary, but I am pretty aware
<BR>of what I can talk about, and what I can't.
<BR>
<BR>I think there's more than a few of us that are in that category...especially
<BR>if you're a contract manufacturer. You build partnerships with your customers
<BR>that you must establish a trust with, and must follow through with, that goes
<BR>without saying.
<BR>
<BR>I will ask a question of a situation that I'm faced with sometimes even when
<BR>I can find stuff in the archives, only because what was in the archives is
<BR>past knowledge, not saying that past knowledge isn't still valid, but maybe,
<BR>just maybe, something new has been learned...
<BR>
<BR>I haven't been doing this stuff very long, I've only been in the industry
<BR>since I got out of the Navy in 1987 (there's those out there that consider me
<BR>a kid)...and it's changed so much since then. Every year there are new
<BR>revelations. Maybe that's why I stay in this profession (like Mike Sewell
<BR>says, I would probably get bored doing anything else...) things change so
<BR>rapidly, and all of us are challenged to do things better and faster, all the
<BR>while, the whole scope of things are evolving...
<BR>
<BR>I'm just glad that I've been lucky enough to be a part of a group such as
<BR>this. Maybe next Apex, I won't fall asleep in my hotel room, and can meet
<BR>some of you face-to-face, and shake some hands...
<BR>
<BR>Thanks!
<BR>
<BR>-Steve Gregory-
<BR>
<BR></FONT></HTML>
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Date: Thu, 19 Jul 2001 14:18:33 +1000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Colin Weber <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Colin Weber <[log in to unmask]>
Subject: Bow & Twist
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; format=flowed
Folks,
Is there a method of determining the maximum permissible size of two board
types?
a) A SMT PCB containing Fine pitch QFP devices
b) A SMT PCB containing PBGA 388pin 1.27mm pitch & Fine pitch QFPs
with respect to Bow and Twist.
I am interested in how the thickness of the board relates to maximum bow
and twist.
I'd like to determine this before I design the layout, rather than find out
it is wrong
after performing the tests of IPC-6012A, IPC-TM-650 2.4.22.
Regards,
Colin Weber
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Date: Thu, 19 Jul 2001 07:23:07 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Edward Szpruch <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Edward Szpruch <[log in to unmask]>
Subject: Re: HASL thickness spec
MIME-Version: 1.0
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Hi Jack,
We have very bitter experience with specs related to HASL.=20
Especially, since soldering problems are nightmare of assemby people =
and the
easiest way is to blame the supplier of PCB.
Contrary to other para. in IPC specs,this critria is very subjective. =
In the
past we invested a lot of money and time in our trials to satisfy some =
of
our customers : we installed XRF equipment for thickness and =
composition
measurements and SERA equipment for soldereability measurements.
The problem was and stayed the same: QC of the customer put a mark on
corner of SMD pad with remark :"I do not like this appearance". All our
attempts to find objective and measureable criteria end up with =
nothing.
The methods for evaluation of solderability are based of specimens and =
we
never had been able to perform non-desctrictive test of one of such =
"SMD pad
corners" without destroying the whole PCB.
Edward
Edward Szpruch
Eltek , Manager of Process Engineering
P.O.Box 159 ; 49101 Petah Tikva Israel
Tel ++972 3 9395050 , Fax ++972 3 9309581
e-mail [log in to unmask]
> -----Original Message-----
> From: Jack Crawford [SMTP:[log in to unmask]]
> Sent: =E3 =E9=E5=EC=E9 18 2001 20:29
> To: [log in to unmask]
> Subject: Re: [TN] HASL thickness spec
>=20
> Mark, yes, there is a spec and it's in IPC-6012 Table 3-2. The =
applicable
> line is "Fused tin-lead or solder coat - Coverage and Solderable". =
The
> lack of any specific dimension criteria doesn't make this any less a
> requirement. There has to be complete coverage of solder on the =
land, and
> it must be wettable.
> =20
> Many physics elements involved that affect thickness and shape =
(flatness)
> of the coverage. Not counting the experience-based opinions published =
in
> some private guidelines or technical conference papers, it has not =
been
> possible for your industry peers to establish any consensus standards =
for
> HASL coverage.
> Cordially,
> Jack
> =20
> =
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> APEX - the industry's premier trade show in Electronics
> Manufacturing, January 22-24, 2002, San Diego, California.
> More information on website www.goapex.org <http://www.goapex.org>
> --------
> Jack Crawford, IPC Director of Assembly Standards and Technology
> 2215 Sanders Road, Northbrook IL 60062-6135
> [log in to unmask] <mailto:[log in to unmask]>=20
> 847-790-5393
> fax 847-509-9798
>=20
> >>> [log in to unmask] 07/18/01 09:54AM >>>
> Is there an IPC spec regarding the thickness (or flatness) of HASL =
solder
> coating? I don't see it referenced in IPC 6012 or IPC-A-600.
>=20
> Thanks,
> Mark Hargreaves
> EMDS, Inc
>=20
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Date: Thu, 19 Jul 2001 08:26:00 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
mech_eng <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: mech_eng <[log in to unmask]>
Subject: Re: EIA 481-2
MIME-Version: 1.0
Content-Type: text/plain; charset="windows-1255"
John,
This spec does not have specific information on standard quantities.
It covers issues like how loose components can be in the Carrier Tape
cavity, specifies standard Carrier Tape widths, the dimensions for the
sprocket holes, defines standard Reel sizes, tape leader and trailer
lengths, etc.
Since there is practically an infinite number of different surface mount
electronic package styles, and the quantity of parts that can fit on a
Standard Reel size depends on the component's length or width, and height,
it is probably outside the scope of any organization to define a Standard
quantity of parts per Reel for all packages.
The number of components is up to the individual supplier/customer.
Haim Halpert
-----Original Message-----
From: John Fahey [mailto:[log in to unmask]]
Sent: 18 July, 2001 9:32 PM
Subject: EIA 481-2
Folks,
I do not have a copy of this EIA 481-2 standard, but can anyone tell me if
this spec contains information in relation to STANDARD quantities per reel.
i.e: If I order a reel of 44 pin QFP's from a supplier who adheres to EIA
481-2, does this require them to put a particular amount of components on
the reel, or is this up to the individual supplier/customer?
Thanks for your help,
John
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Date: Thu, 19 Jul 2001 01:11:35 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Mary Jane Chism <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mary Jane Chism <[log in to unmask]>
Subject: Just a question
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Steve,
I have not been subscribing very long to "TechNet"; but in the time that I
have, I have seen more informative and interesting material in your postings
than I have encountered in the 17 years I have been in the field of
electronics. This goes without saying that your "humor" is also a relief to
the sometime stressful aspects of this field. Keep up the good work on your
"website" postings. (I love the music also.)
------_=_NextPart_001_01C11019.A9B8C550
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN">
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<P><FONT SIZE=3D2 FACE=3D"Arial">Steve,</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">I have not been subscribing very long =
to "TechNet"; but in the time that I have, I have seen =
more informative and interesting material in your postings than I have =
encountered in the 17 years I have been in the field of electronics. =
This goes without saying that your "humor" is also a relief =
to the sometime stressful aspects of this field. Keep up the good work =
on your "website" postings. (I love the music =
also.)</FONT></P>
</BODY>
</HTML>
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Date: Thu, 19 Jul 2001 14:44:00 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "<Peter George Duncan>" <[log in to unmask]>
Subject: Re: Bow & Twist
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Much of the bow and twist these days is down to the choice of material used
for the substrate coupled with 'balance' in the board design and ultimately
on the capability of the fabrication process.
If you have heavy planes in the board, make sure they're distributed evenly
throughout the layers, otherwise any good PCB Fab worth his salt will keep
any bow and twist within the bounds of the usual specs. It used ot be that
the thicker the board was, the more rigid it was and the less inclined it
was to warping. These days, more than 20 mils bow or twist on a 63 mil
thick board measuring 9 x 6 inches is unusual.
Are you designing boards to be made to MIL-PRF-55110, to an IPC spec or to
something more commercial?
Pete Duncan
Colin Weber
<colin.weber@VARI To: [log in to unmask]
ANINC.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST Aero/ST Group)
Sent by: TechNet Subject: [TN] Bow & Twist
<[log in to unmask]>
07/19/01 12:18 PM
Please respond to
"TechNet E-Mail
Forum."; Please
respond to Colin
Weber
Folks,
Is there a method of determining the maximum permissible size of two board
types?
a) A SMT PCB containing Fine pitch QFP devices
b) A SMT PCB containing PBGA 388pin 1.27mm pitch & Fine pitch QFPs
with respect to Bow and Twist.
I am interested in how the thickness of the board relates to maximum bow
and twist.
I'd like to determine this before I design the layout, rather than find out
it is wrong
after performing the tests of IPC-6012A, IPC-TM-650 2.4.22.
Regards,
Colin Weber
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Date: Thu, 19 Jul 2001 07:38:03 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: White residue from conformal coating
MIME-Version: 1.0
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Graham,
Thanks for the insights on the "blush" phenomena. How interesting that it
comes up in the same discussion as your "work naked bonus".
Is there any link between the type of solvent in the coating and blush, or
is it exclusively humidity related? One project that has been suggested
for me is to replace the toluene and xylene we use as acrylic thinners with
methyl propyl ketone. If such a switch were made, would you expect a
greater or lesser susceptibility to blush, or is it immaterial (no pun
intended).
Doug Pauls
Rockwell Collins
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Date: Thu, 19 Jul 2001 10:37:05 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Dee Stover <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dee Stover <[log in to unmask]>
Subject: Gerber specification
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I need to find the specifications of gerber language, would any of you know
where I can get that information.
TIA
Dee Stover [log in to unmask]
Associate Technician Design
National Optical Astronomy Observatory
950 N Cherry Ave
Tucson, AZ 85719
520-318-8489
FAX 520-318-8303
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Date: Thu, 19 Jul 2001 14:43:32 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Hybiske, Tom" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Hybiske, Tom" <[log in to unmask]>
Subject: Re: Gerber specification
Mime-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Gerber Scientific has a publication explaining the RS274X language. Contact
them directly.
Tom Hybiske
Bose Corporation
Framingham, MA
>
> I need to find the specifications of gerber language, would
> any of you know
> where I can get that information.
>
> TIA
>
>
> Dee Stover [log in to unmask]
> Associate Technician Design
> National Optical Astronomy Observatory
> 950 N Cherry Ave
> Tucson, AZ 85719
> 520-318-8489
> FAX 520-318-8303
>
>
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Date: Tue, 31 Jul 2001 21:30:43 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jason Gregory <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jason Gregory <[log in to unmask]>
Subject: Re: Solder Paste Measurements
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
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Howard, in the past, I was forced to use to use and invest in smaller, =
less expensive systems (I've since been lucky to have nice EXPENSIVE =
toys-teehee). One of my favorite tools has always been the benchtop =
Cyberoptics unit. I don't remember the model name, I'm sure it's on their =
website, or a price figure. But I do know it was cheaper than most =
systems.=20
The beauty of it is it shoots a laser at an angle, laser is viewable on =
monitor and is deflected by paste height. You line up the reference lines =
on the screen and get pretty true paste height. If your using 1:1 =
apertures or if you're doing aperaure reductions, you can calculate your =
volume.=20
Hope I've helped.
Jason Gregory
SCI Systems, Inc.
Software Specialist - NPI Group
(256)882-4107 x3728
[log in to unmask]
>>> [log in to unmask] 07/31/01 11:49 AM >>>
Hi Howard,
I've always found measuring solder paste volume to be very difficult. Yes,
numbers can be generated, but even taking large amounts of data doesn't
guarantee the correct impression. Generally, regardless of equipment used,
the best results one can hope for are for trends, which at best could be
described to be of the order of -1 or +1 from true. It's not a bad thing =
to
try but don't expect absolute results.
Best regards,
Andrew Hoggan
BBA Associates Ltd
www.bba-associates.ltd
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Howard Watson
Sent: 31 July 2001 14:47
To: [log in to unmask]
Subject: [TN] Solder Paste Measurements
Dear Technetters,
My question is: how do you measure solder paste height and volume
accurately? My situation is with using the VisionMaster Model 150A, I am
having trouble obtaining reasonably accurate measurements. The VisionMaste=
r
is a small bench topsystem that uses a template consisting of a "region of
interest" (the solder paste), and reference regions (the areas on each =
side
of the pad). Because there are inconsistencies in the PCB (HASL finish),
like raised areas from traces, valleys surrounding the pad, and
irregularities in the solder mask, the readings I get cannot possibly be
true. Many times the measured readings for weighted average height are =
over
7.5 mils using a 6 mil screen and 9.5 mils using an 8 mil screen. The
process specifics are Multicore NC-40 paste, shore 94-97 polyurethane
blades, DEK 265 Infinity, and correct squeegee pressures, print gap, etc..
I believe the bricks are good, I just ca! n't use the measurements for SPC
as it shows the process to be out of control.
In theory, polyurethane blades should "scoop" if anything, leaving a
shorter brick than the stencil thickness. It seems logical to me that the
best way to obtain accurate measurements would be to use the pad as a
reference region and measure the height from the pad, but the VisionMaster
system does not allow me to do this. Does anyone have knowledge or
recommendations on what I can do here? How do the more expensive systems
measure solder paste? Oh yea, spending $$ on new equipment is not a real
good option at this point!
Thanks in advance for the assistance,
Howard Watson
Manufacturing Engineer
AMETEK/Dixson
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Date: Tue, 31 Jul 2001 23:19:02 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: Solder Paste Measurements
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_17.194f45fc.2898cf26_boundary"
--part1_17.194f45fc.2898cf26_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
Hi All!
Just want to "muddy the waters" a bit...
How many of you that use metal squeegees, and pretty much have your stencil
thickness down (as far as specifying thickness for a given pitch) have found
that it is really "crucial" to measure your paste thickness?
I for one, have found that when I spend the time and the money on equipment
to measure paste thickness, when using metal squeegee blades, and having a
solid set-up procedure, that I'm spending a bunch of time and money measuring
things that are always good...meaning that time could be spent better
elsewhere as long as you use metal squeegee blades, and have a good procedure
in place ensures that the printer is set-up correctly..which is not rocket
science...
Am I over simplifying things? It's always worked for me since the advent of
metal squeegees...I don't know how you can go wrong with a metal blade. Look
at the gerbers you're given, see if they match the pad geometries, and then
get the stencil made. Things are pretty straight forward after that...
-Steve Gregory-
> Howard, in the past, I was forced to use to use and invest in smaller, less
> expensive systems (I've since been lucky to have nice EXPENSIVE
> toys-teehee). One of my favorite tools has always been the benchtop
> Cyberoptics unit. I don't remember the model name, I'm sure it's on their
> website, or a price figure. But I do know it was cheaper than most systems.
> The beauty of it is it shoots a laser at an angle, laser is viewable on
> monitor and is deflected by paste height. You line up the reference lines
> on the screen and get pretty true paste height. If your using 1:1 apertures
> or if you're doing aperaure reductions, you can calculate your volume.
> Hope I've helped.
>
> Jason Gregory
> SCI Systems, Inc.
> Software Specialist - NPI Group
> (256)882-4107 x3728
> [log in to unmask]
>
>
> >>> [log in to unmask] 07/31/01 11:49 AM >>>
> Hi Howard,
>
> I've always found measuring solder paste volume to be very difficult. Yes,
> numbers can be generated, but even taking large amounts of data doesn't
> guarantee the correct impression. Generally, regardless of equipment used,
> the best results one can hope for are for trends, which at best could be
> described to be of the order of -1 or +1 from true. It's not a bad thing to
> try but don't expect absolute results.
>
> Best regards,
>
> Andrew Hoggan
> BBA Associates Ltd
> www.bba-associates.ltd
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Howard Watson
> Sent: 31 July 2001 14:47
> To: [log in to unmask]
> Subject: [TN] Solder Paste Measurements
>
>
>
> Dear Technetters,
>
> My question is: how do you measure solder paste height and volume
> accurately? My situation is with using the VisionMaster Model 150A, I am
> having trouble obtaining reasonably accurate measurements. The VisionMaster
> is a small bench topsystem that uses a template consisting of a "region of
> interest" (the solder paste), and reference regions (the areas on each side
> of the pad). Because there are inconsistencies in the PCB (HASL finish),
> like raised areas from traces, valleys surrounding the pad, and
> irregularities in the solder mask, the readings I get cannot possibly be
> true. Many times the measured readings for weighted average height are over
> 7.5 mils using a 6 mil screen and 9.5 mils using an 8 mil screen. The
> process specifics are Multicore NC-40 paste, shore 94-97 polyurethane
> blades, DEK 265 Infinity, and correct squeegee pressures, print gap, etc..
> I believe the bricks are good, I just ca! n't use the measurements for SPC
> as it shows the process to be out of control.
>
> In theory, polyurethane blades should "scoop" if anything, leaving a
> shorter brick than the stencil thickness. It seems logical to me that the
> best way to obtain accurate measurements would be to use the pad as a
> reference region and measure the height from the pad, but the VisionMaster
> system does not allow me to do this. Does anyone have knowledge or
> recommendations on what I can do here? How do the more expensive systems
> measure solder paste? Oh yea, spending $$ on new equipment is not a real
> good option at this point!
>
> Thanks in advance for the assistance,
>
> Howard Watson
> Manufacturing Engineer
> AMETEK/Dixson
--part1_17.194f45fc.2898cf26_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi All!
<BR>
<BR>Just want to "muddy the waters" a bit...
<BR>
<BR>How many of you that use metal squeegees, and pretty much have your stencil
<BR>thickness down (as far as specifying thickness for a given pitch) have found
<BR>that it is really "crucial" to measure your paste thickness?
<BR>
<BR>I for one, have found that when I spend the time and the money on equipment
<BR>to measure paste thickness, when using metal squeegee blades, and having a
<BR>solid set-up procedure, that I'm spending a bunch of time and money measuring
<BR>things that are always good...meaning that time could be spent better
<BR>elsewhere as long as you use metal squeegee blades, and have a good procedure
<BR>in place ensures that the printer is set-up correctly..which is not rocket
<BR>science...
<BR>
<BR>Am I over simplifying things? It's always worked for me since the advent of
<BR>metal squeegees...I don't know how you can go wrong with a metal blade. Look
<BR>at the gerbers you're given, see if they match the pad geometries, and then
<BR>get the stencil made. Things are pretty straight forward after that...
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Howard, in the past, I was forced to use to use and invest in smaller, less
<BR>expensive systems (I've since been lucky to have nice EXPENSIVE
<BR>toys-teehee). One of my favorite tools has always been the benchtop
<BR>Cyberoptics unit. I don't remember the model name, I'm sure it's on their
<BR>website, or a price figure. But I do know it was cheaper than most systems.
<BR>The beauty of it is it shoots a laser at an angle, laser is viewable on
<BR>monitor and is deflected by paste height. You line up the reference lines
<BR>on the screen and get pretty true paste height. If your using 1:1 apertures
<BR>or if you're doing aperaure reductions, you can calculate your volume.
<BR>Hope I've helped.
<BR>
<BR>Jason Gregory
<BR>SCI Systems, Inc.
<BR>Software Specialist - NPI Group
<BR>(256)882-4107 x3728
<BR>[log in to unmask]
<BR>
<BR>
<BR>>>> [log in to unmask] 07/31/01 11:49 AM >>>
<BR>Hi Howard,
<BR>
<BR>I've always found measuring solder paste volume to be very difficult. Yes,
<BR>numbers can be generated, but even taking large amounts of data doesn't
<BR>guarantee the correct impression. Generally, regardless of equipment used,
<BR>the best results one can hope for are for trends, which at best could be
<BR>described to be of the order of -1 or +1 from true. It's not a bad thing to
<BR>try but don't expect absolute results.
<BR>
<BR>Best regards,
<BR>
<BR>Andrew Hoggan
<BR>BBA Associates Ltd
<BR>www.bba-associates.ltd
<BR> -----Original Message-----
<BR> From: TechNet [mailto:[log in to unmask]]On Behalf Of Howard Watson
<BR> Sent: 31 July 2001 14:47
<BR> To: [log in to unmask]
<BR> Subject: [TN] Solder Paste Measurements
<BR>
<BR>
<BR>
<BR> Dear Technetters,
<BR>
<BR> My question is: how do you measure solder paste height and volume
<BR>accurately? My situation is with using the VisionMaster Model 150A, I am
<BR>having trouble obtaining reasonably accurate measurements. The VisionMaster
<BR>is a small bench topsystem that uses a template consisting of a "region of
<BR>interest" (the solder paste), and reference regions (the areas on each side
<BR>of the pad). Because there are inconsistencies in the PCB (HASL finish),
<BR>like raised areas from traces, valleys surrounding the pad, and
<BR>irregularities in the solder mask, the readings I get cannot possibly be
<BR>true. Many times the measured readings for weighted average height are over
<BR>7.5 mils using a 6 mil screen and 9.5 mils using an 8 mil screen. The
<BR>process specifics are Multicore NC-40 paste, shore 94-97 polyurethane
<BR>blades, DEK 265 Infinity, and correct squeegee pressures, print gap, etc..
<BR>I believe the bricks are good, I just ca! n't use the measurements for SPC
<BR>as it shows the process to be out of control.
<BR>
<BR> In theory, polyurethane blades should "scoop" if anything, leaving a
<BR>shorter brick than the stencil thickness. It seems logical to me that the
<BR>best way to obtain accurate measurements would be to use the pad as a
<BR>reference region and measure the height from the pad, but the VisionMaster
<BR>system does not allow me to do this. Does anyone have knowledge or
<BR>recommendations on what I can do here? How do the more expensive systems
<BR>measure solder paste? Oh yea, spending $$ on new equipment is not a real
<BR>good option at this point!
<BR>
<BR> Thanks in advance for the assistance,
<BR>
<BR> Howard Watson
<BR> Manufacturing Engineer
<BR> AMETEK/Dixson</FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
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Date: Thu, 19 Jul 2001 15:05:08 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: Shiny vs. Dull
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I have found that this is more dependent on method of reflow and flux. =20
Kathy=20
>>> [log in to unmask] 07/19/01 02:19PM >>>
Hello TechNetters,
Looking for confirmation that solder joints over gold platings will tend =
to
be duller than solder joints over HASL platings.
Thanks,
Craig
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Date: Thu, 19 Jul 2001 15:32:12 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: White residue from conformal coating
MIME-Version: 1.0
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Does MPK have the same health concerns as MEK?
*Dunno. The man in charge of our coating specification wants me to look
into MPK because it supposedly has a lower health risk than the
toluene/xylene that we currently use (by the carload). I have not looked
at MPK vs. MEK, but the chemistries are very similar. Whats a carbon atom
between friends?
Doug
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Date: Wed, 1 Aug 2001 11:50:07 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"d. terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: Re: Solder Paste Measurements
MIME-Version: 1.0 (Generated by NET-TEL Mailguard SMTP version 4.0.0.22)
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Hi Technetters,
Having a solid set-up procedure (like Steve mentions) is the key issue =
here. But how about making proto's all the time, some of them hardly =
manufacturable, like flex-rigid boards without a carrier or boards with =
solderpads within 0.5 mm of the board-edges ? Setting up the machine =
means some improvisation then.....
For an engineer it's quite easy to see if set-up is incorrect, but for the =
average operator a height- measurement helps in identifying such a =
problem.=20
For average, flat and rigid boards I agree with Steve (as long as metal =
blades are used).
Howard: measuring a value a little higher then the stencil thickness is =
normal. Maybe someone else can give an explanation for this is, because I =
don't remember :-{
Kind regards,
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
>>> "Stephen R. Gregory" <[log in to unmask]> 08/01 5:19 am >>>
Hi All!
Just want to "muddy the waters" a bit...
How many of you that use metal squeegees, and pretty much have your =
stencil
thickness down (as far as specifying thickness for a given pitch) have =
found
that it is really "crucial" to measure your paste thickness?
I for one, have found that when I spend the time and the money on =
equipment
to measure paste thickness, when using metal squeegee blades, and having a
solid set-up procedure, that I'm spending a bunch of time and money =
measuring
things that are always good...meaning that time could be spent better
elsewhere as long as you use metal squeegee blades, and have a good =
procedure
in place ensures that the printer is set-up correctly..which is not rocket
science...
Am I over simplifying things? It's always worked for me since the advent =
of
metal squeegees...I don't know how you can go wrong with a metal blade. =
Look
at the gerbers you're given, see if they match the pad geometries, and =
then
get the stencil made. Things are pretty straight forward after that...
-Steve Gregory-
> Howard, in the past, I was forced to use to use and invest in smaller, =
less
> expensive systems (I've since been lucky to have nice EXPENSIVE
> toys-teehee). One of my favorite tools has always been the benchtop
> Cyberoptics unit. I don't remember the model name, I'm sure it's on =
their
> website, or a price figure. But I do know it was cheaper than most =
systems.
> The beauty of it is it shoots a laser at an angle, laser is viewable on
> monitor and is deflected by paste height. You line up the reference =
lines
> on the screen and get pretty true paste height. If your using 1:1 =
apertures
> or if you're doing aperaure reductions, you can calculate your volume.
> Hope I've helped.
>
> Jason Gregory
> SCI Systems, Inc.
> Software Specialist - NPI Group
> (256)882-4107 x3728
> [log in to unmask]
>
>
> >>> [log in to unmask] 07/31/01 11:49 AM >>>
> Hi Howard,
>
> I've always found measuring solder paste volume to be very difficult. =
Yes,
> numbers can be generated, but even taking large amounts of data doesn't
> guarantee the correct impression. Generally, regardless of equipment =
used,
> the best results one can hope for are for trends, which at best could be
> described to be of the order of -1 or +1 from true. It's not a bad =
thing to
> try but don't expect absolute results.
>
> Best regards,
>
> Andrew Hoggan
> BBA Associates Ltd
> www.bba-associates.ltd=20
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Howard Watson
> Sent: 31 July 2001 14:47
> To: [log in to unmask]
> Subject: [TN] Solder Paste Measurements
>
>
>
> Dear Technetters,
>
> My question is: how do you measure solder paste height and volume
> accurately? My situation is with using the VisionMaster Model 150A, I =
am
> having trouble obtaining reasonably accurate measurements. The =
VisionMaster
> is a small bench topsystem that uses a template consisting of a "region =
of
> interest" (the solder paste), and reference regions (the areas on each =
side
> of the pad). Because there are inconsistencies in the PCB (HASL =
finish),
> like raised areas from traces, valleys surrounding the pad, and
> irregularities in the solder mask, the readings I get cannot possibly be
> true. Many times the measured readings for weighted average height are =
over
> 7.5 mils using a 6 mil screen and 9.5 mils using an 8 mil screen. The
> process specifics are Multicore NC-40 paste, shore 94-97 polyurethane
> blades, DEK 265 Infinity, and correct squeegee pressures, print gap, =
etc..
> I believe the bricks are good, I just ca! n't use the measurements for =
SPC
> as it shows the process to be out of control.
>
> In theory, polyurethane blades should "scoop" if anything, leaving a
> shorter brick than the stencil thickness. It seems logical to me that =
the
> best way to obtain accurate measurements would be to use the pad as a
> reference region and measure the height from the pad, but the VisionMaste=
r
> system does not allow me to do this. Does anyone have knowledge or
> recommendations on what I can do here? How do the more expensive =
systems
> measure solder paste? Oh yea, spending $$ on new equipment is not a =
real
> good option at this point!
>
> Thanks in advance for the assistance,
>
> Howard Watson
> Manufacturing Engineer
> AMETEK/Dixson
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Date: Thu, 19 Jul 2001 15:50:47 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Keach Sasamori <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Keach Sasamori <[log in to unmask]>
Subject: OT- Virus Warning
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: quoted-printable
We've had some mail today that contains a virus. It is known as W32/SirCam@=
mm or Backdoor.SirCam. Not from Technet (because no attachments are =
allowed), but just wanted to pass it on.
The subject will be random, but matches the attachment subject.
The body of the message is very simple. Just 3 or 4 lines. Something to =
the effect of:
Hi How are you
I send you this file in order to have your advice
----- OR--------
I hope you can help me with this file that I send
----- OR--------
I hope you like the file that I sendo you
----- OR--------
This is the file with the information that you ask for
The attachment has a familiar extension (xls, doc, etc) followed by any of =
the following (.vbs, .pif, .com, .bat) and is generated from a recently =
used file on the infected person's system.
The virus sends out the message and attachment to addresses from the =
e-mail client. The damage done varies from case to case.=20
You may get more info from: http://www.symantec.com/avcenter/venc/data/w32.=
[log in to unmask] which also has a fix for infected systems.
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Date: Thu, 19 Jul 2001 14:18:47 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Hans Shin <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Hans Shin <[log in to unmask]>
Subject: Re: White residue from conformal coating
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Overexposure to both MEK and MPK will give headaches too...and eye and nose irritation...
Hans Shin
PTL
-----Original Message-----
From: Hans Hinners [SMTP:[log in to unmask]]
Sent: Thursday, July 19, 2001 1:47 PM
To: [log in to unmask]
Subject: Re: [TN] White residue from conformal coating
Only reason I ask is because, I had to get extra special permission to use
some MEK (100%) to thin out a potting compound when I was at Robins.
Reducing toluene & xylene exposure is very commendable - nothing like that
solvent headache killing brain cells.
H
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Thursday, July 19, 2001 1:32 PM
To: TechNet E-Mail Forum.; Hans Hinners
Subject: Re: [TN] White residue from conformal coating
Does MPK have the same health concerns as MEK?
*Dunno. The man in charge of our coating specification wants me to look
into MPK because it supposedly has a lower health risk than the
toluene/xylene that we currently use (by the carload). I have not looked
at MPK vs. MEK, but the chemistries are very similar. Whats a carbon atom
between friends?
Doug
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Date: Thu, 19 Jul 2001 16:30:50 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: So long & thanks for all the fish
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Sorry for the inconvenience......(Hitchhikers guide reference, for those =
wondering)
Kathy
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<META content="MSHTML 5.00.2614.3500" name=GENERATOR></HEAD>
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<DIV>Sorry for the inconvenience......(Hitchhikers guide reference, for those
wondering)</DIV>
<DIV> </DIV>
<DIV>Kathy</DIV></BODY></HTML>
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Date: Thu, 19 Jul 2001 16:35:01 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Barbara Burcham <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Barbara Burcham <[log in to unmask]>
Subject: Re: So long & thanks for all the fish
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Hans...sounds like you are headed into the Deep South. Where will you =
be
living?
Barbara
-----Original Message-----
From: Hans Hinners [mailto:[log in to unmask]]
Sent: Thursday, July 19, 2001 3:55 PM
To: [log in to unmask]
Subject: [TN] So long & thanks for all the fish
Hey Doug & all,
Boy, do I have news for everybody.
Today is my last day in the board business and the private world at =
least
for now. <sigh - I hate good byes> I intend to sign up for Tech Net =
once I
get settled in the new digs. Who knows? I might end up on the other =
side
of the board industry.
My fianc=E9e couldn't find a job out in San Diego before the economy =
tanked .
. . so I'm heading back to the military world (civilian Air Force). =
Only
this time I'll be an Electronics Engineer working on either the HH 60
Helicopter or the C-130 gunship.
It's back to deep fried everything (catfish, sweet potatoes, pickles, =
ice
cream) & sweet tea. Oh and really cheap gas!
If there are any Engineers out there who want to live in sunny San =
Diego
give me a shout!
Hans
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Process Engineer
Toppan Electronics, Inc.
770 Miramar Road
San Diego, CA 92126
(858) 695 - 2222 ext. 241
(858) 695 - 6823 fax
[log in to unmask]
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Date: Fri, 20 Jul 2001 07:43:55 +1000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Colin Weber <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Colin Weber <[log in to unmask]>
Subject: Re: Bow & Twist
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; format=flowed
Peter,
We are designing the board to IPC specifications for scientific
instrumentation.
There is no special case for these designs. I don't have a problem with bow
and twist
as I haven't designed the boards yet. My question is more directed to how
to avoid
the issue if I want to design a large PCB.
Apart from stiffeners and the like I am specifically wondering how thick I
need to make
a PCB if I am going to be placing fine pitch devices and/or PBGAs on them.
If I were
to go with 2.4mm I have EMI stackup and aspect ratio concerns, but feel
comfortable
the board will be more rigid. I could and would prefer to step down in
thickness but do
not have a feel for how the board would fair during handling and assembly.
I am talking about 14 to 15 x 9 to 10 inch board sizes for processor
designs. An
obvious solution is to split the PCB up into two boards, but I do not have
that luxury.
I was just curios if there are any guidelines or figures fro bow & twist
with respect to
size versus thickness?
At 02:44 PM 19/07/2001 +0800, you wrote:
>Much of the bow and twist these days is down to the choice of material used
>for the substrate coupled with 'balance' in the board design and ultimately
>on the capability of the fabrication process.
>
>If you have heavy planes in the board, make sure they're distributed evenly
>throughout the layers, otherwise any good PCB Fab worth his salt will keep
>any bow and twist within the bounds of the usual specs. It used ot be that
>the thicker the board was, the more rigid it was and the less inclined it
>was to warping. These days, more than 20 mils bow or twist on a 63 mil
>thick board measuring 9 x 6 inches is unusual.
>
>Are you designing boards to be made to MIL-PRF-55110, to an IPC spec or to
>something more commercial?
>
>Pete Duncan
>
>
>
>
> <colin.weber@VARI To: [log in to unmask]
>
> 07/19/01 12:18 PM
>
>Folks,
>
>Is there a method of determining the maximum permissible size of two board
>types?
>a) A SMT PCB containing Fine pitch QFP devices
>b) A SMT PCB containing PBGA 388pin 1.27mm pitch & Fine pitch QFPs
>
>with respect to Bow and Twist.
>
>I am interested in how the thickness of the board relates to maximum bow
>and twist.
>I'd like to determine this before I design the layout, rather than find out
>it is wrong
>after performing the tests of IPC-6012A, IPC-TM-650 2.4.22.
>
>Regards,
>
>Colin Weber
Regards,
Colin Weber
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Date: Thu, 19 Jul 2001 14:52:35 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jorge Rodriguez <[log in to unmask]>
Subject: X-Ray Laminography Test
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
I am looking for a lab that provides X-Ray Laminography services. I need to
evaluate the solder joints on some BGAs and I was wondering what would give
a complete 3D analysis of the solder joint. Is there any lab that provides
Laminography services? My company is located in Phoenix, Arizona.
Any information would be appreciated.
Jorge Rodriguez
Process Engineer
Varian, Inc.
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Date: Mon, 13 Aug 2001 08:57:51 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "<Peter George Duncan>" <[log in to unmask]>
Subject: Re: PCB Moisture Absorption
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hi, Karen,
In my former salt mine, where we used organic boards, it was standard
practice to bake the bare boards for 2 hours at 90 deg C to drive off
absorbed moisture prior to assembly. Thereafter, the boards were kept in
low humidity or nitrogen cabinets between assembly operations until after
conformal coating.
How are your boards packed when they arrive with you from the
manufacturer? I would expect them to be in sealed bags with desiccant, and
they should be left that way (or resealed immediately after inspection in
vacuum bags with desiccant) until you're ready to assemble them,
preferrably in the low humidity cabinet. How long are you leaving the
boards on the shop floor after baking? You should try and arrange matters
so that they're not baked until they're required, and thereafter used
immediately.
Regards
Pete Duncan
Karen Walters
<KWalters@BTU To: [log in to unmask]
.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST Aero/ST Group)
Sent by: Subject: [TN] PCB Moisture Absorption
TechNet
<[log in to unmask]
ORG>
08/09/01
02:39 AM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
Karen Walters
I am trying to solve the problem of cracking inside a printed
circuit board due to moisture absorption, temperature in the oven and the
thermal gradient observed on the board. After the drying process, the
boards are left outside
in the manufacturing area, but due to the environment they are absorbing
moisture again. I would like to know which products would fit
better(sealed
bags,vacuum bag,with/without desiccant,low humidity or nitrogen filled
storage cabinets...). Also has anyone done a study on moisture absorption
in a PCB under different environment conditions, and baking requirements
for
different environmental conditions?
If you have any data, please advise.
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Date: Thu, 19 Jul 2001 15:19:46 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Chuck Brummer <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Chuck Brummer <[log in to unmask]>
Subject: Re: ICD
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="------------C41DBD1EAB03DCA8B0C75832"
--------------C41DBD1EAB03DCA8B0C75832
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Content-Transfer-Encoding: 7bit
Wayne,
My past recalls that for that test copper elongation was much more
important than copper plate thickness. I think you want to be greater
than 12% elongation when you plate, then one mil to one ounce is
probably enough.
Chuck Brummer
Acuson
Wayne Martin wrote:
> Need some help!We are trying to pass the IPC TM-650 2.4.36 Rework
> simulation test. We are having ICD in trying to pass the test. We pass
> the solder float test.We run a direct plate (palladium) line. We have
> platted anywhere from 1 mil. of copper in the through holes all the
> way to 2.5 mil. of copper in the holes and still fail the test.Looking
> for any help that anyone can give me.Wayne MartinElectronic Service
> and Design
--------------C41DBD1EAB03DCA8B0C75832
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<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>
<body bgcolor="#FFFFFF">
Wayne,
<p>My past recalls that for that test copper elongation was much more important
than copper plate thickness. I think you want to be greater than
12% elongation when you plate, then one mil to one ounce is probably enough.
<p>Chuck Brummer
<br>Acuson
<p>Wayne Martin wrote:
<blockquote TYPE=CITE><style></style>
<font face="Arial"><font size=-1>Need
some help!</font></font><font face="Arial"><font size=-1>We are trying
to pass the IPC TM-650 2.4.36 Rework simulation test. We are having ICD
in trying to pass the test. We pass the solder float test.</font></font><font face="Arial"><font size=-1>We
run a direct plate (palladium) line. We have platted anywhere from 1 mil.
of copper in the through holes all the way to 2.5 mil. of copper in the
holes and still fail the test.</font></font><font face="Arial"><font size=-1>Looking
for any help that anyone can give me.</font></font><font face="Arial"><font size=-1>Wayne
Martin</font></font><font face="Arial"><font size=-1>Electronic Service
and Design</font></font></blockquote>
</body>
</html>
--------------C41DBD1EAB03DCA8B0C75832--
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Date: Wed, 1 Aug 2001 08:34:47 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Kasprzak, Bill (sys) USX" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Kasprzak, Bill (sys) USX" <[log in to unmask]>
Subject: Process Problem vs Board Problem
MIME-Version: 1.0
Content-Type: text/plain
Technetters'
I've recently run into a problem with Wavesoldering some circuit boards
where I am having problems getting topside solder joints. The process that
I'm running has the topside of the board at 195-200 F just prior to the
solder wave. My conveyor speed is 4.0 fpm. My fluxer is a spray fluxer. The
board is a .062 - 6 layer board that has an aluminum heat sink on it. I feel
that my process is set correctly.
The original process that previously used on these boards was very
successful when we used an OA water soluble flux. This process was on that I
qualified many years ago to J-Std-001A for Class 3 assemblies.
On these circuit boards, I'm trying to use a No Clean Lo Activity level flux
that is water washable. Because I have new equipment for wavesoldering, I
was hoping to not have to do a re-qualification process for our level 3
assemblies. Because our new equipment has much better controls than our old
equipment I thought that it would be easy to solder these boards with an LO
active flux. Well, my initial pass has been a disaster so far. There are
three pictures that I'm looking for comments on. They are located on Steve's
Webpage at http://stevezeva.homestead.com. (A thousand thanks go out to
Steve Gregory for providing a site for posting the pictures.) Two of the
pictures, called Bare Pad and Bare Pad2 show a condition that I can describe
but I don't know if this condition has a name. In those pictures, there is a
heavier coat of solder on the pad, but it seems to form a concentric ring on
the pad.The extremities of the pads, both toward the outside and the inside,
show a tinned surface but it appears to be much thinner. To me, it seems
like these thin areas do not readily solder. It seems like this thin area is
barrier that can only be overcome with a very strong OA flux. This may
explain why I did not have a problem before. The other picture shows another
condition that I see in various places on the bare board where there are
protrusions on the inside of the PTH's. This appears to be trapped volitiles
that were being expulsed during the HASL process.
I'm trying to determine if I have a board problem or a process problem.
Is it unreasonable for me to think that this board can be soldered with a
no-clean (but water washable) LO activity level flux?
Any help or comments would be greatly appreciated.
Bill Kasprzak
Moog Inc., Electronic Assembly Engineering
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Date: Mon, 13 Aug 2001 08:05:18 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Edward Szpruch <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Edward Szpruch <[log in to unmask]>
Subject: horizontal lines for flex innerlayers- oxide substitution
MIME-Version: 1.0
Content-Type: text/plain
Hi Technetters,
I need opinion from people that installed such lines about their experience.
We specified the capability of the line to process flexible innerlayers and
polyimide thin innerlayers ( 50 microns dielectric,17/17 micron copper) with
signal circuitry without leaders as well as thicker rigid innerlayers ( up
to 1 mm ) with ground areas with uniform color of treated copper.
I am very interested in actual results.
I will very appreciate also private mails if there is negative experience
and someone hestitate to send on the net the names of suppliers.
Edward Szpruch
Eltek , Manager of Process Engineering
P.O.Box 159 ; 49101 Petah Tikva Israel
Tel ++972 3 9395050 , Fax ++972 3 9309581
e-mail [log in to unmask]
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Date: Fri, 20 Jul 2001 08:42:02 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "<Peter George Duncan>" <[log in to unmask]>
Subject: Re: So long & thanks for all the fish
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Date: Wed, 1 Aug 2001 09:40:21 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Woelfel, Tim" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Woelfel, Tim" <[log in to unmask]>
Subject: Re: Board layout service
MIME-Version: 1.0
Content-Type: text/plain
Try Plexus in Neenah, WI.
> -----Original Message-----
> From: West, Jim [SMTP:[log in to unmask]]
> Sent: Wednesday, August 01, 2001 9:31 AM
> To: [log in to unmask]
> Subject: [TN] Board layout service
>
> Hi,
>
> I'm in need of someone that can layout a new PCB's. I'm located in the
> Columbus Ohio area, and would like someone close to this area if possible.
> Please e-mail me offline if you know of someone that can help.
>
> Thanks,
>
> Jim
>
> --------------------------------------------------------------------------
> -------
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> additional
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> --------------------------------------------------------------------------
> -------
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Date: Fri, 20 Jul 2001 09:16:44 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "<Peter George Duncan>" <[log in to unmask]>
Subject: Re: Bow & Twist
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Colin,
I haven't come across any such figures, and I doubt that they would have
been very meaningful if I had, as there are too many variables in terms of
material choice and choice of fab house to pin numbers to. I suggest you
determine what flatness you need and the materials you want to use and then
go talk to fab houses for advice on how possible your requirements are.
My view is that, if you're using BGA's, I would prefer a thinner board to a
thicker one from a manufacturing point of view. It takes a much longer time
to get BGA contacts up to soldering temperature compared with most other
components where the leads stick out the sides. A thicker board means an
even longer dwell time at high temperature, which to me is a risky time for
a board. Peak soldering temperatures, especially where BGA's are involved,
are pretty close to the max case temperatures of a lot of components, and
if you increase the length of time components cases are exposed to high
temps just to heat up a thick board, you may induce internal damage.
You can put the boards in support jigs during processing until the
stiffeners are fitted.
Pete Duncan
Colin Weber
<colin.weber@vari To: "TechNet E-Mail Forum." <[log in to unmask]>, DUNCAN
aninc.com> Peter/Asst Prin Engr/ST Aero/ST Group@ST Domain
cc:
07/20/01 05:43 AM Subject: Re: [TN] Bow & Twist
Peter,
We are designing the board to IPC specifications for scientific
instrumentation.
There is no special case for these designs. I don't have a problem with bow
and twist
as I haven't designed the boards yet. My question is more directed to how
to avoid
the issue if I want to design a large PCB.
Apart from stiffeners and the like I am specifically wondering how thick I
need to make
a PCB if I am going to be placing fine pitch devices and/or PBGAs on them.
If I were
to go with 2.4mm I have EMI stackup and aspect ratio concerns, but feel
comfortable
the board will be more rigid. I could and would prefer to step down in
thickness but do
not have a feel for how the board would fair during handling and assembly.
I am talking about 14 to 15 x 9 to 10 inch board sizes for processor
designs. An
obvious solution is to split the PCB up into two boards, but I do not have
that luxury.
I was just curios if there are any guidelines or figures fro bow & twist
with respect to
size versus thickness?
At 02:44 PM 19/07/2001 +0800, you wrote:
>Much of the bow and twist these days is down to the choice of material
used
>for the substrate coupled with 'balance' in the board design and
ultimately
>on the capability of the fabrication process.
>
>If you have heavy planes in the board, make sure they're distributed
evenly
>throughout the layers, otherwise any good PCB Fab worth his salt will keep
>any bow and twist within the bounds of the usual specs. It used ot be that
>the thicker the board was, the more rigid it was and the less inclined it
>was to warping. These days, more than 20 mils bow or twist on a 63 mil
>thick board measuring 9 x 6 inches is unusual.
>
>Are you designing boards to be made to MIL-PRF-55110, to an IPC spec or to
>something more commercial?
>
>Pete Duncan
>
>
>
>
> <colin.weber@VARI To: [log in to unmask]
>
> 07/19/01 12:18 PM
>
>Folks,
>
>Is there a method of determining the maximum permissible size of two board
>types?
>a) A SMT PCB containing Fine pitch QFP devices
>b) A SMT PCB containing PBGA 388pin 1.27mm pitch & Fine pitch QFPs
>
>with respect to Bow and Twist.
>
>I am interested in how the thickness of the board relates to maximum bow
>and twist.
>I'd like to determine this before I design the layout, rather than find
out
>it is wrong
>after performing the tests of IPC-6012A, IPC-TM-650 2.4.22.
>
>Regards,
>
>Colin Weber
Regards,
Colin Weber
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Date: Fri, 20 Jul 2001 09:26:23 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "<Peter George Duncan>" <[log in to unmask]>
Subject: Re: Gerber specification
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Dee,
Try looking up IPC-D-350. I don't have a copy myself, but was given this
number recently as the spec for the Gerber format. It might help some.
Pete Duncan
"Hybiske,
Tom" To: [log in to unmask]
<Tom_Hybiske@ cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST Aero/ST Group)
BOSE.COM> Subject: Re: [TN] Gerber specification
Sent by:
TechNet
<[log in to unmask]
ORG>
07/20/01
02:43 AM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
"Hybiske,
Tom"
Gerber Scientific has a publication explaining the RS274X language.
Contact
them directly.
Tom Hybiske
Bose Corporation
Framingham, MA
>
> I need to find the specifications of gerber language, would
> any of you know
> where I can get that information.
>
> TIA
>
>
> Dee Stover [log in to unmask]
> Associate Technician Design
> National Optical Astronomy Observatory
> 950 N Cherry Ave
> Tucson, AZ 85719
> 520-318-8489
> FAX 520-318-8303
>
>
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Date: Thu, 19 Jul 2001 21:33:56 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: Shiny vs. Dull
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_f5.cb170d2.2888e484_boundary"
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Content-Transfer-Encoding: 7bit
Hi Craig!
This is true from my experience when using a standard 63/37 solder. I do know
one way to make them look better, I'm not a metallurgist, and I can't explain
why, but if you use a 2% silver solder the joints are noticably smoother and
shinier...this was told to me a long, long time ago. Ever since then when I'm
soldering to flash gold, I'll use a SN62/ PB36/ AG2 solder paste..
Maybe somebody like Werner can tell us why using a 2% silver solder makes the
joints look smoother and shinier...
-Steve Gregory-
> Hello TechNetters,
>
> Looking for confirmation that solder joints over gold platings will tend to
> be duller than solder joints over HASL platings.
>
> Thanks,
> Craig
>
--part1_f5.cb170d2.2888e484_boundary
Content-Type: text/html; charset="US-ASCII"
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Craig!
<BR>
<BR>This is true from my experience when using a standard 63/37 solder. I do know
<BR>one way to make them look better, I'm not a metallurgist, and I can't explain
<BR>why, but if you use a 2% silver solder the joints are noticably smoother and
<BR>shinier...this was told to me a long, long time ago. Ever since then when I'm
<BR>soldering to flash gold, I'll use a SN62/ PB36/ AG2 solder paste..
<BR>
<BR>Maybe somebody like Werner can tell us why using a 2% silver solder makes the
<BR>joints look smoother and shinier...
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Hello TechNetters,
<BR>
<BR>Looking for confirmation that solder joints over gold platings will tend to
<BR>be duller than solder joints over HASL platings.
<BR>
<BR>Thanks,
<BR>Craig
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
--part1_f5.cb170d2.2888e484_boundary--
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Date: Thu, 19 Jul 2001 22:10:01 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: So long & thanks for all the fish
MIME-Version: 1.0
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Hey Hans!!
You forgot about a couple of other things too...affordable housing, no=20
rolling blackouts, and no 12-lane freeways that turn into parking lots twice=
=20
a day!!
But you'll have to get back dealing with the humidity...here in Oklahoma it'=
s=20
been like a 'friggen sauna...getting over a 100-degrees, 75% humidity, heat=20
index is like 115-degrees, and that's in the shade!! They're saying this=20
gonna go on for at least another week or so!! (pant, pant, pant...)
We'll see you...have a good trip!!
-Steve Gregory-
> Hey Doug & all,
>=20
> Boy, do I have news for everybody.
>=20
> Today is my last day in the board business and the private world at least
> for now. <sigh - I hate good byes> I intend to sign up for Tech Net once=20=
I
> get settled in the new digs. Who knows? I might end up on the other side
> of the board industry.
>=20
> My fianc=E9e couldn't find a job out in San Diego before the economy tanke=
d .
> . . so I'm heading back to the military world (civilian Air Force). Only
> this time I'll be an Electronics Engineer working on either the HH 60
> Helicopter or the C-130 gunship.
>=20
> It's back to deep fried everything (catfish, sweet potatoes, pickles, ice
> cream) & sweet tea. Oh and really cheap gas!
>=20
> If there are any Engineers out there who want to live in sunny San Diego
> give me a shout!
>=20
> Hans
>=20
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Content-Transfer-Encoding: quoted-printable
<HTML><FONT FACE=3Darial,helvetica><FONT SIZE=3D2>Hey Hans!!
<BR>
<BR>You forgot about a couple of other things too...affordable housing, no=20
<BR>rolling blackouts, and no 12-lane freeways that turn into parking lots t=
wice=20
<BR>a day!!
<BR>
<BR>But you'll have to get back dealing with the humidity...here in Oklahoma=
it's=20
<BR>been like a 'friggen sauna...getting over a 100-degrees, 75% humidity, h=
eat=20
<BR>index is like 115-degrees, and that's in the shade!! They're saying this=
=20
<BR>gonna go on for at least another week or so!! (pant, pant, pant...)
<BR>
<BR>We'll see you...have a good trip!!
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=3DCITE style=3D"BORDER-LEFT: #0000ff 2px solid; MARGIN-=
LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Hey Doug & all,
<BR>
<BR>Boy, do I have news for everybody.
<BR>
<BR>Today is my last day in the board business and the private world at leas=
t
<BR>for now. <sigh - I hate good byes> I intend to sign up for T=
ech Net once I
<BR>get settled in the new digs. Who knows? I might end up on th=
e other side
<BR>of the board industry.
<BR>
<BR>My fianc=E9e couldn't find a job out in San Diego before the economy tan=
ked .
<BR>. . so I'm heading back to the military world (civilian Air Force)=
. Only
<BR>this time I'll be an Electronics Engineer working on either the HH 60
<BR>Helicopter or the C-130 gunship.
<BR>
<BR>It's back to deep fried everything (catfish, sweet potatoes, pickles, ic=
e
<BR>cream) & sweet tea. Oh and really cheap gas!
<BR>
<BR>If there are any Engineers out there who want to live in sunny San Diego
<BR>give me a shout!
<BR>
<BR>Hans
<BR></FONT><FONT COLOR=3D"#000000" SIZE=3D3 FAMILY=3D"SANSSERIF" FACE=3D"Ar=
ial" LANG=3D"0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR=3D"#000000" SIZE=3D2 FAMILY=3D"SANSSERIF" FACE=3D"Ar=
ial" LANG=3D"0">
<BR></FONT></HTML>
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Date: Thu, 19 Jul 2001 21:20:01 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
=?US-ASCII?Q?cscholbe?= <[log in to unmask]>
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I'm out from 7/20 to 7/24. Back on 7/25. Please contact Bob Corbey or Wendi Boger in my absence. Thanks!
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Date: Fri, 20 Jul 2001 14:55:09 +1000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Van Hoang Dinh <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Van Hoang Dinh <[log in to unmask]>
Subject: In-line process
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Hi TechNet,
We are going to implement IN-LINE process. Any recommends or ideas would =
help for me.
Thanks In Advance
Van
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<DIV><FONT size=3D2>Hi TechNet,</FONT></DIV>
<DIV><FONT size=3D2>We are going to implement IN-LINE process. Any =
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ideas would help for me.</FONT></DIV>
<DIV><FONT size=3D2>Thanks In Advance</FONT></DIV>
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Date: Mon, 13 Aug 2001 13:41:42 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: Searching for reflow oven manufacturer or user
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Hi Jim!
ABW ovens are now sold by Manix. Go to:
http://www.manixmfg.com/reflow.htm
The latest TT-5 has windows software and looks like it has a neat flat-panel
display...
-Steve Gregory-
> Hi,
>
> Anybody know if ABW Systems Corporation is still in business? They produced
> a reflow oven ABW model TT-5 for Zevatech back in 1994. Or, does anybody
> use the TT-5 oven currently? I'm in need of assistance on getting the one
> we recently purchased up an running.
>
> Thanks,
>
> Jim West
> Manufacturing Engineer
>
> Nexergy Inc.
> 1909 Arlingate Lane
> Columbus, Ohio 43228
> Ph. 614-351-6216
> Fax. 614-324-1979
>
> http://www.nexergy.com
>
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Jim!
<BR>
<BR>ABW ovens are now sold by Manix. Go to:
<BR>
<BR>http://www.manixmfg.com/reflow.htm
<BR>
<BR>The latest TT-5 has windows software and looks like it has a neat flat-panel
<BR>display...
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Hi,
<BR>
<BR>Anybody know if ABW Systems Corporation is still in business? They produced
<BR>a reflow oven ABW model TT-5 for Zevatech back in 1994. Or, does anybody
<BR>use the TT-5 oven currently? I'm in need of assistance on getting the one
<BR>we recently purchased up an running.
<BR>
<BR>Thanks,
<BR>
<BR>Jim West
<BR>Manufacturing Engineer
<BR>
<BR>Nexergy Inc.
<BR>1909 Arlingate Lane
<BR>Columbus, Ohio 43228
<BR>Ph. 614-351-6216
<BR>Fax. 614-324-1979
<BR>
<BR>http://www.nexergy.com
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
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Date: Mon, 13 Aug 2001 12:26:47 +0100
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Roger Hammond <[log in to unmask]>
Subject: FDA approval
MIME-Version: 1.0
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Dear Techneters,
I work for a Printed Circuit Fabricator in the U.K.and one of our
customers, a Printed Circuit Assembler has been approached by an OEM
that produces medical equipment. This OEM has FDA approval for his
product. The question is, is it the equipment that is FDA approved or
does it transfer down the line to the assembler and printed circuit
manufacturer in similar fashion to UL recognition. If it transfers down
the line how does one go about obtaining the approval.
Thank you in advance
Roger Hammond
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Date: Wed, 1 Aug 2001 15:51:44 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Howard Watson <[log in to unmask]>
Subject: Re: Solder Paste Measurements
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Steve,
Thanks for the sound advice. I agree that a bullet-proof process and
set-up procedure will produce the results necessary for high yield and
that metal blades will help reduce variation. The situation I have seen
here is that metal blades can, and will, get damaged in our facility (I've
even seen poly blades get nicked!). In addition, I have seen several
stencils get damaged, through careless handling or otherwise. The result
is inconsistent print volume, leading to solder defects. The one area
where I can't completely reduce variation is with operator skill, or
diligence in following common sense practices. For example, soon after I
got here I was troubled by the fact that boards were allowed to slide down
a ramp at the end of reflow, sliding into each other and piling up.
Unbelievably, I was questioned by some as to "why" I requested an
operator at the end of reflow at all times. Some glued on components were
actually being sheared off.
The main problem we face here in arid western Colorado is the huge swing
in RH and temperatures (swamp cooling in summer & gas heat in winter), and
the very narrow process window of our current paste (Multicore NC-40). In
the winter, RH can be around 8% at 70 - 76 deg F, and in the summer RH is
up to 70% with temps up to 83 F. We have a significant problem with paste
dry out on the boards and in the stencil apertures - sometimes a delay of
less than 20 minutes can cause a problem. Many of the current solder
pastes may eliminate this problem, and I am working on changing the paste
- once I can get through the customer approvals and all that non-technical
stuff. Until we can get the process in control, we must monitor the
prints and reduce every variation that we can. Any feedback out there on
enclosed printheads, ie ProFlow to help with our indoor climate problem?
Howard Watson
Manufacturing Engineer
AMETEK/Dixson
"Stephen R. Gregory" <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
07/31/01 09:19 PM
Please respond to "TechNet E-Mail Forum."; Please respond to SteveZeva
To: [log in to unmask]
cc:
Subject: Re: [TN] Solder Paste Measurements
Hi All!
Just want to "muddy the waters" a bit...
How many of you that use metal squeegees, and pretty much have your
stencil
thickness down (as far as specifying thickness for a given pitch) have
found
that it is really "crucial" to measure your paste thickness?
I for one, have found that when I spend the time and the money on
equipment
to measure paste thickness, when using metal squeegee blades, and having a
solid set-up procedure, that I'm spending a bunch of time and money
measuring
things that are always good...meaning that time could be spent better
elsewhere as long as you use metal squeegee blades, and have a good
procedure
in place ensures that the printer is set-up correctly..which is not rocket
science...
Am I over simplifying things? It's always worked for me since the advent
of
metal squeegees...I don't know how you can go wrong with a metal blade.
Look
at the gerbers you're given, see if they match the pad geometries, and
then
get the stencil made. Things are pretty straight forward after that...
-Steve Gregory-
Howard, in the past, I was forced to use to use and invest in smaller,
less
expensive systems (I've since been lucky to have nice EXPENSIVE
toys-teehee). One of my favorite tools has always been the benchtop
Cyberoptics unit. I don't remember the model name, I'm sure it's on their
website, or a price figure. But I do know it was cheaper than most
systems.
The beauty of it is it shoots a laser at an angle, laser is viewable on
monitor and is deflected by paste height. You line up the reference lines
on the screen and get pretty true paste height. If your using 1:1
apertures
or if you're doing aperaure reductions, you can calculate your volume.
Hope I've helped.
Jason Gregory
SCI Systems, Inc.
Software Specialist - NPI Group
(256)882-4107 x3728
[log in to unmask]
>>> [log in to unmask] 07/31/01 11:49 AM >>>
Hi Howard,
I've always found measuring solder paste volume to be very difficult. Yes,
numbers can be generated, but even taking large amounts of data doesn't
guarantee the correct impression. Generally, regardless of equipment used,
the best results one can hope for are for trends, which at best could be
described to be of the order of -1 or +1 from true. It's not a bad thing
to
try but don't expect absolute results.
Best regards,
Andrew Hoggan
BBA Associates Ltd
www.bba-associates.ltd
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Howard Watson
Sent: 31 July 2001 14:47
To: [log in to unmask]
Subject: [TN] Solder Paste Measurements
Dear Technetters,
My question is: how do you measure solder paste height and volume
accurately? My situation is with using the VisionMaster Model 150A, I am
having trouble obtaining reasonably accurate measurements. The
VisionMaster
is a small bench topsystem that uses a template consisting of a "region of
interest" (the solder paste), and reference regions (the areas on each
side
of the pad). Because there are inconsistencies in the PCB (HASL finish),
like raised areas from traces, valleys surrounding the pad, and
irregularities in the solder mask, the readings I get cannot possibly be
true. Many times the measured readings for weighted average height are
over
7.5 mils using a 6 mil screen and 9.5 mils using an 8 mil screen. The
process specifics are Multicore NC-40 paste, shore 94-97 polyurethane
blades, DEK 265 Infinity, and correct squeegee pressures, print gap, etc..
I believe the bricks are good, I just ca! n't use the measurements for SPC
as it shows the process to be out of control.
In theory, polyurethane blades should "scoop" if anything, leaving a
shorter brick than the stencil thickness. It seems logical to me that the
best way to obtain accurate measurements would be to use the pad as a
reference region and measure the height from the pad, but the VisionMaster
system does not allow me to do this. Does anyone have knowledge or
recommendations on what I can do here? How do the more expensive systems
measure solder paste? Oh yea, spending $$ on new equipment is not a real
good option at this point!
Thanks in advance for the assistance,
Howard Watson
Manufacturing Engineer
AMETEK/Dixson
--=_alternative 006CE2A087256A9B_=
Content-Type: text/html; charset="us-ascii"
<br><font size=2 face="sans-serif">Steve,</font>
<br>
<br><font size=2 face="sans-serif">Thanks for the sound advice. I agree that a bullet-proof process and set-up procedure will produce the results necessary for high yield and that metal blades will help reduce variation. The situation I have seen here is that metal blades can, and will, get damaged in our facility (I've even seen poly blades get nicked!). In addition, I have seen several stencils get damaged, through careless handling or otherwise. The result is inconsistent print volume, leading to solder defects. The one area where I can't completely reduce variation is with operator skill, or diligence in following common sense practices. For example, soon after I got here I was troubled by the fact that boards were allowed to slide down a ramp at the end of reflow, sliding into each other and piling up. Unbelievably, I was questioned by some as to "why" I requested an operator at the end of reflow at all times. So!
me glued on components were actually being sheared off.</font>
<br>
<br><font size=2 face="sans-serif">The main problem we face here in arid western Colorado is the huge swing in RH and temperatures (swamp cooling in summer & gas heat in winter), and the very narrow process window of our current paste (Multicore NC-40). In the winter, RH can be around 8% at 70 - 76 deg F, and in the summer RH is up to 70% with temps up to 83 F. We have a significant problem with paste dry out on the boards and in the stencil apertures - sometimes a delay of less than 20 minutes can cause a problem. Many of the current solder pastes may eliminate this problem, and I am working on changing the paste - once I can get through the customer approvals and all that non-technical stuff. Until we can get the process in control, we must monitor the prints and reduce every variation that we can. Any feedback out there on enclosed printheads, ie ProFlow to help with our indoor climate problem?</font>
<br>
<br><font size=2 face="sans-serif">Howard Watson<br>
Manufacturing Engineer<br>
AMETEK/Dixson</font>
<br>
<br>
<br>
<table width=100%>
<tr valign=top>
<td>
<td><font size=1 face="sans-serif"><b>"Stephen R. Gregory" <[log in to unmask]></b></font>
<br><font size=1 face="sans-serif">Sent by: TechNet <[log in to unmask]></font>
<p><font size=1 face="sans-serif">07/31/01 09:19 PM</font>
<br><font size=1 face="sans-serif">Please respond to "TechNet E-Mail Forum."; Please respond to SteveZeva</font>
<br>
<td><font size=1 face="Arial"> </font>
<br><font size=1 face="sans-serif"> To: [log in to unmask]</font>
<br><font size=1 face="sans-serif"> cc: </font>
<br><font size=1 face="sans-serif"> Subject: Re: [TN] Solder Paste Measurements</font></table>
<br>
<br>
<br><font size=2 face="Arial">Hi All! <br>
<br>
Just want to "muddy the waters" a bit... <br>
<br>
How many of you that use metal squeegees, and pretty much have your stencil <br>
thickness down (as far as specifying thickness for a given pitch) have found <br>
that it is really "crucial" to measure your paste thickness? <br>
<br>
I for one, have found that when I spend the time and the money on equipment <br>
to measure paste thickness, when using metal squeegee blades, and having a <br>
solid set-up procedure, that I'm spending a bunch of time and money measuring <br>
things that are always good...meaning that time could be spent better <br>
elsewhere as long as you use metal squeegee blades, and have a good procedure <br>
in place ensures that the printer is set-up correctly..which is not rocket <br>
science... <br>
<br>
Am I over simplifying things? It's always worked for me since the advent of <br>
metal squeegees...I don't know how you can go wrong with a metal blade. Look <br>
at the gerbers you're given, see if they match the pad geometries, and then <br>
get the stencil made. Things are pretty straight forward after that... <br>
<br>
-Steve Gregory- <br>
<br>
</font>
<br><font size=2 face="Arial">Howard, in the past, I was forced to use to use and invest in smaller, less <br>
expensive systems (I've since been lucky to have nice EXPENSIVE <br>
toys-teehee). One of my favorite tools has always been the benchtop <br>
Cyberoptics unit. I don't remember the model name, I'm sure it's on their <br>
website, or a price figure. But I do know it was cheaper than most systems. <br>
The beauty of it is it shoots a laser at an angle, laser is viewable on <br>
monitor and is deflected by paste height. You line up the reference lines <br>
on the screen and get pretty true paste height. If your using 1:1 apertures <br>
or if you're doing aperaure reductions, you can calculate your volume. <br>
Hope I've helped. <br>
<br>
Jason Gregory <br>
SCI Systems, Inc. <br>
Software Specialist - NPI Group <br>
(256)882-4107 x3728 <br>
[log in to unmask] <br>
<br>
<br>
>>> [log in to unmask] 07/31/01 11:49 AM >>> <br>
Hi Howard, <br>
<br>
I've always found measuring solder paste volume to be very difficult. Yes, <br>
numbers can be generated, but even taking large amounts of data doesn't <br>
guarantee the correct impression. Generally, regardless of equipment used, <br>
the best results one can hope for are for trends, which at best could be <br>
described to be of the order of -1 or +1 from true. It's not a bad thing to <br>
try but don't expect absolute results. <br>
<br>
Best regards, <br>
<br>
Andrew Hoggan <br>
BBA Associates Ltd <br>
www.bba-associates.ltd <br>
-----Original Message----- <br>
From: TechNet [mailto:[log in to unmask]]On Behalf Of Howard Watson <br>
Sent: 31 July 2001 14:47 <br>
To: [log in to unmask] <br>
Subject: [TN] Solder Paste Measurements <br>
<br>
<br>
<br>
Dear Technetters, <br>
<br>
My question is: how do you measure solder paste height and volume <br>
accurately? My situation is with using the VisionMaster Model 150A, I am <br>
having trouble obtaining reasonably accurate measurements. The VisionMaster <br>
is a small bench topsystem that uses a template consisting of a "region of <br>
interest" (the solder paste), and reference regions (the areas on each side <br>
of the pad). Because there are inconsistencies in the PCB (HASL finish), <br>
like raised areas from traces, valleys surrounding the pad, and <br>
irregularities in the solder mask, the readings I get cannot possibly be <br>
true. Many times the measured readings for weighted average height are over <br>
7.5 mils using a 6 mil screen and 9.5 mils using an 8 mil screen. The <br>
process specifics are Multicore NC-40 paste, shore 94-97 polyurethane <br>
blades, DEK 265 Infinity, and correct squeegee pressures, print gap, etc.. <br>
I believe the bricks are good, I just ca! n't use the measurements for SPC <br>
as it shows the process to be out of control. <br>
<br>
In theory, polyurethane blades should "scoop" if anything, leaving a <br>
shorter brick than the stencil thickness. It seems logical to me that the <br>
best way to obtain accurate measurements would be to use the pad as a <br>
reference region and measure the height from the pad, but the VisionMaster <br>
system does not allow me to do this. Does anyone have knowledge or <br>
recommendations on what I can do here? How do the more expensive systems <br>
measure solder paste? Oh yea, spending $$ on new equipment is not a real <br>
good option at this point! </font>
<br><font size=2 face="Arial"><br>
Thanks in advance for the assistance, <br>
<br>
Howard Watson <br>
Manufacturing Engineer <br>
AMETEK/Dixson</font>
<br><font size=2 face="Arial"><br>
</font>
<br>
<br>
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Date: Mon, 13 Aug 2001 14:21:03 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Brian L. Guidi" <[log in to unmask]>
Subject: Uralite
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Uralite.
Does anyone have any information on the above brand of conformal coat?
Technical details, history, and/or vendor information would be greatly
appreciated.
Thanks.
Brian Guidi
Product Engineer
Teledyne Electronic Technologies
Tel: (603) 889-6191 X:310
Fax: (603) 886-2977
E-mail: [log in to unmask]
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Date: Mon, 13 Aug 2001 14:40:14 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: 6-pin DIP Optocoupler problem...
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Hope you all are having a joyous Monday like I am...
Got pulled over by one of the inspectors this morning because we have this
little 6-pin DIP optocoupler that only goes about 65-per board. On some of
the parts we're seeing exposed copper up on the shoulder of the leads as it
comes out of the body.
Go to: http://www.stevezeva.homestead.com/index.html and take a peek...
What's kinda' strange is that this only happens on the pin-1 side of the
part. I've determined that we're getting the parts in like this...I found
some of the problem parts in tubes that we haven't done anything to yet...
In looking really close at the parts, there seems to be some sort of film
coming out of the body that covers the shoulders and prevents the leads from
plating fully (the picture is on the page as well)...it's almost like some
sort of thin plastic sheet...or could it be an adhesive preform that bond the
two halves of the part together? (I don't have a clue how these parts are
made).
Anyways, should I worry about these parts? There's some people here that's
worried about the exposed copper (here we go again...) and want to touch it
up. I feel that there really isn't a problem because it's so high up the lead
that it shouldn't hurt anything....if I were concerned about anything, it
would be about that stuff that is coming out the body of the part...
The part seems to work fine, we ICT the boards, and do a ambient power-on
burn in for 24-hrs...everything is okie-dokie. This is a class-2 board by the
way.
Thanks again, and have a lovely Monday...hehehe
-Steve Gregory-
--part1_90.18a43b6e.28a9790e_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hope you all are having a joyous Monday like I am...
<BR>
<BR>Got pulled over by one of the inspectors this morning because we have this
<BR>little 6-pin DIP optocoupler that only goes about 65-per board. On some of
<BR>the parts we're seeing exposed copper up on the shoulder of the leads as it
<BR>comes out of the body.
<BR>
<BR>Go to: http://www.stevezeva.homestead.com/index.html and take a peek...
<BR>
<BR>What's kinda' strange is that this only happens on the pin-1 side of the
<BR>part. I've determined that we're getting the parts in like this...I found
<BR>some of the problem parts in tubes that we haven't done anything to yet...
<BR>
<BR>In looking really close at the parts, there seems to be some sort of film
<BR>coming out of the body that covers the shoulders and prevents the leads from
<BR>plating fully (the picture is on the page as well)...it's almost like some
<BR>sort of thin plastic sheet...or could it be an adhesive preform that bond the
<BR>two halves of the part together? (I don't have a clue how these parts are
<BR>made).
<BR>
<BR>Anyways, should I worry about these parts? There's some people here that's
<BR>worried about the exposed copper (here we go again...) and want to touch it
<BR>up. I feel that there really isn't a problem because it's so high up the lead
<BR>that it shouldn't hurt anything....if I were concerned about anything, it
<BR>would be about that stuff that is coming out the body of the part...
<BR>
<BR>The part seems to work fine, we ICT the boards, and do a ambient power-on
<BR>burn in for 24-hrs...everything is okie-dokie. This is a class-2 board by the
<BR>way.
<BR>
<BR>Thanks again, and have a lovely Monday...hehehe
<BR>
<BR>-Steve Gregory- </FONT></HTML>
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=========================================================================
Date: Wed, 1 Aug 2001 16:17:42 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Werner Engelmaier <[log in to unmask]>
Subject: Re: [LF] Eutectic alloys?????
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Hi,
I am not so sure that the automotive industry is at the forefront of
soldering technology--only 2 years ago one of the Detroit Big 3 had to recall
2 years worth of SUVs because 60/40 SJs on CEM-1 [!?] PCBs for the windshield
wiper controls under-the-hood failed well within the warranty period. CEM-1
not only grossly thermally expands, but swells on H2O-absorption, and the bad
housing design caused the PCBs to warp.
Werner Engelmaier
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Date: Wed, 1 Aug 2001 16:43:08 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Erickson, Gary" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Erickson, Gary" <[log in to unmask]>
Subject: Re: 0.5 mm pitch components and soldermask relief
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I wouldn't think that a 3 mil web of Taiyo mask would survive ENIG
processing either.
Must be HASL Finish that Tony is talking about.
Gary
-----Original Message-----
From: Thomas Bauer [mailto:[log in to unmask]]
Sent: Wednesday, August 01, 2001 4:30 PM
To: [log in to unmask]
Subject: Re: [TN] 0.5 mm pitch components and soldermask relief
Tony,
What type of finish are you using on the pcb? Gold? Silver? not HASL???
THOMAS
-----Original Message-----
From: Tony Steinke [mailto:[log in to unmask]]
Sent: Wednesday, August 01, 2001 12:49 PM
To: [log in to unmask]
Subject: Re: [TN] 0.5 mm pitch components and soldermask relief
Phil,
As far as holding small dams-we have just recently qualified an LPI from
Taiyo
that we were repeatedly capable of holding .003in. solder dam.
Tony Steinke
Circuit Technologies Inc.
----- Original Message -----
From: phil bavaro <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, August 01, 2001 12:15 PM
Subject: [TN] 0.5 mm pitch components and soldermask relief
> We are just starting our development of 0.5 mm pitch BGAs and I am hearing
> conflicting reports as to the approach we should take with respect to the
> soldermask relief around the solderball pads.
>
> First of all, the 0.5mm BGA is made up of pairs of pads in a perimeter
> layout, along with a larger perimeter also made up of pairs of pads.
There
> is also a ground block in the center. Basically it looks like two
> concentric windowframes with a large gap between the frames for routing.
>
> Historically we have always made our soldermask 1:1 with the pad size and
> then the pwb fabricators would swell the opening so that the soldermask
did
> not encroach upon the pad and make it a mask defined pad. That works fine
> for 1.0 and 1.27 mm pitch devices because there is still enough soldermask
> left to actually stick to the board.
>
> When we reduce the pitch down to 0.5 mm, the gap between and the
> registrations swelling, basically eliminates the thicker stripe of
> soldermask down to a very thin (and poor yielding) line which may or may
> not stick.
>
> This is the exact same problem we have always had with 0.5 mm QFPs and the
> solution was always to permit the pwb fabricator to window out the whole
> area between the fine pitch pads.
>
> So here is the question:
>
> If we open up the soldermask aperture so that it is something like .065mm
> away from the actual etched pad, doesn't that just reduce the
producibility
> of the board at the pwb house. The reason for specifying this tight
> requirement is speculated to be related to reliability but I'm not
> convinced yet.
>
> In reality very few of the pads are strictly etch defined round pads
> because many have surface conductors coming off of them which makes the
> pads a hybrid of etch and mask defined. The greater the relief of the
> soldermask, the more non-uniform the exposed metal pad will become.
>
> Because there is more surface to wet to, this has the effect of reducing
> solderball volume and we expect to see the diameter not the height change
> accordingly.
>
> My suggestion is to eliminate the soldermask wherever the tight pad to pad
> areas are so that for two round pads, the aperture would be a very wide
> oval shape. This also means that the routing away from the pads has to go
> to the outside away from the open soldermasked area.
>
> The intention here is minimize the enlargement of the pads with respect to
> wettable area and at the same time make the soldermask application process
> easier.
>
> Ironically it seems that 0201 pads can also follow this logic.
> Hopefully I've explained this in detail enough for everyone to understand.
>
> What does your land patterns guidelines when it comes to soldermask for
> fine pitch QFPs, BGAs, and 0201s?
>
> All inputs are appreciated.
>
> Phillip A. Bavaro
> QUALCO/\/\/\/\ Incorporated
> Engineer, Staff
> [log in to unmask]
> Pager (858) 271-3640
> Tel (858) 658-2542 Voice mail
> Cell (858) 845-9968 (workday)
> Cell (619) 602-8644 (offsite, after hours)
> Fax (858) 658-1584
>
> --------------------------------------------------------------------------
-------
> Technet Mail List provided as a free service by IPC using LISTSERV 1.8d
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> Please visit IPC web site (http://www.ipc.org/html/forum.htm) for
additional
> information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700
ext.5315
> --------------------------------------------------------------------------
-------
>
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<TITLE>RE: [TN] 0.5 mm pitch components and soldermask relief</TITLE>
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<P><FONT SIZE=2>I wouldn't think that a 3 mil web of Taiyo mask would survive ENIG processing either.</FONT>
<BR><FONT SIZE=2>Must be HASL Finish that Tony is talking about.</FONT>
</P>
<P><FONT SIZE=2>Gary</FONT>
</P>
<P><FONT SIZE=2>-----Original Message-----</FONT>
<BR><FONT SIZE=2>From: Thomas Bauer [<A HREF="mailto:[log in to unmask]">mailto:[log in to unmask]</A>]</FONT>
<BR><FONT SIZE=2>Sent: Wednesday, August 01, 2001 4:30 PM</FONT>
<BR><FONT SIZE=2>To: [log in to unmask]</FONT>
<BR><FONT SIZE=2>Subject: Re: [TN] 0.5 mm pitch components and soldermask relief</FONT>
</P>
<BR>
<P><FONT SIZE=2>Tony,</FONT>
<BR><FONT SIZE=2>What type of finish are you using on the pcb? Gold? Silver? not HASL???</FONT>
</P>
<P><FONT SIZE=2>THOMAS</FONT>
</P>
<BR>
<P><FONT SIZE=2>-----Original Message-----</FONT>
<BR><FONT SIZE=2>From: Tony Steinke [<A HREF="mailto:[log in to unmask]">mailto:[log in to unmask]</A>]</FONT>
<BR><FONT SIZE=2>Sent: Wednesday, August 01, 2001 12:49 PM</FONT>
<BR><FONT SIZE=2>To: [log in to unmask]</FONT>
<BR><FONT SIZE=2>Subject: Re: [TN] 0.5 mm pitch components and soldermask relief</FONT>
</P>
<BR>
<P><FONT SIZE=2>Phil,</FONT>
<BR><FONT SIZE=2>As far as holding small dams-we have just recently qualified an LPI from</FONT>
<BR><FONT SIZE=2>Taiyo</FONT>
<BR><FONT SIZE=2>that we were repeatedly capable of holding .003in. solder dam.</FONT>
<BR><FONT SIZE=2>Tony Steinke</FONT>
<BR><FONT SIZE=2>Circuit Technologies Inc.</FONT>
<BR><FONT SIZE=2>----- Original Message -----</FONT>
<BR><FONT SIZE=2>From: phil bavaro <[log in to unmask]></FONT>
<BR><FONT SIZE=2>To: <[log in to unmask]></FONT>
<BR><FONT SIZE=2>Sent: Wednesday, August 01, 2001 12:15 PM</FONT>
<BR><FONT SIZE=2>Subject: [TN] 0.5 mm pitch components and soldermask relief</FONT>
</P>
<BR>
<P><FONT SIZE=2>> We are just starting our development of 0.5 mm pitch BGAs and I am hearing</FONT>
<BR><FONT SIZE=2>> conflicting reports as to the approach we should take with respect to the</FONT>
<BR><FONT SIZE=2>> soldermask relief around the solderball pads.</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> First of all, the 0.5mm BGA is made up of pairs of pads in a perimeter</FONT>
<BR><FONT SIZE=2>> layout, along with a larger perimeter also made up of pairs of pads.</FONT>
<BR><FONT SIZE=2>There</FONT>
<BR><FONT SIZE=2>> is also a ground block in the center. Basically it looks like two</FONT>
<BR><FONT SIZE=2>> concentric windowframes with a large gap between the frames for routing.</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> Historically we have always made our soldermask 1:1 with the pad size and</FONT>
<BR><FONT SIZE=2>> then the pwb fabricators would swell the opening so that the soldermask</FONT>
<BR><FONT SIZE=2>did</FONT>
<BR><FONT SIZE=2>> not encroach upon the pad and make it a mask defined pad. That works fine</FONT>
<BR><FONT SIZE=2>> for 1.0 and 1.27 mm pitch devices because there is still enough soldermask</FONT>
<BR><FONT SIZE=2>> left to actually stick to the board.</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> When we reduce the pitch down to 0.5 mm, the gap between and the</FONT>
<BR><FONT SIZE=2>> registrations swelling, basically eliminates the thicker stripe of</FONT>
<BR><FONT SIZE=2>> soldermask down to a very thin (and poor yielding) line which may or may</FONT>
<BR><FONT SIZE=2>> not stick.</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> This is the exact same problem we have always had with 0.5 mm QFPs and the</FONT>
<BR><FONT SIZE=2>> solution was always to permit the pwb fabricator to window out the whole</FONT>
<BR><FONT SIZE=2>> area between the fine pitch pads.</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> So here is the question:</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> If we open up the soldermask aperture so that it is something like .065mm</FONT>
<BR><FONT SIZE=2>> away from the actual etched pad, doesn't that just reduce the</FONT>
<BR><FONT SIZE=2>producibility</FONT>
<BR><FONT SIZE=2>> of the board at the pwb house. The reason for specifying this tight</FONT>
<BR><FONT SIZE=2>> requirement is speculated to be related to reliability but I'm not</FONT>
<BR><FONT SIZE=2>> convinced yet.</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> In reality very few of the pads are strictly etch defined round pads</FONT>
<BR><FONT SIZE=2>> because many have surface conductors coming off of them which makes the</FONT>
<BR><FONT SIZE=2>> pads a hybrid of etch and mask defined. The greater the relief of the</FONT>
<BR><FONT SIZE=2>> soldermask, the more non-uniform the exposed metal pad will become.</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> Because there is more surface to wet to, this has the effect of reducing</FONT>
<BR><FONT SIZE=2>> solderball volume and we expect to see the diameter not the height change</FONT>
<BR><FONT SIZE=2>> accordingly.</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> My suggestion is to eliminate the soldermask wherever the tight pad to pad</FONT>
<BR><FONT SIZE=2>> areas are so that for two round pads, the aperture would be a very wide</FONT>
<BR><FONT SIZE=2>> oval shape. This also means that the routing away from the pads has to go</FONT>
<BR><FONT SIZE=2>> to the outside away from the open soldermasked area.</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> The intention here is minimize the enlargement of the pads with respect to</FONT>
<BR><FONT SIZE=2>> wettable area and at the same time make the soldermask application process</FONT>
<BR><FONT SIZE=2>> easier.</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> Ironically it seems that 0201 pads can also follow this logic.</FONT>
<BR><FONT SIZE=2>> Hopefully I've explained this in detail enough for everyone to understand.</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> What does your land patterns guidelines when it comes to soldermask for</FONT>
<BR><FONT SIZE=2>> fine pitch QFPs, BGAs, and 0201s?</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> All inputs are appreciated.</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> Phillip A. Bavaro</FONT>
<BR><FONT SIZE=2>> QUALCO/\/\/\/\ Incorporated</FONT>
<BR><FONT SIZE=2>> Engineer, Staff</FONT>
<BR><FONT SIZE=2>> [log in to unmask]</FONT>
<BR><FONT SIZE=2>> Pager (858) 271-3640</FONT>
<BR><FONT SIZE=2>> Tel (858) 658-2542 Voice mail</FONT>
<BR><FONT SIZE=2>> Cell (858) 845-9968 (workday)</FONT>
<BR><FONT SIZE=2>> Cell (619) 602-8644 (offsite, after hours)</FONT>
<BR><FONT SIZE=2>> Fax (858) 658-1584</FONT>
<BR><FONT SIZE=2>></FONT>
<BR><FONT SIZE=2>> --------------------------------------------------------------------------</FONT>
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Date: Wed, 1 Aug 2001 15:49:24 -0400
Reply-To: Tony Steinke <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Tony Steinke <[log in to unmask]>
Subject: Re: 0.5 mm pitch components and soldermask relief
MIME-Version: 1.0
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Phil,
As far as holding small dams-we have just recently qualified an LPI from
Taiyo
that we were repeatedly capable of holding .003in. solder dam.
Tony Steinke
Circuit Technologies Inc.
----- Original Message -----
From: phil bavaro <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, August 01, 2001 12:15 PM
Subject: [TN] 0.5 mm pitch components and soldermask relief
> We are just starting our development of 0.5 mm pitch BGAs and I am hearing
> conflicting reports as to the approach we should take with respect to the
> soldermask relief around the solderball pads.
>
> First of all, the 0.5mm BGA is made up of pairs of pads in a perimeter
> layout, along with a larger perimeter also made up of pairs of pads.
There
> is also a ground block in the center. Basically it looks like two
> concentric windowframes with a large gap between the frames for routing.
>
> Historically we have always made our soldermask 1:1 with the pad size and
> then the pwb fabricators would swell the opening so that the soldermask
did
> not encroach upon the pad and make it a mask defined pad. That works fine
> for 1.0 and 1.27 mm pitch devices because there is still enough soldermask
> left to actually stick to the board.
>
> When we reduce the pitch down to 0.5 mm, the gap between and the
> registrations swelling, basically eliminates the thicker stripe of
> soldermask down to a very thin (and poor yielding) line which may or may
> not stick.
>
> This is the exact same problem we have always had with 0.5 mm QFPs and the
> solution was always to permit the pwb fabricator to window out the whole
> area between the fine pitch pads.
>
> So here is the question:
>
> If we open up the soldermask aperture so that it is something like .065mm
> away from the actual etched pad, doesn't that just reduce the
producibility
> of the board at the pwb house. The reason for specifying this tight
> requirement is speculated to be related to reliability but I'm not
> convinced yet.
>
> In reality very few of the pads are strictly etch defined round pads
> because many have surface conductors coming off of them which makes the
> pads a hybrid of etch and mask defined. The greater the relief of the
> soldermask, the more non-uniform the exposed metal pad will become.
>
> Because there is more surface to wet to, this has the effect of reducing
> solderball volume and we expect to see the diameter not the height change
> accordingly.
>
> My suggestion is to eliminate the soldermask wherever the tight pad to pad
> areas are so that for two round pads, the aperture would be a very wide
> oval shape. This also means that the routing away from the pads has to go
> to the outside away from the open soldermasked area.
>
> The intention here is minimize the enlargement of the pads with respect to
> wettable area and at the same time make the soldermask application process
> easier.
>
> Ironically it seems that 0201 pads can also follow this logic.
> Hopefully I've explained this in detail enough for everyone to understand.
>
> What does your land patterns guidelines when it comes to soldermask for
> fine pitch QFPs, BGAs, and 0201s?
>
> All inputs are appreciated.
>
> Phillip A. Bavaro
> QUALCO/\/\/\/\ Incorporated
> Engineer, Staff
> [log in to unmask]
> Pager (858) 271-3640
> Tel (858) 658-2542 Voice mail
> Cell (858) 845-9968 (workday)
> Cell (619) 602-8644 (offsite, after hours)
> Fax (858) 658-1584
>
> --------------------------------------------------------------------------
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Date: Fri, 20 Jul 2001 14:52:44 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Larry Tawyea <[log in to unmask]>
Subject: Re: Cooling Rates
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_23.ea704a0.2889d7fc_boundary"
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In a message dated 6/28/01 6:39:56 AM Central Daylight Time,
[log in to unmask] writes:
I not sure about the cooling rate for Silicon but I will bet you that if you
have any plastic IC's on the PCB they are sure to not like that profile.
Larry Tawyea
> Hello Guys,
>
> What is the best cooling down rate in a reflow oven?
> Does anybody have experience on what maximum cooling down rate
> that will not result in Silicon cracking?
> We have some silicon cracking (Chips) and we are still evaluating
> if fast cool down can cause this problem.
> My Profile is:
> Pre-heat: 150 C
> Soak: 250 C
> Reflow 1: 290 C
> Reflow 2: 290 C
> Time of Reflow: 180 secs
>
> Thank you very much in advance for your ideas tomorrow
>
--part1_23.ea704a0.2889d7fc_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>In a message dated 6/28/01 6:39:56 AM Central Daylight Time,
<BR>[log in to unmask] writes:
<BR>
<BR>I not sure about the cooling rate for Silicon but I will bet you that if you
<BR>have any plastic IC's on the PCB they are sure to not like that profile.
<BR>
<BR>Larry Tawyea
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Hello Guys,
<BR>
<BR>What is the best cooling down rate in a reflow oven?
<BR>Does anybody have experience on what maximum cooling down rate
<BR>that will not result in Silicon cracking?
<BR>We have some silicon cracking (Chips) and we are still evaluating
<BR>if fast cool down can cause this problem.
<BR>My Profile is:
<BR>Pre-heat: 150 C
<BR>Soak: 250 C
<BR>Reflow 1: 290 C
<BR>Reflow 2: 290 C
<BR>Time of Reflow: 180 secs
<BR>
<BR>Thank you very much in advance for your ideas tomorrow
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
--part1_23.ea704a0.2889d7fc_boundary--
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Date: Fri, 20 Jul 2001 10:19:07 -0400
Reply-To: Ed Valentine <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ed Valentine <[log in to unmask]>
Organization: Electronics Manufacturing Solutions
Subject: Re: In-line process
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_0018_01C11105.68C16CE0"
This is a multi-part message in MIME format.
------=_NextPart_000_0018_01C11105.68C16CE0
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
You may want to consider options other than a straight line.
Ed Valentine
Electronics Manufacturing Solutions
8612 Mourning Dove Road, Raleigh, NC 27615
Phone: (919) 270-5145, Fax: (919) 847-9971
Email: [log in to unmask]
Website: http://www.ems-consulting.com
----- Original Message -----=20
From: Van Hoang Dinh=20
To: [log in to unmask]
Sent: Friday, July 20, 2001 12:55 AM
Subject: [TN] In-line process
Hi TechNet,
We are going to implement IN-LINE process. Any recommends or ideas =
would help for me.
Thanks In Advance
Van
------=_NextPart_000_0018_01C11105.68C16CE0
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 5.50.4611.1300" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>You may want to consider options other =
than a=20
straight line.</FONT></DIV>
<DIV><BR>Ed Valentine<BR>Electronics Manufacturing Solutions<BR>8612 =
Mourning=20
Dove Road, Raleigh, NC 27615<BR>Phone: (919) 270-5145, Fax: (919)=20
847-9971<BR>Email: <A=20
href=3D"mailto:[log in to unmask]">[log in to unmask]
om</A><BR>Website:=20
<A=20
href=3D"http://www.ems-consulting.com">http://www.ems-consulting.com</A><=
BR></DIV>
<BLOCKQUOTE dir=3Dltr=20
style=3D"PADDING-RIGHT: 0px; PADDING-LEFT: 5px; MARGIN-LEFT: 5px; =
BORDER-LEFT: #000000 2px solid; MARGIN-RIGHT: 0px">
<DIV style=3D"FONT: 10pt arial">----- Original Message ----- </DIV>
<DIV=20
style=3D"BACKGROUND: #e4e4e4; FONT: 10pt arial; font-color: =
black"><B>From:</B>=20
<A [log in to unmask] href=3D"mailto:[log in to unmask]">Van =
Hoang Dinh</A>=20
</DIV>
<DIV style=3D"FONT: 10pt arial"><B>To:</B> <A [log in to unmask]
href=3D"mailto:[log in to unmask]">[log in to unmask]</A> </DIV>
<DIV style=3D"FONT: 10pt arial"><B>Sent:</B> Friday, July 20, 2001 =
12:55=20
AM</DIV>
<DIV style=3D"FONT: 10pt arial"><B>Subject:</B> [TN] In-line =
process</DIV>
<DIV><BR></DIV>
<DIV><FONT size=3D2>Hi TechNet,</FONT></DIV>
<DIV><FONT size=3D2>We are going to implement IN-LINE process. Any =
recommends or=20
ideas would help for me.</FONT></DIV>
<DIV><FONT size=3D2>Thanks In Advance</FONT></DIV>
<DIV><FONT size=3D2>Van</FONT></DIV></BLOCKQUOTE></BODY></HTML>
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Date: Mon, 13 Aug 2001 15:32:34 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Crepeau, Phil" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crepeau, Phil" <[log in to unmask]>
Subject: Re: Off-Topic - coatings for airplane-home
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
hi,
i've seen articles about you weird people in wobeoregon doing this. why not ask somebody up there that has already done this? kapton makes a pretty good tape, but not much as a coating.
why not use a catlyzed polyurethane coating which is what the military uses to paint their non-stealthy aircraft? you should know, however, that this will cause an unacceptable number of trees and wildlife (including humans)to expire.
why not ditch the 727 and build a sod hut?
phil
-----Original Message-----
From: Carl VanWormer [mailto:[log in to unmask]]
Sent: Monday, August 13, 2001 2:59 PM
To: [log in to unmask]
Subject: [TN] Off-Topic - coatings for airplane-home
Definitely off-topic, but interesting . . .
I have a friend who is making his new home out of a 727 airplane (see
www.AirplaneHome.com <http://www.AirplaneHome.com> for details). He is
investigating coatings he might use to "paint the house", and has rejected
his first choice (Kapton) when he found that it deteriorates when exposed to
UV and Oxygen (I think that was what it was). Since I've seen some amazing
insights shared on this group, I thought I'd dangle this challenge in front
of the group to see what happens . . . Any (and all) suggestions will be
appreciated and investigated. Please let me know of your suggestions and
I'll forward them to him.
Thanks
Carl Van Wormer
Cipher Systems
1815 NW 169th Place, Suite 5010
Beaverton, OR 97006
Phone (503)-617-7447 Fax (503)-617-6550
p.s. here's a snippet from my last contact with the airplane/home owner:
Hot dog, thanks very much. I've always been very fond of RTVs - they seem
more stable than any conventional paint, or any other coating short of
Teflon. I've never in my life seen any evidence of any form of
deterioration
of RTVs, and they've been around since I was a kid. I've always thought
they'd make a great roof coating for my mobile home (back when maintenance
of
the structure would've been justified) or the freight vans.
The timing is quite good too in that I've been thinking about coatings
again.
I've been pressure washing again in the last few days, and I've noted that,
while the color coats often flake off, the chromates don't, although they
can
bleed off. That is, the chromates seem to form a chemical bond with the
aluminum, whereas the paint just forms an adhesive bond, which, like all
adhesive bonds, is unreliable. When the pressurized water is forced onto
the
chromate at its most aggressive (with the wand within a cm or two of the
surface), the chromate sometimes get fainter and fainter as if they're being
abraded off. But they never peel. That's impressive.
And that's what I'd like in a coating - a true chemical bond, so that it's
literally part of the metal, not just a layer over the metal. Well, that,
plus absolute immunity to UV, chemical weathering, and every other factor
that makes a coating just plain perfect.
Teflon's been on my mind too. It's extremely stable of course. But I'm not
sure what the nature of it's bond is, or what the economics are - I need to
look into it.
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Date: Fri, 20 Jul 2001 07:35:18 -0700
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Ahne Oosterhof <[log in to unmask]>
Subject: Re: Gerber specification
In-Reply-To: <3.0.3.32.20010719103705.01e28b08@orion>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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The Gerber specification is now owned by:
Barco ETS
30 South Satellite Road, South Windsor, CT 06074
Tel. ++ 1 860 291 7000 Fax ++ 1 860 291 7021
They have (had??) a printed document (The Gerber Format Guide) which was
available under part number 414-100-002 when this was part of Gerber Systems
Corp.
The now also have published a new version of this document on the web:
http://www.barco.be/ets/data/rs274xc.pdf
(and that is still there).
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Dee Stover
Sent: Thursday, July 19, 2001 10:37
To: [log in to unmask]
Subject: [TN] Gerber specification
I need to find the specifications of gerber language, would any of you know
where I can get that information.
TIA
Dee Stover [log in to unmask]
Associate Technician Design
National Optical Astronomy Observatory
950 N Cherry Ave
Tucson, AZ 85719
520-318-8489
FAX 520-318-8303
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Date: Mon, 13 Aug 2001 16:20:40 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Creswick, Steven" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Creswick, Steven" <[log in to unmask]>
Subject: Back-side Device Metallization
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Technetters,
I ran into an interesting item the other day that I would appreciate a
sanity check on. I realize that this is a rather oblique question for this
forum, but there are other (silent) hybrid types out there (I believe).
Most of the bare silicon die that I have used in the past have either been
grey-backed (bare silicon), gold-silicon (eutectic), or chrome-nickel-silver
(power mosfets).
I have recently encountered a supplier that uses aluminum (alloyed) for
back-side contact of generic, none speciallized, silicon devices. Has
anyone else encountered this as well? If so, have you observed any contact
resistance problems when used with normal silver-filled conductive
adhesives?
It makes sense that it would form an ohmic contact to the back-side of the
wafer - just never ran into an aluminum metallized back-side before....
.. Just wanted to know if my head has been .... in the sand. (Will post on
ChipNet as well)
Thanks
Steve Creswick - Gentex
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Date: Wed, 15 Aug 2001 09:21:12 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Lou Hart <[log in to unmask]>
Subject: Re: Solder analysis results
Any comment on Steve's stratification theory? A few years back I had SPC
charts at a HASL pot at a PC fab, with analysis every two weeks. Cu
content stayed 0.21% to 0.24% over a period of 1+ years, even though all we
were doing was skimming stuff off the top. Lou Hart
-----Original Message-----
From: Stephen R. Gregory [SMTP:[log in to unmask]]
Sent: Tuesday, August 14, 2001 10:04 PM
To: [log in to unmask]
Subject: Re: [TN] Solder analysis results
Dave,
Surely, not ALL 1700-lbs.? Wooo-doggies! I can only imagine what a task
that
would be!!! I've read some stuff that if you keep the pot static, and keep
it
at a stable temperature for a period (what this really is, I don't
know...there's varying opinions), the metals will seek their own level
(according to the different opinions, the copper will be towards the top),
then you scoop out out the top layer, and replenish what you've removed
with
fresh bars.
The question that I have though, how did the pot get so out of balance with
copper? I've never had a problem with copper content, even when waving OSP
boards...tin levels dropping, yes. But not excessive copper...somebody
throw
some pennies in the pot?
-Steve Gregory-
> RJ Klien Wassink suggests [bible p 169] pouring contaminated solder at
about
> 190°C through a 20 mesh stainless steel stariner to reduce copper content
to
> 0.25%.
>
> Dave Fish
>
<< File: ATT00002.htm >>
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Date: Wed, 15 Aug 2001 08:35:07 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: Cleanliness evaluation!
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Whilst I wholeheartedly concur with what Doug stated, I do not agree for
the
need for Ion Chromatography (IC) testing.
*WHAT?!!!! LIGHT THE TORCHES, BURN THE HERETIC....... (he turned me into
a newt....I got better...)
I must disagree with your disagreement.
Iain, if you run a correct SIR test regime on your proper proposed
production process, and you have acceptable results, then you can feel
comfortable that you will have a reliable end product. If you have failures
in this test, then you need IC to find out precisely what is present on the
surface that may be causing your problem. Yes you should then use ionic
extract testing (SEC/ROSE) to keep an eye on your process conditions - but
make no attempt to correlate SIR with SEC/ROSE results.
*Graham brings up a valid point that there is more than one tool for
assessing cleanliness or quality, but I don't know that SIR would be any
better than IC at this point. For both tests, you need someone to help you
interpret the numbers. Having the information that your assemblies have
2.7 ppm of chloride doesn't do much good unless you know if that is a good
or bad number. Having the information that your process yields a mean SIR
level of 283 megohms on a B-24 doesn't mean much unless you can relate to
product. The advantage of SIR is that of these two tests, it is better at
showing if residues have a propensity for electrochemical failures
(leakage, corrosion, metal migration), but you still have to do more
extensive correlation studies on actual product to know whether the values
from that lab test relate to product life in the field. Then you have to
also do a correlation study with ROSE/SEC to see what levels to use as a
target and upper control limit. An additional disadvantage of SIR is that
it is a long test. Brian Ellis wrote a paper a few years ago that long
term SIR testing could be cut down to an 8 hour test, but that is still
much longer than a 2 hour IC test. Difficult to do as a process control
measure. I have found it easier to correlate IC results with SEC/ROSE than
with SIR.
*You know, I find it really weird that after being and SIR champion for so
long, I argue against it here. I guess the point being that if you are
going to use ROSE/SEC as a process monitoring tool, which several companies
do successfully, you have to do extensive correlation studies between
product life testing (dozens of ways to do it) and any quality control
measures you implement. You have to know what your monitoring signal means
in order to properly set the target and upper control limits. Most
existing ROSE/SEC levels in specifications are both antiquated and bogus.
I would suggest that you retain the use of SIR equipment as a
process/quality monitor. Taking sample coupons at each stage of the
production process and running short tests will (probably) give you the
necessary indicators if the process or process materials are changing.
*This is possible, but I would say that you need a more focused test coupon
than the B-24 and one that is fabricated with your set of materials.
Additional cost in doing this, but the data is more relevant. Maybe use
the **fanfare** CONCOAT TEST COUPON!!!! (Look, up in the sky, its a bird,
its a plane...)
To ensure that you have used the correct test protocol, I assume that you
took on board the recommendations as published by the EU project partners
NPL, Siemens, NMRC and Lares Cozzi. If anyone wants a copy of this work,
let
me know.
*What a clever way to do some academic spamming <grin>. Sayyyyyyy, wasn't
that the work where the particpants used **fanfare** THE CONCOAT AUTOSIR?
(Notice how I very slyly slip in some gratuitous advertising for my friend
across the pond. Ain't I clever?).
*Graham refers to a consortia activity going on for the last three years or
so looking at continous monitoring SIR vs. various flux and processing
conditions. I wasn't aware that this was a published report yet. I have
invited Dr. Chris Hunt of NPL in the UK to give a presentation on this work
at the SIR task group meeting at the Fall IPC meeting.
By the way, running IPC-TM-650 did they test to Appendix D of J-STD001 (or
is it now B? Doug??) or did they run to 6.2.3. or 6.2.3.3? What was the
coupon they used? What was the pitch/width they used? What was the test
voltage used?
*I'm sure Graham means methods 2.6.3 (cyclical environment) and 2.6.3.3
(static environment). The SIR protocol that Graham refers to was found in
Appendix D of J-STD-001, Revisions A and B. Revision C is now the current
version and the protocol is now Appendix B (lost two appendices somewhere).
*Graham, in his last two sentences brings up another good point - there are
so many possible choices in an SIR test (or IC test for that matter), that
you really need a guide in selecting the best factors for any particular
situation. And where would you FIND such experts? Why, at the upcoming
Fall IPC meeting in Orlando, Florida. (notice the sly advertising for the
IPC...) Usually you can get a few of them to guide you along if ya buy the
beer (well, at least ONE such expert I know of...).
Doug Pauls
Rockwell Collins
(Well into his third Mountain Dew of the day)
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Date: Thu, 16 Aug 2001 17:16:14 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dean Lillibridge <[log in to unmask]>
Subject: Re: To wave or not to wave, that is the question...
In-Reply-To: <[log in to unmask]>
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We've done several different assys (board sizes and complexities) using
0805's on side 2. We have used a 2nd side adhesive step and cure prior to
hand assembly insertion and Dover Soltec Wave soldering. I will contact our
process engineer to dig up solder wave profiles, adhesive spec, and cure
times tomorrow and I will send them your way. --Dean Lillibridge
NEWvENTURE TECHNOLOGIES
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Kevin Stokes
Sent: Thursday, August 16, 2001 4:26 PM
To: [log in to unmask]
Subject: [TN] To wave or not to wave, that is the question...
Old problem: mounting ceramic capacitors to the bottom side of an
assembly and your customer wants you to wave them on.
We are having problems with 0805 0.22 uF and 0.1 uF caps going through
wave and cracking during the process. We are following all of the standard
protocols (preheat, etc.). My understanding is that 0805s are typically
capable of handling this process.
Anyone got any ideas short of moving the cap to the top or doing a
double sided reflow?
Kevin
Kevin Stokes
Reliability Manager
Kimball Electronics Group
(812) 634-4207
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<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
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<TITLE>To wave or not to wave, that is the question...</TITLE>
<META content=3D'"MSHTML 4.72.3110.7"' name=3DGENERATOR>
</HEAD>
<BODY>
<DIV><SPAN class=3D865081121-16082001><FONT color=3D#0000ff face=3DArial =
size=3D2>We've=20
done several different assys (board sizes and complexities) using 0805's =
on side=20
2. We have used a 2nd side adhesive step and cure prior to hand =
assembly=20
insertion and Dover Soltec Wave soldering. I will contact our =
process=20
engineer to dig up solder wave profiles, adhesive spec, and cure times =
tomorrow=20
and I will send them your way. --Dean =
Lillibridge</FONT></SPAN></DIV>
<DIV><SPAN class=3D865081121-16082001><FONT color=3D#0000ff face=3DArial =
size=3D2> &nbs=
p;  =
; =
&=
nbsp; &n=
bsp; &nb=
sp; &nbs=
p;  =
; =
&=
nbsp; =20
NEWvENTURE TECHNOLOGIES</FONT></SPAN></DIV>
<DIV><SPAN class=3D865081121-16082001><FONT color=3D#0000ff face=3DArial =
size=3D2> </FONT></SPAN></DIV>
<BLOCKQUOTE>
<DIV class=3DOutlookMessageHeader><FONT face=3D"Times New Roman"=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet [<A=20
href=3D"mailto:[log in to unmask]">mailto:[log in to unmask]</A>]<B>On =
Behalf Of</B>=20
Kevin Stokes<BR><B>Sent:</B> Thursday, August 16, 2001 4:26 =
PM<BR><B>To:</B>=20
<A =
href=3D"mailto:[log in to unmask]">[log in to unmask]</A><BR><B>Subject:</B> =
[TN]=20
To wave or not to wave, that is the question...<BR><BR></FONT></DIV>
<P><FONT face=3DArial size=3D2>Old problem: mounting ceramic =
capacitors to the=20
bottom side of an assembly and your customer wants you to wave them=20
on.</FONT> </P>
<P><FONT face=3DArial size=3D2>We are having problems with 0805 0.22 =
uF and 0.1=20
uF caps going through wave and cracking during the process. We =
are=20
following all of the standard protocols (preheat, etc.). My=20
understanding is that 0805s are typically capable of handling this=20
process.</FONT></P>
<P><FONT face=3DArial size=3D2>Anyone got any ideas short of moving =
the cap to=20
the top or doing a double sided reflow?</FONT> <BR><BR><FONT =
face=3DArial=20
size=3D2>Kevin</FONT> </P>
<P><I><FONT color=3D#000080 face=3D"News Gothic MT">Kevin =
Stokes</FONT></I>=20
<BR><FONT face=3DArial size=3D2>Reliability Manager</FONT> <BR><FONT =
face=3DArial=20
size=3D2>Kimball Electronics Group</FONT> <BR><FONT face=3DArial =
size=3D2>(812)=20
634-4207</FONT> </P></BLOCKQUOTE></BODY></HTML>
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Date: Wed, 15 Aug 2001 11:45:39 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "James W. High" <[log in to unmask]>
Subject: photoplotting service
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Technetters,
I am in search of a photoplotting service that can plot larger than 36",
with good service and reasonable pricing. Geographical location is not
important.
Thanks
James W. High
NASA Langley Research Center
Mail Stop 390
Hampton, VA 23681-2199
757-864-5416 (Phone)
757-864-8092 (Fax)
Email: [log in to unmask]
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Date: Wed, 15 Aug 2001 18:59:44 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: Dewetting
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Grant
This is controversial. Dewetting is caused by myriad non-wettable areas,
most commonly because abrasive particles are implanted in the metal.
IMHO, this means that intermetallic formation is discontinuous and the
joint will be weaker. Whether the loss of strength is important or not
is more academic than real life, but my view is that everything should
be done to maximise strength. Also, if you permit it, where do you start
to draw the line?
Brian
Grant Emandien wrote:
>
> Hi all,
>
> Brian, thanks for your earlier comments.
>
> If a portion of a pad shows evidence of dewetting (some dewetted pad areas
> appear to show base metal) and the solder joint looks good (nice shiny
> fillets), is there reason for concern that these joints may fail at
> temperature excursions (-40°C to +60°C)?
>
> Thanks in advance for responses.
> Grant
>
> **********************************************************************
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Date: Fri, 20 Jul 2001 13:18:06 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jorge Rodriguez <[log in to unmask]>
Subject: Re: X-Ray Laminography Test
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Technetters,
> I am looking for a lab that provides X-Ray Laminography services. I need
> to evaluate the solder joints on some BGAs and I was wondering what would
> give a complete 3D analysis of the solder joint. Is there any lab that
> provides Laminography services? My company is located in Phoenix, Arizona.
> Any information would be appreciated.
>
> Jorge Rodriguez
> Process Engineer
> Varian, Inc.
>
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Date: Tue, 14 Aug 2001 08:55:19 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: JinSee Goh <[log in to unmask]>
Subject: Additive Trace Repair
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Hi Technetters,
Instead of using Jumper wires, I'm looking into the additive trace method
(including etch deletes). Is anyone out there in this business or knows of
anyone who is in this business?
I am not looking for manual repair service providers but am looking for
automated repairs with high turnaround. I would also prefer if the service
provider is in Asia. Thanks.
Rgds,
JS
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<TITLE>Additive Trace Repair </TITLE>
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<P><FONT SIZE=3D2>Hi Technetters,</FONT>
<BR><FONT SIZE=3D2>Instead of using Jumper wires, I'm looking into the =
additive trace method (including etch deletes). Is anyone out there in =
this business or knows of anyone who is in this business? </FONT></P>
<P><FONT SIZE=3D2>I am not looking for manual repair service providers =
but am looking for automated repairs with high turnaround. I would also =
prefer if the service provider is in Asia. Thanks.</FONT></P>
<P><FONT SIZE=3D2>Rgds,</FONT>
<BR><FONT SIZE=3D2>JS</FONT>
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Date: Mon, 13 Aug 2001 20:57:38 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: Off-Topic - coatings for airplane-home
MIME-Version: 1.0
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Hi Carl!
I will agree that this is off-topic, and I must say is interesting!
I'm trying to imagine what effort it is taking for your freind to convert a
727 into a home, it really is something...I've read through a lot of his
progress reports, but not all, but I found the FAQ at his page most
informative as to why he is doing something like this...I must say, he does
point out some good reasons for this.
Although there may be some snickers at his efforts, there are have been, and
are, unusual homes built by others. One such is the "Beer Can House" check it
out at:
http://www.hgtv.com/HGTV/project/0,1158,BDRE_project_1113,FF.html
Sounds like you would need to get a bunch of buddies together for one
MARATHON party for that...hehehe.
Another is the Missile Silo Houses, go to: http://www.missilebases.com/
Here you can have 18,000 sq. ft. of space to model to your desires. Just hope
that any country that has ICBM's have updated the targeting data for their
missiles to these sites as being residential areas...and NOT functional ICBM
sites...
As to the dilemma of what to "paint" the aircraft with...the best thing to do
with aluminum (which is undoubtably what the skin is made of) anodizing
provides the best finish. But we can't very well make a tank big enough to
anodize the whole bloody aircraft, and I'm sure we don't want to take the
plane apart piece-by-piece to do that.
Another consideration to think about is how any finish is going to be
applied. This I assume is going to be done on the site, out in the open,
without the benefit of a Hanger that will sheild the aircraft from the
elements.
>From my Navy days as a aircraft structural mechanic, we used to do our
corrosion inspections on T-28's in South Texas humidity, on the flight lines
sometimes, and use a Zinc Chromate primer, with a polyurethane final
coat...not the most enviromentally freindly finishes. But that's what we
used...
This isn't gonna be a easy one for your freind...and from what I know, there
is always going to be some maintenance of the finish down the line...
Cheers,
-Steve Gregory-
> Definitely off-topic, but interesting . . .
>
> I have a friend who is making his new home out of a 727 airplane (see
> www.AirplaneHome.com <http://www.AirplaneHome.com> for details). He is
> investigating coatings he might use to "paint the house", and has rejected
> his first choice (Kapton) when he found that it deteriorates when exposed to
> UV and Oxygen (I think that was what it was). Since I've seen some amazing
> insights shared on this group, I thought I'd dangle this challenge in front
> of the group to see what happens . . . Any (and all) suggestions will be
> appreciated and investigated. Please let me know of your suggestions and
> I'll forward them to him.
>
> Thanks
>
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Carl!
<BR>
<BR>I will agree that this is off-topic, and I must say is interesting!
<BR>
<BR>I'm trying to imagine what effort it is taking for your freind to convert a
<BR>727 into a home, it really is something...I've read through a lot of his
<BR>progress reports, but not all, but I found the FAQ at his page most
<BR>informative as to why he is doing something like this...I must say, he does
<BR>point out some good reasons for this.
<BR>
<BR>Although there may be some snickers at his efforts, there are have been, and
<BR>are, unusual homes built by others. One such is the "Beer Can House" check it
<BR>out at:
<BR>
<BR>http://www.hgtv.com/HGTV/project/0,1158,BDRE_project_1113,FF.html
<BR>
<BR>Sounds like you would need to get a bunch of buddies together for one
<BR>MARATHON party for that...hehehe.
<BR>
<BR>Another is the Missile Silo Houses, go to: http://www.missilebases.com/
<BR>
<BR>Here you can have 18,000 sq. ft. of space to model to your desires. Just hope
<BR>that any country that has ICBM's have updated the targeting data for their
<BR>missiles to these sites as being residential areas...and NOT functional ICBM
<BR>sites...
<BR>
<BR>As to the dilemma of what to "paint" the aircraft with...the best thing to do
<BR>with aluminum (which is undoubtably what the skin is made of) anodizing
<BR>provides the best finish. But we can't very well make a tank big enough to
<BR>anodize the whole bloody aircraft, and I'm sure we don't want to take the
<BR>plane apart piece-by-piece to do that.
<BR>
<BR>Another consideration to think about is how any finish is going to be
<BR>applied. This I assume is going to be done on the site, out in the open,
<BR>without the benefit of a Hanger that will sheild the aircraft from the
<BR>elements.
<BR>
<BR>From my Navy days as a aircraft structural mechanic, we used to do our
<BR>corrosion inspections on T-28's in South Texas humidity, on the flight lines
<BR>sometimes, and use a Zinc Chromate primer, with a polyurethane final
<BR>coat...not the most enviromentally freindly finishes. But that's what we
<BR>used...
<BR>
<BR>This isn't gonna be a easy one for your freind...and from what I know, there
<BR>is always going to be some maintenance of the finish down the line...
<BR>
<BR>Cheers,
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Definitely off-topic, but interesting . . .
<BR>
<BR>I have a friend who is making his new home out of a 727 airplane (see
<BR>www.AirplaneHome.com <http://www.AirplaneHome.com> for details). He is
<BR>investigating coatings he might use to "paint the house", and has rejected
<BR>his first choice (Kapton) when he found that it deteriorates when exposed to
<BR>UV and Oxygen (I think that was what it was). Since I've seen some amazing
<BR>insights shared on this group, I thought I'd dangle this challenge in front
<BR>of the group to see what happens . . . Any (and all) suggestions will be
<BR>appreciated and investigated. Please let me know of your suggestions and
<BR>I'll forward them to him.
<BR>
<BR>Thanks
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
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Date: Mon, 13 Aug 2001 21:16:51 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "<Rudy Sedlak>" <[log in to unmask]>
Subject: Re: Flip Chip flex circuit
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>From what I have heard, putting Electroless Ni/Imm Gold on flex can be an
interesting challenge in getting it to plate where you want ONLY...
Has anyone else heard this?
Rudy Sedlak
RD Chemical Company
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Date: Thu, 2 Aug 2001 01:01:11 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Heinz Mader <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Heinz Mader <[log in to unmask]>
Subject: Heinz Mader/NMADEH/CH/Ascom ist außer Haus.
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Ich werde ab 30.07.2001 nicht im Büro sein. Ich kehre zurück am
10.08.2001.
Ich werde Ihre Nachricht nach meiner Rückkehr beantworten.
Bei Problemen Hugo Piller oder Bernhard Schaeren
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Date: Tue, 14 Aug 2001 21:31:59 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Fish <[log in to unmask]>
Subject: Re: Solder analysis results
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RJ Klien Wassink suggests [bible p 169] pouring contaminated solder at about
190°C through a 20 mesh stainless steel stariner to reduce copper content to
0.25%.
Dave Fish
----- Original Message -----
From: "Phil Nutting" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Tuesday, August 14, 2001 5:48 AM
Subject: [TN] Solder analysis results
> Ok folks, here is today's question.
>
> I just received a Certificate of Analysis (our first one) for the solder
> in our Soltec Waver Solder machine. All parameters are "within
> specification" except the percentage of copper which is at 1.6859. (Tin
> is at 61.3% and Lead is at 36.99% and other stuff is at 0.0199%) We run
> 63/37 in the wave. We only solder our own product, none of which goes
> into "mission critical" applications. We normally build our product to
> IPC-A-610C, Class 2.
>
> My question is two-fold. Should I worry about this? If so, how do I
> fix it with 1700 pounds of solder in the solder pot?
>
> Thanks is advance for sharing your knowledge.
>
> Phil Nutting
> Manufacturing Engineer
> Kaiser Systems, Inc.
>
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Date: Wed, 1 Aug 2001 16:05:17 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Dorothy M. Lush" <[log in to unmask]>
Subject: Re: Rework
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What do the manufacturer's specifications say? In my experience some are 0
and some are more.
Dorothy Lush
> ----------
> From: Craig Hillman[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;Craig Hillman
> Sent: Wednesday, August 01, 2001 3:48 PM
> To: [log in to unmask]
> Subject: Rework
>
> Technetters,
>
> Any recommendations on maximum number of rework cycles for a Plastic BGA?
>
> TIA,
> Craig
>
> --------------------------------------------------------------------------
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>
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Date: Thu, 2 Aug 2001 11:25:38 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Don Vischulis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Don Vischulis <[log in to unmask]>
Subject: Re: Process Problem vs Board Problem
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Bill:
I've run into boards with this appearance before. You should see it on the
'as received' boards. What you're seeing is dewetting at the knee of the
hole. If my memory is correct, you will not get good hole fill after
soldering and the top side filets on holes with leaded components will not
wet out onto the pads completely. It's been several years but the cause may
arise from copper contamination prior to HASL. Possibly from a poorly
vented or contaminated curing oven for LPI final cure.
My memory is fuzy about the root cause, so don't take it as a certaintity.
Hope this helps.
Don Vischulis
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Date: Tue, 14 Aug 2001 08:22:33 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Eric Dawson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Eric Dawson <[log in to unmask]>
Subject: Re: Off-Topic - coatings for airplane-home
MIME-Version: 1.0
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Good Morning,
We chaps here in foggy England are always being told that everything in the
States is bigger and better, so why not find a plating shop with a large
tank and anodise the fuselage? Lots of jolly colours to choose from as well!
Regards
Eric the Cad
> -----Original Message-----
> From: Crepeau, Phil [SMTP:[log in to unmask]]
> Sent: 13 August 2001 23:33
> To: [log in to unmask]
> Subject: Re: [TN] Off-Topic - coatings for airplane-home
>
> hi,
>
> i've seen articles about you weird people in wobeoregon doing this. why
> not ask somebody up there that has already done this? kapton makes a
> pretty good tape, but not much as a coating.
>
> why not use a catlyzed polyurethane coating which is what the military
> uses to paint their non-stealthy aircraft? you should know, however, that
> this will cause an unacceptable number of trees and wildlife (including
> humans)to expire.
>
> why not ditch the 727 and build a sod hut?
>
> phil
>
> -----Original Message-----
> From: Carl VanWormer [mailto:[log in to unmask]]
> Sent: Monday, August 13, 2001 2:59 PM
> To: [log in to unmask]
> Subject: [TN] Off-Topic - coatings for airplane-home
>
>
> Definitely off-topic, but interesting . . .
>
> I have a friend who is making his new home out of a 727 airplane (see
> www.AirplaneHome.com <http://www.AirplaneHome.com> for details). He is
> investigating coatings he might use to "paint the house", and has rejected
> his first choice (Kapton) when he found that it deteriorates when exposed
> to
> UV and Oxygen (I think that was what it was). Since I've seen some
> amazing
> insights shared on this group, I thought I'd dangle this challenge in
> front
> of the group to see what happens . . . Any (and all) suggestions will be
> appreciated and investigated. Please let me know of your suggestions and
> I'll forward them to him.
>
> Thanks
>
> Carl Van Wormer
> Cipher Systems
> 1815 NW 169th Place, Suite 5010
> Beaverton, OR 97006
> Phone (503)-617-7447 Fax (503)-617-6550
>
>
>
> p.s. here's a snippet from my last contact with the airplane/home owner:
> Hot dog, thanks very much. I've always been very fond of RTVs - they seem
> more stable than any conventional paint, or any other coating short of
> Teflon. I've never in my life seen any evidence of any form of
> deterioration
> of RTVs, and they've been around since I was a kid. I've always thought
> they'd make a great roof coating for my mobile home (back when maintenance
> of
> the structure would've been justified) or the freight vans.
>
> The timing is quite good too in that I've been thinking about coatings
> again.
> I've been pressure washing again in the last few days, and I've noted
> that,
>
> while the color coats often flake off, the chromates don't, although they
> can
> bleed off. That is, the chromates seem to form a chemical bond with the
> aluminum, whereas the paint just forms an adhesive bond, which, like all
> adhesive bonds, is unreliable. When the pressurized water is forced onto
> the
> chromate at its most aggressive (with the wand within a cm or two of the
> surface), the chromate sometimes get fainter and fainter as if they're
> being
>
> abraded off. But they never peel. That's impressive.
>
> And that's what I'd like in a coating - a true chemical bond, so that it's
> literally part of the metal, not just a layer over the metal. Well, that,
> plus absolute immunity to UV, chemical weathering, and every other factor
> that makes a coating just plain perfect.
>
> Teflon's been on my mind too. It's extremely stable of course. But I'm
> not
>
> sure what the nature of it's bond is, or what the economics are - I need
> to
> look into it.
>
> --------------------------------------------------------------------------
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Date: Fri, 20 Jul 2001 18:49:58 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: Inspection Criteria
MIME-Version: 1.0
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boundary="part1_a6.16f537ff.288a0f96_boundary"
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Hi John!!
Like Kathy said, magnification for inspection is spelled out in the 610, and
the J-STD too...I would quote them, but I don't have them in front of me...I
do know 30X is pushing things a whole lot!
This issue is a never ending debate. Are your inspectors finding REAL
defects? I go through this stuff quite a bit too...so I understand your
frustrations.
An ol' crusty QA manager told me a while back, is that there are two kinds of
inspectors, those that inspect to accept, and those that inspect to reject.
He also said that if it takes more than just a couple of seconds to decide if
something is good or bad, it's probably good...leave it alone.
I go through this stuff all the time...especially with class-II stuff here.
The latest battle has been with barrel-fill. You're allowed a 75% barrel fill
with class-II stuff...
The inspectors complain that they can't tell if it's 74% or 76%, so they
reject everything that doesn't have a full barrel fill...(where's my
Excedrin?). In turn, this just conditions all our operators to touch-up
things that they don't need to touch-up...and it goes on and on, and on, and
on...
Have tried to talk to them about the issues when re-heating solder joints,
(intermetallics, and that it's NOT increasing the functionality or
reliability of the joints).
But it's like like I'm talking to a wall. Inspectors, as you have learned,
need to feel that they must find something...I've only met a few inspectors
that I can hand a board to, and get it back without red-arrows on it
somewhere...whether there is defects on it or not. That's their job (in their
mind), to find something wrong...if they can't find something wrong, then
they've missed something, and not done their job...
If it sounds like I'm getting down on inspectors, I'm really not. There's
been more than just a few times in my career that I was really glad that
there was a very detailed, picky, inspector, that caught a mistake from
production that was pretty serious before we shipped to the customer...stuff
happens. But on the other hand, there has been times that they've been so
focused on solder joints, that they've totally missed that there were
components installed, that were wrong values, wrong polarity, etc...
I'm not saying that you need a QA inspector to tell you when you load
something wrong, that responsibilty should fall squarely on the set-up and
first article inspection from the people that are running the line, but you
know what I'm driving at...
-Steve Gregory-
--part1_a6.16f537ff.288a0f96_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi John!!
<BR>
<BR>Like Kathy said, magnification for inspection is spelled out in the 610, and
<BR>the J-STD too...I would quote them, but I don't have them in front of me...I
<BR>do know 30X is pushing things a whole lot!
<BR>
<BR>This issue is a never ending debate. Are your inspectors finding REAL
<BR>defects? I go through this stuff quite a bit too...so I understand your
<BR>frustrations.
<BR>
<BR>An ol' crusty QA manager told me a while back, is that there are two kinds of
<BR>inspectors, those that inspect to accept, and those that inspect to reject.
<BR>He also said that if it takes more than just a couple of seconds to decide if
<BR>something is good or bad, it's probably good...leave it alone.
<BR>
<BR>I go through this stuff all the time...especially with class-II stuff here.
<BR>The latest battle has been with barrel-fill. You're allowed a 75% barrel fill
<BR>with class-II stuff...
<BR>
<BR>The inspectors complain that they can't tell if it's 74% or 76%, so they
<BR>reject everything that doesn't have a full barrel fill...(where's my
<BR>Excedrin?). In turn, this just conditions all our operators to touch-up
<BR>things that they don't need to touch-up...and it goes on and on, and on, and
<BR>on...
<BR>
<BR>Have tried to talk to them about the issues when re-heating solder joints,
<BR>(intermetallics, and that it's NOT increasing the functionality or
<BR>reliability of the joints).
<BR>
<BR>But it's like like I'm talking to a wall. Inspectors, as you have learned,
<BR>need to feel that they must find something...I've only met a few inspectors
<BR>that I can hand a board to, and get it back without red-arrows on it
<BR>somewhere...whether there is defects on it or not. That's their job (in their
<BR>mind), to find something wrong...if they can't find something wrong, then
<BR>they've missed something, and not done their job...
<BR>
<BR>If it sounds like I'm getting down on inspectors, I'm really not. There's
<BR>been more than just a few times in my career that I was really glad that
<BR>there was a very detailed, picky, inspector, that caught a mistake from
<BR>production that was pretty serious before we shipped to the customer...stuff
<BR>happens. But on the other hand, there has been times that they've been so
<BR>focused on solder joints, that they've totally missed that there were
<BR>components installed, that were wrong values, wrong polarity, etc...
<BR>
<BR>I'm not saying that you need a QA inspector to tell you when you load
<BR>something wrong, that responsibilty should fall squarely on the set-up and
<BR>first article inspection from the people that are running the line, but you
<BR>know what I'm driving at...
<BR>
<BR>-Steve Gregory-
<BR>
<BR></FONT></HTML>
--part1_a6.16f537ff.288a0f96_boundary--
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Date: Wed, 15 Aug 2001 11:52:34 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dave Roesler <[log in to unmask]>
Subject: Re: photoplotting service
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James,
Try Reyhan in Minnesota. They can plot up to 6 foot x 8 foot. I have had
excellent quality and service from them.
Contact Pat Beadles at (651) 256-0050.
Dave Roesler
TRI-C Design, Inc.
----- Original Message -----
From: "James W. High" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, August 15, 2001 10:45 AM
Subject: [TN] photoplotting service
> Technetters,
>
> I am in search of a photoplotting service that can plot larger than 36",
> with good service and reasonable pricing. Geographical location is not
> important.
>
> Thanks
>
>
> James W. High
> NASA Langley Research Center
> Mail Stop 390
> Hampton, VA 23681-2199
>
> 757-864-5416 (Phone)
> 757-864-8092 (Fax)
> Email: [log in to unmask]
>
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Date: Fri, 20 Jul 2001 19:23:26 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Air filtration units...
MIME-Version: 1.0
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boundary="part1_10.fd06985.288a176e_boundary"
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Content-Transfer-Encoding: 7bit
Hi everyone!
Well, I'm just about to melt into a puddle here...it's hella hot here!! Check
out the National Weather Service message for us after my question...they're
saying this weather is gonna be with us all next week on the news...
ANYWAYS, do any of you you use any of the filtration units on the market to
exhaust your wave solder machines, reflow ovens, etc.?
When I worked with Zevatech, and did NEPCON shows etc., there was a unit that
was always used for exhaust when things were being run "live" at the shows
(TAC line for example, plus other vendors that actually wanted to run their
machines)...I was pretty impressed with them...they were units from
Impell...just trying to find out if anybody actually uses this method to
exhaust mass reflow machines (wave, reflow ovens).
Thanks!
(he says as he's getting a cool iced-tea..be glad you're not here!)
-Steve Gregory-
Non Precipitation Advisory: HEAT ADVISORY THROUGH SATURDAY
Urgent - Weather Message National Weather Service Tulsa OK 405 PM CDT Thu
Jul 19 2001 Creek OK - Nowata OK - Okfuskee OK - Okmulgee OK - Osage OK -
Pawnee OK - Rogers OK - Tulsa OK - Washington OK - Including The Cities Of...
Nowata... Claremore... Okemah... Okmulgee... Pawhuska... Tulsa... Sand
Springs... Broken Arrow... Bartlesville... Pawnee And Bristow 405 PM CDT Thu
Jul 19 2001
Heat Advisory Through Saturday...
The Combination Of Very Hot Temperatures And High Relative Humidity Will
Continue To Create Dangerous Conditions Through Saturday Across Much Of
Northeast Oklahoma. Afternoon High Temperatures Will Reach Between 98 And 101
Degrees With Heat Index Values Between 110 And 115. Overnight Temperatures
Will Only Briefly Drop To Around Or Slightly Below 80 Degrees Providing
Little Relief From The Heat. The Upper Level High Pressure System Responsible
For The Heat Is Forecast By Computer Models To Remain Nearly Stationary
Across Oklahoma... Thus The Hot And Humid Weather Is Expected To Continue
Through The Rest Of Week And Into The Weekend. Strenuous Activities Should Be
Reduced... Eliminated Or Rescheduled To The Coolest Time Of The Day. If You
Must Be Outside... Drink Plenty Of Fluids To Avoid Dehydration. Your Body Can
Lose Up To A Gallon Of Water An Hour Through Perspiration. Alcoholic And
Caffeinated Beverages Can Increase The Rate Of Water Loss In Your Body...
Increasing The Risk Of Heat Exhaustion Or Stroke. Wear Lightweight... Light -
Colored... Loose - Fitting Clothing. Wear A Hat To Shield Yourself From The
Sun... And Use A Sunscreen To Reduce Possible Sunburn. Pets Can Also Succumb
To The Affects Of Excessive Heat. Ensure Pets Have Adequate Drinking Water
And A Shady Place To Rest. Do Not Leave Pets In Cars... Temperatures Inside
An Enclosed Car Can Reach Over 150 Degrees Quickly... Resulting In Heat
Stroke And Death.
Children... The Elderly... And People With Chronic Ailments Are Usually The
First To Suffer From The Heat. Heat Exhaustion... Heat Cramps... Or In
Extreme Cases... Heat Stroke May Result From Prolonged Exposure To These
Conditions. Friends... Relatives... Or Neighbors Should Check On People At
Risk.
Stay Tuned To Noaa Weather Radio... Commercial Radio Or Television For The
Latest Information Concerning This Excessive Heat Event. Additional Weather
Information Can Also Be Obtained On Our Web Site At: Www.Srh.Noaa.Gov/Tulsa
--part1_10.fd06985.288a176e_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi everyone!
<BR>
<BR>Well, I'm just about to melt into a puddle here...it's hella hot here!! Check
<BR>out the National Weather Service message for us after my question...they're
<BR>saying this weather is gonna be with us all next week on the news...
<BR>
<BR>ANYWAYS, do any of you you use any of the filtration units on the market to
<BR>exhaust your wave solder machines, reflow ovens, etc.?
<BR>
<BR>When I worked with Zevatech, and did NEPCON shows etc., there was a unit that
<BR>was always used for exhaust when things were being run "live" at the shows
<BR>(TAC line for example, plus other vendors that actually wanted to run their
<BR>machines)...I was pretty impressed with them...they were units from
<BR>Impell...just trying to find out if anybody actually uses this method to
<BR>exhaust mass reflow machines (wave, reflow ovens).
<BR>
<BR>Thanks!
<BR>(he says as he's getting a cool iced-tea..be glad you're not here!)
<BR>
<BR>-Steve Gregory-
<BR>
<BR>Non Precipitation Advisory: HEAT ADVISORY THROUGH SATURDAY
<BR> Urgent - Weather Message National Weather Service Tulsa OK 405 PM CDT Thu
<BR>Jul 19 2001 Creek OK - Nowata OK - Okfuskee OK - Okmulgee OK - Osage OK -
<BR>Pawnee OK - Rogers OK - Tulsa OK - Washington OK - Including The Cities Of...
<BR>Nowata... Claremore... Okemah... Okmulgee... Pawhuska... Tulsa... Sand
<BR>Springs... Broken Arrow... Bartlesville... Pawnee And Bristow 405 PM CDT Thu
<BR>Jul 19 2001
<BR>
<BR>Heat Advisory Through Saturday...
<BR>
<BR>The Combination Of Very Hot Temperatures And High Relative Humidity Will
<BR>Continue To Create Dangerous Conditions Through Saturday Across Much Of
<BR>Northeast Oklahoma. Afternoon High Temperatures Will Reach Between 98 And 101
<BR>Degrees With Heat Index Values Between 110 And 115. Overnight Temperatures
<BR>Will Only Briefly Drop To Around Or Slightly Below 80 Degrees Providing
<BR>Little Relief From The Heat. The Upper Level High Pressure System Responsible
<BR>For The Heat Is Forecast By Computer Models To Remain Nearly Stationary
<BR>Across Oklahoma... Thus The Hot And Humid Weather Is Expected To Continue
<BR>Through The Rest Of Week And Into The Weekend. Strenuous Activities Should Be
<BR>Reduced... Eliminated Or Rescheduled To The Coolest Time Of The Day. If You
<BR>Must Be Outside... Drink Plenty Of Fluids To Avoid Dehydration. Your Body Can
<BR>Lose Up To A Gallon Of Water An Hour Through Perspiration. Alcoholic And
<BR>Caffeinated Beverages Can Increase The Rate Of Water Loss In Your Body...
<BR>Increasing The Risk Of Heat Exhaustion Or Stroke. Wear Lightweight... Light -
<BR>Colored... Loose - Fitting Clothing. Wear A Hat To Shield Yourself From The
<BR>Sun... And Use A Sunscreen To Reduce Possible Sunburn. Pets Can Also Succumb
<BR>To The Affects Of Excessive Heat. Ensure Pets Have Adequate Drinking Water
<BR>And A Shady Place To Rest. Do Not Leave Pets In Cars... Temperatures Inside
<BR>An Enclosed Car Can Reach Over 150 Degrees Quickly... Resulting In Heat
<BR>Stroke And Death.
<BR>
<BR>Children... The Elderly... And People With Chronic Ailments Are Usually The
<BR>First To Suffer From The Heat. Heat Exhaustion... Heat Cramps... Or In
<BR>Extreme Cases... Heat Stroke May Result From Prolonged Exposure To These
<BR>Conditions. Friends... Relatives... Or Neighbors Should Check On People At
<BR>Risk.
<BR>
<BR>Stay Tuned To Noaa Weather Radio... Commercial Radio Or Television For The
<BR>Latest Information Concerning This Excessive Heat Event. Additional Weather
<BR>Information Can Also Be Obtained On Our Web Site At: Www.Srh.Noaa.Gov/Tulsa</FONT></HTML>
--part1_10.fd06985.288a176e_boundary--
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=========================================================================
Date: Fri, 20 Jul 2001 16:24:44 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: Inspection Criteria
Mime-Version: 1.0
Content-Type: multipart/mixed; boundary="=_0F5561A5.F091FD46"
This is a MIME message. If you are reading this text, you may want to
consider changing to a mail reader or gateway that understands how to
properly handle MIME multipart messages.
--=_0F5561A5.F091FD46
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: quoted-printable
Content-Disposition: inline
The magnification guidelines are in section 1. It is determined by the =
conductor width and if the magnification is being a referee judgement or =
inspection judgement.=20
Kathy=20
--=_0F5561A5.F091FD46
Content-Type: text/plain
Content-Disposition: attachment; filename="TEXT.htm"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META content="text/html; charset=iso-8859-1" http-equiv=Content-Type>
<META content="MSHTML 5.00.2614.3500" name=GENERATOR></HEAD>
<BODY style="FONT: 10pt Haettenschweiler; MARGIN-LEFT: 2px; MARGIN-TOP: 2px">
<DIV>The magnification guidelines are in section 1. It is determined by
the conductor width and if the magnification is being a referee judgement or
inspection judgement. </DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
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Date: Wed, 15 Aug 2001 13:46:28 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: bbarr <[log in to unmask]>
Subject: Panelized Boards
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I have a 3.5" x 5.5", .063" thick board we will be building in somewhat high
quantities (3,000+/month). This size board is just on the edge as far as
having to put it into a basket to run through our in-line aqueous cleaner to
keep it from moving around. I do not want the operators to have to put this
many boards in baskets during production runs. So, my thoughts have turned
to panelizing these boards, perhaps in a 2x2 arrangement. This would go
through the cleaner with no problem. I do not have a lot of experience in
the best designs for panels. What are the advantages/disadvantages between
v-score and tabs? If using tabs, how many are required to maintain the
rigidity of the panel during reflow? Does there have to be a border around
the boards? Are fiducials required on the panel in addition to the fiducials
already on the individual boards? Any other issues I may have missed?
Thanks.
Bob
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Date: Wed, 1 Aug 2001 22:30:49 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: Rework
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Craig,
For what Class product (1,2, or 3)?
David A. Douthit
Manager
LoCan LLC
Craig Hillman wrote:
> Technetters,
>
> Any recommendations on maximum number of rework cycles for a Plastic BGA?
>
> TIA,
> Craig
>
> ---------------------------------------------------------------------------------
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Date: Tue, 14 Aug 2001 14:06:02 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
David Douthit <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re: Connector tilt, acceptable or not?
MIME-Version: 1.0
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Wolfgang,
After looking at the pictures I have a question. Are these connectors mounted to the PCB with
90 degree leads? If so the only way to get the sort of "tilt" showing is if the leads have
been bent.
In any case the fact that the connectors may "fit" does not alter the fact that they will
still transfer stress and strains not designed for. These additional stresses could shorten
the lije of the solder joints plus the change internally between the male/female interface
can cause unusual wear on the gold plating.
If this is a class 3 product fix it and argue about whose fault it is later.
David A. Douthit
Manager
LoCan LLC
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Date: Tue, 14 Aug 2001 14:05:38 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Lush, Dorothy" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Lush, Dorothy" <[log in to unmask]>
Subject: Re: solder balls
MIME-Version: 1.0
Content-Type: text/plain
I like Loan's answer because solderballs normally form in the middle along
the side of the chip component and not underneath. The normal solderball is
formed when solder follows the flux under the component during reflow then
is "squeezed" out to the side when the molten solder solidifies, shrinks and
pulls the chip flush to the board surface. I could see the pulling down
action stopped by, say, epoxy or soldermask non-existence or over presence.
Are these balls being formed during SMD or solderwave do you think? An
aqueous SMT paste process usually will wash this ball away. No-clean paste
requires not forming them in the first place (and only allowing them to stay
if they are imbedded in flux and less than a certain size, etc.) by
controlling stencil aperature, solder printing(x-y and z(volume)), solder
choice and oven profile. Is this an aqueous or no-clean solder paste/process
we are talking about?
Dorothy Lush
Manufacturing Engineer
> ----------
> From: Marsico, James[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.;Marsico, James
> Sent: Tuesday, August 14, 2001 12:34 PM
> To: [log in to unmask]
> Subject: soldr balls
>
> Here's a relatively basic SMT question, but we've haven't experienced this
> before. We're seeing solder balls under (way under, in the center) chip
> components. Any recommendations?
>
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
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>
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Date: Wed, 15 Aug 2001 14:45:18 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dean Lillibridge <[log in to unmask]>
Subject: Re: Panelized Boards
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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if you don't mind supplying me with your fax number, I can fax over some
considerations that we have used for panelizing boards.
--Dean Lillibridge
NEWvENTURE TECHNOLOGIES
(860) 253-7057
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of bbarr
Sent: Wednesday, August 15, 2001 1:46 PM
To: [log in to unmask]
Subject: [TN] Panelized Boards
I have a 3.5" x 5.5", .063" thick board we will be building in somewhat high
quantities (3,000+/month). This size board is just on the edge as far as
having to put it into a basket to run through our in-line aqueous cleaner to
keep it from moving around. I do not want the operators to have to put this
many boards in baskets during production runs. So, my thoughts have turned
to panelizing these boards, perhaps in a 2x2 arrangement. This would go
through the cleaner with no problem. I do not have a lot of experience in
the best designs for panels. What are the advantages/disadvantages between
v-score and tabs? If using tabs, how many are required to maintain the
rigidity of the panel during reflow? Does there have to be a border around
the boards? Are fiducials required on the panel in addition to the fiducials
already on the individual boards? Any other issues I may have missed?
Thanks.
Bob
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Date: Mon, 23 Jul 2001 19:39:35 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Jiang Ping <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jiang Ping <[log in to unmask]>
Subject: Re: Inspection Criteria
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------=_NextPart_000_000E_01C113AF.3430C320--
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Date: Tue, 14 Aug 2001 14:04:43 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Keel, Mike" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Keel, Mike" <[log in to unmask]>
Subject: Re: Off-Topic - coatings for airplane-home
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Tile it . . .
Just like the space shuttle
-----Original Message-----
From: Albin, David [mailto:[log in to unmask]]
Sent: Tuesday, August 14, 2001 11:43 AM
To: [log in to unmask]
Subject: Re: [TN] Off-Topic - coatings for
airplane-home
Aha!
and the eggshells could make a nice mosaic
motif......
David Albin
Coates Circuit Products
-----Original Message-----
From: Mike Fenner [mailto:[log in to unmask]]
Sent: 14 August 2001 09:11
To: [log in to unmask]
Subject: Re: [TN] Off-Topic - coatings for airplane-home
A slightly more environmentally friendly way of doing this
might be to paint
the thing with raw egg yolks and leave out to bake in the
Sunshine which I
understand you fellows also have in the USA. The sulphides
in the egg should
give a nice matt black finish. The whites should contribute
to a nice
meringue which in accordance with Eric's observations will
be the biggest in
the World. [However please dispose of the eggshells
considerately]
Mike
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Eric
Dawson
Sent: Tuesday, August 14, 2001 8:23 AM
To: [log in to unmask]
Subject: Re: [TN] Off-Topic - coatings for airplane-home
Good Morning,
We chaps here in foggy England are always being told that
everything in the
States is bigger and better, so why not find a plating shop
with a large
tank and anodise the fuselage? Lots of jolly colours to
choose from as well!
Regards
Eric the Cad
> -----Original Message-----
> From: Crepeau, Phil [SMTP:[log in to unmask]]
> Sent: 13 August 2001 23:33
> To: [log in to unmask]
> Subject: Re: [TN] Off-Topic - coatings for
airplane-home
>
> hi,
>
> i've seen articles about you weird people in wobeoregon
doing this. why
> not ask somebody up there that has already done this?
kapton makes a
> pretty good tape, but not much as a coating.
>
> why not use a catlyzed polyurethane coating which is what
the military
> uses to paint their non-stealthy aircraft? you should
know, however, that
> this will cause an unacceptable number of trees and
wildlife (including
> humans)to expire.
>
> why not ditch the 727 and build a sod hut?
>
> phil
>
> -----Original Message-----
> From: Carl VanWormer [mailto:[log in to unmask]]
> Sent: Monday, August 13, 2001 2:59 PM
> To: [log in to unmask]
> Subject: [TN] Off-Topic - coatings for airplane-home
>
>
> Definitely off-topic, but interesting . . .
>
> I have a friend who is making his new home out of a 727
airplane (see
> www.AirplaneHome.com <http://www.AirplaneHome.com> for
details). He is
> investigating coatings he might use to "paint the house",
and has rejected
> his first choice (Kapton) when he found that it
deteriorates when exposed
> to
> UV and Oxygen (I think that was what it was). Since I've
seen some
> amazing
> insights shared on this group, I thought I'd dangle this
challenge in
> front
> of the group to see what happens . . . Any (and all)
suggestions will be
> appreciated and investigated. Please let me know of your
suggestions and
> I'll forward them to him.
>
> Thanks
>
> Carl Van Wormer
> Cipher Systems
> 1815 NW 169th Place, Suite 5010
> Beaverton, OR 97006
> Phone (503)-617-7447 Fax (503)-617-6550
>
>
>
> p.s. here's a snippet from my last contact with the
airplane/home owner:
> Hot dog, thanks very much. I've always been very fond of
RTVs - they seem
> more stable than any conventional paint, or any other
coating short of
> Teflon. I've never in my life seen any evidence of any
form of
> deterioration
> of RTVs, and they've been around since I was a kid. I've
always thought
> they'd make a great roof coating for my mobile home (back
when maintenance
> of
> the structure would've been justified) or the freight
vans.
>
> The timing is quite good too in that I've been thinking
about coatings
> again.
> I've been pressure washing again in the last few days,
and I've noted
> that,
>
> while the color coats often flake off, the chromates
don't, although they
> can
> bleed off. That is, the chromates seem to form a chemical
bond with the
> aluminum, whereas the paint just forms an adhesive bond,
which, like all
> adhesive bonds, is unreliable. When the pressurized water
is forced onto
> the
> chromate at its most aggressive (with the wand within a cm
or two of the
> surface), the chromate sometimes get fainter and fainter
as if they're
> being
>
> abraded off. But they never peel. That's impressive.
>
> And that's what I'd like in a coating - a true chemical
bond, so that it's
> literally part of the metal, not just a layer over the
metal. Well, that,
> plus absolute immunity to UV, chemical weathering, and
every other factor
> that makes a coating just plain perfect.
>
> Teflon's been on my mind too. It's extremely stable of
course. But I'm
> not
>
> sure what the nature of it's bond is, or what the
economics are - I need
> to
> look into it.
>
>
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Date: Tue, 14 Aug 2001 22:34:14 +0100
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Roger Hammond <[log in to unmask]>
Subject: FAB. Cleaning stainless steel multilayer bonding shims.
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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Dear all,
My thanks to those good peple who answered my query on FDA approval, it
was all very useful.My customer was most Pleased.
Here is another Question. What is the best way to clean epoxy and
polyimide resin spew from the surface and from the pin location holes of
stainless steel shims?
Years ago we used to use Chlorinated solvent but that is now banned. We
currently brush the shims in a Schmid deburring machine after use but
have to manually clear the holes. Concentrated sulpuric acid has been
suggested. This is not an option I would willingly take. Are there any
other alternatives?
Thank you
Roger Hammond
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Date: Mon, 23 Jul 2001 13:32:20 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: Component Mass / Pad Geometries
In-Reply-To: <[log in to unmask]@eric>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
I have a very cool ruler, made of FR4. One side is inches and tenths. The
other side is centimeters and halves, quarters and eighths.
Guy Ramsey
Senior Lab Technician / Instructor
E-Mail: [log in to unmask] <mailto:[log in to unmask]>
Ph: (610) 362-1200 x107
Fax: (610) 362-1290
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Eric Christison
Sent: Monday, July 23, 2001 11:44 AM
To: [log in to unmask]
Subject: Re: [TN] Component Mass / Pad Geometries
Nice to see some consistent units - g/in^2 here. Haven't seen this mix since
I came across a stress quoted in N/in^2 ;-).....
> Hi Steve!
>
> The formula that has been floating around for a while is that you get
> 30-grams of surface tension for every square inch of pad surface....
>
> -Steve Gregory-
>
>
> > Question?
> >
> > There is a formula somewhere which I can use to calculate the maximum
> > allowable mass of a component in relation to the pad lands. Basically
> I
> > want to make sure our designers do not put components on the underside
> > of the PCB which are going to fall off during doublesided reflow.
> >
> > I would like to point out that this is a design for manufacturability
> > question, not an attack on the tentative grasp on reality some card
> > designers have.
> >
> > Steve.
> >
>
>
>
Eric Christison
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Date: Thu, 2 Aug 2001 09:18:18 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"d. terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: Re: Rework
MIME-Version: 1.0 (Generated by NET-TEL Mailguard SMTP version 4.0.0.22)
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Hi Craig,
One rework cycle for a BGA means desoldering, cleaning excessive solder =
from the BGA-pads, reballing and resoldering, all this in addition to the =
original soldering cycle.
I don't think there's any manufacturer that will guarantee that their =
BGA's will survive this.
In practice I've had some good results (meaning: the board still worked) =
with BGA's that were subjected to all these cycles for 4 or 5 times.
Kind regards,
Daan Terstegge
Unclassified mail
Personal Website: http://www.smtinfo.net=20
>>> Craig Hillman <[log in to unmask]> 08/02 12:48 am >>>
Technetters,
Any recommendations on maximum number of rework cycles for a Plastic BGA?
TIA,
Craig
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Date: Tue, 14 Aug 2001 16:37:11 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: LI YUAN <[log in to unmask]>
Subject: Interesting Coplanarity ?
MIME-Version: 1.0
Content-Type: TEXT/PLAIN; charset=US-ASCII
I had a customer asking this question:
The customer has the devices already soldered on the board and want to know
what is the coplanarity. Is is a valid question? If so, how?
Thanks,
YL
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Date: Thu, 16 Aug 2001 12:47:13 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dean Lillibridge <[log in to unmask]>
Subject: Re: Moisture Sensitive Component Handling & Identification
In-Reply-To: <[log in to unmask]>
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A quick review of moisture/time sensitive packages in our stockroom shows
that:
moisture sensitivity related material (shelf life/ prebake/sealed
date/etc) is included on the outside bag as well as mfr/mfr part number/
p.o.#/ etc on material that comes from distributors or has not been
repackaged by consigned suppliers.
I also have examples in which a moisture-sensitive programmable supplied
on tape and reel would also include the moisture sensitve information on the
reel itself as well as the outside bag or box. I have a gut feeling that
this is strictly up to the packaging specs of the mfr or distributor who has
done the final blasting of the programmable. If your distributor offers
programming of components, they may be able to mark both the reel and
outside packaging. A good question to ask when you are quoting availability
of material or sourceing a new distributor.
If a device is distributed as a blank and then programmed or tape and
reeled by an outside source, you may not have this information carried over
from the outside packaging to the new reel. Customer part numbers and p.o.
information are usually carried over to the new reel.
As far as moisture/time sensitive components supplied in stick or matrix
tray form, I do not show evidence that there is any indication of moisture
sensitivity data or customer part number or purchase order information on
the sticks or trays. This information is supplied only on the outside bag
or box the sticks and trays were sealed in.
Hope it helps. --Dean Lillibridge
component engineer
NEWvENTURE TECHNOLOGIES
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Tom Parkinson -
Quality System Manager
Sent: Thursday, August 16, 2001 11:39 AM
To: [log in to unmask]
Subject: Re: [TN] Moisture Sensitive Component Handling & Identification
Nancy
Our experience shows all the information is on the outside of the sealed
bag. Customer supplied parts are usually pre-marked (by the customer)
with their part number, reference designator, etc. on the outside only
and the bag is still sealed. For parts that we purchase, our receiving
inspection writes the info on the outside of the sealed bag. The sealed
bags are not opened until ready for use.
Tom
Nancy Reynolds/MKT/HQ/KEMET/US wrote:
>
> Please forgive the idiotic sounding questions below, but I am losing a
> battle and need some new ammunition.... If all you folks who work in
board
> assembly could give me a few quick yes or no answers, I would be quite
> grateful. Any of my fellow component manufacturers' comments are also
> welcome. Just 2 multiple choice questions...
>
> Regarding Moisture Sensitive components that are shipped to you in
dry-pack
> bags....
>
> 1. Is the moisture sensitivity-related labeling info (MSL, Bag Seal Date,
> Floor Life) found on...
> a) Moisture Barrier Bag only?
> b) Unit container (reel, tube, etc...) only?
> c) Both bag and reel?
>
> 2. Is the component/customer specific labeling info (Customer part number,
> PO number, etc...) found on...
> a) Moisture Barrier Bag only?
> b) Unit container (reel, tube, etc...) only?
> c) Both bag and reel?
>
> Thanks in advance for any answers you might have.
> Nancy Reynolds
>
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Date: Tue, 14 Aug 2001 19:33:59 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Scott Mcanall <[log in to unmask]>
Subject: Re: Solder analysis results
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There is a method of 'cleaning the solder' by cooling it down in a specific
manner and the intermetalics will freeze out before the actual solder will
turn.
Contact Jess Baker of RPS, he can help you.
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Date: Tue, 14 Aug 2001 16:52:35 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crepeau, Phil" <[log in to unmask]>
Subject: Re: Connector tilt, acceptable or not?
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hi,
looking at the leads in the plated through holes makes me believe that =
these holes are too big for the leads. if the holes weren't this big, =
i doubt that you'd need special tooling to prevent a misalignment =
problem.
phil
-----Original Message-----
From: Busko, Wolfgang [mailto:[log in to unmask]]
Sent: Tuesday, August 14, 2001 8:48 AM
To: [log in to unmask]
Subject: [TN] Connector tilt, acceptable or not?
Thanks Steve for your picture service !!!
To all,
I have some pictures on Steve=B4s page
http://stevezeva.homestead.com/index.html
<http://stevezeva.homestead.com/index.html>=20
The issue is that these connectors (Teradyne 2mm pitch) adapt our =
boards to
a backplane and the problem is that due to this obvious shift/tilt the
danger of damaging some of the male connector pins at the backplane if =
not
mounting these boards with the greatest possible caution is quite =
probable.
The CM in this case states that according to IPC A610 chapter 5.2.9 =
this is
within tolerance of 0.5mm as shown and refuses any rework or refund.
The question is, does 5.2.9 apply in this case? The "not acceptable"
criteria is what the discussion is all about. With, let=B4s say, =
caution and
some extra force the insertion is possible but I see the danger of =
breaking
backplane connector pins especially when customer service teams try to
change boards --( it happens from time to time and asks for a new =
backplane
or, if in the field, the change of the complete 19" rack)
To do the mounting of the connector properly is absolutely no problem =
and
has never been one until now that they changed their workflow and team =
for
this task.
The rework would be: Loosen the srew - attach mating connector module -
resolder over rework wave and the connector adjust automatically
We ourselves do have the "accept or not accept"-debate "now and here" =
and I
would like to hear what others have to say about the risks of rework
compared to the risk of damaging a more costly device.
Me no like this borderline cases,=20
Wolfgang
=20
=20
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Date: Thu, 16 Aug 2001 12:52:13 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dean Lillibridge <[log in to unmask]>
Subject: Re: Fallout
In-Reply-To: <OFBF20C89C.4260E679-ON85256AAA.0056BCD5@LocalDomain>
MIME-Version: 1.0
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Proper training of operators to identify polarity of parts plus good
assembly documentation solves this problem. We also have in-process
inspectors, post-reflow and post-wave inspectors, and final auditors that
look for this sort of thing along with solderability inspection of
components.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Nancy
Reynolds/MKT/HQ/KEMET/US
Sent: Thursday, August 16, 2001 11:49 AM
To: [log in to unmask]
Subject: Re: [TN] Fallout
I wince at the thought of operators picking up (POLAR) tantalum caps off
the floor and placing them by hand. Too much potential for placing in the
wrong polarity. Tantalum caps don't like that much...
Nancy Reynolds
Dean Lillibridge <[log in to unmask]>@IPC.ORG> on 08/15/2001 02:57:32 PM
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
To: [log in to unmask]
cc:
Subject: Re: [TN] Fallout
I agree with not using fallout if you can help it and certainly if it's
dropped to the floor, don't even chance it. I would, however, have little
reservation to a part that you can see and identify in the machine
(resistor
networks, marked I.C.'s, tantalum caps) when your assembly has to ship on
Friday and the customer has only sent you the exact amount required for the
build. This is especially common with vibratory feeder-fed parts. I've
had
several customers supply material in stick form and provide just what was
required by the build. I'm not going to hold off revenue for a fallen
tantalum cap. --Dean Lillibridge
NEWvENTURE TECHNOLOGIES
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of John Brewer
Sent: Wednesday, August 15, 2001 2:05 PM
To: [log in to unmask]
Subject: Re: [TN] Fallout
>>"are your operators consciencious about picking up/saving and
>>hand placing dropped parts?"
Oh man....with all due respect, I'd surely not advise doing this. With
the size
of most SMT parts, the lack of marking, and the relatively cheap cost of
most of them
compared with the cost of diagnose> test> rework> retest, etc, I'd
generally
advise not ever doing this!
If things are falling off in such quantities so as to make it
economically
feasible to reuse the parts, then the SMT process engineer should
investigate
the root cause and fix it, rather than try and reuse fallout....
Rgds and good luck!
John
-=-=-=-=-=-=-=-=-=-=--=--=-=-=-=-=
John Brewer
Square D Component Engineering
Raleigh NC
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Date: Tue, 14 Aug 2001 20:40:15 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: Connector tilt, acceptable or not?
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_ae.193b8980.28ab1eef_boundary"
--part1_ae.193b8980.28ab1eef_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
Hi Wolfgang,
...had the same observation that Phil did. Looking at where the leads coming
are through the board on the bottom, on the left side of the connector, the
leads are at the top of the holes, whereas on the rightside, they are towards
the bottom...so it does seem like there is some slop in the holes...
But as you state, things were okay before...what really changed? Sometimes,
when teams change, there may be some "tribal knowledge" that disappears along
with certain team members...
I work at a CM, and I can state that we do build things per our customers
needs that haven't been documented on their end...we try to put these
"special" things in our work instructions so that the product meets "Form,
fit, and function"...it can be a very daunting task sometimes...and sometimes
we get bloodied and bruised through it all.
In situations like this, it's really easy to point fingers at each other and
turn the whole situation in to a very negative deal...hard feelings on both
sides. I think that everything should be laid-out objectivley on the table,
understand what really happened, fix it, and then move on...
My guess is that your CM truely wants your business, and wants to do a good
job for you...but maybe made some changes in the team that once did the work,
and wasn't aware that things weren't documented as well as they should have
been...be it on their part or yours...
-Steve Gregory-
> hi,
>
> looking at the leads in the plated through holes makes me believe that
> these holes are too big for the leads. if the holes weren't this big, i
> doubt that you'd need special tooling to prevent a misalignment problem.
>
> phil
>
--part1_ae.193b8980.28ab1eef_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Wolfgang,
<BR>
<BR>...had the same observation that Phil did. Looking at where the leads coming
<BR>are through the board on the bottom, on the left side of the connector, the
<BR>leads are at the top of the holes, whereas on the rightside, they are towards
<BR>the bottom...so it does seem like there is some slop in the holes...
<BR>
<BR>But as you state, things were okay before...what really changed? Sometimes,
<BR>when teams change, there may be some "tribal knowledge" that disappears along
<BR>with certain team members...
<BR>
<BR>I work at a CM, and I can state that we do build things per our customers
<BR>needs that haven't been documented on their end...we try to put these
<BR>"special" things in our work instructions so that the product meets "Form,
<BR>fit, and function"...it can be a very daunting task sometimes...and sometimes
<BR>we get bloodied and bruised through it all.
<BR>
<BR>In situations like this, it's really easy to point fingers at each other and
<BR>turn the whole situation in to a very negative deal...hard feelings on both
<BR>sides. I think that everything should be laid-out objectivley on the table,
<BR>understand what really happened, fix it, and then move on...
<BR>
<BR>My guess is that your CM truely wants your business, and wants to do a good
<BR>job for you...but maybe made some changes in the team that once did the work,
<BR>and wasn't aware that things weren't documented as well as they should have
<BR>been...be it on their part or yours...
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">hi,
<BR>
<BR>looking at the leads in the plated through holes makes me believe that
<BR>these holes are too big for the leads. if the holes weren't this big, i
<BR>doubt that you'd need special tooling to prevent a misalignment problem.
<BR>
<BR>phil
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
--part1_ae.193b8980.28ab1eef_boundary--
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Date: Wed, 15 Aug 2001 08:33:32 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "<Leonel Jay J. Manuel>" <[log in to unmask]>
Subject: Misplace component
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
Hello Technetters,
We currently have misplace component at a level of 0.2%. Component placement, solder land proportionality, solderabilty of component terminal and amount of solder was verified to be within specs. Reflow profile was also based in standard settings.
Can you give us some other possible root causes of the above mention problem We are using 0402 SMD and SnPbAg no-clean solder paste.
Leonel Jay J. Manuel
Process Engineer
RF PCC Engineering
Philips Semiconductors Phils. Inc.
Office Tel: (6349) 5430001 to 25
: (632) 8445139 ext. 288
Fax No. : (632) 8445248 / (6349) 5430027
E-mail :[log in to unmask]
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Date: Tue, 14 Aug 2001 22:04:15 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: Solder analysis results
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_8b.ae4b41e.28ab329f_boundary"
--part1_8b.ae4b41e.28ab329f_boundary
Content-Type: text/plain; charset="ISO-8859-1"
Content-Transfer-Encoding: quoted-printable
Dave,
Surely, not ALL 1700-lbs.? Wooo-doggies! I can only imagine what a task that=
=20
would be!!! I've read some stuff that if you keep the pot static, and keep i=
t=20
at a stable temperature for a period (what this really is, I don't=20
know...there's varying opinions), the metals will seek their own level=20
(according to the different opinions, the copper will be towards the top),=20
then you scoop out out the top layer, and replenish what you've removed with=
=20
fresh bars.
The question that I have though, how did the pot get so out of balance with=20
copper? I've never had a problem with copper content, even when waving OSP=20
boards...tin levels dropping, yes. But not excessive copper...somebody throw=
=20
some pennies in the pot?
-Steve Gregory-
> RJ Klien Wassink suggests [bible p 169] pouring contaminated solder at abo=
ut
> 190=B0C through a 20 mesh stainless steel stariner to reduce copper conten=
t to
> 0.25%.
>=20
> Dave Fish
>=20
--part1_8b.ae4b41e.28ab329f_boundary
Content-Type: text/html; charset="ISO-8859-1"
Content-Transfer-Encoding: quoted-printable
<HTML><FONT FACE=3Darial,helvetica><FONT SIZE=3D2>Dave,
<BR>
<BR>Surely, not ALL 1700-lbs.? Wooo-doggies! I can only imagine what a task=20=
that=20
<BR>would be!!! I've read some stuff that if you keep the pot static, and ke=
ep it=20
<BR>at a stable temperature for a period (what this really is, I don't=20
<BR>know...there's varying opinions), the metals will seek their own level=20
<BR>(according to the different opinions, the copper will be towards the top=
),=20
<BR>then you scoop out out the top layer, and replenish what you've removed=20=
with=20
<BR>fresh bars.
<BR>
<BR>The question that I have though, how did the pot get so out of balance w=
ith=20
<BR>copper? I've never had a problem with copper content, even when waving O=
SP=20
<BR>boards...tin levels dropping, yes. But not excessive copper...somebody t=
hrow=20
<BR>some pennies in the pot?
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=3DCITE style=3D"BORDER-LEFT: #0000ff 2px solid; MARGIN-=
LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">RJ Klien Wassink suggests [=
bible p 169] pouring contaminated solder at about
<BR>190=B0C through a 20 mesh stainless steel stariner to reduce copper cont=
ent to
<BR>0.25%.
<BR>
<BR>Dave Fish
<BR></FONT><FONT COLOR=3D"#000000" SIZE=3D3 FAMILY=3D"SANSSERIF" FACE=3D"Ar=
ial" LANG=3D"0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR=3D"#000000" SIZE=3D2 FAMILY=3D"SANSSERIF" FACE=3D"Ar=
ial" LANG=3D"0">
<BR></FONT></HTML>
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Date: Wed, 15 Aug 2001 09:24:43 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Edward Szpruch <[log in to unmask]>
Subject: Re: Solder analysis results
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
Stephen,
In our HALS equipment this is daily routine.This daily treatment takes =
3
hours.
We are running also solder analysis 3 times a month with very =
consistent
results.Apart of daily treatment solder composition corrections are =
very
rare.As you mentioned,from time to time we have to add some pure tin.
Edward
Edward Szpruch
Eltek , Manager of Process Engineering
P.O.Box 159 ; 49101 Petah Tikva Israel
Tel ++972 3 9395050 , Fax ++972 3 9309581
e-mail [log in to unmask]
> -----Original Message-----
> From: Stephen S. Schiera [SMTP:[log in to unmask]]
> Sent: =E2 =E0=E5=E2=E5=F1=E8 14 2001 18:46
> To: [log in to unmask]
> Subject: Re: [TN] Solder analysis results
>=20
> You will want to take another sample after doing this. As you cool =
the
> pot
> the heavier metals (i.e. lead) will drop. When you remove the dross =
you
> will be removing tin also and could change the Sn/Pb ratio. You can =
buy
> pure tin to add back in to correct this.
>=20
> -----Original Message-----
> From: Edward Szpruch [mailto:[log in to unmask]]
> Sent: Tuesday, August 14, 2001 11:35 AM
> Subject: Re: Solder analysis results
>=20
>=20
> Phil,
> Copper content is 5.5 times higher that should be.
> Try to remove the excess copper by veeery slow cooling of your solder =
pot
> in
> static conditions.Around 190 centigrade you should get the first =
dross on
> the surface ,which is very rich in copper.Take it out.
> Good luck
> Edward
>=20
> Edward Szpruch
> Eltek , Manager of Process Engineering
> P.O.Box 159 ; 49101 Petah Tikva Israel
> Tel ++972 3 9395050 , Fax ++972 3 9309581
> e-mail [log in to unmask]
>=20
> > -----Original Message-----
> > From: Phil Nutting [SMTP:[log in to unmask]]
> > Sent: =E2 =E0=E5=E2=E5=F1=E8 14 2001 14:48
> > To: [log in to unmask]
> > Subject: [TN] Solder analysis results
> >
> > Ok folks, here is today's question.
> >
> > I just received a Certificate of Analysis (our first one) for the =
solder
> > in our Soltec Waver Solder machine. All parameters are "within
> > specification" except the percentage of copper which is at 1.6859. =
(Tin
> > is at 61.3% and Lead is at 36.99% and other stuff is at 0.0199%) =
We run
> > 63/37 in the wave. We only solder our own product, none of which =
goes
> > into "mission critical" applications. We normally build our =
product to
> > IPC-A-610C, Class 2.
> >
> > My question is two-fold. Should I worry about this? If so, how do =
I
> > fix it with 1700 pounds of solder in the solder pot?
> >
> > Thanks is advance for sharing your knowledge.
> >
> > Phil Nutting
> > Manufacturing Engineer
> > Kaiser Systems, Inc.
> >
> >
> =
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> in
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SET
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> >
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> > additional
> > information, or contact Keach Sasamori at [log in to unmask] or =
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> > ext.5315
> >
> =
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> > -------
>=20
> =
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Date: Wed, 15 Aug 2001 06:52:39 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: Re: solder balls
MIME-Version: 1.0
Content-Type: text/plain
The process is standard SMT with convection reflow using water soluble flux
and a very aggressive in-line aqueous cleaner. The solder balls seem to be
stuck under the chip components. They are very difficult to see, you have
to actually tilt the board sideways and look under the components.
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Lush, Dorothy [SMTP:[log in to unmask]]
<mailto:[SMTP:[log in to unmask]]>
Sent: Tuesday, August 14, 2001 5:06 PM
To: 'TechNet E-Mail Forum.'; 'Marsico, James'
Subject: RE: solder balls
I like Loan's answer because solderballs normally form in the middle
along
the side of the chip component and not underneath. The normal
solderball is
formed when solder follows the flux under the component during
reflow then
is "squeezed" out to the side when the molten solder solidifies,
shrinks and
pulls the chip flush to the board surface. I could see the pulling
down
action stopped by, say, epoxy or soldermask non-existence or over
presence.
Are these balls being formed during SMD or solderwave do you think?
An
aqueous SMT paste process usually will wash this ball away. No-clean
paste
requires not forming them in the first place (and only allowing them
to stay
if they are imbedded in flux and less than a certain size, etc.) by
controlling stencil aperature, solder printing(x-y and z(volume)),
solder
choice and oven profile. Is this an aqueous or no-clean solder
paste/process
we are talking about?
Dorothy Lush
Manufacturing Engineer
> ----------
> From: Marsico, James[SMTP:[log in to unmask]]
<mailto:[SMTP:[log in to unmask]]>
> Reply To: TechNet E-Mail Forum.;Marsico, James
> Sent: Tuesday, August 14, 2001 12:34 PM
> To: [log in to unmask] <mailto:[log in to unmask]>
> Subject: soldr balls
>
> Here's a relatively basic SMT question, but we've haven't
experienced this
> before. We're seeing solder balls under (way under, in the
center) chip
> components. Any recommendations?
>
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
<mailto:[log in to unmask] <mailto:[log in to unmask]> >
> 631-595-5879
>
>
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Date: Thu, 2 Aug 2001 08:59:54 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: BGA PCB mounting material thickness
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="part1_84.19917137.289aa8ca_boundary"
--part1_84.19917137.289aa8ca_boundary
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
Hi Wes!
All the boards that I've built with BGA devices on them have been .062"...had
one board with MicroBGA on it and it was down around .056". There was someone
on the TechNet a few weeks back talking about BGA on flex (with a stiffener
beneath)...
So no, there really isn't any minimum material thickness requirement that I
know of, it all depends on what your application is going to be.
-Steve Gregory-
> Hi,
>
> Is their a minimum required material thickness for PCB's with BGA components
> mounted on them? Our PCB supplier has said that they have not seen PCB's
> with BGA's on them with a material thickness of .062.
>
> Wes
> Siemens
>
--part1_84.19917137.289aa8ca_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Wes!
<BR>
<BR>All the boards that I've built with BGA devices on them have been .062"...had
<BR>one board with MicroBGA on it and it was down around .056". There was someone
<BR>on the TechNet a few weeks back talking about BGA on flex (with a stiffener
<BR>beneath)...
<BR>
<BR>So no, there really isn't any minimum material thickness requirement that I
<BR>know of, it all depends on what your application is going to be.
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Hi,
<BR>
<BR>Is their a minimum required material thickness for PCB's with BGA components
<BR>mounted on them? Our PCB supplier has said that they have not seen PCB's
<BR>with BGA's on them with a material thickness of .062.
<BR>
<BR>Wes
<BR>Siemens
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
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Date: Fri, 27 Jul 2001 09:16:13 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rick Thompson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rick Thompson <[log in to unmask]>
Subject: Assembleon PPS Pro Offline Programming?
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
I'm looking for feedback on from anyone using Assembleon (Philips) placement
equipment who is using their PPS Pro Offline Programming software. How do
you like it? How does it compare to the older PPS system on OS/2? Please
reply offline so we don't get into vendor specifics in the forum.
Thanks in advance.
Rick Thompson
Ventura Electronics Assembly
2655 Park Center Dr.
Simi Valley, CA 93065
+1 (805) 584-9858 x-304 voice
+1 (805) 584-1529 fax
[log in to unmask]
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Date: Mon, 23 Jul 2001 14:37:27 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Thorup, John" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Thorup, John" <[log in to unmask]>
Subject: Re: X-Ray Laminography Services
MIME-Version: 1.0
Content-Type: text/plain
Try SMT Unlimited in Freemont Ca. www.smtu.com
> -----Original Message-----
> From: Jorge Rodriguez [SMTP:[log in to unmask]]
> Sent: Monday, July 23, 2001 2:05 PM
> To: [log in to unmask]
> Subject: [TN] X-Ray Laminography Services
>
> Fellow Technetters
>
> I am looking for an X-Ray laminography Lab to inspect solder joints on
> some
> BGAs. Do you know of any lab that provides these type of service?
>
> Any information would be appreciated.
>
> Jorge Rodriguez
>
> --------------------------------------------------------------------------
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Date: Thu, 2 Aug 2001 17:29:14 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: [log in to unmask]
Subject: Re: IPC 600
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One of my favorite topics - not!!!
The 6010 specification (6012 is to be "spec'd") NOT 600.
600 says IF you do an inspection or test this is what it should look like and
here
are examples of various defects and what is acceptable for each class of
product.
But it DOES NOT REQUIRE ANY INSPECTIONS OR TESTS.
6012 has a sampling plan and details how many and how often various tests and
inspections are to be performed.
Too many people certify their boards to 600 because they know they are good,
but
do no inspections or tests to confirm that fact.
OK, by now you probably get the picture that I think there is a
misunderstanding of the use of 600 vs 6012. People like to cert to 600
because it doesn't tie them to a specific number of tests.
Susan Mansilla
Robisan Lab
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>One of my favorite topics - not!!!
<BR>
<BR>The 6010 specification (6012 is to be "spec'd") NOT 600.
<BR>
<BR>600 says IF you do an inspection or test this is what it should look like and
<BR>here
<BR>are examples of various defects and what is acceptable for each class of
<BR>product.
<BR>But it DOES NOT REQUIRE ANY INSPECTIONS OR TESTS.
<BR>
<BR>6012 has a sampling plan and details how many and how often various tests and
<BR>inspections are to be performed.
<BR>
<BR>Too many people certify their boards to 600 because they know they are good,
<BR>but
<BR>do no inspections or tests to confirm that fact.
<BR>
<BR>OK, by now you probably get the picture that I think there is a
<BR>misunderstanding of the use of 600 vs 6012. People like to cert to 600
<BR>because it doesn't tie them to a specific number of tests.
<BR>
<BR>Susan Mansilla
<BR>Robisan Lab</FONT></HTML>
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Date: Wed, 8 Aug 2001 15:19:56 +0100
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Mike Fenner <[log in to unmask]>
Subject: Re: Ionics again.
In-Reply-To: <A1630D6F27C0D21198AF00805F6135953E81AA@DDLSBS>
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Yes.
We should talk off line.
Mike Fenner
Indium Corporation of Europe
T: + 44 1908 580 400
F: + 44 1908 580 411
M: + 44 7810 526 317
W: www.indium.com
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Cathy Killen
Sent: Wednesday, August 08, 2001 2:51 PM
To: [log in to unmask]
Subject: [TN] Ionics again.
Hi everyone,
Can a no-clean process achieve ionic contamination <1.5ug cmsq according to
IPC TM-650 2.3.25 and a surface resistance > 5 X 10 (power of 8) according
to IPC TM-650.2.6.3.3?
If you believe it can be achieved, how?
How could you confirm it as an ongoing process control?
Cathy Killen
Training Instructor
[log in to unmask] <mailto:[log in to unmask]>
An Oasis of Training Excellence
* 028 38314305
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Date: Fri, 27 Jul 2001 13:47:50 -0400
Reply-To: Mark Charlton <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mark Charlton <[log in to unmask]>
Organization: MSI of Central Florida, Inc.
Subject: Re: NHB 5300.4 (1C)
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----- Original Message -----
From: "Rick Howieson" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Friday, July 27, 2001 10:24 AM
Subject: NHB 5300.4 (1C)
> Is there a place on the net where I can get a copy of NHB 5300.4 (1C) or
do
> I have to purchase this?
> Thanks,
> Rick Howieson
> www.deltagroupinc.com
>
> --------------------------------------------------------------------------
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Date: Thu, 2 Aug 2001 15:37:19 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rick Howieson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rick Howieson <[log in to unmask]>
Subject: Re: IPC 600
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Thanks Susan, but...IPC 600 clearly states "Printed boards should be of
uniform quality and shall conform to the IPC 6010 series". So, to conform to
this the tests and inspections outlined in 6010 must be performed.
Correct??? Maybe Jack can help us out a little?
Rick
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Thursday, August 02, 2001 2:29 PM
To: [log in to unmask]; [log in to unmask]
Subject: Re: [TN] IPC 600
One of my favorite topics - not!!!
The 6010 specification (6012 is to be "spec'd") NOT 600.
600 says IF you do an inspection or test this is what it should look like
and
here
are examples of various defects and what is acceptable for each class of
product.
But it DOES NOT REQUIRE ANY INSPECTIONS OR TESTS.
6012 has a sampling plan and details how many and how often various tests
and
inspections are to be performed.
Too many people certify their boards to 600 because they know they are good,
but
do no inspections or tests to confirm that fact.
OK, by now you probably get the picture that I think there is a
misunderstanding of the use of 600 vs 6012. People like to cert to 600
because it doesn't tie them to a specific number of tests.
Susan Mansilla
Robisan Lab
------_=_NextPart_001_01C11B9B.4E6CAB70
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charset="iso-8859-1"
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<META content="MSHTML 5.00.3019.2500" name=GENERATOR></HEAD>
<BODY>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN class=340501921-02082001>Thanks
Susan, but...IPC 600 clearly states "Printed boards should be of uniform quality
and shall conform to the IPC 6010 series". So, to conform to this the tests and
inspections outlined in 6010 must be performed. Correct??? Maybe Jack can help
us out a little?</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN
class=340501921-02082001>Rick</SPAN></FONT></DIV>
<BLOCKQUOTE>
<DIV align=left class=OutlookMessageHeader dir=ltr><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> [log in to unmask]
[mailto:[log in to unmask]]<BR><B>Sent:</B> Thursday, August 02, 2001 2:29
PM<BR><B>To:</B> [log in to unmask];
[log in to unmask]<BR><B>Subject:</B> Re: [TN] IPC
600<BR><BR></DIV></FONT><FONT face=arial,helvetica><FONT size=2>One of my
favorite topics - not!!! <BR><BR>The 6010 specification (6012 is to be
"spec'd") NOT 600. <BR><BR>600 says IF you do an inspection or test this
is what it should look like and <BR>here <BR>are examples of various defects
and what is acceptable for each class of <BR>product. <BR>But it DOES NOT
REQUIRE ANY INSPECTIONS OR TESTS. <BR><BR>6012 has a sampling plan and details
how many and how often various tests and <BR>inspections are to be performed.
<BR><BR>Too many people certify their boards to 600 because they know they are
good, <BR>but <BR>do no inspections or tests to confirm that fact. <BR><BR>OK,
by now you probably get the picture that I think there is a
<BR>misunderstanding of the use of 600 vs 6012. People like to cert to
600 <BR>because it doesn't tie them to a specific number of tests.
<BR><BR>Susan Mansilla <BR>Robisan Lab</FONT> </FONT></BLOCKQUOTE></BODY></HTML>
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Date: Thu, 2 Aug 2001 16:40:48 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: IPC 600
Mime-Version: 1.0
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a lot of the same can be said for IPC-610 to the J-STD-001.
Kat
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<BODY style="FONT: 10pt Haettenschweiler; MARGIN-LEFT: 2px; MARGIN-TOP: 2px">
<DIV>a lot of the same can be said for IPC-610 to the J-STD-001.</DIV>
<DIV> </DIV>
<DIV>Kat</DIV></BODY></HTML>
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Date: Wed, 8 Aug 2001 16:34:14 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Dean Lillibridge <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dean Lillibridge <[log in to unmask]>
Subject: Re: Capacitor 0603 vs 0402
In-Reply-To: <48359946794DD511BA3A00508BA5563F0BF227@MERCURY>
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I'm also thinking of 0402 resistors in regards to this issue: thinking of
concerns of visual inspection (values not usually marked on 0402 resistors,
but 5% (E-24) Decades for resistors could be marked on 0603), lead
times/availability of parts (suppliers stocking 0402's????), and special
nozzle requirements for side 2 placement. We were unable to use our typical
adhesive displacement process for 0603's and smaller and had to resort to
stencil paste screening of side two. I believe different nozzle sizes for
pick and place units would also be required.
Dean
Lillibridge
NEWvENTURE
TECHNOLOGIES
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Pelkey, Glenn
Sent: Wednesday, August 08, 2001 3:56 PM
To: [log in to unmask]
Subject: [TN] Capacitor 0603 vs 0402
Hi all,
I'm brainstorming on risks and benefits of 0603 caps vs 0402
caps. If the cap value, voltage rating, dielectric material, terminations,
and use conditions are the same, would one be better than the other? My
thoughts are it would be a wash or at least not significant. Here's what I
have so far:
Benefits of 0402 vs 0603:
Smaller size reduces thermal stress/strain on solder joints from CTE or
board flexing.
Smaller size uses less real estate on board
Risks of 0402 vs 0603:
Equipment may have difficulty placing
Thinner dielectric spacing to achieve same capacitance, cap higher
failure rate
Smaller size, cracks easier to develop
Higher risk of tombstoning
What do you all think? I'm sure I missed something, maybe even
wrong on some of the above.
Thanks,
Glenn
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<HTML>
<HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<TITLE>Capacitor 0603 vs 0402</TITLE>
<META content=3D'"MSHTML 4.72.3110.7"' name=3DGENERATOR>
</HEAD>
<BODY>
<DIV><SPAN class=3D455001820-08082001><FONT color=3D#0000ff face=3DArial =
size=3D2>I'm=20
also thinking of 0402 resistors in regards to this issue: thinking =
of=20
concerns of visual inspection (values not usually marked on 0402 =
resistors, but=20
5% (E-24) Decades for resistors could be marked on 0603), lead=20
times/availability of parts (suppliers stocking 0402's????), and special =
nozzle=20
requirements for side 2 placement. We were unable to use our =
typical=20
adhesive displacement process for 0603's and smaller and had to resort =
to=20
stencil paste screening of side two. I believe different nozzle =
sizes for=20
pick and place units would also be required.</FONT></SPAN></DIV>
<DIV><SPAN class=3D455001820-08082001><FONT color=3D#0000ff face=3DArial =
size=3D2> &nbs=
p;  =
; =
&=
nbsp; &n=
bsp; =20
Dean Lillibridge</FONT></SPAN></DIV>
<DIV><SPAN class=3D455001820-08082001><FONT color=3D#0000ff face=3DArial =
size=3D2> &nbs=
p;  =
; =
&=
nbsp; =20
NEWvENTURE TECHNOLOGIES </FONT></SPAN></DIV>
<DIV><SPAN class=3D455001820-08082001><FONT color=3D#0000ff face=3DArial =
size=3D2> </FONT></SPAN></DIV>
<BLOCKQUOTE>
<DIV class=3DOutlookMessageHeader><FONT face=3D"Times New Roman"=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of</B> Pelkey, =
Glenn<BR><B>Sent:</B>=20
Wednesday, August 08, 2001 3:56 PM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> [TN] Capacitor 0603 vs=20
0402<BR><BR></FONT></DIV>
<P><FONT face=3DArial size=3D2>Hi all,</FONT> </P>
<P> <FONT face=3DArial =
size=3D2>I'm=20
brainstorming on risks and benefits of 0603 caps vs 0402 caps. =
If the=20
cap value, voltage rating, dielectric material, terminations, and =
use=20
conditions are the same, would one be better than the other? =
My=20
thoughts are it would be a wash or at least not significant. =
Here's=20
what I have so far:</FONT></P>
<P><B><FONT face=3DArial size=3D2>Benefits of 0402 vs =
0603:</FONT></B> <BR><FONT=20
face=3DArial size=3D2>Smaller size reduces thermal stress/strain on =
solder=20
joints from CTE or board flexing.</FONT> <BR><FONT face=3DArial =
size=3D2>Smaller=20
size uses less real estate on board</FONT> </P>
<P><B><FONT face=3DArial size=3D2>Risks of 0402 vs 0603:</FONT></B> =
<BR><FONT=20
face=3DArial size=3D2>Equipment may have difficulty placing</FONT> =
<BR><FONT=20
face=3DArial size=3D2>Thinner dielectric spacing to achieve same =
capacitance,=20
cap higher failure rate</FONT> <BR><FONT face=3DArial =
size=3D2>Smaller size,=20
cracks easier to develop</FONT> <BR><FONT face=3DArial =
size=3D2>Higher risk of=20
tombstoning</FONT> </P>
<P> <FONT face=3DArial =
size=3D2>What=20
do you all think? I'm sure I missed something, maybe even =
wrong on=20
some of the above.</FONT> </P>
<P><FONT face=3DArial size=3D2>Thanks,</FONT> </P>
<P><FONT face=3DArial size=3D2>Glenn</FONT> =
</P></BLOCKQUOTE></BODY></HTML>
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Date: Thu, 2 Aug 2001 15:13:02 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Richard Hamilton <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Richard Hamilton <[log in to unmask]>
Subject: Re: IPC 600
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Rick,
Initally I would have thought that there was not a direct tie between them,
but according to what you quote, '...and shall conform...' I would take it
that it then does count and is a requirement.
Hey, if that is what the black and white says, that is what it says!
In the meantime, hope your having fun!
Richard
At 01:44 PM 8/2/01 -0600, you wrote:
>IPC-A-600 states "Printed boards should be of uniform quality and shall
>conform to the IPC-6010 series." and that "IPC-A-600 is a complementary
>document,..."
>Can one interpret this as IPC-6010 series being a requirement if IPC-A-600
>is being quoted?
>Thanks,
>Rick Howieson
>www.deltagroupinc.com
>
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Date: Tue, 24 Jul 2001 14:31:03 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Steve Kelly <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Steve Kelly <[log in to unmask]>
Subject: Re: Circuit boards in oil
In-Reply-To: <[log in to unmask]>
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We have made numerous circuits which have to operate continuously in oil.
The best designs use an all polyimide system including the base material as
well as the covercoats. Regards Steve Kelly
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of John Fischbach
Sent: Tuesday, July 24, 2001 1:58 PM
To: [log in to unmask]
Subject: [TN] Circuit boards in oil
This is my first time on this message board.
I am looking for information on circuit boards operating in oil. The
application would be a flex/rigid board with SMT components on it operating
in a hydraulic pump. I am wondering if there is any experience on the
affects of the oil on the components, solder and the board.
Any information would be greatly appreciated!!!
Thank you,
John
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Date: Wed, 15 Aug 2001 19:02:31 +0300
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re:
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Phil
In his country, isn't it aquavit?
Brian
"Crepeau, Phil" wrote:
>
> hi,
>
> how many ounces of schnaps do you need before you start hearing mr. arrhenius?
>
> phil
>
> -----Original Message-----
> From: Brian Ellis [mailto:[log in to unmask]]
> Sent: Wednesday, August 15, 2001 3:29 AM
> To: [log in to unmask]
> Subject: Re: [TN]
>
> Grant
>
> You have a few problems, but nothing very severe. I agree that at 5 GHz,
> "no-clean" is a no-no. However, I'd be concerned with FR-4 at those
> frequencies as the Zo of your tracks can vary considerably with
> humidity. What is unclear is whether the product operates at ONLY -40°C
> or whether at higher temps, as well. If only there, then my guess is
> that you have no specific W/S flux-related problem. A Mr. Arrhenius told
> me that you should have much reduced corrosion risks and that cleaning
> and excellent drying with adequate equipment (i.e., 10% of what is
> available on the market) will give you the required results. Ionic
> contamination testing would be adequate for process control, once you
> have established your qualification conditions.
>
> Brian
>
> Grant Emandien wrote:
> >
> > Hi all out there,
> >
> > One of our customers is concerned with the level of flux residue (no clean)
> > present on RF boards - concern that the flux characteristics negatively
> > affects circuit perfomance (FR4 material, HASL finished is being used for
> > circuitry operating at 5GHz). He has thus requested to rather assemble using
> > water-soluble flux. With water-soluble flux of course comes cleanliness
> > issues which may result in latent defects due to entrapped corrosive flux
> > residue. The product is spec'd to operate, uncoated at -40deg.C. Any
> > insights into this dilemma?
> >
> > Thanks in anticipation.
> > Grant
> >
> > **********************************************************************
> > Notice:
> >
> > The information contained in this e-mail (including any attachments) may contain commercially sensitive or confidential information which may be legally privileged and is for the sole use of the intended recipient(s). If you are not, or believe you may not be, the intended recipient, you are hereby notified that any use, dissemination, copying, review, disclosure or action taken in reliance of this e-mail is prohibited and may be unlawful. If you have received this message in error, please notify the sender immediately by reply e-mail and delete all copies of the message.
> >
> > Any views expressed in this message are those of the individual sender unless expressly stated by the sender to be given on behalf of Tellumat (Pty) Ltd. Tellumat (Pty) Ltd disclaims liability for any unauthorised opinion or representation made by the sender on behalf of Tellumat (Pty) Ltd.
> >
> > No warranty is given by Tellumat (Pty) Ltd that the integrity or security of this e-mail (including any attachments) has been maintained through transmission, nor that the communication is free of virus, interception or interference.
> >
> > **********************************************************************
> >
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Date: Wed, 15 Aug 2001 09:09:58 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Douthit <[log in to unmask]>
Subject: Re:
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Grant,
Is the unit hermetically sealed? If so is he board baked prior to sealing and are you using dry nitrogen or something simular?
If not then moisture/contamination issues can cause problems.
David A. Douthit
Manager
LoCan LLC
Grant Emandien wrote:
> Brian,
>
> Thanks for the response - the unit operates between -40deg.C to 60deg.C
>
> -----Original Message-----
> From: Brian Ellis [mailto:[log in to unmask]]
> Sent: Wednesday, August 15, 2001 12:29 PM
> To: [log in to unmask]
> Subject: Re: [TN]
>
> Grant
>
> You have a few problems, but nothing very severe. I agree that at 5 GHz,
> "no-clean" is a no-no. However, I'd be concerned with FR-4 at those
> frequencies as the Zo of your tracks can vary considerably with
> humidity. What is unclear is whether the product operates at ONLY -40°C
> or whether at higher temps, as well. If only there, then my guess is
> that you have no specific W/S flux-related problem. A Mr. Arrhenius told
> me that you should have much reduced corrosion risks and that cleaning
> and excellent drying with adequate equipment (i.e., 10% of what is
> available on the market) will give you the required results. Ionic
> contamination testing would be adequate for process control, once you
> have established your qualification conditions.
>
> Brian
>
> Grant Emandien wrote:
> >
> > Hi all out there,
> >
> > One of our customers is concerned with the level of flux residue (no
> clean)
> > present on RF boards - concern that the flux characteristics negatively
> > affects circuit perfomance (FR4 material, HASL finished is being used for
> > circuitry operating at 5GHz). He has thus requested to rather assemble
> using
> > water-soluble flux. With water-soluble flux of course comes cleanliness
> > issues which may result in latent defects due to entrapped corrosive flux
> > residue. The product is spec'd to operate, uncoated at -40deg.C. Any
> > insights into this dilemma?
> >
> > Thanks in anticipation.
> > Grant
> >
> > **********************************************************************
> > Notice:
> >
> > The information contained in this e-mail (including any attachments) may
> contain commercially sensitive or confidential information which may be
> legally privileged and is for the sole use of the intended recipient(s). If
> you are not, or believe you may not be, the intended recipient, you are
> hereby notified that any use, dissemination, copying, review, disclosure or
> action taken in reliance of this e-mail is prohibited and may be unlawful.
> If you have received this message in error, please notify the sender
> immediately by reply e-mail and delete all copies of the message.
> >
> > Any views expressed in this message are those of the individual sender
> unless expressly stated by the sender to be given on behalf of Tellumat
> (Pty) Ltd. Tellumat (Pty) Ltd disclaims liability for any unauthorised
> opinion or representation made by the sender on behalf of Tellumat (Pty)
> Ltd.
> >
> > No warranty is given by Tellumat (Pty) Ltd that the integrity or security
> of this e-mail (including any attachments) has been maintained through
> transmission, nor that the communication is free of virus, interception or
> interference.
> >
> > **********************************************************************
> >
> >
> ----------------------------------------------------------------------------
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> >
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>
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>
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Date: Thu, 16 Aug 2001 14:22:28 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Jana L. Carraway" <[log in to unmask]>
Subject: Re: Easy Thursday Question!
In-Reply-To: <[log in to unmask]>
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Thank you for the responses, they have been quite helpful.
Best Regards,
Jana Carraway
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Wenger, George M
(George)
Sent: Thursday, August 16, 2001 11:45 AM
To: [log in to unmask]
Subject: Re: [TN] Easy Thursday Question!
The Lucent Specification for ENi/IAu is 0.075 microns (3 microinch) minimum
and 0.4 microns (16 microinches) for IAu and 3.75 +/-2.5 microns (150 +/-100
microinches) of ENi. In many cases it doesn't matter what your spec is
you're going to get 100 to 400 microinches of ENi depending on how they
control their plating bath.
Regards,
George
George M. Wenger, DMTS, (609)-639-2769 fax(2343), [log in to unmask]
Celiant Corporation
Box 900 Route 569 Carter Road
Princeton NJ 08542-0900 Hopewell, NJ 08525
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Date: Wed, 15 Aug 2001 10:46:15 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Dorothy M. Lush" <[log in to unmask]>
Subject: Re: Misplace component
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Wolfgang,
What do you mean by "misplaced"?=20
Do you mean it is missing?
Do you mean it is tombstoning?
Do you mean it is misaligned?
Do you mean it is in the wrong location?
Dorothy Lush
> ----------
> From: Busko, Wolfgang[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.
> Sent: Wednesday, August 15, 2001 4:22 AM
> To: [log in to unmask]
> Subject: AW: [TN] Misplace component
>=20
> Hi Leonel,
>=20
> if the processes are checked already and there seems to be no cause =
you
> might check your checks and focus on the results, if they clearly =
show
> that
> the particular process is definetly not the cause.
>=20
> For the solderability of bare boards and parts, there=B4s always a =
good
> portion of trust in solderability of a whole batch after checking =
some
> samples.
>=20
> Cleanliness is another major factor in this game, how is the handling
> done,
> is the dust removed prior to paste print (there=B4s always some of it =
right
> out of the sealed package), for how long do the printed boards wait =
until
> beeing reflowed, and what about temperature and humidity at these hot
> summer
> days, does your paste like it as it is now?
>=20
> Just a couple of things which I think can contribute to that what =
you=B4re
> seeing.
> If it happened suddenly, can you find out what has changed?
>=20
> Good luck
> Wolfgang
>=20
> =
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Databases >
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> =
------------------------------------------------------------------------=
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> -------
>=20
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Date: Thu, 2 Aug 2001 13:22:51 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Bill Davis <[log in to unmask]>
Subject: BGA Inspection
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Hello all,
Could any one point me in the right direction to find quality BGA inspection equipment? Also, we are looking into doing assemblies with BGA's and I have never had any experience with them. Does any one have any good ideas where I can go to study up on problems, ideas, the equipment needed, the process, ect.... of placing BGA's. Any help you could give me would be greatly appreciated.
Thanks.
Bill Davis
Thermo Assembly & Test
970-242-5593
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Date: Thu, 16 Aug 2001 16:32:12 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Don Vischulis <[log in to unmask]>
Subject: Re: To wave or not to wave, that is the question...
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----=_NextPart_000_000D_01C12671.03E0AB20"
This is a multi-part message in MIME format.
------=_NextPart_000_000D_01C12671.03E0AB20
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
To wave or not to wave, that is the question...Kevin:
Double check the preheat profile. Your cap manufacturer should have the
profile recommendations. Typically, there are two criteria: rate of rise
during preheat and maximum temperature change when the caps hit the wave.
Assuming that the caps are'nt damaged going in, it sounds like the
temperature change between the preheat and the wave may be excessive.
Don Vischulis
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Kevin Stokes
Sent: Thursday, August 16, 2001 2:26 PM
To: [log in to unmask]
Subject: [TN] To wave or not to wave, that is the question...
Old problem: mounting ceramic capacitors to the bottom side of an assembly
and your customer wants you to wave them on.
We are having problems with 0805 0.22 uF and 0.1 uF caps going through
wave and cracking during the process. We are following all of the standard
protocols (preheat, etc.). My understanding is that 0805s are typically
capable of handling this process.
Anyone got any ideas short of moving the cap to the top or doing a double
sided reflow?
Kevin
Kevin Stokes
Reliability Manager
Kimball Electronics Group
(812) 634-4207
------=_NextPart_000_000D_01C12671.03E0AB20
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<TITLE>To wave or not to wave, that is the question...</TITLE>
<META content=3D"MSHTML 5.00.2722.2800" name=3DGENERATOR></HEAD>
<BODY>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN=20
class=3D220182822-16082001>Kevin:</SPAN></FONT></DIV>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN=20
class=3D220182822-16082001></SPAN></FONT> </DIV>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN =
class=3D220182822-16082001>Double=20
check the preheat profile. Your cap manufacturer should have the =
profile=20
recommendations. Typically, there are two criteria: rate of rise =
during=20
preheat and maximum temperature change when the caps hit the wave. =
Assuming that the caps are'nt damaged going in, it sounds like the =
temperature=20
change between the preheat and the wave may be =
excessive.</SPAN></FONT></DIV>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN=20
class=3D220182822-16082001></SPAN></FONT> </DIV>
<DIV><FONT color=3D#0000ff face=3DArial size=3D2><SPAN =
class=3D220182822-16082001>Don=20
Vischulis</SPAN></FONT></DIV>
<BLOCKQUOTE style=3D"MARGIN-RIGHT: 0px">
<DIV align=3Dleft class=3DOutlookMessageHeader dir=3Dltr><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of </B>Kevin =
Stokes<BR><B>Sent:</B>=20
Thursday, August 16, 2001 2:26 PM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> [TN] To wave or not to wave, that =
is the=20
question...<BR><BR></DIV></FONT>
<P><FONT face=3DArial size=3D2>Old problem: mounting ceramic =
capacitors to the=20
bottom side of an assembly and your customer wants you to wave them =
on.</FONT>=20
</P>
<P><FONT face=3DArial size=3D2>We are having problems with 0805 0.22 =
uF and 0.1 uF=20
caps going through wave and cracking during the process. We are=20
following all of the standard protocols (preheat, etc.). My=20
understanding is that 0805s are typically capable of handling this=20
process.</FONT></P>
<P><FONT face=3DArial size=3D2>Anyone got any ideas short of moving =
the cap to the=20
top or doing a double sided reflow?</FONT> <BR><BR><FONT face=3DArial=20
size=3D2>Kevin</FONT> </P>
<P><I><FONT color=3D#000080 face=3D"News Gothic MT">Kevin =
Stokes</FONT></I>=20
<BR><FONT face=3DArial size=3D2>Reliability Manager</FONT> <BR><FONT =
face=3DArial=20
size=3D2>Kimball Electronics Group</FONT> <BR><FONT face=3DArial =
size=3D2>(812)=20
634-4207</FONT> </P></BLOCKQUOTE></BODY></HTML>
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Date: Wed, 15 Aug 2001 14:31:13 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Furrow, Robert Gordon (Bob)" <[log in to unmask]>
Subject: FMA Labs in Northeast US
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi All,
With the drastic reduction occurring here at Lucent, I am going to be
without the services of our Evaluation / FMA Lab in Princeton for (at the
very least) the period it takes to relocate it. At the worst, it could be
shut down altogether. I am looking for another source to do the testing of
PWB's and Backplanes for conformance to our specifications and reliability
needs. This testing includes cross-sectioning with analysis, XRF, thermal
shock, pull tests, solderability evaluation, SIR/EM, SEM/EDX, and also FMA
of assembled boards. Ideally, I am looking for someone within driving
distance so that I can easily foster the relationship. However, I am open to
any viable suggestions. If this is a testimonial from users please respond
via the TechNet. If this is a lab promoting its capabilities, please contact
me directly at [log in to unmask] Thanks in advance for everyone's input.
P.S. I am also looking for a lab to provide me the direction, insight,
foresight, enthusiasm, and overall experience that George Wenger at our
Princeton Lab has provided me.
Thanks,
Robert Furrow
Printed Wiring Board Engineer
Strategic Supply Global Account Manager
Supply Chain Networks
Lucent Technologies
978-960-3224 [log in to unmask]
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Date: Wed, 15 Aug 2001 14:32:08 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Phil Nutting <[log in to unmask]>
Subject: Re: Panelized Boards
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Bob,
We have panelized several boards for ease of processing. We first added
a 1/2 inch v-score border around each individual board that contains the
necessary alignment holes for our semi-automatic through hole pick and
place machine. This added three benefits. 1) the alignment holes are
never filled with a component lead.
2) we can hold the board by the edges and stuff parts right out to the
edge.
3) we can hold the board in the wave solder without fixtures and still
have components right out to the edges of the board.
An added side benefit was that with multiple boards (up to 10 per panel,
assuming the total number of boards did not exceed our machine holding
and processing capability) in a panel we could reduce our machine build
time.
Depending on how deep the v-score was made will be a factor in how
flimsy the panel will be during processing.
For v-scoring info check out http://www.accusystemscorp.com/ and click
on "V-Scoring Service" and look for their FAQ page. It gives all the
gory details for v-scoring.
Phil Nutting
Manufacturing Engineer
Kaiser Systems, Inc.
-----Original Message-----
From: bbarr [mailto:[log in to unmask]]
Sent: Wednesday, August 15, 2001 1:46 PM
To: [log in to unmask]
Subject: [TN] Panelized Boards
I have a 3.5" x 5.5", .063" thick board we will be building in somewhat
high
quantities (3,000+/month). This size board is just on the edge as far as
having to put it into a basket to run through our in-line aqueous
cleaner to
keep it from moving around. I do not want the operators to have to put
this
many boards in baskets during production runs. So, my thoughts have
turned
to panelizing these boards, perhaps in a 2x2 arrangement. This would go
through the cleaner with no problem. I do not have a lot of experience
in
the best designs for panels. What are the advantages/disadvantages
between
v-score and tabs? If using tabs, how many are required to maintain the
rigidity of the panel during reflow? Does there have to be a border
around
the boards? Are fiducials required on the panel in addition to the
fiducials
already on the individual boards? Any other issues I may have missed?
Thanks.
Bob
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Date: Fri, 3 Aug 2001 11:03:23 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Don Vischulis <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Don Vischulis <[log in to unmask]>
Subject: Re: UV and Flex
In-Reply-To: <FE89B36841C1D411AB9D0002555830D739D835@BARRY>
MIME-Version: 1.0
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Ted:
Suggest you check with DuPont regarding the effects of UV on Kapton. Their
web site http://www.dupont.com/kapton/general/sumofprop.html would be a good
place to start. Keep in mind that your clear cover might act as an UV
fiter.
Don Vischulis
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Date: Mon, 23 Jul 2001 09:12:28 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "<Peter George Duncan>" <[log in to unmask]>
Subject: Re: Inspection Criteria
MIME-Version: 1.0
Content-type: text/plain; charset=us-ascii
John,
I have never seen any recommendations as to how long people should stare at
a solder joint, nor, think I, that giving a time is possible - the time
required to inspect a joint is entirely in the eye of the beholder (or
Inspector) and depends on things like the eyesight of your inspector, how
quick he/she is at assimilating and interpreting what he/she is seeing, how
critical it is to have a completely defect-free joint and how difficult it
is to detect a particular defect visually. Such human variables and other
things in visual inspection are beyond the scope of most specs. They just
tell you what to do and how to do it - how long it takes is up to the
individual.
Having said that, it sounds like your inspectors are desparate to justify
their existence. If you have your suppliers well house-trained, it should
be possible to do away with further inspection operations and accept their
certification. Remember, you can't inspect quality into a job - it merely
catches some (note some, not all) defects and costs a lot of extra money
besides. If you're only getting one minor failure in 1000 units, I'ld
either move to batch sampling at in-coming inspection, or remove in-coming
inspection altogether until such time as you have problems with the product
again. Have you asked your inspectors why they feel they have to take so
long to inspect these boards so closely?
Pete Duncan
John Fahey
<jfahey@ECHEL To: [log in to unmask]
ON.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST Aero/ST Group)
Sent by: Subject: [TN] Inspection Criteria
TechNet
<[log in to unmask]
ORG>
07/21/01
04:32 AM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
John Fahey
Do any IPC standards (particularly IPC-610-C)recommend standard
magnification, distance, and time for inspecting surface mount solder
joints?
Some of our internal inspectors can spend up to 5 mins per small PCB assy
under 30x magnification to investigate and find minor fracture in solder
joint(say 1/1000 units)supplied by our CM's. These units have already gone
through 3 rounds on 100% visual inspection at the CM. These units pass
Functional test.
My worry is that our inspectors feel that they NEED to find visual defects
in order to show that they are doing their job effectively! Unfortunately,
finding 1 defect in a batch of 1000 assemblies under high magnification
with ample time to twist and turn the board under inspection, results in us
having to do 100% inspection on every unit from our CMs!
Does anyone have any input at all on this issue?
Thanks.
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Date: Sat, 21 Jul 2001 02:08:53 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Scott Mcanall <[log in to unmask]>
Subject: Re: Solderability tests
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www.rpstest.com or www.rpsautomation.com. we make all types of solderability
testers
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Date: Fri, 3 Aug 2001 14:23:39 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Guy Ramsey <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Guy Ramsey <[log in to unmask]>
Subject: Re: Encoder with contamination.Soldering or Supplier process.
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 8bit
Yes, years ago. Our supplier used a type of lubricant that broke down with
age. We special ordered the encoder without lubricant there after. They
worked fine without for many years. Some, I am sure, are still in use.
Guy Ramsey
Senior Lab Technician / Instructor
E-Mail: [log in to unmask] <mailto:[log in to unmask]>
Ph: (610) 362-1200 x107
Fax: (610) 362-1290
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Valdez, Raul (R.)
Sent: Friday, August 03, 2001 1:30 PM
To: [log in to unmask]
Subject: [TN] Encoder with contamination.Soldering or Supplier process.
Hello,
We are using rotary switch encoders on our application and they are failing,
after some were opened, certain kind of yellow grease was found, we are not
sure if that's flux since the encoder is being soldered to the board thru
wave soldering.
After cleaning the "defective" encoder with alcohol the encoder works fine.
Anyone has had a similar experience?? soldering process or encoder supplier
fault??
Please help.
Thanks.
Raúl Valdéz.
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Date: Wed, 1 Aug 2001 22:36:20 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Malewicz Wesley <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Malewicz Wesley <[log in to unmask]>
Subject: BGA PCB mounting material thickness
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hi,
Is their a minimum required material thickness for PCB's with BGA components
mounted on them? Our PCB supplier has said that they have not seen PCB's
with BGA's on them with a material thickness of .062.
Wes
Siemens
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Date: Mon, 23 Jul 2001 08:40:36 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"d. terstegge" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: Re: Inspection Criteria
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Hi John,
Required magnification depends on minimum land-width for the inspected =
device:
>1. mm 1.75X
>0.5 to 1.0 mm 4X
0.25 to 0.5 mm 10X
<0.25 mm 20X
(data from IPC-A-610C)
Maybe you have some data about field returns ? It would be interesting =
to see how many of the defects that occur at the end-users are related to =
those so-called defective solder joints that your inspectors see. Probably =
none. Than better work on real issues !
Kind regards,
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
>>> John Fahey <[log in to unmask]> 07/20 10:32 pm >>>
Do any IPC standards (particularly IPC-610-C)recommend standard
magnification, distance, and time for inspecting surface mount solder
joints?
Some of our internal inspectors can spend up to 5 mins per small PCB assy
under 30x magnification to investigate and find minor fracture in solder
joint(say 1/1000 units)supplied by our CM's. These units have already gone
through 3 rounds on 100% visual inspection at the CM. These units pass
Functional test.
My worry is that our inspectors feel that they NEED to find visual defects
in order to show that they are doing their job effectively! Unfortunately,
finding 1 defect in a batch of 1000 assemblies under high magnification
with ample time to twist and turn the board under inspection, results in =
us
having to do 100% inspection on every unit from our CMs!
Does anyone have any input at all on this issue?
Thanks.
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Date: Tue, 24 Jul 2001 16:47:21 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
gleason <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: gleason <[log in to unmask]>
Subject: Re: Inspection Jig/Support
In-Reply-To: <[log in to unmask]>
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Mike,
We have experience in a few different methods to accomplish that. Give me a
call offline and we can see what applies to your situation.
Chuck Smith
GSC
972-494-1911
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Mike Sewell
Sent: Tuesday, July 24, 2001 2:30 PM
To: [log in to unmask]
Subject: [TN] Inspection Jig/Support
I'm looking for a moveable/articulating jig to hold a PWB during visual
inspection with a microscope. The issue is the board's weight over 9 -
10hr
shift wearing down the inspector(s). Dunno if this is would be a
counterbalanced arm/swivel ... curious to see if anyone has any thoughts
or
similar experiences.
Thanks in advance,
Mike Sewell
------=_NextPart_000_0014_01C11460.4EB0A560
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charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Dus-ascii">
<META content=3D"MSHTML 5.50.4207.2601" name=3DGENERATOR></HEAD>
<BODY>
<DIV><SPAN class=3D620284523-24072001><FONT face=3DArial color=3D#0000ff =
size=3D2>Mike,</FONT></SPAN></DIV>
<DIV><SPAN class=3D620284523-24072001><FONT face=3DArial color=3D#0000ff =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D620284523-24072001><FONT face=3DArial color=3D#0000ff =
size=3D2>We=20
have experience in a few different methods to accomplish that. Give me a =
call=20
offline and we can see what applies to your =
situation.</FONT></SPAN></DIV>
<DIV><SPAN class=3D620284523-24072001><FONT face=3DArial color=3D#0000ff =
size=3D2></FONT></SPAN> </DIV>
<DIV><SPAN class=3D620284523-24072001><FONT face=3DArial color=3D#0000ff =
size=3D2>Chuck=20
Smith</FONT></SPAN></DIV>
<DIV><SPAN class=3D620284523-24072001><FONT face=3DArial color=3D#0000ff =
size=3D2>GSC</FONT></SPAN></DIV>
<DIV><SPAN class=3D620284523-24072001><FONT face=3DArial color=3D#0000ff =
size=3D2>972-494-1911</FONT></SPAN></DIV>
<BLOCKQUOTE>
<DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of </B>Mike =
Sewell<BR><B>Sent:</B>=20
Tuesday, July 24, 2001 2:30 PM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> [TN] Inspection=20
Jig/Support<BR><BR></FONT></DIV><FONT face=3Darial,helvetica><FONT =
size=3D2>I'm=20
looking for a moveable/articulating jig to hold a PWB during visual=20
<BR>inspection with a microscope. The issue is the board's =
weight over 9=20
- 10hr <BR>shift wearing down the inspector(s). Dunno if this is =
would=20
be a <BR>counterbalanced arm/swivel ... curious to see if anyone has =
any=20
thoughts or <BR>similar experiences. <BR><BR>Thanks in advance, =
<BR>Mike=20
Sewell </FONT></FONT></BLOCKQUOTE></BODY></HTML>
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Date: Wed, 15 Aug 2001 15:02:03 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bev Christian <[log in to unmask]>
Subject: Re: FMA Labs in Northeast US
MIME-Version: 1.0
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Robert,
Here are two "close" choices I know of:
Trace Labs East,
5 North Park Drive
Hunt Valley Maryland 21030
303-683-4806
EMPF/ACI
One International Plaza, Suite 150,
Philadelphia, Penn 19113
610-362-1200
regards,
Bev Christian
Research in Motion
Waterloo, Ontario
Canada
519-888-7465
-----Original Message-----
From: Furrow, Robert Gordon (Bob) [mailto:[log in to unmask]]
Sent: August 15, 2001 2:31 PM
To: [log in to unmask]
Subject: [TN] FMA Labs in Northeast US
Hi All,
With the drastic reduction occurring here at Lucent, I am going to be
without the services of our Evaluation / FMA Lab in Princeton for (at the
very least) the period it takes to relocate it. At the worst, it could be
shut down altogether. I am looking for another source to do the testing of
PWB's and Backplanes for conformance to our specifications and reliability
needs. This testing includes cross-sectioning with analysis, XRF, thermal
shock, pull tests, solderability evaluation, SIR/EM, SEM/EDX, and also FMA
of assembled boards. Ideally, I am looking for someone within driving
distance so that I can easily foster the relationship. However, I am open to
any viable suggestions. If this is a testimonial from users please respond
via the TechNet. If this is a lab promoting its capabilities, please contact
me directly at [log in to unmask] Thanks in advance for everyone's input.
P.S. I am also looking for a lab to provide me the direction, insight,
foresight, enthusiasm, and overall experience that George Wenger at our
Princeton Lab has provided me.
Thanks,
Robert Furrow
Printed Wiring Board Engineer
Strategic Supply Global Account Manager
Supply Chain Networks
Lucent Technologies
978-960-3224 [log in to unmask]
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Date: Wed, 15 Aug 2001 12:04:01 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Lush, Dorothy" <[log in to unmask]>
Subject: Re: Fallout
MIME-Version: 1.0
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If the components are small chip parts they are making little mosaic pendant
jewelry.
But seriously, fallout takes a number of forms and part of this is because
of people who are not paid to think (PNPTT). Every reel has a leader at the
beginning and the end of the reel of empty pockets that usually wraps around
the reel at least once. Some PNPTT's count the empty and loaded pockets
which makes their count wrong in many cases. PNPTT's can be located at the
OEM and/or the CM. Of course, suppliers/manufacturers never miscount.
SMD feeders have at least one inch of strip/carrier where the top tape is
pulled back exposing the parts to a high chance of loss especially when they
are small components. Loading/setting-up the feeder is done at setup which
is some distance in time and space from production.
If a strip of parts is cut sometimes the cutting tool cuts into a pocket
leaving the back door wide open and the part is lost on some floor somewhere
along the way.
Everytime the placement machine stops and a particular feeder is pulled out
and checked is another opportunity to lose parts. I have found this occurs
more frequently with plastic carriers than with paper carriers on the
smaller chip parts. It seems the tape on top has a glue that is either
weaker and breaks 10 times more often or the glue is stronger or stickier
(so it sticks to the feeder when pulled back) and the tape breaks therefore
cannot be pulled back to expose the next part and the machine stops.
Placement machines will reject parts and lose parts for various good and bad
reasons.
Bill of materials (BOM's) are sometimes off in their quantities (this
happens much more in prototype and the transistion to full production than
in full production).
Rework needs extra parts. The smaller the part and the less reworkable the
part the more extra parts you need.
IC type parts with leads tend to get damaged at the beginning of a strip
with no empty leader pockets.
Bad layout will result in many more defects: lost part, tombstone,
misaligned, bridging. If you couple this with nonreworkable part you will
need extra parts.
I was an engineer on an account that had some RF boards. After the first
disaster I ordered my own attrition that was based on the part cost,
qty/assembly and likelyhood of the part to get lost or come in damaged.
Frankly, the time lost ordering parts and the line down time (somewhere
between 2K and 6K/hour, depending) waiting for parts pays for most
attrition.
The most difficult thing here is that most component buyers can only order
for a build qty with no attrition and this all goes back to software
programs and their inflexability.
Dorothy Lush
> ----------
> From: Rick Howieson[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.
> Sent: Wednesday, August 15, 2001 6:20 AM
> To: [log in to unmask]
> Subject: Fallout
>
> Our purchasing department believes people are taking components home and
> making necklaces...hehehe. So my question, what is the typical
> loss/fallout
> of smt components, on reel, does one see?
> Thanks,
> Rick Howieson
> Delta Group Electronics, Inc.
>
> --------------------------------------------------------------------------
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>
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Date: Wed, 25 Jul 2001 08:58:37 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, Ivy <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ivy <[log in to unmask]>
Subject: Sorry~~ I got a Virus
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Sorry, I got a Virus~~=20
If you received a File about 677-001P or CAR or ETC.... Pls do not open =
it..... =20
Sorry ~~~~~ > <=20
Regards,
Ivy
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<DIV><FONT face=3DArial>Sorry, I got a Virus~~ </FONT></DIV>
<DIV><FONT face=3DArial>If you received a File about 677-001P or CAR or=20
ETC.... Pls do not open it..... </FONT></DIV>
<DIV><FONT face=3DArial>Sorry ~~~~~ > < </FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=3DArial>Regards,</FONT></DIV>
<DIV><FONT face=3DArial>Ivy</FONT></DIV></BODY></HTML>
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Date: Mon, 23 Jul 2001 08:47:46 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Kathy Kuhlow <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: Inspection Criteria
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I prefer to have the inspectors refresh train on the minimum requirements =
annually. I also am always looking for good photo's that I can put out to =
the inspection group of minimum acceptable. The IPC-610 Rev C has some =
really good photo's and I back up this with actual photo's. I make a lot =
of the minimum acceptable photo's and get lots of copies. I have been =
doing this since I first became an IPC-610 C instructor. I also include =
these in my outside training that I do for the local tech colleges. =20
A couple of things that are in place here are:=20
1. I double check defects noted by performing secondary inspections =
periodically and on all first builds. =20
2. If a defect is questioned the person making the rejection has to prove =
in the IPC-610 why it is a defect exactly by clause. =20
I have an inspector that is always looking for the mole hill. I appreciate=
her toughness because the processes before her know that she will be =
looking at everything with a fine tooth comb and they do perform better =
knowing that. I also like the fact that she is so thorough in her =
inspections and everything gets questioned. Luckily she also really =
understands the minimum requirements and applies the criteria correctly. =
She provides a tremendous amount of feedback for borderline processes. =
This allows us to really utilize minimum acceptable as a process improvemen=
t opportunity. =20
Kathy=20
--=_22784806.0B6A06BD
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Content-Disposition: attachment; filename="TEXT.htm"
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<META content="MSHTML 5.00.2614.3500" name=GENERATOR></HEAD>
<BODY style="FONT: 10pt Haettenschweiler; MARGIN-LEFT: 2px; MARGIN-TOP: 2px">
<DIV>I prefer to have the inspectors refresh train on the minimum requirements
annually. I also am always looking for good photo's that I can put out to
the inspection group of minimum acceptable. The IPC-610 Rev C has some
really good photo's and I back up this with actual photo's. I make a lot
of the minimum acceptable photo's and get lots of copies. I have been
doing this since I first became an IPC-610 C instructor. I also include
these in my outside training that I do for the local tech colleges. </DIV>
<DIV> </DIV>
<DIV>A couple of things that are in place here are: </DIV>
<DIV>1. I double check defects noted by performing secondary inspections
periodically and on all first builds. </DIV>
<DIV>2. If a defect is questioned the person making the rejection has to prove
in the IPC-610 why it is a defect exactly by clause. </DIV>
<DIV> </DIV>
<DIV>I have an inspector that is always looking for the mole hill. I
appreciate her toughness because the processes before her know that she will be
looking at everything with a fine tooth comb and they do perform better knowing
that. I also like the fact that she is so thorough in her inspections and
everything gets questioned. Luckily she also really understands the
minimum requirements and applies the criteria correctly. She provides a
tremendous amount of feedback for borderline processes. This allows us to
really utilize minimum acceptable as a process improvement opportunity.
</DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
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Date: Fri, 17 Aug 2001 10:40:16 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dean Lillibridge <[log in to unmask]>
Subject: Re: To wave or not to wave, that is the question...
In-Reply-To: <[log in to unmask]>
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came across some technical reference articles on behalf of AVX CORPORATION.:
1) "Factors responsible for Thermal Shock Behavior of Chip Capacitors"
from the 37th Electronic Components Conference 1987, pp 145-156.
by B. Rawal, R. Ladew, and R. Garcia.
2) "Surface Mount Soldering Tchniques and Thermal Shock in Mulitlayer
Ceramic Capacitors" AVX Technical Information Series 1987 4pp.
by J. Maxwell.
Hope it helps. --Dean Lillibridge
NEWvENTURE TECHNOLOGIES
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Kevin Stokes
Sent: Thursday, August 16, 2001 4:26 PM
To: [log in to unmask]
Subject: [TN] To wave or not to wave, that is the question...
Old problem: mounting ceramic capacitors to the bottom side of an
assembly and your customer wants you to wave them on.
We are having problems with 0805 0.22 uF and 0.1 uF caps going through
wave and cracking during the process. We are following all of the standard
protocols (preheat, etc.). My understanding is that 0805s are typically
capable of handling this process.
Anyone got any ideas short of moving the cap to the top or doing a
double sided reflow?
Kevin
Kevin Stokes
Reliability Manager
Kimball Electronics Group
(812) 634-4207
------=_NextPart_000_0011_01C12709.01B2F9A0
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD W3 HTML//EN">
<HTML>
<HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<TITLE>To wave or not to wave, that is the question...</TITLE>
<META content=3D'"MSHTML 4.72.3110.7"' name=3DGENERATOR>
</HEAD>
<BODY>
<DIV><SPAN class=3D83293514-17082001><FONT color=3D#0000ff face=3DArial =
size=3D2>came=20
across some technical reference articles on behalf of AVX=20
CORPORATION.:</FONT></SPAN></DIV>
<DIV><SPAN class=3D83293514-17082001><FONT color=3D#0000ff face=3DArial=20
size=3D2></FONT></SPAN><SPAN class=3D83293514-17082001><FONT =
color=3D#0000ff=20
face=3DArial size=3D2> 1) "Factors =
responsible for=20
Thermal Shock Behavior of Chip Capacitors" from the 37th Electronic =
Components Conference 1987, pp 145-156.</FONT></SPAN></DIV>
<DIV><SPAN class=3D83293514-17082001><FONT color=3D#0000ff face=3DArial=20
size=3D2></FONT></SPAN><SPAN class=3D83293514-17082001><FONT =
color=3D#0000ff=20
face=3DArial size=3D2> by B. Rawal, R. Ladew, and R.=20
Garcia.</FONT></SPAN></DIV>
<DIV><SPAN class=3D83293514-17082001><FONT color=3D#0000ff face=3DArial=20
size=3D2></FONT></SPAN><SPAN class=3D83293514-17082001><FONT =
color=3D#0000ff=20
face=3DArial size=3D2> 2) "Surface =
Mount=20
Soldering Tchniques and Thermal Shock in Mulitlayer Ceramic =
Capacitors" AVX=20
Technical Information Series 1987 4pp.</FONT></SPAN></DIV>
<DIV><SPAN class=3D83293514-17082001><FONT color=3D#0000ff face=3DArial=20
size=3D2></FONT></SPAN><SPAN class=3D83293514-17082001><FONT =
color=3D#0000ff=20
face=3DArial size=3D2> by J. Maxwell.</FONT></SPAN></DIV>
<DIV><SPAN class=3D83293514-17082001><FONT color=3D#0000ff face=3DArial=20
size=3D2></FONT></SPAN><SPAN class=3D83293514-17082001><FONT =
color=3D#0000ff=20
face=3DArial=20
size=3D2> &nbs=
p;  =
; =20
Hope it helps. --Dean=20
Lillibridge</FONT></SPAN></DIV>
<DIV><SPAN class=3D83293514-17082001><FONT color=3D#0000ff face=3DArial=20
size=3D2></FONT></SPAN><SPAN class=3D83293514-17082001><FONT =
color=3D#0000ff=20
face=3DArial=20
size=3D2> &nbs=
p;  =
; =
&=
nbsp;=20
NEWvENTURE TECHNOLOGIES</FONT></SPAN></DIV>
<BLOCKQUOTE>
<DIV class=3DOutlookMessageHeader><FONT face=3D"Times New Roman"=20
size=3D2>-----Original Message-----<BR><B>From:</B> TechNet=20
[mailto:[log in to unmask]]<B>On Behalf Of</B> Kevin =
Stokes<BR><B>Sent:</B>=20
Thursday, August 16, 2001 4:26 PM<BR><B>To:</B>=20
[log in to unmask]<BR><B>Subject:</B> [TN] To wave or not to wave, that =
is the=20
question...<BR><BR></FONT></DIV>
<P><FONT face=3DArial size=3D2>Old problem: mounting ceramic =
capacitors to the=20
bottom side of an assembly and your customer wants you to wave them=20
on.</FONT> </P>
<P><FONT face=3DArial size=3D2>We are having problems with 0805 0.22 =
uF and 0.1=20
uF caps going through wave and cracking during the process. We =
are=20
following all of the standard protocols (preheat, etc.). My=20
understanding is that 0805s are typically capable of handling this=20
process.</FONT></P>
<P><FONT face=3DArial size=3D2>Anyone got any ideas short of moving =
the cap to=20
the top or doing a double sided reflow?</FONT> <BR><BR><FONT =
face=3DArial=20
size=3D2>Kevin</FONT> </P>
<P><I><FONT color=3D#000080 face=3D"News Gothic MT">Kevin =
Stokes</FONT></I>=20
<BR><FONT face=3DArial size=3D2>Reliability Manager</FONT> <BR><FONT =
face=3DArial=20
size=3D2>Kimball Electronics Group</FONT> <BR><FONT face=3DArial =
size=3D2>(812)=20
634-4207</FONT> </P></BLOCKQUOTE></BODY></HTML>
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Date: Mon, 23 Jul 2001 09:12:00 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
"Pelchat, Janice" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Pelchat, Janice" <[log in to unmask]>
Subject: Re: Inspection Criteria
MIME-Version: 1.0
Content-Type: text/plain
AbsoLUTELY declined! I hate rework, I hate the rework process flow, I hate
REinspection, I hate double & triple handling of boards.
Janice Pelchat
Benchmark Electronics
> -----Original Message-----
> From: Werner Engelmaier [SMTP:[log in to unmask]]
> Sent: Monday, July 23, 2001 8:43 AM
> To: [log in to unmask]
> Subject: Re: [TN] Inspection Criteria
>
> Hi Pete,
> You correctly state, that: "you can't inspect quality into a job - it
> merely
> catches some (note some, not all) defects." This is certainly true, but
> manual inspections also 'catch' a lot of deviations of workmanship
> standards
> (or other things that the inspector for some reason does not like) that
> are
> nor really defects and have no real impact on quality or reliability. Now,
> after repair or rework of these 'defects'--has the quality/reliability
> improved or declined?
>
> Werner Engelmaier
>
> --------------------------------------------------------------------------
> -------
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Date: Mon, 23 Jul 2001 16:01:37 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Stephen Brown <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Stephen Brown <[log in to unmask]>
Organization: Xyratex
Subject: Component Mass / Pad Geometries
MIME-Version: 1.0
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Question?
There is a formula somewhere which I can use to calculate the maximum
allowable mass of a component in relation to the pad lands. Basically I
want to make sure our designers do not put components on the underside
of the PCB which are going to fall off during doublesided reflow.
I would like to point out that this is a design for manufacturability
question, not an attack on the tentative grasp on reality some card
designers have.
Steve.
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Date: Thu, 26 Jul 2001 08:06:12 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ed Hare <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ed Hare <[log in to unmask]>
Subject: Re: solder paste with 2% silver
In-Reply-To: <[log in to unmask]>
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I did my PhD thesis on the creep behavior of SN62 versus SN63 (UW - 1995).
SN62 (62Sn-36Pb-2Ag) was significantly more creep resistant and had a higher
elastic modulus than SN63. This might make it more resistant to creep
rupture failure and thermal fatigue (due to creep-fatigue interactions).
Much of this research is published as cited below.
Best regards,
Ed Hare
1995 "Stress Relaxation Behavior of Eutectic Tin-Lead Solder", Journal of
Electronic Materials, October 1995.
1994 "Stress Relaxation Behavior of Eutectic Tin-Lead Solder with Silver and
Copper Additions", Ph.D. Dissertation, University of Washington, 1994.
1993 "The Effect of Ag Additions on the Stress Relaxation Behavior of
Eutectic Tin-Lead Solder", TMS Annual Meeting, Denver, CO.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Peter Barton
Sent: Thursday, July 26, 2001 7:35 AM
To: [log in to unmask]
Subject: Re: [TN] solder paste with 2% silver
One other reason given for preference of 62Sn/36Pb/2Ag is that it is a
ternary alloy with a 'pasty' range between 177deg C and 189 deg. C as
opposed to 63Sn/37Pb which is a eutectic. This slower transition from
solidus to liquidous is helpful when soldering low mass parts that are prone
to tombstoning such as 0402 and 0201.
Also according to the data published by the International Tin Research
Institute the 2% silver version gives a stronger soldered joint.
Pete Barton
ACW Technology Ltd
===== Original Message from "TechNet E-Mail Forum." <[log in to unmask]> at
26/07/01 14:31
>>From "Soldering in Electronics" by Klein Wassink:
>
>"Note on solder alloy composition:
>Solder paste in hybrid circuit technology (for thick-film circuits) usually
has a metal
composition of tin62-lead36-silver2. It should be realised that the addition
of silver is not at all necessary for the silver (-palladium) metallisation
of the
>components, but for the much thinner silver-palladium conductors on the
tick-film substrates.
The use of the more expensive silver containing alloy, instead of the common
tin60-lead40 alloy, for (relow) soldering on printed boards with copper
>solder lands is not based on technological necessity, but sometimes on
>better availability of this alloy (in the form of paste) and in most cases
merely on habit.
For the rest: with silver loaded alloy no harm is done !"
>
>Kind regards,
>
>Daan Terstegge
>SMT Centre
>Thales Communications
>Unclassified mail
>Personal Website: http://www.smtinfo.net
>
>
>
>
>>>> "Kasprzak, Bill (sys) USX" <[log in to unmask]> 07/26 1:54 pm >>>
>To all:
>
>I've been reading, with great interest, the responses so far to the use of
>2% silver paste. I am not being critical of the folks who responded so far
>but, each one cites a "reported" or "understood" advantage to using 2%
>paste.
>
>I have also heard some of same reasons for considering a switch to a 2%
>silver paste. Can any of the metallurgists on this forum confirm some of
>these reported advantages and perhaps recommend that given x,y, and z, one
>should consider using 2% silver solder alloys?
>
>Good topic.
>
>Bill Kasprzak
>Moog Inc., Electronic Assembly Engineering
>
>
>> -----Original Message-----
>> From: Eric Christison [SMTP:[log in to unmask]]
>> Sent: Thursday, July 26, 2001 4:20 AM
>> To: [log in to unmask]
>> Subject: Re: [TN] solder paste with 2% silver
>>
>> > I always understood that you had to use a paste with 2% silver if you
>> > were using components
>> > with terminations containing Palladium. The 2% silver is also supposed
>> to
>> > five you a shinier
>> > finished solder joint.
>> >
>> > Steve.
>> >
>> > Larry Koens wrote:
>> >
>> > > Got a question for everyone,
>> > >
>> > > I just switched companies and the new company that I'm with now uses
a
>> > > 62/36/2 solder paste. I've always used the 63/37 formula. The guys
who
>> > > decided to use the 2% silver are no longer with the company. My
>> > question
>> > > to you is, why would they want the 2% silver in the paste? They know
>> > > something I don't?!
>> > >
>>
>> The silver should give the alloy higher strength, better creep resistance
>> and a higher melting point. Perhaps your application benefits from one of
>> these differences?
>>
>> Regards,
>>
>>
>>
>> Eric Christison
>>
>> -------------------------------------------------------------------------
-
>> -------
>> Technet Mail List provided as a free service by IPC using LISTSERV 1.8d
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>
>> E-mail Archives
>> Please visit IPC web site (http://www.ipc.org/html/forum.htm) for
>> additional
>> information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700
>> ext.5315
>> -------------------------------------------------------------------------
-
>> -------
>
>---------------------------------------------------------------------------
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E-mail Archives
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additional
>information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700
ext.5315
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>
>---------------------------------------------------------------------------
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E-mail Archives
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additional
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Date: Thu, 26 Jul 2001 10:50:23 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Ed Hare <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ed Hare <[log in to unmask]>
Subject: Re: solder paste with 2% silver
In-Reply-To: <[log in to unmask]@eric>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Eric,
I don't know for sure, but I believe it is a combination of solid solution
strengthening of the tin phase and a more macro mechanism involving pinning
of grain boundaries by the Ag3Sn intermetallic phase. I did not resolve the
deformation mechanisms as part of my research. I was more interested in
empirical constitutive relationships of Ag (& Cu) concentration versus creep
rate because that data was not available at the time to support finite
element modeling of solder joints.
Best regards.
Ed
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Eric Christison
Sent: Thursday, July 26, 2001 10:02 AM
To: [log in to unmask]
Subject: Re: [TN] solder paste with 2% silver
Ed,
As a matter of interest. Are the improved mechanical properties a result of
the silver atoms limiting dislocations in the Xtal structure?
Regards,
>
> I did my PhD thesis on the creep behavior of SN62 versus SN63 (UW -
> 1995).
> SN62 (62Sn-36Pb-2Ag) was significantly more creep resistant and had a
> higher
> elastic modulus than SN63. This might make it more resistant to creep
> rupture failure and thermal fatigue (due to creep-fatigue interactions).
> Much of this research is published as cited below.
>
> Best regards,
> Ed Hare
>
> 1995 "Stress Relaxation Behavior of Eutectic Tin-Lead Solder", Journal
> of
> Electronic Materials, October 1995.
>
> 1994 "Stress Relaxation Behavior of Eutectic Tin-Lead Solder with
> Silver
> and
> Copper Additions", Ph.D. Dissertation, University of Washington, 1994.
>
> 1993 "The Effect of Ag Additions on the Stress Relaxation Behavior of
> Eutectic Tin-Lead Solder", TMS Annual Meeting, Denver, CO.
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Peter Barton
> Sent: Thursday, July 26, 2001 7:35 AM
> To: [log in to unmask]
> Subject: Re: [TN] solder paste with 2% silver
>
>
> One other reason given for preference of 62Sn/36Pb/2Ag is that it is a
> ternary alloy with a 'pasty' range between 177deg C and 189 deg. C as
> opposed to 63Sn/37Pb which is a eutectic. This slower transition from
> solidus to liquidous is helpful when soldering low mass parts that are
> prone
> to tombstoning such as 0402 and 0201.
>
> Also according to the data published by the International Tin Research
> Institute the 2% silver version gives a stronger soldered joint.
>
> Pete Barton
> ACW Technology Ltd
>
> ===== Original Message from "TechNet E-Mail Forum." <[log in to unmask]> at
> 26/07/01 14:31
> >From "Soldering in Electronics" by Klein Wassink:
> >
> >"Note on solder alloy composition:
> >Solder paste in hybrid circuit technology (for thick-film circuits)
> usually
> has a metal
> composition of tin62-lead36-silver2. It should be realised that the
> addition
> of silver is not at all necessary for the silver (-palladium) metallisatio
> n
> of the
> >components, but for the much thinner silver-palladium conductors on the
> tick-film substrates.
> The use of the more expensive silver containing alloy, instead of the
> common
> tin60-lead40 alloy, for (relow) soldering on printed boards with copper
> >solder lands is not based on technological necessity, but sometimes on
> >better availability of this alloy (in the form of paste) and in most
> cases
> merely on habit.
> For the rest: with silver loaded alloy no harm is done !"
> >
> >Kind regards,
> >
> >Daan Terstegge
> >SMT Centre
> >Thales Communications
> >Unclassified mail
> >Personal Website: http://www.smtinfo.net
> >
> >
> >
> >
> >>>> "Kasprzak, Bill (sys) USX" <[log in to unmask]> 07/26 1:54 pm >>>
> >To all:
> >
> >I've been reading, with great interest, the responses so far to the use
> of
> >2% silver paste. I am not being critical of the folks who responded so
> far
> >but, each one cites a "reported" or "understood" advantage to using 2%
> >paste.
> >
> >I have also heard some of same reasons for considering a switch to a 2%
> >silver paste. Can any of the metallurgists on this forum confirm some
> of
> >these reported advantages and perhaps recommend that given x,y, and z,
> one
> >should consider using 2% silver solder alloys?
> >
> >Good topic.
> >
> >Bill Kasprzak
> >Moog Inc., Electronic Assembly Engineering
> >
> >
> >> -----Original Message-----
> >> From: Eric Christison [SMTP:[log in to unmask]]
> >> Sent: Thursday, July 26, 2001 4:20 AM
> >> To: [log in to unmask]
> >> Subject: Re: [TN] solder paste with 2% silver
> >>
> >> > I always understood that you had to use a paste with 2% silver if
> you
> >> > were using components
> >> > with terminations containing Palladium. The 2% silver is also
> supposed
> >> to
> >> > five you a shinier
> >> > finished solder joint.
> >> >
> >> > Steve.
> >> >
> >> > Larry Koens wrote:
> >> >
> >> > > Got a question for everyone,
> >> > >
> >> > > I just switched companies and the new company that I'm with now
> uses
> a
> >> > > 62/36/2 solder paste. I've always used the 63/37 formula. The
> guys
> who
> >> > > decided to use the 2% silver are no longer with the company. My
> >> > question
> >> > > to you is, why would they want the 2% silver in the paste? They
> know
> >> > > something I don't?!
> >> > >
> >>
> >> The silver should give the alloy higher strength, better creep
> resistance
> >> and a higher melting point. Perhaps your application benefits from one
> of
> >> these differences?
> >>
> >> Regards,
> >>
> >>
> >>
> >> Eric Christison
Eric Christison
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Date: Mon, 23 Jul 2001 13:55:48 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re:
MIME-Version: 1.0
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LY,
Here's a few links to check out information about Low Inductance Capacitor
Arrays:
http://www.ryston.cz/pdf/avx/ti_nee.pdf
http://www.avxcorp.com/docs/techinfo/LI_TI.pdf
http://www.avxcorp.com/docs/catalogs/liarray.pdf
http://www.kyocera.com/kai/semiparts/pdfs/flipchip.pdf
http://lc.cray.com/models/cbga/
-Steve Gregory-
> I need your advice. Any information would be helpful.
>
> My boss asked me to check into the dimension feasibility of
> putting LICA in the Flip chip packages, such as, What is the clearance
> between the edge of the die to the edge
> of heat sink we need for LICA? How about the thickness of LICA vs. the
> heat sink? I will use uF range of LICA for my study.
>
> Thanks,
>
> YL
>
--part1_2b.189ba642.288dbf24_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>LY,
<BR>
<BR>Here's a few links to check out information about Low Inductance Capacitor
<BR>Arrays:
<BR>
<BR>http://www.ryston.cz/pdf/avx/ti_nee.pdf
<BR>http://www.avxcorp.com/docs/techinfo/LI_TI.pdf
<BR>http://www.avxcorp.com/docs/catalogs/liarray.pdf
<BR>http://www.kyocera.com/kai/semiparts/pdfs/flipchip.pdf
<BR>http://lc.cray.com/models/cbga/
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">I need your advice. Any information would be helpful.
<BR>
<BR>My boss asked me to check into the dimension feasibility of
<BR>putting LICA in the Flip chip packages, such as, What is the clearance
<BR>between the edge of the die to the edge
<BR>of heat sink we need for LICA? How about the thickness of LICA vs. the
<BR>heat sink? I will use uF range of LICA for my study.
<BR>
<BR>Thanks,
<BR>
<BR>YL
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
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Date: Mon, 29 Oct 2001 12:40:15 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
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We are experiencing a problem with Technet. For some reason some old =
e-mails from the July August time frame are being distributed. Please be =
patient while we work we work on fixing this glitch.
Thank you for your cooperation.
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Date: Thu, 2 Aug 2001 13:44:51 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
Rick Howieson <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Rick Howieson <[log in to unmask]>
Subject: IPC 600
MIME-Version: 1.0
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IPC-A-600 states "Printed boards should be of uniform quality and shall
conform to the IPC-6010 series." and that "IPC-A-600 is a complementary
document,..."
Can one interpret this as IPC-6010 series being a requirement if IPC-A-600
is being quoted?
Thanks,
Rick Howieson
www.deltagroupinc.com
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Date: Thu, 16 Aug 2001 08:56:39 +0900
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Johnny Kim <[log in to unmask]>
Subject: Re: Cost effective Standard via size.
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We only start adding the extra charge considering the Lot size.....from
below 4mils and 12mils for the finished hole size.
-----Original Message-----
From: Jean-Luc Lehmann [mailto:[log in to unmask]]
Sent: Wednesday, August 15, 2001 7:00 PM
To: [log in to unmask]
Subject: Re: [TN] Cost effective Standard via size.
I found out that "standard" PCB fabs usually start to charge extra cost
if
you go below 20 mils hole diameter (0.5mm). But it much depends on the
tooling they got.
Similarly I use trace width above 8 mils (200um).
Jean-Luc Lehmann
Ken Patel
<[log in to unmask] To: [log in to unmask]
OM> cc:
Sent by: Subject: [TN] Cost
effective Standard via size.
TechNet
<[log in to unmask]
ORG>
15.08.01
00:41
Please
respond to
"TechNet
E-Mail
Forum."
What is the standard minimum finished via size that will not add cost
too much? I do not want to specify the very small via which will drive
the price very high and at the same time not too big via size from the
real estate point of view.
re,
Ken Patel
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Date: Wed, 8 Aug 2001 09:05:23 +0100
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Mike Fenner <[log in to unmask]>
Subject: Re: Contamination Concern after Strip
In-Reply-To: <[log in to unmask]>
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An ionic test can be misleading as you can have zero ionics and still have
100% surface contamination with non-ionic.
If you want to know what is there then you will need to do a lab based
investigation as suggested.
On a pragmatic basis you can do a wire bond and then do a pull test.
Alternatively even more pragmatically you might just try some over volts
through the wire. Any trapped organics will vaporise and blow the wire off
or the wire will melt. There is reasonable correlation between surface junk
and pull results, at least to start. The over volts is a crude yes no but
have seen known percent over volts used as an inline test on power devices.
Mike Fenner
Indium Corporation of Europe
T: + 44 1908 580 400
F: + 44 1908 580 411
M: + 44 7810 526 317
W: www.indium.com
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Andrew Hoggan
Sent: Tuesday, August 07, 2001 6:04 PM
To: [log in to unmask]
Subject: Re: [TN] Contamination Concern after Strip
Well Bill,
I'll happily stand correction, but I think it's difficult to confirm gold
cleanliness. With copper you can try a spot of etch or flux on the copper
area, if there's mask residue then the chemical won't touch the copper,
normally you'll notice the difference between oxidised copper and the fresh
etched. With gold you couldn't get away with that. If you can get your board
into a SEM-EDX chamber you could look for organic residue on the gold
surface.
Best regards,
Andrew Hoggan
BBA Associates Ltd
www.bba-associates.com
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Bill Christoffel
Sent: 07 August 2001 14:04
To: [log in to unmask]
Subject: [TN] Contamination Concern after Strip
Input Needed !
We currently use a board that is designed for gold ball bonding (COB)
and have specified electroplated gold as the top metal layer. This
board also uses a Tayio solder mask material that is flood coated over
the top, including the gold pads then photo imaged/etched. to expose
specific gold pads for wire bonding. My concern is that the solder
mask may be leaving some type of contamination on the bonding pads. If
so, I'm looking for recommendations on how to verify cleanliness, other
than ionically (which we do) and how to remove any contamination.
Thanks,
Bill C.
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Date: Mon, 23 Jul 2001 16:14:25 EDT
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Re: Inspection Criteria
MIME-Version: 1.0
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Hi Jeff!
When you said you needed some pictures, that was my cue...hehe. I took a
scrap board and flexed it until I saw a crack, and then took a picture. Go to:
http://stevezeva.homestead.com/index.html
You can see the crack pretty clearly in the picture. This is a 1206 cap
mounted on a .062" thick board. I don't know what the dielectric is..It
really suprised me how much flex it required to produce a visible crack...and
I emphasize visible. There probably was a crack there before I could see it.
In this picture, the capacitor is definately history...the termination has
fractured as you can see...
Just thought you might like a picture...
-Steve Gregory-
> Kathy, et al,
>
> Thank you for your detailed input. In regards to your first paragraph, I am
> actually looking for some good quality photos of cracked solder joints on
> capacitors. We are getting some cracks along the solder joint of an 0805 SMT
> capacitor, probably due to board flex (these capacitors are located along
> the board edge). Do you have any photos you could share with me so I can
> show our inspectors what is acceptable/not acceptable.
>
> Anything would be of help, I do not have the capabilities/equipment to take
> photos of these defects in house.
>
> Rgds,
> John
>
> John Fahey
> Manufacturing Engineer
> Echelon Corp
>
> 415 Oakmead Parkway
> Sunnyvale
> CA 94085
> [log in to unmask]
> Phone: 408 938 5330
> Fax: 408 328 3804
>
--part1_d3.17f8d6e6.288ddfa1_boundary
Content-Type: text/html; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>Hi Jeff!
<BR>
<BR>When you said you needed some pictures, that was my cue...hehe. I took a
<BR>scrap board and flexed it until I saw a crack, and then took a picture. Go to:
<BR>
<BR>http://stevezeva.homestead.com/index.html
<BR>
<BR>You can see the crack pretty clearly in the picture. This is a 1206 cap
<BR>mounted on a .062" thick board. I don't know what the dielectric is..It
<BR>really suprised me how much flex it required to produce a visible crack...and
<BR>I emphasize visible. There probably was a crack there before I could see it.
<BR>
<BR>In this picture, the capacitor is definately history...the termination has
<BR>fractured as you can see...
<BR>
<BR>Just thought you might like a picture...
<BR>
<BR>-Steve Gregory-
<BR>
<BR>
<BR><BLOCKQUOTE TYPE=CITE style="BORDER-LEFT: #0000ff 2px solid; MARGIN-LEFT: 5px; MARGIN-RIGHT: 0px; PADDING-LEFT: 5px">Kathy, et al,
<BR>
<BR>Thank you for your detailed input. In regards to your first paragraph, I am
<BR>actually looking for some good quality photos of cracked solder joints on
<BR>capacitors. We are getting some cracks along the solder joint of an 0805 SMT
<BR>capacitor, probably due to board flex (these capacitors are located along
<BR>the board edge). Do you have any photos you could share with me so I can
<BR>show our inspectors what is acceptable/not acceptable.
<BR>
<BR>Anything would be of help, I do not have the capabilities/equipment to take
<BR>photos of these defects in house.
<BR>
<BR>Rgds,
<BR>John
<BR>
<BR>John Fahey
<BR>Manufacturing Engineer
<BR>Echelon Corp
<BR>
<BR>415 Oakmead Parkway
<BR>Sunnyvale
<BR>CA 94085
<BR>[log in to unmask]
<BR>Phone: 408 938 5330
<BR>Fax: 408 328 3804
<BR></FONT><FONT COLOR="#000000" SIZE=3 FAMILY="SANSSERIF" FACE="Arial" LANG="0"></BLOCKQUOTE>
<BR></FONT><FONT COLOR="#000000" SIZE=2 FAMILY="SANSSERIF" FACE="Arial" LANG="0">
<BR></FONT></HTML>
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Date: Mon, 23 Jul 2001 14:05:09 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
[log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Jorge Rodriguez <[log in to unmask]>
Subject: X-Ray Laminography Services
MIME-Version: 1.0
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Fellow Technetters
I am looking for an X-Ray laminography Lab to inspect solder joints on some
BGAs. Do you know of any lab that provides these type of service?
Any information would be appreciated.
Jorge Rodriguez
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Date: Mon, 29 Oct 2001 19:20:35 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Mason Hu <[log in to unmask]>
Subject: Minimum dielectric spacing for 48V trace and GND
What is the minimum dielectric spacing for a 48V trace and its return path
on the adjacent layer?
IPC-2221 recommends 0.1 mm (~4 mil). Is it enough?
Thanks
Mason Hu
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Date: Tue, 30 Oct 2001 11:03:03 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Inge Schildermans <[log in to unmask]>
Subject: Press-fit hole dimensions
Mime-Version: 1.0
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Hi all,
I was looking for an international standard which describes the tolerances on the dimensions of press-fit holes, since we had some troubles in production. I did not found anything in IPC, but I did in IEC-60352-6.
In this standard they did not make a difference between Sn-Pb finish and electroplated or immersion finish. I think this is strange since Sn/Pb has better smearing properties than the other finishes, and therefore can have other tolerances on the finishes
hole diameter. In the table they also make a difference between the diameter prior to plating and after plating. Can anyone tell me if it is necessary to define the drill diameter? In my opinion, the copper thickness in the hole and the finished hole
diameter are the only parameters which are of importance. Another strange thing is that comparing the different hole diameters, the difference between the drilled and finished hole is not always the same.
Can someone help me out of this?
Thanks,
Inge, Alcatel
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Date: Tue, 30 Oct 2001 10:07:21 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Stephen R. Gregory" <[log in to unmask]>
Subject: Is the Listserver back up?
MIME-Version: 1.0
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boundary="part1_c1.161a9049.29101c29_boundary"
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I sent a thank you to the listserver, and got a "you're welcome" back,
but havent't seen any traffic...
Just checking....
-Steve Gregory-
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<HTML><FONT FACE=arial,helvetica><FONT SIZE=2>I sent a thank you to the listserver, and got a "you're welcome" back,
<BR>but havent't seen any traffic...
<BR>
<BR>Just checking....
<BR>
<BR>-Steve Gregory-</FONT></HTML>
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Date: Tue, 30 Oct 2001 09:24:13 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: Land Patterns
Mime-Version: 1.0
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Could you add thermal profile information to the request list?
Kathy=20
--=_712B993A.C9A8C580
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<BODY
style="FONT: 10pt Abadi MT Condensed Light; MARGIN-LEFT: 2px; MARGIN-TOP: 2px">
<DIV>Could you add thermal profile information to the request list?</DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
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Date: Tue, 30 Oct 2001 09:27:52 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Kathy Kuhlow <[log in to unmask]>
Subject: Re: Blasts from the past?!??
Mime-Version: 1.0
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Yeah, I thought my email was slow but really....
Kathy=20
--=_A4FE4CEF.CAABC683
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<DIV>Yeah, I thought my email was slow but really....</DIV>
<DIV> </DIV>
<DIV>Kathy </DIV></BODY></HTML>
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Date: Tue, 30 Oct 2001 08:39:21 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Patrick Lam <[log in to unmask]>
Subject: Thermal Relief in Planes
X-To: [log in to unmask]
Mime-Version: 1.0
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Hi TechNetters,
According to IPC-2222, 9.0, the total web width should be 60% of the minimum pad
size. If the pad ties to copper planes both on top and bottom, should the web be
60% or half of 60%.
Thanks,
Patrick
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Date: Tue, 30 Oct 2001 10:53:54 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Keach Sasamori <[log in to unmask]>
Subject: Technet accepting posts again
X-cc: Jack Crawford <[log in to unmask]>
Mime-Version: 1.0
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The Technet list is open for accepting posts. The problem with all the old =
posts being sent back to the list was due to an unidentified mail server =
overseas which had apparently held hundreds of old Technet postings from =
this past summer. For some reason, through an incorrect configuration on =
their part, it was sending all those old, held e-mails back to the Technet =
list.
That is why you were being bombarded with all the old Technet posts. We =
have rectified the situation here at IPC by blocking the offending carrier =
from sending back to Technet.
I did delete 400+ emails from the Technet queue, the vast majority of =
which are old recycled posts, but there may have been a few original posts =
that may have been deleted. So if you did try to send out a new post in =
the last 24 hours and have not seen it come thu, you may post it again.=20
I apologize for the mess of e-mails that you've all received, and hope =
that your <Delete> key holds up!=20
______________
Keach Sasamori
IS Administrator
IPC
2215 Sanders Rd.
Northbrook, IL 60062
Ph: (847) 790-5315=20
Fax: (847) 504-2315
e-mail: [log in to unmask]
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Date: Tue, 30 Oct 2001 10:19:06 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Houston, Terri" <[log in to unmask]>
Subject: Looking for reliable test clip for 128 pin QFP
> Hi Folks,
>
> If anyone has first-hand experience with a reliable test adapter that can
> be used repeatedly with a 128 pin flat pak, I'd appreciate getting company
> and contact information. I'm looking for an adapter to test parts that
> have been assembled to boards.
>
> Thanks in advance,
> Terri
>
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Date: Tue, 30 Oct 2001 12:45:27 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crain, Bob" <[log in to unmask]>
Subject: Re: Solder analysis results - Stratification
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
My experience has been that the pot definitely does stratify. A couple of
years ago, we failed a solder analysis (not even close to the requirements).
When we started asking questions, it turned out that the operator dipped
shallow from a static 800 pound pot. We ran the wave for 15 minutes and
dipped deeper - presto, the solder pot passed with its usual numbers. After
that, we beefed up the work instructions for taking samples.
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Date: Tue, 30 Oct 2001 09:56:17 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Ken Patel <[log in to unmask]>
Organization: interWAVE Communications, Inc.
Subject: Component Mounting Techniques for Shock and Vibration
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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All,
I know that IPC-D-275 is superseded by IPC-2221 and 2222. As I don't
have the new ones, I want to make sure that following statements are
still correct which I have taken form IPC-D-275.
4.1.8.1 Component Mounting Techniques for Shock and Vibration
Axial leaded components weighing less than 5 grams (0.18 oz)
per lead shall be mounted with their bodies in intimate contact with the
board. Dimensional criteria for lead bending and spacing shall be as
specified in 4.2. Axial leaded components weighing 5 grams (0.18 oz) or
more, per lead should be secured to the board utilizing mounting clamps.
If the clamps are not practical due to density considerations, adhesive
bonding techniques should be employed such that the solder connections
are not the only means of mechanical support. These techniques are used
for components weighing more than 5 grams (0.18 oz) when high vibration
requirements must be met. (see paragraph 3.7.3.2 and figures 4-5 and
4-6.)
re,
Ken patel
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Date: Tue, 30 Oct 2001 13:31:47 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Gary Ferrari <[log in to unmask]>
Subject: Re: Thermal Relief in Planes
MIME-Version: 1.0
Content-Type: text/plain; charset="US-ASCII"
Content-Transfer-Encoding: 7bit
Patrick,
The total web widths should be divided by the number of internal plane
connections.
Regards,
Gary
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Date: Tue, 30 Oct 2001 11:52:16 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Schaefer <[log in to unmask]>
Subject: IPC-2226 : Does it Exist? / HDI Resources
Mime-Version: 1.0
Content-Type: multipart/alternative; boundary="=_A6FC4EF1.1B7A00FC"
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properly handle MIME multipart messages.
--=_A6FC4EF1.1B7A00FC
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Content-Transfer-Encoding: quoted-printable
I was looking through the IPC 2220 Series of specifications, and noticed a =
reference to IPC-2226 "High Density Interconnect Structure Design".
IPC does not list this specification as being available for purchase on =
their website - does anyone know the status of this specification?
Is it possible to obtain a preliminary copy?
Also, does anyone have any links to HDI / Microvia design information?
Thanks,
Dave Schaefer Voice: (204)478-8059
Senior PCB Designer FAX: (204)942-3001
Symbol Technologies Email: [log in to unmask]
1000 Waverley Street =20
Winnipeg, MB R3T 0P3 =20
--=_A6FC4EF1.1B7A00FC
Content-Type: text/html; charset=ISO-8859-1
Content-Transfer-Encoding: quoted-printable
Content-Description: HTML
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; charset=3Diso-8859-1"=
>
<META content=3D"MSHTML 5.50.4134.600" name=3DGENERATOR></HEAD>
<BODY style=3D"MARGIN-TOP: 2px; FONT: 8pt MS Sans Serif; MARGIN-LEFT: =
2px">
<DIV><FONT size=3D1>I was looking through the IPC 2220 Series of specificat=
ions,=20
and noticed a reference to IPC-2226 "High Density Interconnect Structure=20=
Design".</FONT></DIV>
<DIV><FONT size=3D1>IPC does not list this specification as being =
available for=20
purchase on their website - does anyone know the status of this=20
specification?</FONT></DIV>
<DIV><FONT size=3D1>Is it possible to obtain a preliminary copy?</FONT></DI=
V>
<DIV><FONT size=3D1></FONT> </DIV>
<DIV><FONT size=3D1>Also, does anyone have any links to HDI / Microvia =
design=20
information?</FONT></DIV>
<DIV><FONT size=3D1></FONT> </DIV>
<DIV><FONT size=3D1>Thanks,</FONT></DIV>
<DIV><FONT size=3D1></FONT> </DIV>
<DIV> </DIV>
<DIV><FONT size=3D1>Dave=20
Schaefer &=
nbsp; &nbs=
p; =20
Voice: (204)478-8059<BR>Senior PCB=20
Designer &=
nbsp; =20
FAX: (204)942-3001<BR>Symbol=20
Technologies &nb=
sp; =20
Email: <A href=3D"mailto:[log in to unmask]">[log in to unmask]</A> =
<BR>1000=20
Waverley=20
Street &nb=
sp; =20
<BR>Winnipeg, MB R3T 0P3 </FONT></DIV>
<DIV> </DIV>
<DIV><FONT size=3D1></FONT> </DIV></BODY></HTML>
--=_A6FC4EF1.1B7A00FC--
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=========================================================================
Date: Tue, 30 Oct 2001 14:11:34 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jerry Mosur <[log in to unmask]>
Subject: Solder Joint Analysis
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Hello all,
Don't worry, ... you can read on. I am not posting any links!
I wonder if anyone can shed some light on the following topic:
Using IPC-SM-782 Land Pattern program one has to input Solder Joint
Design Goals (Min.) for Toe, Heel and Side for any SMD part. However the
Surface Mount Design and Land Pattern Standards states that those dimensions
"have been determined based on industry empirical knowledge and reliability
testing".
That is fine, but how about those parts that are either too new or used very
rarely?
I am attempting to design a pattern for a Chip Capacitor 5550 with a
thickness of 2.5mm.
Could anyone share his/her SMD assembly empirical knowledge and know-how and
answer the following questions:
- what would be an optimum number (mm) for each parameter for that
particular part?
- what are those numbers based on?
- is there a formula that determines the correct ratio between the part's
dimension(s) and Solder Joint size?
Thanks in advance
Jerry
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=========================================================================
Date: Tue, 30 Oct 2001 12:18:59 -0400
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: John Maxwell <[log in to unmask]>
Subject: Re: Solder Joint Analysis
In-Reply-To: <[log in to unmask] .com>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; format=flowed
>Jerry,
If the capacitor is ceramic boy will you have fun keeping it from cracking
during reflow cool down and PWA handling.
John Maxwell
>Hello all,
>
>Don't worry, ... you can read on. I am not posting any links!
>I wonder if anyone can shed some light on the following topic:
> Using IPC-SM-782 Land Pattern program one has to input Solder Joint
>Design Goals (Min.) for Toe, Heel and Side for any SMD part. However the
>Surface Mount Design and Land Pattern Standards states that those dimensions
>"have been determined based on industry empirical knowledge and reliability
>testing".
>That is fine, but how about those parts that are either too new or used very
>rarely?
>I am attempting to design a pattern for a Chip Capacitor 5550 with a
>thickness of 2.5mm.
>Could anyone share his/her SMD assembly empirical knowledge and know-how and
>answer the following questions:
>- what would be an optimum number (mm) for each parameter for that
>particular part?
>- what are those numbers based on?
>- is there a formula that determines the correct ratio between the part's
>dimension(s) and Solder Joint size?
>
>Thanks in advance
>
>Jerry
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=========================================================================
Date: Tue, 30 Oct 2001 14:22:40 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Safavi-Bayat Shahed <[log in to unmask]>
Subject: Re: IPC-2226 : Does it Exist? / HDI Resources
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----_=_NextPart_001_01C16178.3F672F42"
This message is in MIME format. Since your mail reader does not understand
this format, some or all of this message may not be legible.
------_=_NextPart_001_01C16178.3F672F42
Content-Type: text/plain;
charset="iso-8859-1"
Hi Dave
Go to microvia.com also Michael Fitts of Fitts Solutions can be a good
source also there is HDI publication.
Shahed
-----Original Message-----
From: David Schaefer [mailto:[log in to unmask]]
Sent: Tuesday, October 30, 2001 11:52 AM
To: [log in to unmask]
Subject: [TN] IPC-2226 : Does it Exist? / HDI Resources
I was looking through the IPC 2220 Series of specifications, and noticed a
reference to IPC-2226 "High Density Interconnect Structure Design".
IPC does not list this specification as being available for purchase on
their website - does anyone know the status of this specification?
Is it possible to obtain a preliminary copy?
Also, does anyone have any links to HDI / Microvia design information?
Thanks,
Dave Schaefer Voice: (204)478-8059
Senior PCB Designer FAX: (204)942-3001
Symbol Technologies Email: [log in to unmask]
<mailto:[log in to unmask]>
1000 Waverley Street
Winnipeg, MB R3T 0P3
------_=_NextPart_001_01C16178.3F672F42
Content-Type: text/html;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 6.00.2600.0" name=3DGENERATOR></HEAD>
<BODY style=3D"MARGIN-TOP: 2px; FONT: 8pt MS Sans Serif; MARGIN-LEFT: =
2px">
<DIV><SPAN class=3D887432519-30102001><FONT size=3D1>Hi =
Dave</FONT></SPAN></DIV>
<DIV><SPAN class=3D887432519-30102001><FONT size=3D1>Go to microvia.com =
also Michael=20
Fitts of Fitts Solutions can be a good source also there is HDI=20
publication.</FONT></SPAN></DIV>
<DIV><SPAN class=3D887432519-30102001><FONT =
size=3D1></FONT></SPAN> </DIV>
<DIV><SPAN class=3D887432519-30102001><FONT =
size=3D1></FONT></SPAN> </DIV>
<DIV><SPAN class=3D887432519-30102001><FONT =
size=3D1>Shahed</FONT></SPAN></DIV>
<BLOCKQUOTE dir=3Dltr style=3D"MARGIN-RIGHT: 0px">
<DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
size=3D2>-----Original Message-----<BR><B>From:</B> David Schaefer=20
[mailto:[log in to unmask]]<BR><B>Sent:</B> Tuesday, October 30, =
2001 11:52=20
AM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> [TN] IPC-2226 : =
Does it=20
Exist? / HDI Resources<BR><BR></FONT></DIV>
<DIV><FONT size=3D1>I was looking through the IPC 2220 Series of =
specifications,=20
and noticed a reference to IPC-2226 "High Density Interconnect =
Structure=20
Design".</FONT></DIV>
<DIV><FONT size=3D1>IPC does not list this specification as being =
available for=20
purchase on their website - does anyone know the status of this=20
specification?</FONT></DIV>
<DIV><FONT size=3D1>Is it possible to obtain a preliminary =
copy?</FONT></DIV>
<DIV><FONT size=3D1></FONT> </DIV>
<DIV><FONT size=3D1>Also, does anyone have any links to HDI / =
Microvia design=20
information?</FONT></DIV>
<DIV><FONT size=3D1></FONT> </DIV>
<DIV><FONT size=3D1>Thanks,</FONT></DIV>
<DIV><FONT size=3D1></FONT> </DIV>
<DIV> </DIV>
<DIV><FONT size=3D1>Dave=20
=
Schaefer &nbs=
p; &nbs=
p; =20
Voice: (204)478-8059<BR>Senior PCB=20
=
Designer &nbs=
p; =20
FAX: (204)942-3001<BR>Symbol=20
=
Technologies =
=20
Email: <A href=3D"mailto:[log in to unmask]">[log in to unmask]</A> =
<BR>1000=20
Waverley=20
=
Street =
=20
<BR>Winnipeg, MB R3T 0P3 </FONT></DIV>
<DIV> </DIV>
<DIV><FONT size=3D1></FONT> </DIV></BLOCKQUOTE></BODY></HTML>
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Date: Tue, 30 Oct 2001 14:27:36 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dennis Fritz <[log in to unmask]>
Subject: Re: IPC-2226 : Does it Exist? / HDI Resources
MIME-Version: 1.0
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I believe the 2226 is in the proposal stage, but not issued. Lionel Fullwood
of Wong's in Hong Kong is the chairman of the effort on the standard - I have
his e-mail as [log in to unmask] I do not know the progress they made in
Orlando as I had schedule conflicts.
There should be an IPC design guideline for HDI design - while not a
standard, it should get you on the map. Check again on the IPC website for
that. I forget the number.
Denny Fritz
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Date: Tue, 30 Oct 2001 14:28:22 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Schwarzkopf, Todd" <[log in to unmask]>
Subject: Printed Circuit Assembly Cleaning
MIME-Version: 1.0
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We have some boards that are coming from the assembly house that are failing
test. We suspect that there is residue from the flux still on the board.
I believe my assembly house uses a cleanable no-clean solder. These are
high voltage boards. I am very ignorant in this area and this is all of the
information my boss is telling me. These boards used to be built in house
and worked. They started failing after outsourcing our assemblies. Can
someone give me some information and or links so I can educate myself on
this subject. My boss wants me to come up with a cleaning specification for
our printed circuit assemblies. I do not even know enough to ask questions.
Any help will be greatly appreciated.
Thanks,
Todd Schwarzkopf, C.I.D.
PCB Designer
PerkinElmer Instruments
801 S. Illinois Ave.
Oak Ridge, TN 37831-0895
[log in to unmask]
Voice: (865) 481-2427
Fax: (865) 481-2438
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Date: Tue, 30 Oct 2001 14:44:33 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Erickson, Gary" <[log in to unmask]>
Subject: Re: IPC-2226 : Does it Exist? / HDI Resources
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Try IPC/JPCA-2315 !!
Regards,
Gary
-----Original Message-----
From: Dennis Fritz [mailto:[log in to unmask]]
Sent: Tuesday, October 30, 2001 2:28 PM
To: [log in to unmask]
Subject: Re: [TN] IPC-2226 : Does it Exist? / HDI Resources
I believe the 2226 is in the proposal stage, but not issued. Lionel
Fullwood
of Wong's in Hong Kong is the chairman of the effort on the standard - I
have
his e-mail as [log in to unmask] I do not know the progress they made in
Orlando as I had schedule conflicts.
There should be an IPC design guideline for HDI design - while not a
standard, it should get you on the map. Check again on the IPC website for
that. I forget the number.
Denny Fritz
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN">
<HTML>
<HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-1">
<META NAME=3D"Generator" CONTENT=3D"MS Exchange Server version =
5.5.2653.12">
<TITLE>RE: [TN] IPC-2226 : Does it Exist? / HDI Resources</TITLE>
</HEAD>
<BODY>
<P><FONT SIZE=3D2>Try IPC/JPCA-2315 !!</FONT>
</P>
<P><FONT SIZE=3D2>Regards,</FONT>
</P>
<P><FONT SIZE=3D2>Gary</FONT>
</P>
<P><FONT SIZE=3D2>-----Original Message-----</FONT>
<BR><FONT SIZE=3D2>From: Dennis Fritz [<A =
HREF=3D"mailto:[log in to unmask]">mailto:[log in to unmask]</A>]</FONT>
<BR><FONT SIZE=3D2>Sent: Tuesday, October 30, 2001 2:28 PM</FONT>
<BR><FONT SIZE=3D2>To: [log in to unmask]</FONT>
<BR><FONT SIZE=3D2>Subject: Re: [TN] IPC-2226 : Does it Exist? / HDI =
Resources</FONT>
</P>
<BR>
<P><FONT SIZE=3D2>I believe the 2226 is in the proposal stage, but not =
issued. Lionel Fullwood</FONT>
<BR><FONT SIZE=3D2>of Wong's in Hong Kong is the chairman of the effort =
on the standard - I have</FONT>
<BR><FONT SIZE=3D2>his e-mail as [log in to unmask] I do =
not know the progress they made in</FONT>
<BR><FONT SIZE=3D2>Orlando as I had schedule conflicts.</FONT>
</P>
<P><FONT SIZE=3D2>There should be an IPC design guideline for HDI =
design - while not a</FONT>
<BR><FONT SIZE=3D2>standard, it should get you on the map. Check =
again on the IPC website for</FONT>
<BR><FONT SIZE=3D2>that. I forget the number.</FONT>
</P>
<P><FONT SIZE=3D2>Denny Fritz</FONT>
</P>
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SIZE=3D2>---------------------------------------------------------------=
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Date: Tue, 30 Oct 2001 13:48:54 -0600
Reply-To: [log in to unmask]
Sender: TechNet <[log in to unmask]>
From: Ashok Dhawan <[log in to unmask]>
Subject: Re: Panelized Boards
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Dean
Can you fax me also. My Fax # 204-631-7294. Thanks in advance.
Ashok Dhawan P.Eng.
Engineering
C-MAC Network Systems Inc.
1455 Mountain Roar
Winnipeg Manitoba R2X 2Y9
WWW.CMAC.COM
TEL (204) 631 7208
FAX (204) 631 7294
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of Dean Lillibridge
> Sent: Wednesday, August 15, 2001 1:45 PM
> To: [log in to unmask]
> Subject: Re: [TN] Panelized Boards
>
>
> if you don't mind supplying me with your fax number, I can fax over some
> considerations that we have used for panelizing boards.
> --Dean Lillibridge
> NEWvENTURE TECHNOLOGIES
> (860) 253-7057
>
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of bbarr
> Sent: Wednesday, August 15, 2001 1:46 PM
> To: [log in to unmask]
> Subject: [TN] Panelized Boards
>
>
> I have a 3.5" x 5.5", .063" thick board we will be building in
> somewhat high
> quantities (3,000+/month). This size board is just on the edge as far as
> having to put it into a basket to run through our in-line aqueous
> cleaner to
> keep it from moving around. I do not want the operators to have
> to put this
> many boards in baskets during production runs. So, my thoughts have turned
> to panelizing these boards, perhaps in a 2x2 arrangement. This would go
> through the cleaner with no problem. I do not have a lot of experience in
> the best designs for panels. What are the advantages/disadvantages between
> v-score and tabs? If using tabs, how many are required to maintain the
> rigidity of the panel during reflow? Does there have to be a border around
> the boards? Are fiducials required on the panel in addition to
> the fiducials
> already on the individual boards? Any other issues I may have missed?
>
> Thanks.
>
>
> Bob
>
> ------------------------------------------------------------------
> ----------
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Date: Tue, 30 Oct 2001 16:35:38 EST
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Werner Engelmaier <[log in to unmask]>
Subject: Re: Solder Joint Analysis
MIME-Version: 1.0
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Hi Jerry,
Solder joint size per se is not relevant for SJ reliability; only the SJ
thickness is of primary importance. you should follow the guidelines in
IPC-D-279.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 386-437-8747, Fax: 386-437-8737
E-mail: [log in to unmask], Website: www.engelmaier.com
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Date: Wed, 31 Oct 2001 08:08:27 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "<Peter George Duncan>" <[log in to unmask]>
Subject: Re: Land Patterns
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Thermal profile information is difficult to include on individual component
data sheets, as it depends on the solder you're going to use and the
thermal mass of other components around it on the board assembly.
Has a stone been set rolling down a mossy hill with this thread?
Pter Duncan
Kathy Kuhlow
<Kathy@BTW-IN To: [log in to unmask]
C.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
Sent by: Aero/ST Group)
TechNet Subject: Re: [TN] Land Patterns
<[log in to unmask]
ORG>
10/30/01
11:24 PM
Please
respond to
"TechNet
E-Mail
Forum."
Could you add thermal profile information to the request list?
Kathy
(See attached file: TEXT.htm)
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Date: Tue, 30 Oct 2001 19:23:36 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Fish <[log in to unmask]>
Subject: Re: AW: [TN] Antw: [TN] exposing intermetallic on BGA pads..
.
MIME-Version: 1.0
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I believe it to be LT 1 um, but I'd ask Paul Vianco at Sandia Laboratories
505-844-3429. Dr. Vianco wrote the "AWS Soldering Handbook, 3rd Edition".
So, he is qualified.
Please let me know the answer.
Dave Fish
----- Original Message -----
From: "Bev Christian" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Friday, October 26, 2001 8:45 AM
Subject: Re: [TN] AW: [TN] Antw: [TN] exposing intermetallic on BGA pads.. .
> TechNetters,
> Questions of my sex aside.. got your attention now, right?
>
> I will ask again what do people expect for the average thickness of the
> tin/nickel intermetallic. The closest answer I got was the rate of
growth,
> but not what one expects it to start at after a single reflow. I bring it
> up here as it is related to the current discussion.
>
> regards,
> Bev Christian
> Resaerch in Motion
>
> -----Original Message-----
> From: Earl Moon [mailto:[log in to unmask]]
> Sent: October 26, 2001 1:30 PM
> To: [log in to unmask]
> Subject: Re: [TN] AW: [TN] Antw: [TN] exposing intermetallic on BGA
> pads...
>
>
> Guenter,
>
> As you replied to me personally, I respected your not posting on the
> TechNet. So, I said it was someone else but everyone knows it must be you.
> Simply, I didn't/don't want to betray your confidence as I respect your
> privacy.
>
> Earl
>
> ps. I am enjoying this and learning much from this conversation. Still, I
am
> stirring the pot for everyone to benefit. I'm too old to add much but if I
> can elicit responses from real experts, like you, we will all learn more
>
> Earl
>
> ----- Original Message -----
> From: "Guenter Grossmann" <[log in to unmask]>
> To: <[log in to unmask]>
> Sent: Friday, October 26, 2001 8:46 AM
> Subject: Re: [TN] AW: [TN] Antw: [TN] exposing intermetallic on BGA
pads...
>
>
> Earl
> Well, I think some acceptance criteria is necessary since if there isn't
> even no solder is accepted. However, I agree that in many cases I feel
that
> the acceptance criteria mare more designed in a manner that they can be
> controlled rather than in respect to reliability.
>
> Regarding your comment of IMC and the discussion we had offline I thought
> abut the thing at home:
> - Suppose you do a good job in designing your solder profile. This means,
in
> my understanding, that just enough heat is brought into a PCB that all
> joints are formed and as little heat as possible stresses the components.
As
> an effect the IMC will be very thin.
> - Suppose again that you rework. Again you do a good job in removing the
> remaining tin thoroughly. To do so you need to keep the pad to be cleaned
at
> elevated temperature for quite a while.
>
> The result will be, that
> - Because of thoroughly removing the solder you expose IMC or
> - Because the IMC is thin and the pad is warm for some time the remaining
> little amount of tin that covers the IMC is transformed into IMC.
>
> Hence, one can say that a job too well done leads to a poor solder joint.
> And thus ( just to steer the pot a bit as you like it) if you instruct
> people for repairing solder joints and it works, your instruction wasn't
too
> accurate? ( HeHe)
>
> Have a great weekend
>
> Ps: What do you mean by : you spoke with someone who is also much
respected
> in this field?
>
>
>
> Guenter Grossmann
>
> Swiss Federal Institute for Materials Testing and Research EMPA
> Centre for Reliability
> 8600 Duebendorf
> Switzerland
>
> Phone: xx41 1 823 4279
> Fax : xx41 1823 4054
> mail: [log in to unmask]
>
> --------------------------------------------------------------------------
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Date: Tue, 30 Oct 2001 19:39:59 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: David Fish <[log in to unmask]>
Subject: Re: Component Mounting Techniques for Shock and Vibration
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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IPC-D-275, 4.1.8.1, paragraph 1 is repeated word for word in IPC-2221,
8.1.9.1, paragraph 1, as you state [except, of course, the numbering of the
referenced paragraphs and figures]. The paragraph following your paragraph
is substantially different.
Dave Fish
----- Original Message -----
From: "Ken Patel" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Tuesday, October 30, 2001 9:56 AM
Subject: [TN] Component Mounting Techniques for Shock and Vibration
> All,
> I know that IPC-D-275 is superseded by IPC-2221 and 2222. As I don't
> have the new ones, I want to make sure that following statements are
> still correct which I have taken form IPC-D-275.
>
> 4.1.8.1 Component Mounting Techniques for Shock and Vibration
> Axial leaded components weighing less than 5 grams (0.18 oz)
> per lead shall be mounted with their bodies in intimate contact with the
> board. Dimensional criteria for lead bending and spacing shall be as
> specified in 4.2. Axial leaded components weighing 5 grams (0.18 oz) or
> more, per lead should be secured to the board utilizing mounting clamps.
> If the clamps are not practical due to density considerations, adhesive
> bonding techniques should be employed such that the solder connections
> are not the only means of mechanical support. These techniques are used
> for components weighing more than 5 grams (0.18 oz) when high vibration
> requirements must be met. (see paragraph 3.7.3.2 and figures 4-5 and
> 4-6.)
>
>
> re,
> Ken patel
>
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Date: Tue, 30 Oct 2001 19:50:27 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Valquirio Carvalho <[log in to unmask]>
Subject: Re: Press-fit hole dimensions
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Hi Inge,
In some cases the drilled hole diameter is critical to the success of the
press fit connection. The manufacturer of the press fit component may
specify the drilled hole size along with the plated hole size and plated
hole size tolerance for a given component. In the case of some small
(finished hole size 0.022") compliant pins I had to work with, the hole size
prior to plating was more important than the finished hole size when looking
at the required insertion force. It is now our policy to call out the
drilled hole size on the fab drawing along with the finished hole size and
finished hole size tolerance for holes that will receive press fit
components whenever the manufacturer recommends a drilled hole size.
As far as board finish goes, I have seen similar results when working with
Sn/Pb and gold as a general rule. One other thing to consider is the finish
of the component. While pressing pin with a Sn/Pb finish into a board I
haven't noticed much difference in insertion force with varied board
finishes. I have however noticed that pressing a gold finished lead into a
gold finished board requires a significantly higher force. That however has
not caused us to change the hole size on the board, yet.
Either way, I recommend you work closely with the manufacturer of the
component that you want to press while defining your board characteristics.
Regardless of which manufacturer I have dealt with (Amp, EPT, Teradyne, FCI,
etc...), I have received the right information to make that part work on a
given board.
I hope this helps...
Valquirio N. Carvalho
Mfg. Engineer
Teradyne, Inc.
P.S. I don't work in the connector division of Teradyne. I work in the
board assembly end of things.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Inge Schildermans
Sent: Tuesday, October 30, 2001 5:03 AM
To: [log in to unmask]
Subject: [TN] Press-fit hole dimensions
Hi all,
I was looking for an international standard which describes the tolerances
on the dimensions of press-fit holes, since we had some troubles in
production. I did not found anything in IPC, but I did in IEC-60352-6.
In this standard they did not make a difference between Sn-Pb finish and
electroplated or immersion finish. I think this is strange since Sn/Pb has
better smearing properties than the other finishes, and therefore can have
other tolerances on the finishes
hole diameter. In the table they also make a difference between the
diameter prior to plating and after plating. Can anyone tell me if it is
necessary to define the drill diameter? In my opinion, the copper thickness
in the hole and the finished hole
diameter are the only parameters which are of importance. Another strange
thing is that comparing the different hole diameters, the difference between
the drilled and finished hole is not always the same.
Can someone help me out of this?
Thanks,
Inge, Alcatel
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Date: Tue, 30 Oct 2001 17:22:11 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Crepeau, Phil" <[log in to unmask]>
Subject: Re: modeling
MIME-Version: 1.0
Content-Type: multipart/alternative;
boundary="----_=_NextPart_001_01C161AA.7745EB10"
This message is in MIME format. Since your mail reader does not understand
this format, some or all of this message may not be legible.
------_=_NextPart_001_01C161AA.7745EB10
Content-Type: text/plain;
charset="iso-8859-1"
hi,
i've tried to download this evolver program, but smart download keeps timing out. have you downloaded it from the umn site?
phil
-----Original Message-----
From: Stephen R. Gregory [mailto:[log in to unmask]]
Sent: Tuesday, October 23, 2001 7:49 AM
To: [log in to unmask]
Subject: Re: [TN] modeling
Hi Waleed!
Go to:
http://www.ctcms.nist.gov/programs/solder/
There you'll find a program called "Surface Evolver" that you can use to model various solder joints...plus there's also a few other good links from that page.
-Steve Gregory-
Dear:
Does anyone know anything about modeling ( solder joint
,traces,leads,..).
thanks
waleed
------_=_NextPart_001_01C161AA.7745EB10
Content-Type: text/html;
charset="iso-8859-1"
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
<META content="MSHTML 5.50.4134.600" name=GENERATOR></HEAD>
<BODY>
<DIV><SPAN class=117052101-31102001><FONT face=Arial color=#0000ff
size=2>hi,</FONT></SPAN></DIV>
<DIV><SPAN class=117052101-31102001><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=117052101-31102001><FONT face=Arial color=#0000ff size=2>i've
tried to download this evolver program, but smart download keeps timing
out. have you downloaded it from the umn site?</FONT></SPAN></DIV>
<DIV><SPAN class=117052101-31102001><FONT face=Arial color=#0000ff
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=117052101-31102001><FONT face=Arial color=#0000ff
size=2>phil</FONT></SPAN></DIV>
<BLOCKQUOTE>
<DIV class=OutlookMessageHeader dir=ltr align=left><FONT face=Tahoma
size=2>-----Original Message-----<BR><B>From:</B> Stephen R. Gregory
[mailto:[log in to unmask]]<BR><B>Sent:</B> Tuesday, October 23, 2001 7:49
AM<BR><B>To:</B> [log in to unmask]<BR><B>Subject:</B> Re: [TN]
modeling<BR><BR></FONT></DIV><FONT face=arial,helvetica><FONT size=2>Hi
Waleed! <BR><BR>Go to: <BR><BR>http://www.ctcms.nist.gov/programs/solder/
<BR><BR>There you'll find a program called "Surface Evolver" that you can use
to model various solder joints...plus there's also a few other good links from
that page. <BR><BR>-Steve Gregory- <BR><BR><BR>
<BLOCKQUOTE
style="PADDING-LEFT: 5px; MARGIN-LEFT: 5px; BORDER-LEFT: #0000ff 2px solid; MARGIN-RIGHT: 0px"
TYPE="CITE">Dear:
<BR> Does
anyone know anything about modeling ( solder joint <BR>,traces,leads,..).
<BR><BR> thanks
<BR> waleed <BR></FONT><FONT lang=0
face=Arial color=#000000 size=3
FAMILY="SANSSERIF"></BLOCKQUOTE><BR></FONT><FONT lang=0 face=Arial
color=#000000 size=2
FAMILY="SANSSERIF"><BR></BLOCKQUOTE></FONT></FONT></BODY></HTML>
------_=_NextPart_001_01C161AA.7745EB10--
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Date: Wed, 31 Oct 2001 08:21:39 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Edward Szpruch <[log in to unmask]>
Subject: Re: Technet accepting posts again
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
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Thanks a lot.
This is really funny to think,that there is someone,who accumulated too =
much
Technet posts and now is leaking.
Maybe he needs to install some kind of overflow to "trash" or pressure
relief device???
Edward Szpruch
Eltek Ltd
P.O.Box 159 ; 49101 Petah Tikva Israel
Tel ++972 3 9395050 , Fax ++972 3 9309581
e-mail [log in to unmask]
> -----Original Message-----
> From: Keach Sasamori [SMTP:[log in to unmask]]
> Sent: =E2 =E0=E5=F7=E8=E5=E1=F8 30 2001 18:54
> To: [log in to unmask]
> Subject: [TN] Technet accepting posts again
>=20
> The Technet list is open for accepting posts. The problem with all =
the old
> posts being sent back to the list was due to an unidentified mail =
server
> overseas which had apparently held hundreds of old Technet postings =
from
> this past summer. For some reason, through an incorrect configuration =
on
> their part, it was sending all those old, held e-mails back to the =
Technet
> list.
>=20
> That is why you were being bombarded with all the old Technet posts. =
We
> have rectified the situation here at IPC by blocking the offending =
carrier
> from sending back to Technet.
>=20
> I did delete 400+ emails from the Technet queue, the vast majority of
> which are old recycled posts, but there may have been a few original =
posts
> that may have been deleted. So if you did try to send out a new post =
in
> the last 24 hours and have not seen it come thu, you may post it =
again.=20
>=20
> I apologize for the mess of e-mails that you've all received, and =
hope
> that your <Delete> key holds up!=20
>=20
>=20
>=20
> ______________
> Keach Sasamori
> IS Administrator
> IPC
> 2215 Sanders Rd.
> Northbrook, IL 60062
> Ph: (847) 790-5315=20
> Fax: (847) 504-2315
> e-mail: [log in to unmask]
>=20
> =
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> -------
> Technet Mail List provided as a free service by IPC using LISTSERV =
1.8d
> To unsubscribe, send a message to [log in to unmask] with following =
text in
> the BODY (NOT the subject field): SIGNOFF Technet
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SET
> Technet NOMAIL
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Databases >
> E-mail Archives
> Please visit IPC web site (http://www.ipc.org/html/forum.htm) for
> additional
> information, or contact Keach Sasamori at [log in to unmask] or =
847-509-9700
> ext.5315
> =
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> -------
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=========================================================================
Date: Wed, 31 Oct 2001 09:12:43 +0100
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "d. terstegge" <[log in to unmask]>
Subject: Re: Printed Circuit Assembly Cleaning
X-To: [log in to unmask]
MIME-Version: 1.0 (Generated by NET-TEL Mailguard SMTP version 4.0.0.22)
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Hi Todd,
I don't know exactly what you are looking for, but some excellent starting =
points for information about board cleaning are:
http://www.residues.com/libraries1.htm=20
http://www.protonique.com/unepstoc
http://www.precisioncleaningweb.com
With the search-engine on http://www.smtinfo.net/smtlinks.html (that's my =
own webpage) you should be able to find some more URL's of interest.
Hope this helps,
Daan Terstegge
SMT Centre
Thales Communications
Unclassified mail
Personal Website: http://www.smtinfo.net
>>> "Schwarzkopf, Todd" <[log in to unmask]> 10/30 8:28 pm =
>>>
We have some boards that are coming from the assembly house that are =
failing
test. We suspect that there is residue from the flux still on the board.
I believe my assembly house uses a cleanable no-clean solder. These are
high voltage boards. I am very ignorant in this area and this is all of =
the
information my boss is telling me. These boards used to be built in house
and worked. They started failing after outsourcing our assemblies. Can
someone give me some information and or links so I can educate myself on
this subject. My boss wants me to come up with a cleaning specification =
for
our printed circuit assemblies. I do not even know enough to ask =
questions.
Any help will be greatly appreciated.
Thanks,
Todd Schwarzkopf, C.I.D.
PCB Designer
PerkinElmer Instruments
801 S. Illinois Ave.
Oak Ridge, TN 37831-0895
[log in to unmask]
Voice: (865) 481-2427
Fax: (865) 481-2438
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=========================================================================
Date: Tue, 30 Oct 2001 21:04:06 +0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: sk zhang <[log in to unmask]>
Subject: some process questions--
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------=_NextPart_000_0012_01C16186.69A1AE00--
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Date: Wed, 31 Oct 2001 09:33:48 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Andre Leclair <[log in to unmask]>
Subject: Smt Low profile connectors
Hi All
We just had a customer raise a concern regarding some SMT connectors. What
they noticed was the solder tails all being raised in the solder. Not 1
lead on any connector was flat to the pad.
What we noticed was the solder tails are not on the same plane as the
fitting nails of the connectors. When you place the connector flat to the
PCB, the solder nails are off the pad by about 0.005", which can cause a
problem when you have a 0.006" stencil.
I have contacted the manufacture but have yet to hear anything.
Has anyone run across this concern before? Any info would be appreciated
Thanks
Andre
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Date: Wed, 31 Oct 2001 16:05:01 -0000
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Cathy Killen <[log in to unmask]>
Subject: 0402 Resistors & Caps
MIME-Version: 1.0
Content-Type: text/plain
Does anyone know the surface mount land pattern for 0402 resistors and caps?
Thanks in advance.
Cathy Killen
Training Instructor
Smtek Europe Ltd.
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otherwise expressly indicated.
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Date: Wed, 31 Oct 2001 08:10:37 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Glynn Shaw <[log in to unmask]>
Subject: Wanted: Used TMA
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; format=flowed
Thermal-Mechanical Analyzer desired for measuring laminate cure and TD-260.
Please respond off-line.
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Date: Wed, 31 Oct 2001 11:14:38 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Bill Raymond <[log in to unmask]>
Subject: Re: Smt Low profile connectors
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; format=flowed
Hi Andre,
We don't use many SMT connectors, so we don't see what you're
seeing... however it sure reminds me of the many companies who make PBGA
devices and who use the JEDEC package specification which states .008"
maximum coplanarity - I have the same question as you... "How do I process
this part with a .005" or .006" thick stencil??? " Luckily, so far, the
majority of PBGA parts have FAR less than .008" :)
Bill...
At 09:33 AM 10/31/2001 -0600, you wrote:
>Hi All
>
>We just had a customer raise a concern regarding some SMT connectors. What
>they noticed was the solder tails all being raised in the solder. Not 1
>lead on any connector was flat to the pad.
>What we noticed was the solder tails are not on the same plane as the
>fitting nails of the connectors. When you place the connector flat to the
>PCB, the solder nails are off the pad by about 0.005", which can cause a
>problem when you have a 0.006" stencil.
>I have contacted the manufacture but have yet to hear anything.
>
>Has anyone run across this concern before? Any info would be appreciated
>
>Thanks
>Andre
>
>---------------------------------------------------------------------------------
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>information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700
>ext.5315
>---------------------------------------------------------------------------------
>
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Date: Wed, 31 Oct 2001 11:30:42 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: "Marsico, James" <[log in to unmask]>
Subject: STRIPPING MAGNET WIRE
MIME-Version: 1.0
Content-Type: text/plain
Looking for a recommendation for a chemical stripper to strip bi-filar (?)
magnet wire. Any suggestions?
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
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Date: Wed, 31 Oct 2001 11:43:59 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Sherry Warner <[log in to unmask]>
Subject: Re: STRIPPING MAGNET WIRE
In-Reply-To: <[log in to unmask]>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii" ; format="flowed"
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=46or the magnetic wire we have used in the past this has worked well:
Insulstrip Jell
Ambion Corporation
37 Naugatuck Drive
Naugatuck, CT 06770
(203) 723-1437
>Looking for a recommendation for a chemical stripper to strip bi-filar (?)
>magnet wire. Any suggestions?
>
>Jim Marsico
>Senior Engineer
>Production Engineering
>EDO Electronics Systems Group
>[log in to unmask] <mailto:[log in to unmask]>
>631-595-5879
>
>---------------------------------------------------------------------=20
>------------
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>Databases > E-mail Archives
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l
>information, or contact Keach Sasamori at [log in to unmask] or=20
>847-509-9700 ext.5315
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>------------
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Date: Wed, 31 Oct 2001 16:32:16 -0000
Reply-To: "[log in to unmask]" <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Dougal Stewart <[log in to unmask]>
Subject: Re: 0402 Resistors & Caps
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
The overall footprint is 2.248mm x 0.738mm made up of two pads 0.738x0.896mm with a gap of 0.456mm between
Dougal Stewart
email [log in to unmask]
telephone +44 1896 822204
mobile +44 7984 629667
-----Original Message-----
From: Cathy Killen [SMTP:[log in to unmask]]
Sent: 31 October 2001 16:05
To: [log in to unmask]
Subject: [TN] 0402 Resistors & Caps
Does anyone know the surface mount land pattern for 0402 resistors and caps?
Thanks in advance.
Cathy Killen
Training Instructor
Smtek Europe Ltd.
The information contained in the E-mail is confidential. It is intended only
for the stated addressee(s) and access to it by any other person is
unauthorised.
The views expressed in this E-mail are those of the author, and do not
represent the views of Smtek Europe, its associates or subsidiaries, unless
otherwise expressly indicated.
Please note: It is your responsibility to scan this E-mail for viruses.
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Date: Wed, 31 Oct 2001 18:54:15 +0200
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Brian Ellis <[log in to unmask]>
Subject: Re: STRIPPING MAGNET WIRE
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit
In a former life, I used to sell 4 enamel strippers and even
manufactured a fifth. These were based mainly on organic-acidified
methylene chloride blends and used to work with about 2 minutes
immersion. However, each enamel type required a different formulation.
Also, you might try ordinary paint strippers: these will work with many
enamels.
Brian
"Marsico, James" wrote:
>
> Looking for a recommendation for a chemical stripper to strip bi-filar (?)
> magnet wire. Any suggestions?
>
> Jim Marsico
> Senior Engineer
> Production Engineering
> EDO Electronics Systems Group
> [log in to unmask] <mailto:[log in to unmask]>
> 631-595-5879
>
> ---------------------------------------------------------------------------------
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> Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional
> information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315
> ---------------------------------------------------------------------------------
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Date: Wed, 31 Oct 2001 11:54:39 -0500
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Safavi-Bayat Shahed <[log in to unmask]>
Subject: Re: 0402 Resistors & Caps
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Cathy,
Go to www.toplinedummy.com .
-----Original Message-----
From: Cathy Killen [mailto:[log in to unmask]]
Sent: Wednesday, October 31, 2001 11:05 AM
To: [log in to unmask]
Subject: [TN] 0402 Resistors & Caps
Does anyone know the surface mount land pattern for 0402 resistors and caps?
Thanks in advance.
Cathy Killen
Training Instructor
Smtek Europe Ltd.
The information contained in the E-mail is confidential. It is intended only
for the stated addressee(s) and access to it by any other person is
unauthorised.
The views expressed in this E-mail are those of the author, and do not
represent the views of Smtek Europe, its associates or subsidiaries, unless
otherwise expressly indicated.
Please note: It is your responsibility to scan this E-mail for viruses.
----------------------------------------------------------------------------
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Date: Wed, 31 Oct 2001 10:59:18 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: solder, adhesives, prepregs, etc.
Need your help on subject becoming more prevalent in these times. Used
Thermount, CLTE, and other adhesive/preg types in various designs for CTE
matching, thermal characteristics, and RF stuff.
Need to know more about advanced bonding materials to replace solders
joining various material surfaces. Solder ok in some applications. Adhesives
more positive in others.
Have used some silver bearing adhesives with RF stuff but often does not
adequately replace solder, as often discussed on this forum - especially
this month.
Might need radar absorbant and reflective characteristics in one bundle. Too
much to ask?
Primarily looking for what's available in the MLB and RF world without
getting into TOP SECRET stuff though the application obviously borders on
confidential.
Still need help with removing solder and intermetallics for better solder
joints but that question to be debated for some time I think. Looking
forward to answers suggested by Dave Fish and requests by Bev.
Earl Moon
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Date: Wed, 31 Oct 2001 10:37:09 -0700
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Jim Kittel <[log in to unmask]>
Subject: Copper Invar Copper and BGA's
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Dear TechNet,
We have a requirement to design a CIC board using a 31mm x 31mm BGA. I am
concerned that if we design such a monster, we will not be able to replace
the BGA at a rework station because of the high thermal mass of the core.
Is anyone using BGA's on Copper Invar Copper boards? Help!
Jim Kittel
L-3 Communications
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Date: Wed, 31 Oct 2001 11:46:29 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Matt Stanik <[log in to unmask]>
Subject: Re: STRIPPING MAGNET WIRE
In-Reply-To: <[log in to unmask]>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Beck Chemicals of Cleveland, Ohio used to sell a product called
EPOXYSTRIP T-251-C specifically for removing insulating varnishes
and epoxies from wire and such. It worked great.
> Looking for a recommendation for a chemical stripper to strip bi-filar (?)
> magnet wire. Any suggestions?
>
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Date: Wed, 31 Oct 2001 12:03:51 -0600
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Earl Moon <[log in to unmask]>
Subject: Re: Copper Invar Copper and BGA's
X-To: Jim Kittel <[log in to unmask]>
Is it the 10 mil tailoring core CIC type close to the surface? If so, this
is done with relatively "normal" rework profiling, procedures, and processes
depending on the thermal contacts to the device from the core just as if
originally soldered considering carefully the relief required. If it is the
constraining type, like 60 mil core in the MLB center, depending on layers
sandwiched around it, and has many thermal contacts to the BGA, it can be
more difficult depending on the original soldering profile.
Is this a super/perimeter BGA or, most likely, ceramic? If so, the device's
heat sink also will cause problems. On it goes. Suggest running the
experiment on dummy boards with likewise dummy components. We all need to
know more in this area of expanding concern.
MoonMan
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Date: Wed, 31 Oct 2001 10:40:38 -0800
Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
From: Scott Kramer <[log in to unmask]>
Organization: ThermalWorks, Inc.
Subject: Re: Copper Invar Copper and BGA's
MIME-Version: 1.0
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
----- Original Message -----
From: "Jim Kittel" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, October 31, 2001 9:37 AM
Subject: [TN] Copper Invar Copper and BGA's
> Dear TechNet,
> We have a requirement to design a CIC board using a 31mm x 31mm BGA. I am
> concerned that if we design such a monster, we will not be able to replace
> the BGA at a rework station because of the high thermal mass of the core.
> Is anyone using BGA's on Copper Invar Copper boards? Help!
>
> Jim Kittel
> L-3 Communications
>
> --------------------------------------------------------------------------
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additional
> information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700
ext.5315
> --------------------------------------------------------------------------
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>
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