Genny, I've never had the pleasure of a layer swap, but I've heard enough stories to know its something I want to avoid. There have been several good suggestions; we use the 'exposed copper edge stairstep', and it has worked well for a quick view of the stackup, including copper and dielectric thickness. We are also careful to include layer id's on each gerber file, and a stackup table on the fab drawing, and in the readme file, which includes the filename and stackup positions. However we don't do this, as one responder suggested: > then follow up with a read file which creates the stackup > order by gerber file names vs PWB > layer. > TOP.GBR = LAYER 1, COMPONENT SIDE > GNDA.GBR = LAYER 2, GROUND SHIELD > SIG1.GBR = LAYER 3, SIGNAL > GNDB.GBR = LAYER 4, GROUND SHIELD That is, we include the order by file names and such, but I have a different approach to file names. When we send a zip of gerber files to a board house, they know they're getting gerber files (and it says so in the readme.txt file), so the extension in the example above adds no information. Other than 'TOP' and 'BOT' the filenames offer no clue about the stackup. So I use the filename extension in what I feel is a more useful manner. All of our copper gerber files are of the name format: SSSSSRR.L##. Where SSSSS is the board s/n or other identifying number, RR is the revision, and L## is the layer: L01, L02, L03... I don't know about the cad s/w the board house uses, but on the gerber editors I have used, (most recently cam350, using the autoimport to load), this loads the layers in the stackup order and they are then ordered correctly in the layer table, etc. No need to wonder if PWRA, comes before GNDA, or whatever. The function of the layer appears in the layer tables. As an example, our readme layer table looks like this: Filename Layer Cu plating prepreg est trace trace oz oz in. width in. D-Code ============= ========= ==== ======= ======= ========= ====== 20120r0.TAD top assy dwg 20120r0.FAB fab dwg 20120r0.TSP top paste 20120r0.TSK top silk 20120r0.TSM top mask 20120r0.L01 top 0.5 1.0 .006 .004 20120r0.L02 plane 1.0 .012 20120r0.L03 signal 0.5 .0055 .010 20120r0.L04 signal 0.5 .0055 .012 20120r0.L05 plane 1.0 .003 20120r0.L06 plane 2.0 .023 20120r0.L07 plane 2.0 .003 20120r0.L08 plane 1.0 .012 20120r0.L09 signal 0.5 .0055 .010 20120r0.L10 signal 0.5 .0055 .012 20120r0.L11 plane 1.0 .004 20120r0.L12 bottom 0.5 1.0 .006 20120r0.BSM bottom mask 20120r0.BSK bottom silk 20120r0.BSP bottom paste 20120r0.BAD bottom assy dwg Now, I don't know that this layer naming is easier for the board house to use, or less prone to layer swap error, but I haven't had any complaints, and no swaps either. Gary Crowell Micron Technology > Genny Gibbard wrote: > > > Good morning, > > My morning has not been so good. I have a build of PCB's > (over 300 boards) > > where two inner layers have been swapped. The board > fabricator constructed > > the board in the wrong order. These boards are RF in > nature and have > > frequencies approaching 2GHz on them. In many places we > put a signal trace > > on the inner layer furthest from the component side and > then a wide grounded > > trace over it on the closer inner layer as shielding. So > not only is there > > no longer shielding over many traces, these signals are > also about .03" > > closer to the component circuitry than they used to be. > Can you contemplate > > the nightmare of spurious issues that have been created? > We did not notice > > the problem until they were fully populated and almost thru > our testing > > process and started failing one of the tests miserably. > > Needless to say, we will be revising our inspection > techniques to try to > > catch occurrences like this much sooner. > > > > I was wondering if anyone knows of a way that layer order could be > > electrically tested for on a bare board, that we could require our > > fabricator to complete? > > > > Genny Gibbard (mailto:[log in to unmask]) --------------------------------------------------------------------------------- Technet Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt delivery of Technet send the following message: SET Technet NOMAIL Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 ---------------------------------------------------------------------------------