I'm struggling with an exposed copper/reliability issue with Class 3 (high reliability) boards. We have a group of boards with some degree of Solder Mask blistering, no Electroless Nickel/Immersion Gold plating in those areas, which will result in exposed copper after assembly for the life of the part. The effected areas are typically the junction of trace to pad or the trace between SMT component pads. There are two concerns with this condition: potential reduction of solder volume by increased copper area and long term reliability with exposed copper. I have been able to demonstrate that the degree of solder volume reduction is sufficiently small so as not to affect solderability. However, I do not have reliability data that says X amount of exposed copper will be acceptable or unacceptable. Can you guys help? Where can I find a/some studies regarding long term reliability of exposed copper? Are there any papers available? Is such data available with respect to different line widths and spacing or different end use environments? Our geometries are "fine line" and the application is "high reliability", but in a benign environment. Your thoughts or references in this matter would be greatly appreciated. Best Regards, Jana Carraway 503-579-8595 --------------------------------------------------------------------------------- Technet Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt delivery of Technet send the following message: SET Technet NOMAIL Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 ---------------------------------------------------------------------------------