Mario, Ceramic Capacitors are made up of a 'layer cake' of palladium laden inks and thin sheets of green ceramic material that has been heat dried to remove the binders in the inks and pressed together with about 1200 lb hydraulic press. Then cut and fired in a kiln and dipped silvered ends.... (I know far too much about this process... I worked for a ceramic capacitor manufacturer before). If this process is not controlled well you can create embedded stresses in the materials and the caps will tend to crack along the layers... When you Solder these to a PCB you heat the board and the caps, causing them to expand in size, unevenly. The rate at which they are heated affects the difference in their sizes over time... hence the amount of induced stress applied to the caps. As they cool, the ceramic is captured in the solidified solder and has added a stress to the cap due to the uneven coefficient of thermal expansion of the board and the cap. If the caps are being temp cycled, rapidly, (in manufacturing or in the field), this can cause a severe delta (difference in change) in the physical size of the cap and the land it has been attached to. This induced stress can cause fractures to develop in the layers of the caps as well. When you get a bad batch of ceramic caps...(with captured stresses embedded in them or weakness in their bonds between layers) it's hard to tell if the caps are a fault or the process is at fault but the problem is magnified. One of the things a designer can do is change the material of the board to a more stable material with a better TCE. (Remember this is also a cost driver) Also the EE and the ME can look at the specs for the caps and specify that they survive under the conditions to which they have been applied.... both environmentally and in manufacturing processes... They may be able to reduce the failures by controlling the rate of the ramp up and down of the temperatures that the assembly is being exposed to. Better rated caps can also have an affect on the cracking. Also check to see that the board is not being flexed in excess... this can create mechanical fatigue of the caps and their solder joints... Sorry if that was too much info... I didn't know the conditions under which the failure was occurring, so you get the ones I can think of, off the top of my head.. The least likely cause is pad geometry if you are using the IPC land pattern guides... I have had terrific success with those geometries... and they are fairly tolerant of deviations... More or less fillet on the side of the cap will affect the flexural survival of the fillet... but I doubt it will have much to do with cracking of the caps in general. Good Luck - Bill Bill Brooks PCB Design Engineer , CID DATRON WORLD COMMUNICATIONS, INC <http://www.dtsi.com/>. 3030 Enterprise Court Vista, CA 92083 Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510 mailto:[log in to unmask] IPC Designers Council, San Diego Chapter http://www.ipc.org/SanDiego/ http://home.fda.net/bbrooks/pca/pca.htm -----Original Message----- From: Mario Irigoyen [mailto:[log in to unmask]] Sent: Monday, August 27, 2001 7:42 AM To: [log in to unmask] Subject: Re: [DC] Capacitor pad reduction ? Hi, My suggestion would be to run some tests. Create at least 4 different configurations (pad geometries) for each component type and place about of 100 of each on a test board. Run at least 10 boards through manufacturing and do a quantitative analysis to determine which geometry(s) produce the fewest defects. Then no one can argue "whose fault". Best regards, Mario Irigoyen -----Original Message----- From: DesignerCouncil [mailto:[log in to unmask]]On Behalf Of Matthew Lamkin Sent: Monday, August 27, 2001 9:09 AM To: [log in to unmask] Subject: [DC] Capacitor pad reduction ? Hello everyone, I wonder if I can tap into your experience of cracking of ceramic capacitors. I have a situation where the shop floor are having problems with cracked capacitors, due to several possible causes. However, the blame for the problem is being thrown at design with an instruction to reduce the width of the pads (1206/0805/0603 caps only) to be less than the width of the component. Now there are many documents out there advocating using the IPC SM-782-A pads, and many that advocate reducing the pads. However, I have the IPC specs which give me actual dimensions to follow whereas the documents that advocate reduced pad widths do not. Can anyone give me some advice on what size these pads should be when reduced to prevent MLCC cracking? Can anyone supply a URL of a document that gives any good information on this? I have many documents from AVX/SYFER etc on the subject but they do not quote any figures on reducing the width. Thankyou - Matthew Lamkin Protec Fire Detection PLC. England, U.K., Planet Earth. P.S. Come on Steve, I'm timing you now, to see how long it takes until you quote a website....he, he.... ---------------------------------------------------------------------------- ----- DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF DesignerCouncil. To set a vacation stop for delivery of DesignerCouncil send: SET DesignerCouncil NOMAIL Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 ---------------------------------------------------------------------------- ----- ---------------------------------------------------------------------------- ----- DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF DesignerCouncil. To set a vacation stop for delivery of DesignerCouncil send: SET DesignerCouncil NOMAIL Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 ---------------------------------------------------------------------------- ----- --------------------------------------------------------------------------------- DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF DesignerCouncil. To set a vacation stop for delivery of DesignerCouncil send: SET DesignerCouncil NOMAIL Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 ---------------------------------------------------------------------------------