I'm trying to determine if any bareboard
manufacturers have performed capacitance testing, or know if there is any
reference to doing it in any IPC documents. We are considering building an 11
layer, heavy copper, board with the following note included in the fab drawing
notes. "Measure capacitance of dielectric layers 2, 4, 7, and 9 to confirm all
four layers are within 20%. Dielectric layers 2 and 4 are measured by shorting
Cu layer 2 at --, to Cu layer 5 at --, and measuring the capacitance from ---
to ---. Dielectric layers 7 and 9 are measured by shorting Cu layer 7 at
--, etc., etc".
This note and recommended protocol don't sound
familiar to us, and we were wondering if anyone has had experience with this
type of requirement, if so how did you handle
it?