impedance control specs
Brandon,
First
I can tell you that we have gotten our specs down so that there is absolutely
no
change
to the material thickness. All the boards tested were accurate and we
began
having
board built without the test and had some of those tested here. They were
also
100
within spec if not right on the head.
I'm
not "The man" on this issue but I have spent a lot of time with our
specifications.
you
can choose between a couple different ones. There is also a calcualtor,
based
and
tested on several others including polor. The advantage is that you
can
calculate up to 12 layers at once instead of chasing
your tail with the 2 layer versions.
(resource.xls) it also allows you to build your stackup
and record it along with other
settings.
First
there is the material itself. IPC spec material tolerance is only 1mil for
prepreg
and 2
for core material. (check for yourself) If you do the math any more will be out
of
impedance tolerance. +/-10% for 50Ohm. I provide a spec
that the material may
change
the value of the material tolerance (+/-)
Second
if possible, sandwich a prepreg between two planes. Use this to adjust
to
whatever thickness remains. You don't want to adjust
the dielectric thicknesses
to
account for the board thickness, so this is the best way I have
found.
Third,
trace tolerance is +/- 1mil. If you do the math, that is all that is
allowed,
so a
board house running advanced technology will be required.
Fourth
specify the impedance tolerance and the Er value that your
calculations
were
based on so the material is matched up. (I have to say that because
I
get
different stories from fabricators)
Test
for the first few you do and find out the "fall out" amount and get
feedback
on
what the actual stackup was to verify future values.
Seperate you minimum trace note from your controlled
impedance note to clarify
things. Some manufacturers like to calculate things for
themselves. I use 8 mil
traces
for controlled impedence and 6 mil min trace. (don't want them to do
calculations for 6mil)
Make
very sure (very dam sure) that they call you if they need to make the
thicknesses
different than specified. It's more than a matter of
who is right, but documenting what
was
done.
Also
there a few combination you will find in the trace/dielectric thickness 8mil
trace
on 1
oz copper with 12mil dielectric has been working for me.
There
are several different stackups, but find one that works best and stick with
it.
Controlled impedence is normally done with high
frequency so at first, practice
sandwiching your signal layers with plane layers to
eliminate crosstalk then move
on to
trace-trace stack ups. (I will stay with plane-trace-plane for a long
time)
I
don't take credit for this program because I riped everyone off to make
it.
I
would like to thank them all for the cullmination of their
information.
I'm
working on making this a stand alone program for users of any layout
program.
I hope
this helps. If so pass it on.
Chris Robertson
[log in to unmask]
Senior Designer
Lockheed-Martin Services Inc.
4912
Research Dr.
Huntsville, AL 35805
(256) 722-2626
Good Day!
We
are having a raging debate about specifying controlled impedance on our
fabrication drawings.
The main part of the debate is
over laminate thickness specifications. I
would like to know how other companies are handling these issues.
Are you specifying the individual laminate thickness?
Are you specifying the individual laminate thickness
tolerance? If so, how do you handle deviations between different fab
houses beyond the tolerance?
It seems that every time we use a different fab
house,
they like to use their standard laminates. While this is also a benefit to us, it causes problems when
our boards are microsectioned and the board
doesn't agree with the print.
We will continue to specify trace width,
copper thickness and impedance, all with tolerances.
Any input will be
appreciated!
Brandon Luther
Dataram Corp.
(609) 799-007
x2310