Jorge, John, et al, 
I like John's thinking here.  this is not the place to cut corners.  (pun intended)  but, a couple of cautionary notes might help.  on .062" FR4, with a web of say .016", with a new 30 Deg. carbide blade, the width of the score line is approx. .014".  I think the trig will bear this out.  however, in the real world, the tip of that carbide blade goes away pretty fast.  now we need to go a little deeper to compensate for that wear.  The deeper we go the wider we get.  With a re-sharped blade thats mid-way through its service life, that .014" can easily become .024" .  Of course, only half of this distance is considered a keep- out area.  But, as Robert points out, the accumulation of tolerances is also and important factor.  To make a long story a little shorter,  I like Johns answer.
.020" to .025"  is a good number.  Any thing below this is asking for trouble in a production environment.   Hope this helps,

Mark Simmons, V-Score Central





John Parsons wrote:
Jorge,

Certainly 0.025" is a nice number if you are lucky enough to get it,
we always quote that clearance if we are asked when a board is
still at the design stage.  Aside from that you just have to do the
math.  The width at the top of the cut will be a fixed number for a
given depth and blade angle.  Add to that a comfortable tolerance,
say 0.005" and use that as a rock bottom minimum to avoid
nicking features.

Regards
John Parsons
Circuit Graphics Ltd.

Technetters,

                I need help on a v-score issue that's hitting us right now.
What's the minimum acceptable clearance area from the v-score edge to board
traces and pads?. The product we are having problems with has exposed copper
on some traces and pads that are too close to board edge and v-score edge,
this is down to 6 mils on some pads. I am trying to recommend the customer a
reduction of pads and relocation of traces to a minimum distance from board
edge. Recommendations?. This is a product where the board size cannot be
increased to solve the problem, so we're pretty much constraint to pad
reduction and relocation of vias? Any ideas on what's the minimum distance?,
is there an IPC standard for issues like this?



        Any comments would be appreciated


Jorge Rodriguez
Process Engineer
Varian Electronics Manufacturing
Tempe, AZ
E-mail: [log in to unmask]

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