Robert, Do you know if your photoplots are made from your original supplied data or from the post-CAM tooling? When photoplot data is received by a PCB manufacturer. They can generate photoplots that match exactly what is contained in those files. However, this is usually not the same photoplots that are used to make the finished product. The photoplot data is copied to make tooling for production. This tooling is made so that the finished product meets your specifications within the tolerances that you specify (or that is defaulted if you don't). If you get a hold of this tooling and compare it to the finished product, you will probably find that it is not exactly the same. The tooling that is used to make the board has to have compensations added to it so that during processing, the board will end up the way you specified in your original photoplot data. For instance, you may specify that a trace width of 0.005" is used. In order to get that 0.005" trace width on the final board, the tooling may have anywhere from 0.005" to 0.007" traces on it depending on the etch compensation factors used (if any). (Etch compensation is how much of the line width is lost during chemical removal of unwanted copper). The final board should be compared to your original photoplot data and it should match within tolerance. I'm not trying to over-complicate this, but sometimes, a customer will ask for photoplots and then not understand that the photoplots he received is actually the tooling for production when what he wanted was photoplots of his original data. I hope this helps. If you are in or near Ohio, I can show you this process here. Steve Underwood Engineering Manager Circuit Center, Inc. 4738 Gateway Circle Kettering, Ohio 45440 937-435-2131 ext. 127 937-435-7698 fax [log in to unmask] :-) -----Original Message----- :-) From: TechNet [mailto:[log in to unmask]]On Behalf Of Neel, Robert :-) Sent: 15 February, 2001 2:18 PM :-) To: [log in to unmask] :-) Subject: [TN] design vs reality? :-) :-) :-) Hi People, :-) :-) I've had technet streaming into my terminal for a couple of :-) weeks now and :-) thoroughly appreciate the background flow of information. :-) :-) I have a question for any interested participant: What :-) causes a finished :-) circuit board pattern/trace to deviate from the photoplot? :-) :-) I'm looking at the photoplot file of a critical section of :-) a circuit board :-) I'm trying to field. The plot file shows a pad-to-ground :-) clearance of 20 :-) mils. And yet when I slap a finished board under the scope, the :-) pad-to-ground clearance measures 15-mils from one supplier :-) and 10-mils from :-) another. (The component center-to-center patterns are :-) correct, so it's not a :-) matter of scaling.) :-) :-) What gives? :-) :-) The assembly people are pounding on me to open-up the :-) clearance, but, for :-) the application constraints, and, by the book, the design :-) clearances are :-) fine. :-) :-) Is this correct? Will the finished PCB deviate so wildly :-) from my plots? :-) How much deviation can I expect? How much compliance can I :-) demand? What's :-) a reasonable difference between the photoplot file content :-) and the finished :-) board? :-) :-) (If you want to make my day, tell me they should match :-) exactly. Then tell me :-) why they might not match and by how much.) :-) :-) Thanks in advance. :-) :-) Robert :-) :-) ------------------------------------------------------------ :-) --------------------- :-) Technet Mail List provided as a free service by IPC using :-) LISTSERV 1.8d :-) To unsubscribe, send a message to [log in to unmask] with :-) following text in :-) the BODY (NOT the subject field): SIGNOFF Technet :-) To temporarily halt delivery of Technet send the following :-) message: SET Technet NOMAIL :-) Search previous postings at: www.ipc.org > On-Line :-) Resources & Databases > E-mail Archives :-) Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 ------------------------------------------------------------------------ --------- --------------------------------------------------------------------------------- Technet Mail List provided as a free service by IPC using LISTSERV 1.8d To unsubscribe, send a message to [log in to unmask] with following text in the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt delivery of Technet send the following message: SET Technet NOMAIL Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 ---------------------------------------------------------------------------------