Hi Ken, Your picture shows a classical PTV barrel crack, which if it is not 360° when sectioned, would be complete soon in service. You have multiple causes: (1) you did not say what you specified for a minimum plating thickness in the barrel, but you only got about 0.4 mils--totally insufficient! (2) you did not say what the drilled hole diameter of the PTV is, but the smaller you get in a thicker PCB, the more difficult it is to plate unifom deposits of good copper into the hole, particularly near the center; (3) the drilling quality is less than perfect; and (4) if you recall the recent TN correspondence on partially filled vias, your via is filled partially with solder and the fill ends at layer 5 creating the stress riser that causes the failure in this location. Werner Engelmaier In a message dated 7/11/00 9:54:05, [log in to unmask] writes: >Dear Engelmaier, >I am attaching a picture which will tell you a whole lot. This crack isnot >in a foil. This is a radial crack and originated in the hole and then >expanded radially due to most likely z-axis expansion. I do not know if >it'sa circumferential crack or not. >We kind of know that it's due to thermal expansion and we think that the >board should withstand a normal assembly process. As we are finding cracks >at PTH via, we do not see why someone has to do any rework there which >maycause similar defects. So, what kind of the laminate condition make it >easyto break apart and for that matter what kind of assembly condition can >makethat kind of havoc. >ken patel > >At 08:36 AM 7/11/2000 EDT, Werner Engelmaier wrote: >>Hi Ken, >>You have to be more descriptive about where you find those cracks. Are >>the cracks in the foil of layer #5, are they innerlayer separations at the >>interface between the foil and the electroless flash, or are they innerlayer >>separations at the interface between the electroless flash and the >>electroplated copper. The loading conditions are the same in each case >>(severe thermal expansion mismatch most likely in an area the has seen >>manual soldering operations/rework), but the root cause/solution options are >>different. From your incomplete description, the cracks may even be in >>the PTH via barrel. >> >>Werner Engelmaier >>Engelmaier Associates, L.C. >>Electronic Packaging, Interconnection and Reliability Consulting >>7 Jasmine Run >>Ormond Beach, FL 32174 USA >>Phone: 904-437-8747, Fax: 904-437-8737 >>E-mail: [log in to unmask], Website: www.engelmaier.com In a message dated 7/10/00 17:14:59, [log in to unmask] writes: >What are the causes of the internal crack on only on layer 5? Most of the >cracks found were on via holes extending into the laminate (no >delamination!). Prepreg used at layer 5 is 3 sheets of 1080 of FR406 (these >3 will give a total of .008" thickness to overall thickness of .093"). >Loaded boards failed at ICT that prompted us to do some investigation. What >should I do as an OEM customer on my own as my fab house and assembly house >won't take responsibility easily. Following information may help you >understand my board structure. ># of layers: 12 >SIG/GND/SIG/GND/SIG/3.3V/VCC/SIG/GND/SIG/GND/SIG >1oz copper used on all layers except first and last which plated to 1oz >final. >ken patel ############################################################## TechNet Mail List provided as a free service by IPC using LISTSERV 1.8c ############################################################## To subscribe/unsubscribe, send a message to [log in to unmask] with following text in the body: To subscribe: SUBSCRIBE TECHNET <your full name> To unsubscribe: SIGNOFF TECHNET ############################################################## Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional information. If you need assistance - contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315 ##############################################################