TECHNET Archives

December 1999

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
"Hamilton, Richard CLE 4454" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Thu, 2 Dec 1999 12:45:30 -0700
Content-Type:
text/plain
Parts/Attachments:
text/plain (81 lines)
Alberto,

Let's see what I can do here to let you know what I can.

Our main focus was originally targeted to peelable solder mask. We set up a
Design of Experimentation to test a few variables we felt were related. One
of them was bagging the boards individually. We built a matrix involving the
bagging, oxidation, and contamination and are subjecting 10 boards to each
different condition. We are reading conductivity as a result to measure and
evaluate.

As I mentioned, we are about 2 weeks away from the completion of the test
cycles, and then evaluation after that. The preliminary information seems to
be quite interesting, and not logical for this non-PWB fab mind of mine. The
boards that are not individually bagged seem to have better conductivity
than those that were bagged! Any thoughts anyone? Also the delta's between
the different conditions completed so far are not very big, in the realm of
10mA for instance. I don't like to jump to conclusions until all of the data
is in though!?

In a brief summary, there it is!

Richard Hamilton
Clemar Mfg. / Rain Bird
[log in to unmask]

> -----Original Message-----
> From: Alberto Callo [SMTP:[log in to unmask]]
> Sent: Thursday, December 02, 1999 11:02 AM
> To:   [log in to unmask]
> Subject:      Re: [TN] Bagging Requirements
>
> Hi Richard,
>
> I am interested in knowing about your experiment.  Could you please
> describe the process, if possible.
>
> Thanks
>
> Alberto
>
>
>
>
> "Hamilton, Richard CLE 4454" wrote:
> >
> > Hello all,
> >
> > I too am interested in discussion on this matter. As an assembler using
> the
> > boards we currently have our boards shipped to us in individual bags.
> >
> > The timing on this question is interesting. We are in the process of
> > performing an experiment to determine the electrical effect of different
> > conditions on boards that are shipped with and without: bags; peelable
> mask;
> > contamination. The planned completion of the experiment is about 2 weeks
> > away at this point. If there is interest, I will post basic test results
> > here.
> >
> > In the meantime, I echo, anyone have any ideas or history?
> >
> > (Only 23 days to happy day, and 28 days to......well.....who knows what
> will
> > happen!?)
> >

##############################################################
TechNet Mail List provided as a free service by IPC using LISTSERV 1.8c
##############################################################
To subscribe/unsubscribe, send a message to [log in to unmask] with following text in
the body:
To subscribe:   SUBSCRIBE TECHNET <your full name>
To unsubscribe:   SIGNOFF TECHNET
##############################################################
Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional
information.
If you need assistance - contact Gayatri Sardeshpande at [log in to unmask] or
847-509-9700 ext.5365
##############################################################

ATOM RSS1 RSS2