Seasons Greetings!

We have just received a design from a customer which utilizes a
560 pin BGA(?) socket.  Here are the details;

-6 Layer board, 4 routing layers 2 plane layers
-Socket is 5 rows deep
-Current configuration - 23mil hole on 30mil pad on 50mil grid
-Routing out with 8mil traces on primary, secondary and two inner
layers

We have told him that his hole to pad ratio is too small for us to
manufacture.  Currently our minimum spec is 6mil annular ring (pad
dia - finished hole size/2) for outer layers and 7.5mil for inners
(although we will do 6mil on inners if we have to).

He is telling us that he cannot design within these constraints.

What are others doing for this design?  Are you routing out on
outer layers?  We cannot seem to put our hands on another
sample design from our files (although I know they are some in
there somewhere).

Regards
John Parsons
Circuit Graphics Ltd.

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