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December 1999

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Subject:
From:
"Edward Hare, <SEM Lab, Inc.>" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Fri, 17 Dec 1999 07:47:32 -0800
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text/plain
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text/plain (85 lines)
Steve,

Thanks for your reply.  Wow ...  that does sound stranger than fiction.  However,
in the case I am attemting to describe the separation is at the copper/IMC
(intermetallic compound) interface.  The mechanism you described suggests that
the joint would reflow (locally near the pad) which should leave the IMC and a
thin layer of solder on the pad.

It looks like the thermal relief on these PWBs  is reasonable (i.e. vias far
removed and narrow traces out to the pads in most cases).

Best regards,
Ed

[log in to unmask] wrote:

> In a message dated 12/16/99 6:25:30 PM Central Standard Time,
> [log in to unmask] writes:
>
> > Hi everyone ... I have been looking at solder joint failures for quite a
> >  while and have stumbled on something new to me.  I hope someone has seen
> >  this and can give me some insights.  Here it is ...
> >
> >  *  the failures occur on a number of different component types including
> >  SOICs, QFPs, SMT caps (not chip caps)
> >  *  the failure is complete interfacial failure of the mounting pad at
> >  the copper/IMC interface (i.e the solder, Cu6Sn5 and Cu3Sn layers stay
> >  with the component lead)
> >  *  the board finish was HASL and the IMC layer appears normal (i.e. ~
> >  1-2 microns total thickness)
> >  *  the copper is heavily oxidized.  However, I believe this is because
> >  the crack existed for a long period of time (perhaps?)
> >  *  I see no convincing evidence of contamination at the failed interface
> >
> >  *  the failure does not appear to be related to an electroplated copper
> >  interface
> >
> >  Based on past experience, this type of thing seems to be caused by gross
> >  thermal shock!?!  Have any of you seen the type of failure I have
> >  described?  If so, what was the conclusion as to cause?
> >
> >  Best regards,
> >  Ed Hare
> >  VP SEM Lab, Inc.
>
> Hi Ed,
>
> I'm just guessing a bit, but there maybe a problem with the design of the
> boards. I've run acoss problems in the past (as many other technetters have)
> that there are via's that have been laid-out very close to surface mount
> pads, no thermals and very little trace length to a surface mount pad. During
> wave soldering, they provide very good thermal transfer to re-reflow SMT
> solder joints and actually cause the solder fillets to separate from the pads
> with the fillets intact to the leads...one could inspect the joints under a
> microscope and you wouldn't know there was a problem unless you actually put
> some side-ways force to the leads and see that there was observed
> movement...there maybe enough contact to pass ICT, but fail shortly...which
> may explain the heavily oxidized copper...
>
> Just guessing...
>
> -Steve Gregory-

--

               SEM Lab, Inc.
Scanning Electron Microscopy and Failure Analysis
               Snohomish, WA
               (425)335-4400
           http://www.sem-lab.com

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