Subject: | |
From: | |
Reply To: | TechNet E-Mail Forum. |
Date: | Wed, 1 Dec 1999 08:15:55 -0200 |
Content-Type: | text/plain |
Parts/Attachments: |
|
|
Brian,
I found the following at IPC-7095 ( Design and Assembly Process
Implementation for BGAs ) section 4.4 ...
Circuit board materials have very different warpage requirement. It was not
too long ago
when 1.5% warpage (15 µm per mm) was considered acceptable for printed
circuit boards.
But for surface mount assemblies, maximum 0.75% (7.5 µm per mm) warpage is
required.
Note that is referred to surface mount assemblies in general.
Jorge Dourado de Santana
Maintenance / Process Engr
Microtec - Brazil
> -----Original Message-----
> From: Hunter, Brian C [SMTP:[log in to unmask]]
> Sent: 30 de Novembro de 1999 19:25
> To: [log in to unmask]
> Subject: [TN] required PWB co-planarity for BGAs
>
> I'm trying to find out any information concerning the maximum board
> warpage
> that BGA packages can handle. Are there any industry standards specifying
> a
> localized flatness at BGA device sites? Any information would be
> appreciated.
>
> Thanks,
>
> Brian C. Hunter
> One StorageTek Drive, MS 9152
> Louisville, CO 80028
> 303.661.5756 phone
> 303.673.3466 fax
>
>
##############################################################
TechNet Mail List provided as a free service by IPC using LISTSERV 1.8c
##############################################################
To subscribe/unsubscribe, send a message to [log in to unmask] with following text in
the body:
To subscribe: SUBSCRIBE TECHNET <your full name>
To unsubscribe: SIGNOFF TECHNET
##############################################################
Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional
information.
If you need assistance - contact Gayatri Sardeshpande at [log in to unmask] or
847-509-9700 ext.5365
##############################################################
|
|
|