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December 1999

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Subject:
From:
edward edward szpruch <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Sat, 11 Dec 1999 21:23:00 +0200
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Brian,
IST test this is one think,visual examination of microvias is something
else.
This test is used for reliability examination of the interconnect and I am
even not sure,if their standard design coupon is taking into consideration
blind microvias...
regards
Edward Szpruch
Eltek , Manager of Process Engineering
P.O.Box 159 ; 49101 Petah Tikva Israel
Tel  ++972 3 9395050 , Fax  ++972 3 9309581
e-mail   [log in to unmask]

> -----Original Message-----
> From: brian carlson [SMTP:[log in to unmask]]
> Sent: ה דצמבר 09 1999 21:28
> To:   [log in to unmask]
> Subject:      Re: [TN] microsectioning vias
> 
> George,
> 
>    There is a system in place that is being utilized by some of the top
> manufacturers in the PCB industry. IST testing requirements have become a
> standard in some high technology designs. This accelerated stress testing
> method adopted by IPC (TM-650- method 2.6.26) and has been around for
> several years. This method allows for the assessment of (PTH) and inner
> layer to (PTH) barrel connections.  A special coupon is required, however
> coupons designs are available to match your build requirements. The test
> ends after the hole wall fails. I won't go into detail so look  @
> www.pwb.com.  Hopefully someday this test method will help reduce the
> amount of microvia x-sectioning required by the industry.
> 
> Rgds,
> Brian Carlson
> Technical Support Engineer
> Yamamoto Mfg, USA Inc.
> 
> >>> <[log in to unmask]> 12/09 9:59 AM >>>
> Hi George
> Right now we are stuck with microsections and will be until someone
> has performance data for probably some sort of thermal cycling tests.
> Eventually, I guess, if a sample passes so many thermal cycles (or
> thermal shocks, perhaps) then we consider the product and process
> to be good and we don't care how thick the copper hole walls are or
> if there are voids or cracks present??????!!!!!!!!!
> 
> However, the thermal cycling tests take a long time and I would think
> everyone will still use hole wall thickness and quality of plating to
> predict that performance.  Microvias are not "stand alone" configurations
> they are usually found on boards that have to see soldering temperatures
> and therefore are subject to the question - how do they survive thermal
> stresses.
> 
> Just my thoughts - but I see microsections to be with us for a little
> while
> longer.
> 
> Susan Mansilla
> Technical Director
> Robisan Lab
> 
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