Wanner
I'm not an expert in the matter but your message inspires me to say three things.
1. 500 V over 65 micrometres gives just one helluva voltage gradient, about 8 000 V/mm,
if I'm not mistaken. This is at the limit of the acceptable IMHO, even at ambient.
2. At 120°C, you are approaching the Tg of the laminate, where the electrical
characteristics of the resin go haywire. I believe that Tg is not a sharp threshold,
where you have one phase below and one phase above, but a gradual change over a range
of 20 - 30°C. Furthermore, the range can be modified by the degree of cure (i.e. the MW
of the crosslinked resin) and the humidity content (i.e., it is known that the Tg can
drop by 20° when the resin is close to saturation, generally between 2 and 5% by weight
of the resin.
3. A laminate is heterogeneous. Pressing a thin single prepreg to give a 65 um layer
will give precious little resin above and below the silane-coated glass fibres.
Under these circumstances, combined, I think you are approaching the characteristics of
an arc welder rather than those of a test method. Pragmatically, I think you should not
test or function at higher than 30 - 40°C under the Tg when you have high voltage
gradients in heterogeneous insulants and that you should ensure that your supplier
presses your boards to a full cure, using only first-rate materials that have been
tested for a high MW polymerisation.
My 2 centimes worth.
Brian
-
Brian Ellis
Protonique SA
PO Box 78
CH-1032 Romanel-sur-Lausanne, Switzerland
Voice: +41 21-648 23 34 Fax: +41 21-648 24 11
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URL: Technical and consultancy divisions:
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Wanner Bernhard wrote:
> Hi Techies, sorrysorrysorry for the mismail before! Ok, now the finished
> mail:
>
> I have to analyze failures of a subassemblies of our subcontractor, a
> well-known european hi-tech pcb-manufacturer. The failing subassemblies I've
> to analyze, contains transformer windings which are implemented as 14 and
> 16-layer pcb's. The winding shows dielectric breakdown between different
> winding layers (and sometimes between different windings on the same layer).
> This breakdown happens after some hours run-in at 120°C and 500VDC (500VDC
> as test
> voltage, failures also at lower tension at at AC). Before them, all pcb has
> passed successful a hi-voltage test at ambient temperature.
> The diel. strength for the closest distance of 65mm prepreg should be around
> 2.5kV, or a little bit less because IPC-2221, § 4.1.2, not 500V!
> May be any loss of the electric strenght of a laminate/prepreg is a function
> of the temperature, the hi-temp aging, and material defects (the occuring
> pcb temperature of 120°C is in accordance with IPC-2222, § 4.3. But this
> must be in a specified manner, isn't it?
>
> Okydky (so weit - so gut), now the pcb-manufacturer's statement is that we
> can not use the max. electrical strenght at max. temperature. And the
> pcb-manufacturer is not able to define a derating of the el. strenght at a
> given temperature. Hard to believe ...
>
> So, my question is: means IPC I can use the maximal specified electrical
> strenght at maximal specified temperature, or not?
>
> (If not, I would like to append some further questions..)
>
> As I have reviewed some IPC-standards, there are some "little" limitations
> in view of limitation of Temprature, electrical strenght, dielectric
> thickness, maximum operating temperature. But none of this comment means we
> could not use the electrical strenght at max. allowed operating temperature:
>
> Designstandards
>
> IPC-2221, Generic Standard on Printed Board Design
> § 4.1.2 Material Selection for Electrical Properties, refers to
> Table 4-1, Typical Properties of Common Dielectric Materials. Thereafter for
> FR-4 the electric strength amounts 39.4 x 103 V/mm2 and notice notice says :
> "The stated electrical strength values are commonly evaluated under test
> conditions with a 0.125mm core laminate thickness. These values should not
> be considered linear for high voltage designs with a minimum dielectric
> separation, i.e., less than 0.09mm."
> § 6.3 Electrical Clearance, refers to Table 6-1. Thereafter, the
> minimum spacing for internal conductors (B1) at 301-500V (peak) amounts
> 0.2mm.
> §10.1.2 Electrical Clearance, "Clearances are applicable for all
> levels of design complexity (A, B, C) and performances classes (1, 2, 3)
> (...)".
>
> IPC-2222, Sectional Design Standard for Rigrid Organic Printed Boards
> § 4.3 Laminate Materials, "The values in Tabele 4-1 are based on
> long term aging tests by UL (...) Hot spot temperatures shall not exceed the
> temperatures specified in Table 4-1 (...)"Table 4-1: "Clad Laminate Maximum
> Operating Temperatures", thereafter for FR-4 and 0.1 mm dielectric thickness
> the max. allowed temperature would be 120°C. For FR4 / 0.4mm diel. thickn.
> 130°C.
> § 4.3 Measurement of Dielectric Thickness, " (...) Thickness by
> microsection (...) taken at the closest point between metal cladings."
> § 4.3.2 Dielectric Thickness/Spacing, " (..) If the minimum
> dielectric spacing and the number of reinforcing layers are not specified,
> the minimum dielectric spacing is 0.09mm and the number of reinforcing
> layers may be selected by the supplier."
> § 4.3.4.3 Glass style, "A variety of glass cloth styles are
> available for prepregs (see IPC-EG-140). The glass cloth selection is
> dependent upon dielectric thickness and tolerance required, circuit filling
> needs, and electrical requirements of the dielectric."
> § 4.3.7 Laminate Material, explains the Material Code Designation
> and refers to Figure 4-2 for the recommended material selection process.
>
> Thanks for clarifications and all statements!
> Bernhard
>
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