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December 1999

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Subject:
From:
Jeff Seeger <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 8 Dec 1999 19:00:36 -0500
Content-Type:
text/plain
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text/plain (43 lines)
Erat, Wolfgang wrote:
>
> how do you define testvias on your boards (vias which are used for ICT or
> functional test) ?
>
> how do you (or do you)  differentiate testvias from regular vias ?
>
> we as a board manufacturer must electrically test these vias but it is not
> always evident how they are identified.
>
> different copper aperture ?

        Usually a larger pad and/or different shape ie square

> special soldermask aperture ?

        Usually.  Most vias are plug/tent or encroached.

> different viasize ?

        Usually either same drill as via or undrilled.


--

      Jeff Seeger                         Applied CAD Knowledge Inc
      Chief Technical Officer                  Tyngsboro, MA  01879
      jseeger "at" appliedcad "dot" com                978 649 9800

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