Hello All

could use some insight from the board design community.

how do you define testvias on your boards (vias which are used for ICT or
functional test) ?

how do you (or do you)  differentiate testvias from regular vias ?

we as a board manufacturer must electrically test these vias but it is not
always evident how they are identified.

different copper aperture ?
special soldermask aperture ?
different viasize ?
anything else ?

we are writing a procedure around this, would appreciate any and all input.

Thanks

Wolfgang
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