DESIGNERCOUNCIL Archives

November 1999

DesignerCouncil@IPC.ORG
Options: Use Monospaced Font
Show Text Part by Default
Condense Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Content-transfer-encoding:
7bit
Sender:
DesignerCouncil <[log in to unmask]>
Subject:
Via Padstack
From:
Rich Klecka <[log in to unmask]>
Date:
Thu, 11 Nov 1999 10:33:01 -0600
MIME-version:
1.0
Content-type:
text/plain; charset=us-ascii
Reply-To:
"DesignerCouncil E-Mail Forum." <[log in to unmask]>, Rich Klecka <[log in to unmask]>
Parts/Attachments:
text/plain (20 lines) 
I am making up a via padstack that has a 12 mil finished drill
diameter.  I want to keep the pad size as small as possible.  What pad
size would you use for routing layers and for power plane layers?
Minimum trace width will be 8 mils.

Thank you for your help,
Rich

--
Rich Klecka
Electronic Packaging Specialist
Fermilab
P.O. Box 500,  M.S. 307
Kirk & Wilson Roads
Batavia, IL 60510
[log in to unmask]
630-840-3880 Phone
630-840-8590 Fax
Work hours: 8:00 - 4:30 Central Time

ATOM RSS1 RSS2