DESIGNERCOUNCIL Archives

October 1999

DesignerCouncil@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Abd ul-Rahman Lomax <[log in to unmask]>
Reply To:
DesignerCouncil E-Mail Forum.
Date:
Tue, 26 Oct 1999 11:46:49 -0700
Content-Type:
text/plain
Parts/Attachments:
text/plain (30 lines)
At 10:25 AM 10/26/99 -0700, Douglas McKean wrote:
>In the case of a S1/S2/G/P/S3/S4 stackup, you might
>have greater freedom moving a trace between S1 and
>S2 without penalty EMIwise.

Right. This is one of the advantages of this structure.

>OTOH, while having to
>move a trace between S1 and S2 on a S1/G/P/S2 stackup
>might conform to good SI practices, but you might suffer
>EMI-wise.

I would think that the primary reason is that the return current in G
travelling under the trace on S1 will move to P under S2; it will take the
shortest path; if G/P are close, this may largely be through interplane
capacitance; my understanding is that the situation can be improved if
there is a well-connected bypass cap close to the S1/S4 via. Otherwise we
may have created a substantial loop. This problem would be worse if the
stackup were S1/G/S2/S3/P/S4 and the signal moved from S1 to S4 because of
the reduced distributed interplane capacitance.

Until recently, it never occurred to me that we might need to distribute
bypass caps, not merely near spike-generating components, but also wherever
signals communicate such that return currents swap planes.

[log in to unmask]
Abdulrahman Lomax
P.O. Box 690
El Verano, CA 95433

ATOM RSS1 RSS2