Hi Earl, Werner and all
Sorrysorrysorry because caused technet shy. I've use the expression
engelnotes as synonym for all responses, not only of some experts. Ok, I
would also like to hear of similar problems.
Bernhard
----------
Von: Enter your name here[SMTP:[log in to unmask]]
Gesendet: Samstag, 28. August 1999 00:30
An: TechNet E-Mail Forum.; Wanner Bernhard
Betreff: Re: [TN] crushed prepreg integrity
Jeez, I was just getting warmed up with an answer until you
referenced the
Engelmaster. Now, I've become technet shy.
Anyway, I yeild to a position of one so much knowledgeable about
matters
laminataion/relamination. Love you Werner, but this might be about
what the
poor "downcast" recluse is complaining. How can we lesser beings
compete? It
ain't possible, yet you ask the question - Steve. Still, I can't
help but
learn and respect.
Earl Moon
----- Original Message -----
From: Wanner Bernhard <[log in to unmask]>
To: <[log in to unmask]>
Sent: Friday, August 27, 1999 11:35 AM
Subject: [TN] crushed prepreg integrity
> Hi all
>
> I have to analyze failures of a subassemblies of our
subcontractor. As
cause
> of problem I suppose cracks/voids in the prepreg (of a16-layer
pcb),
caused
> either by poor siloxane-treatment between glass and epoxide - or -
because
> crushing of prepreg integrity by microlocal mechanical stress
during the
pcb
> press operation. As cause of this stress I assume following:
During the
> press operation the prepreg conforms to the bounds formed by the
laminate
> and their conductors at both sides. Between the walls/shoulders
ot two
> buried vias the prepreg will be pressed, the resin will flow away,
but the
> glass will be squeezed. I think glass fibres squeezing together
can
resulte
> to resin recession.
>
> But let me tell you some details: The failing subassemblies I've
to
analyze,
> contains transformer windings which are implemented as a 16-layer
pcb. The
> winding shows dielectric breakdown between different winding
layers (and
> sometimes between different windings on the same layer). This
breakdown
> happens after some hours run-in at 120°C and 500VDC (500VDC as
test
voltage,
> failures also at lower tension at at AC) .Before them, all pcb has
passed
> successful a hi-voltage test at ambient temperature.
> The diel. strength for the closest distance of 65mm prepreg should
be
around
> 2.5kV, or a little bit less because IPC-2221, § 4.1.2, not 500V!
> I tend to see any loss of the electric strenght of a
laminate/prepreg as
> function of the temperature, the hi-temp aging, and material
defects.
> The occuring pcb temperature of 120°C seems in accordance with
IPC-2222, §
> 4.3. So I'm looking for material defects, especially cracks: if
cracks
span
> a part of
> the 65mm (prepreg), the electric strenght will decrease, because
the
> electric strenght of a cracks (like air) amounts 1kV/mm (instead
of
40kV/mm.
>
>
> Hope to get some engelnotes.
>
> Bernhard
>
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