IPC PRINTED CIRCUITS EXPO 2000 

"Where the Boards Are"

CALL FOR PAPERS

Conference/Meetings: April 2 - 6, 2000
Exhibition:  April 4 * 6, 2000

San Diego Convention Center, San Diego, CA

www.ipcprintedcircuitexpo.org

Produced by: IPC
Sponsored by:, Arizona Printed Circuits Association, California Circuits Association,
Chicagoland Circuit Board Association, Michigan Printed Circuit Association, Midwest
Circuits Association, North East Circuits Association, IPC Designers Council 

In Cooperation With:  Circuit World Magazine, CircuiTree Magazine, Circuits Assembly
Magazine, European Federation of Interconnection and Packaging, European Institute of
Printed Circuits, Future Circuits International, Japan Printed Circuit Association,
PAC/Asia Circuit News, PCB International, Printed Circuit and Micro Circuit Journal ,
Printed Circuit Design Magazine, Printed Circuit Europe Magazine, Printed Circuit
Fabrication Magazine, Printed Circuit Interconnection Federation, , SMT Magazine,
Targeting Singapore Electronics Audience, The Good PCB Guide

WHERE THE BOARDS ARE
IPC PRINTED CIRCUITS EXPO is where the boards are and where you'll find the people
who design, build and use them. It is the largest conference and exhibition in North
America for the printed circuit industry.  This event is an excellent opportunity for
you to get involved by presenting a paper or writing the standards and guidelines
that the industry uses. 

Participating in IPC Printed Circuits Expo is a great way for you and your company to
gain visibility in the industry. Distribution of the conference proceedings to over
1,500 companies and individuals will help insure that your paper is seen by key
engineers and managers throughout the industry. When these industry leaders write new
standards and guidelines, they will refer to your findings and research.

The Technical Conference at IPC Printed Circuits Expo is a major attraction.  Over 80
papers on topics such as board design, materials, manufacture and assembly technology
will be presented.  A few of the technical sessions in 1999 were standing room only
crowds! Whether you choose to present an original paper, chair a technical session or
lead a workshop or tutorial, your contribution to IPC Printed Circuits Expo will be
rewarding for you and valuable to the industry.

HOW YOU CAN PARTICIPATE
Chair a Technical Session
Act as chairperson and organize a technical session of approximately four speakers
from different companies, each presenting on various areas of a common theme. 
Presentations should be geared to an audience involved in the printed wiring board
fabrication and non-commercial in nature.  

Individuals interested in chairing a Technical Session should reply by 
August 12, 1999.

Lead a Workshop or Tutorial
Educate your peers and contribute to the industry by teaching a three-hour workshop
or seven-hour tutorial (the workshop or tutorial leader provides their own
materials.)  An honorarium is offered for leaders.

The deadline for workshop & tutorial proposals is September 2, 1999

Workshop and tutorial presenters must provide all final handbook materials by 
February 21, 2000.

Present a Paper
Be a speaker at one of the technical sessions. This requires the submission of a
single-page abstract of original and unpublished work covering case histories,
research or discoveries.  The abstract should summarize the problem, the methods used
and the results of the experiment(s).  Since the selection process is competitive,
sufficient detail should be included in the abstract to allow the Technical Program
Committee to assess the technical content of the proposed paper.  

Abstracts must be received by September 2, 1999.

The paper should be a minimum of six pages and describe significant results from
experiments, emphasize new techniques, discuss trends of interest and contain
technical and/or appropriate test data.  Papers focused on a company's product,
rather than the technology, will not be accepted.  Presentations without a paper are
not permitted.  On site presentations are 30 minutes in length. 

Papers must comply with IPC publication guidelines and be submitted by 
January 14, 2000.

BENEFITS OF PARTICIPATING
Contribute to the Industry
Are you interested in making a contribution in educating the industry?  Are you ready
to position yourself and your company as technical experts?  Do you want the
opportunity to research an area of interest?  Move forward in areas of new
technology?  Here's the opportunity you have been waiting for*participate in the IPC
Printed Circuits Expo Technical Program.

Receive a $1,000 Award and Industry Recognition 
The author of the best technical paper will be awarded $1,000 and a recognition
plaque.  Congratulations to the Best Paper Authors in 1999: James Keating; Robert
Larmouth and Greg Bartlett of Teledyne Electronic Technologies.

Special Passes and Discounts
As a conference speaker, you will be entitled to a free, single-day conference pass
or discounted registration fee for the conference and a copy of the proceedings. 
Complimentary admission to the exhibits and reception on the show floor is also
included.

IPC PRINTED CIRCUITS EXPO 2000 TECHNICAL PROGRAM COMMITTEE: Linda Self, Chair, Litton
; Michael Carano, Electrochemicals, Inc.; Jack Fisher, ITRI; Bill Foran , Miller
Freeman Inc ; Tom Gardeski, E. I. du Pont de Nemours and Co.; Cef Gonzalez, E. I. du
Pont de Nemours and Co. ; Foster Gray, PC Interconnects; Pat Kane, Diversified
Systems Inc.; Ed Kelley, Compositech Ltd. ; Brian Mc Dermott, MicroVia, Inc.; Ray
Rasmussen, CircuiTree Magazine ; John Sharp, Teradyne Connection System; Doug Sober ,
isolaUSA ; Gene Weiner, Weiner & Associates, Inc.

SUGGESTED TOPICS:
The Future of the Printed Circuit Board
--Component Free PCBs (Buried Resistors/ Buried Capacitors/ Buried ICs?
--Which HDI Processes Will Rule?
--OEM Roadmaps for HDI PWBs
--Fine Line Requirements
--The Changing Face of PCB Acceptability
--Flip Chip, CSP, and BGA as PB Drivers 
--Manufacturing Infrastructure Changes

High Density Interconnect Technology Solutions
--Tomorrow's Microvias
--Reliability/Failure Analysis Techniques
--Infrastructure Development
--Case Studies
--HDI & Microvia Production
--Plating of Microvias
--Laser Direct Imaging 
--Material & Processing Requirements for HDI
--Drilling vs. Ablation/Plasma Etching
--Sequential Build-Up
--Plugged, Filled and/or Tented Vias

PC Board Fabrication
--Fine Line Imaging/Controlling Conductor Widths
--Horizontal Plating of Thin Cores
--Periodic Pulse Reverse Plating 
--Direct Metallization
--Reducing Hole Size
--Plating Rack Construction Effects on Current Distribution 
--High Aspect Ratio Plating
--Bond Enhancement 
--Process Improvements and Process Control
--Impedance Modeling

Flex Circuits Processing
--Flex Opportunities in Chip Scale and Advanced Packaging
--New Applications & Processing Implications
--Fine-line Flex
--Roll to Roll Processing
--Laser Processing Technologies

Flex Circuits Materials/Reliability
--Adhesiveless vs. Adhesive Based Laminates
--New Material Options for Flexible Circuitry
--Copper for High Endurance Flex
--Covercoats
--Flexural Fatigue Testing

Designing for Leading Edge Manufacturing
--Designing for Lower Cost
--High Speed and Impedance Control
--Design for Manufacture
--Design of Microvias/HDIS
--New Design Tools for PWBs
--EMI/RFI, Noise Related Issues
--CAD Design of HDI & SMT

Environmental Concerns
--Environmental Cost Accounting Tools
--ISO 14001/Environmental Management Systems (EMS)
--Environmentally-Friendly Manufacturing Materials/Methods
--Taking the Lead Out of HASL
--Cost Effective Compliance with OSHA and EPA
--Recycling

Dielectric Materials (HDI Alternatives to FR4)
--Reinforced Materials
--Non-reinforced Materials
--New/Alternative Resins 
--Thermal Reliability
--New High Tg Epoxy Systems
--Measuring Dielectric Constant
--Conductive Materials
--Exceeding Current Limitations of Today's Materials

Materials Used In-Process
--Electroplating/Electroless Plating
--Imaging
--Soldermask
--Oxide Alternatives
--Inks, Pastes & Thick Films

Surface Finishes for High Tech Boards (Final Finishes)
--Alternatives to HASL
--Organic Solderability Preservatives
--Reliability Data
--Component Lead Compatibility
--Deposition Processes

Electrical Testing * HDIs Final Challenge
--Boundary Scan
--AOI
--Testing Blind & Buried Vias
--High Volume Testing for HDI
--Non Contact Tests

Solderability Testing
--Wetting Balance
--SERA
--Alternative Finishes
--Analytical Control of Plating Solutions

Quality and Reliability - How Do You Know?
--Ionic Contamination 
--Plated Through-Hole Reliability
--Design of Experiments
--Reliability Comparisons Between Today's Board and Yesterdays
--Continuous Process Improvement
--Reliability testing & methods for PTH's & Microvias 
--Reliability for High Aspect Ratio Vias
--Aging and Long Term Reliability
--Failure Analysis 
--Reliability Modeling
--Implementing Standards
--Simulation of Fatigue

(Please note that these are suggestions.  If you have a paper outside of these
topics, we greatly encourage that you submit your abstract.)

Free Forums
--Technology Roadmaps
--Market Trends & Segmentations
--Supply Chain Management

______________________

Call for Papers Submission Form: 

I am interested in:
  ? Chairing a Technical Session 
? Presenting a Paper
? Leading a Workshop or Tutorial
? Attending IPC Printed Circuits Expo 2000. Please send me more information when
available. 

  ? IPC Member
? Nonmember
? I would like to receive event information by e-mail.

-----------------------------------------
Name:  Mail Stop:
Title:
Organization:
Address:
City/State/Zip:
Phone:  Fax:  E-Mail:

Presentation Category:
Presentation Title:

Submission Dates:
Chair Reply:  August 12, 1999
Abstracts:  September 2, 1999
Technical Paper:  January 14, 1999

Fax or mail this form, along with your abstract to:
Stephannie Caliendo, IPC Phone: 847-790-5302
2215 Sanders Rd.  Fax:  847-509-9798
Northbrook, IL  60062 E-mail: [log in to unmask]

FOR MORE INFORMATION ON IPC PRINTED CIRCUITS EXPO VISIT:
www.ipcprintedcircuitexpo.org