TECHNET Archives

July 1999

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Thomas Han <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Fri, 9 Jul 1999 07:54:08 -0700
Content-Type:
text/plain
Parts/Attachments:
text/plain (9 lines)
I'm running a kit which requires placing 2 484 pin fine line BGA's(Altera-
1.00mmpitch, dimensions of the BGA is smaller than that of standard
256PBGA)  Upon inspecting the fabs, I noticed high number of vias that are
filled with solder. I am concerned about the high probability of solder
bridges upon reflow.  Any suggestions or input on how I should go about
doing it?

Tom

ATOM RSS1 RSS2