Alan,
        Without masking the vias from the bottom prior to wave, you have
the potential to either perform a 'second reflow' on the BGA during wave
or cause voids/flux entrapment in the joints, or both. The voids can be
impressive, 40-50% of the sphere. There has been a lot of discussion
both here and on SMTNet regarding vias in BGA pads, with the majority
opinion being "Don't Do It!". If you must, plate the vias closed rather
then just HASL fill. This will eliminate the wicking/voiding and should
eliminate the masking requirement.

Mike McMonagle
PCA Process Engineering Supervisor
K*Tec Electronics
1111 Gillingham Lane
Sugar Land, TX  77478
(281) 243-5639 Phone
(281) 243-5539 Fax
[log in to unmask]

> -----Original Message-----
> From: Alan Kreplick [SMTP:[log in to unmask]]
> Sent: Monday, April 26, 1999 1:44 PM
> To:   [log in to unmask]
> Subject:      [TN] BGA Vias
>
> Hello Technetter's:
>
> Hey, does the following look familiar?   I sent this problem out last
> week but
> was 0 for 1743.  Any responses via Technet or direct would be greatly
> appreciated
>
> Our BGA process (for a mixed-tech pcb) historically was to:
>
>    fill (solder) the vias with a bottom-side stencil
>    place & reflow the BGA on the top-side
>    mask the BGA location and wave the thru-hole components
>
> Note:  via fill required for In-circuit Test for their probes and/or
> for vacuum.
>
> Question: What is the risk of exposing the BGA vias to the wave?  ie:
> reflow the
> bga, cause voids, or ????
>
>
> Thanks in advance,
>
> Al Kreplick
> Sr. Mfg. Eng.
> Teradyne, Inc
> Boston, MA
> 617-422-3726
>
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