Not sure what you meant by "bad cpk" but we saw .010" variance along a scored
edge when looking under a microscope.  We reverted to routing out all critical
edges and routing the rest of the edge.

Todd



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 pic20890.pcx) 04/21/99 06:58 PM




Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond to
      Lee PengSoon-CPL035 <[log in to unmask]>

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cc:    (bcc: Todd Vorpahl/DIL/Teradyne)
Subject:  [TN] PCB Scoreline (V cut) tolerance




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Hi all,
We are have problem on oversize pcb width due to the bad cpk of the v-cut
location.
what is the v-cut tolerance should be set so that it is 6 sigma achieveable?
Any industrial standard??


Regards,
Lee

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