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April 1999

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Subject:
From:
"Gerald G. Gagnon" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Thu, 15 Apr 1999 16:51:08 -0400
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Hi David

Thanks for the reply. I also got a response from Kelly Schriver but
forgot to include the Technet on my response so I'll do it here.

First, I lied. The circuit size is not 18" by 20 " but is 14" by approx.
18". Nothing to do with this discussion though.

I have been a heavy listener to past postings on the Immersion Au/
Electroless Ni discussions. I have read the paper you referenced as well
as several others that have been mentioned in these discussions. We use
a lot of large (50mm square 696 pin) plastic BGAs and have seen shock
failures at the BGA substrate sites exactly as described in some of
those papers.

In my case, since the PWB needs electrolytic nickel / hard gold for the
LGAs, I was wondering why it would not be feasible to electroplate the
entire surface (i.e. as the etch resist) as well. We used to do this
back in the "old days". This would be opposed to some form of selective
solder strip (or selective HASL) followed by electrolytic nickel/gold
process. Whatever.

The added benefit of the surface planarity is a plus. Also because the
board does not see heat, it has better etch feature location accuracy
and less warpage. At least until the first assembly thermal exposure. We
have studied this. Finally there is one less thermal stress the PTHs
will see.

Assuming that hard gold could be relied upon as a solderable surface, I
had calculated that there would not be excessive gold in the solder
joints based on the SMT pitch and paste volumes we'd be using.

I have recently heard that the assumption regarding hard gold
solderability is not necessarily correct. I would welcome some education
from the community here.....

I also understand that although there may not theoretically be excessive
gold in the joint, the intermetallics can stratify and create issues if
the assembly thermal profile is not conducive to gold diffusion. I would
also appreciate an education here as well......

At any rate, I have time to make a reasonably good decision. I was just
hoping not to have to resort to multiple surface finishes selectively
applied.

What I was after though was more in line with any hidden assembly issues
with Nickel/gold systems. Assuming an assembler is used to a HASL coated
board, are nickel/gold boards direct "drop-ins" to the assembly process?
Repair process?

Appreciate any and all response.

Regards

/Gerry



-----Original Message-----
From:   David D Hillman [mailto:[log in to unmask]]
Sent:   Thursday, April 15, 1999 8:06 AM
To:     [log in to unmask]
Subject:        Re: [TN] Assembly process differences between HASL and
nickel /gold surface finishe

Hi Gerry - I suggest that you take a look at  the following paper:
"The Root Cause Failure Mechanism for Solder Joint Integrity of
Electroless
Nickel/Immersion Gold Surface Finishes", Nicolas Biunno, IPC Expo
Proceedings, paper S-18-5
There have been some instances where the Immersion Au/ Electroless Ni
has been a problem finish for some assemblers. The paper details some
possible reasons for those reported problems.  I have not experienced
any problems with the use of Immersion Au/ Electroless Ni finishes but I
am also using it in some very specific product applications. The
Immersion Au/ Electroless Ni is very flat thus making placement of fine
pitch and area array components much better than a HASL finish. Good
Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]

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