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Reply To: | DesignerCouncil E-Mail Forum. |
Date: | Mon, 19 Apr 1999 09:49:28 -0700 |
Content-Type: | text/plain |
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I would like to thank everyone who took the time to share their experience
regarding trace inductance. In summary, there was only one comment about the
possible side effect of a loop antenna, but since their was no discussion
there (and I don't understand loop antennas) I'll ignore that one (ha, just
kidding, ...kinda)
But other than that, there doesn't seem to be any real down side to using
two vias, one on each side of the IC pin, for powers and grounds, except for
the fact that it makes the fanouts more difficult on fine pitch parts, which
only bothers ME, the lowly layout guy.
So I'll put these in a neat little folder and get back to work...
Thanks again,
Jack
-----Original Message-----
<< Message: TRACE INDUCTANCE >> << Message: Re: Trace
Inductance >> << Message: Re: Trace Inductance >> << Message: Re: Trace
Inductance >> << Message: Trace Inductance >> << Message: Re: Trace
Inductance >> << Message: Re: Trace Inductance >> << Message: Re: Trace
Inductance >> << Message: Re: Trace Inductance >> << Message: Re: Trace
Inductance >> << Message: Re: Trace Inductance >> << Message: Trace
Inductance >> << Message: Re: Trace Inductance >>
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