I have done alot of work with via's, via sizes, number of via's, the way they connect to the pad and the
affect the configuration has on RFI, capacitance and inductance. From my experience, there are some many
dynamics involved that you will find on one board the idea works great!  Then on the production boards the
idea didn't work so well.

I would like to make a suggestion that may help you.  create a design that has the configuration the way it
was suggested from others, add your design and play with a few different ideas, add them all to your test
design,.  then run your gerbers.  Then the next time you send a board out to be fabricated ask the
fabricator to insert the gerbers for your test design on your panel in some unused space.  the fabricators
tooling area is a good choice for this.  Then ask them to fabricate your boards as normal and send you the
scrap (bingo neat little test boards, cheap!.  The main issue here is that nothing anyone can tell you is
going to matter until you can test it out.  From my experience RF and high fequency is still a black art.
If you have a good relationship with your board supplier they would be glad to do this for you, it will
also allow you to play around with all kinds of trace/pad configurations.

Jack Olson wrote:

> I'm curious about something I read in an article on trace inductance. We
> design boards that are 1.9GHz, and the engineers are so worried about
> inductance that every decoupling cap (other components too) has two vias per
> pad. It seems to me that its not the two vias that make any improvement, but
> the fact that there are now two traces instead of one connecting the pad to
> the plane.
> But these traces are SO SHORT... is the inductance of a 20 mil trace that
> travels a short distance (maybe 10 to 100mils) something to worry about? How
> do you know when a trace has enough inductance to be a problem? (is there a
> short answer? grin...)
>
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